JP2011188431A - Variable length decoding apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the number of cycles required for "Run_before" decoding processing in H.264 decoding processing. <P>SOLUTION: In a variable length decoding apparatus, a decoding look-up table to be referenced in the "Run_before" decoding processing is optimized, thereby reducing the number of times of accessing the look-up table, and 14 decoding processing cycles at a maximum required up to now can be reduced to a single cycle. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a variable-length decoding device, and more particularly to reduction of the number of processing cycles in decoding processing of an H.264 variable-length encoded stream.

The H.264 coding scheme employs two entropy codings, adaptive modulation coding (CAVLC) and arithmetic coding (CABAC), and a decoding process of a coded stream generated by these entropy codings. Is described in the ISO / IEC 14496-10 standard. The present invention relates to CAVLC, and here, a conventional CAVLC decoding process will be described.
CAVLC is an abbreviation for context-based adaptive variable length coding, and adaptively specifies the encoding code in the input encoding stream and the reference address of the decoding table that is referenced using the decoding symbol obtained in the decoding process. By changing, the encoded code in the encoded stream is decoded.

FIG. 3A is a block diagram showing a configuration of an example of a conventional variable length decoding device. The decoding process in the conventional variable length decoding device will be described with reference to FIG. 3A. Reference numeral 300 is a conventional variable length decoding device, 101 to 104 and 305 are decoding units, 106 is a level coefficient unit, and 308 is a combining unit.
The five decoding units 101 to 104 and 305 perform the following decoding in order from the decoding unit located in the preceding stage. That is, the decoding unit 101 decodes the Coeff_token coefficient symbol of the input encoded stream, the decoding unit 102 decodes the Trailing_ones coefficient symbol, the decoding unit 103 decodes the level coefficient symbol, and the decoding unit 104 calculates the Total_zeros coefficient symbol. The decoding unit 305 decodes the run coefficient symbols. Each decoding unit can start decoding using the decoded symbol when the preceding decoding process is completed.
A series of decoding processes is performed in units of 4 × 4 pixel blocks called sub-macroblocks (SMB). Then, the decoding unit 101 and the decoding unit 102 respectively decode the Coeff_token coefficient and the Total_zeros coefficient once per SMB. Also, the decoding units 103, 104, and 305 repeatedly perform symbol decoding processing on the Trailing_ones coefficient, the level coefficient, and the run coefficient according to the input encoded stream, respectively. Therefore, in order to perform 1 SMB decoding processing, the decoding table must be accessed multiple times.

In the variable length decoding device 300 of FIG. 3A, the encoded stream is input to the decoding unit (Coeff_token decoding unit) 101. The decoding unit 101 executes a symbol decoding process for the symbol Total_coeff indicating the number of level coefficients in the SMB from which decoding is to start. FIG. 3B shows an internal functional configuration of the Coeff_token decoding unit 101.
The Coeff_token decoding unit 101 includes a stream storage unit 120 for buffering an encoded stream, a stream supply unit 121 including a shift register, and the Coeff_token described in JVT-G0501 of the ISO / IEC 14496-10 standard. It comprises a decoding table 122 and Total_coeff storage means 123 for temporarily storing decoded symbols.

The processing operation of the Coeff_token decoding unit 101 will be described using the Coeff_token decoding unit 101 in FIG. 3B.
In FIG. 3B, the stream storage unit 120 buffers the encoded stream. The stream supply unit 121 takes in the encoded stream to be decoded from the stream storage unit 120 and outputs it to the Coeff_token decoding table 122.
The Coeff_token decoding table 122 matches the input streams in order from the first bit, and if they match, the associated value becomes Total_coeff as a symbol. The decoded Total_coeff indicates the total number of level coefficients in the SMB, and is a symbol necessary for the subsequent decoding unit. For this reason, it is output to the Total_coeff storage means 123, and the Total_coeff storage means 123 stores this symbol. At this time, the Coeff_token decoding table 122 outputs (feeds back) the bit length of the matching encoded code to the stream supply unit 121 as a consumption bit.
The stream supply means 121 shifts the read position of the next stream by the consumed bit length fed back so that the encoded stream can be read from the head of the next encoded code.
When the stream supply means 121 shifts the stream by the consumed bit length, the processing shifts to the Trailing_ones decoding unit 102 assuming that the processing of the Coeff_token decoding unit 101 is completed.

  The Trailing_ones decoding unit 102 is a decoding unit that decodes a symbol related to the code of the coefficient “1” in the level coefficient indicated by Total_coeff temporarily stored in the Total_coeff storage unit 123, and uses a decoding table in the same manner as the Coeff_token decoding unit 101. Processing is performed.

Next, the processing operation of the level decoding unit 103 will be described using the internal functional block diagram of the level decoding unit shown in FIG. 3C.
The level decoding unit 103 is a decoding process for level coefficients, and corresponds to unsigned Golomb decoding in the H.264 encoding method. Here, a general decoding method of unsigned Golomb decoding will be described.

The level decoding unit 103 includes a stream storage unit 120 and a stream supply unit 121 that are common to the above-described Coeff_token decoding unit 101. In addition, a prefix decoding unit 130, a prefix storage unit 131, a suffix decoding unit 133, and a level code calculation unit 132, Consumption bit selection means 134 is provided.
Similar to FIG. 3B, the stream storage unit 120 buffers the encoded stream. The stream supply unit 121 takes in the encoded stream to be decoded from the stream storage unit 120 and outputs it to the prefix decoding unit 130 and the suffix decoding unit 133.
When the encoded stream of the stream storage unit 120 is supplied from the stream supply unit 121, prefix processing is first performed. The prefix decoding unit 130 compares the supplied stream with a bit string corresponding to a prefix value prepared in advance in the decoding table, and obtains the bit length of the stream that completely matches the prefix value. The matched prefix value is temporarily stored in the prefix storage unit 131 and the bit length information is output to the stream supply unit 121 via the consumption bit selection unit 134.
The stream supply unit 121 shifts the encoded stream by the bit length input from the consumption bit selection unit 134, and starts decoding of the encoded code corresponding to the suffix from the next cycle. Normally, based on a timing signal input from the outside, the control is switched so that the suffix decoding unit 133 becomes effective from the next cycle after the prefix decoding unit 130 ends.
On the other hand, the suffix decoding unit 133 recognizes the valid bit of the supplied encoded stream based on the prefix value stored in the prefix storage unit 131 and performs processing. Further, the level code calculation unit 132 performs a predetermined calculation process using the prefix decoded symbol stored in the prefix storage unit 131 and the decoded symbol decoded by the suffix decoding unit 133, and outputs a level coefficient as a decoding result. To do. At the same time, the suffix decoding unit 133 outputs the consumed bit length to the consumed bit selecting unit 134.
The consumption bit selection means 134 determines whether the valid decoding means is the prefix decoding means 130 or the suffix decoding means 133 according to the timing signal, and outputs the input consumption bits to the stream supply means 121. In decoding of one symbol, the stream supply means 121 needs to read two streams of prefix decoding and suffix decoding, so two cycles are required. Further, the iterative processing of the level decoding unit matches the number of level coefficients, and the maximum number of decoded symbols per SMB is 15 coefficients. Therefore, the maximum number of processing cycles assumed by the level decoding unit 103 is 30 cycles. As for the unsigned Golomb decoding method, some proposals have been made to shorten the cycle by simultaneously processing the prefix and the suffix, and there is Patent Document 1 as an example.

  Next, the processing operation of the Total_zeros decoding unit 104 will be described using an internal functional block diagram of the Total_zeros decoding unit shown in FIG. 3D. Total_zeros of the symbol to be decoded represents the number of zero coefficients existing in a one-dimensional array from the significant coefficient located on the high frequency component side to the DC component when 4 × 4 SMB is reverse scanned from the high frequency component side. It is. As shown in FIG. 3D, similar to the Coeff_token decoding unit 101, an encoded stream is fetched from the stream storage unit 120 into the stream supply unit 121, and the Total_zeros decoding table 140 described in JVT-G0501 of the ISO / IEC 14496-10 standard. To obtain the bit length of the encoded stream that matches Total_zeros.

Total_zeros is temporarily stored in the Total_zeros storage unit 141, and the bit length is sent to the stream supply unit 121 common to the decoding units 101 to 103 described above. The stream supply means 121 shifts the read position of the next stream by the consumed bit length received from the Total_zeros decoding table 140, so that the run_before decoding unit 305 that is the next decoding unit starts the encoded stream starting from the beginning of the encoded code. Can be entered.
That is, when the stream supply unit 121 shifts the stream by the number of consumed bits, the processing of the Total_zeros decoding unit 104 is completed, and the processing moves to the Run_before decoding unit 305. Since the total_zeros decoding unit 104 performs one process per SMB, the total number of processing cycles in the total_zeros decoding unit 104 is one cycle.

Finally, the Run_before decoding unit 305 will be described. The expanded stream finally output from the variable length decoding device 300 in FIG. 3A is a primary coefficient sequence in which 4 × 4 SMBs are arranged by reverse scanning from the high frequency component side.
The arrangement of the 16 coefficient sequences varies depending on the input encoded stream, and the level coefficient of the symbol previously decoded by the level decoding unit 103 corresponds to a non-zero coefficient constituting the coefficient sequence. For example, when the number of symbols of the level coefficient decoded by the level decoding unit 103 is less than 16, a zero coefficient is inserted between the level coefficient. That is, the Run_before decoding unit 305 decodes a symbol for arranging the level coefficient previously decoded by the level decoding unit 103 and the zero coefficient decoded by the Total_zeros decoding unit 104 to generate a zero coefficient This is a symbol related to the insertion position and the number of insertions. Using this symbol, the level coefficient and zero coefficient are arranged in the combining unit 308, and a final decompressed stream is output.

An internal functional block diagram of the Run_before decoding unit 305 is shown in FIG. 3E. The Run_before decoding unit 305 includes a stream storage unit 120, a stream supply unit 121, an address generation unit 150, a Run_before decoding table 151 described in JVT-G0501 of the ISO / IEC 14496-10 standard, and a Zeros storage unit 152.
The address generation unit 150 determines a reference address of the Run_before decoding table 151 based on the encoded stream fetched from the stream storage unit 120 to the stream supply unit 121 and Zeros_left input from the Zeros storage unit 152. The Run_before decoding table 151 decodes Run_before, which is a symbol indicating the presence / absence of zero coefficient insertion and the number at the time of insertion, and outputs it to the Run_before integration unit 153 and the combining unit 308. In addition, the Run_before decoding table 151 outputs the number of consumed bits to the start storage unit 120 via the stream supply unit 121 and stores it in the start storage unit 120. Similarly, the Run_before integration unit 153 integrates the input symbol Run_before and outputs it to the Zeros storage unit 152 to update data in the Zeros storage unit 152 (details will be described later).

The Run_before decoding process is repeated until Zeros_left input to the address generation unit 150 is updated to zero.
That is, the Run_before decoding unit 305 accesses the Run_before decoding table 151, and every time one symbol is decoded, the consumed bit length is sent from the Run_before decoding table 151 to the stream supply unit 121 and consumed by the stream supply unit 121. The read position of the next stream is shifted by the bit length.
At the start of decoding, the symbol Total_zeros decoded by the Total_zeros decoding unit 104 becomes the initial value of Zeros_left, and the reference address of the Run_before decoding table 151 is determined. In addition, when the symbol is repeatedly decoded after the second time, the symbol Zeros obtained by accumulating the decoded symbol Run_before by the Run_before accumulating unit 153 is subtracted from the symbol Zeros_left stored in the Zeros storage unit 152 and subtracted. The symbol Zeros_left updated and replaced with the result is used to adaptively change the reference address of the Run_before decoding table 151.

An example of a conventional Run_before decoding table 151 is shown in FIG. As a conventional example, a decoding process when the input encoded stream is specifically “10010000...” And Total_zeros = “7” will be described with reference to FIG.
As described above, when decoding starts, the value of Total_zeros becomes the initial value of Zeros_left. The head of the bit string supplied from the stream supply means 121 is “100...”. Therefore, the value of the first symbol Run_before (0) decoded in the Run_before decoding table of FIG. 4 is “3”. On the other hand, the Run_before (0) value of the decoding result is also output to the Run_before integration unit 153, and the accumulated zeros are output to the subsequent Zeros storage unit 152. The Zeros storage unit 152 subtracts the input Zeros from the value of Total_zeros, and stores this subtraction result (= “7” − “3”) as a new Zeros_left. Since Zeros_left ≠ “0”, the second decoding process starts.
In the subsequent decoding of the second symbol Run_before (1), Zeros_left = “4”, shifted by the consumption bit by the stream supply means 121, and the bit string starts from “10”, so Run_before (1) = “1”. Become. At the same time, Zeros_left in the Zeros storage unit 152 is updated to “3” (= “4” − “1”).
Similarly, for decoding of the third value of Run_before (2), Zeros_left = “3”, the bit is shifted by the consumption bit by the stream supply means 121, and the bit string starts from “00”. Therefore, Run_before (2) = “3” " In addition, Zeros_left of the Zeros storage unit 152 is “0” (= “3” − “3”). The above-described series of processing is repeated, and at the same time Zeros_left becomes “0”, decoding regarding Run_before is completed.
In the above example, three symbols Run_before (0), Run_before (1), and Run_before (2) are decoded until Zeros_left becomes “0”, which means that the Run_before decoding table 151 has taken three cycles.

JP 2007-60199 A

As described above, in 4 × 4 SMB decompression processing, necessary symbols are decoded by five decoding units or through five decoding processes. The number of processing cycles necessary for each decoding unit or each decoding process at this time is one cycle at each of the Coeff_token decoding unit 101 and the Total_zeros decoding unit 104, and other decoding units vary depending on the input encoded stream. The maximum number of cycles converted from the number of table accesses is 3 cycles in the Trailing_ones decoding unit 102, 30 cycles in the level decoding unit 103, and 14 cycles in the Run_before decoding unit 305.
Therefore, in the conventional configuration, about 50 cycles are required at the maximum to decode the encoded stream of 1 SMB. In particular, in the processing of the conventional Run_before decoding unit 305, whether or not the level coefficient and the zero coefficient are adjacent to each other is checked in order from the level coefficient on the high frequency component side, one level coefficient based on the Run_before decoding result. Even if the level coefficient is continuous and the zero coefficient is not adjacent, it must be decoded as a symbol that “there is no zero coefficient next to the level coefficient”. Therefore, there is a problem that the number of accesses to the Run_before decoding table 151 occurs as many as the number of level coefficients, and the number of cycles becomes long.
Therefore, an object of the present invention is to solve the above problem in the Run_before decoding unit 305 and reduce the number of cycles required for processing per 1 SMB. Specifically, in the Run_before decoding process of the H.264 variable length decoding process, in addition to the run coefficient indicating the alignment relationship between the non-zero coefficient (level coefficient) and the zero coefficient, the total number of zero coefficients ( Total_Zeros) The purpose is to reduce the number of cycles per SMB by using a lookup table that outputs Zeros symbols obtained by subtracting run coefficients and Skip symbols indicating the number of consecutive level coefficients. To do.

  In order to solve the above problems, the variable length coding apparatus of the present invention receives a coded stream, decodes a Coeff_token coefficient symbol, a Coeff_token decoding unit, a Trailing_ones decoding unit that decodes a Trailing_ones coefficient symbol, and a level coefficient A level decoding unit that decodes a symbol, a Total_zeros decoding unit that decodes a Total_zeros coefficient symbol, and whether or not the level coefficient and the zero coefficient are adjacent to each other without decoding Run_before sequentially from the level coefficient on the high frequency component side A Run_before decoding unit that optimizes a decoding lookup table so that the position where the zero coefficients are arranged and the number of the zero coefficients can be specified, a level coefficient unit, a combined information storage unit, and a combining unit are included. The number of cycles required for processing is shortened.

In order to solve the above problems, the variable length coding apparatus of the present invention reduces the number of accesses to a decoding table to be referenced in the decoding process of the H.264 variable length decoding apparatus, and reduces the number of decoding processing cycles per unit block. It is shortened.
In the Run_before decoding process of the H.264 variable length decoding process, in addition to the run coefficient indicating the alignment relationship between the non-zero coefficient (level coefficient) and the zero coefficient, the run coefficient is calculated from the total number of zero coefficients (Total_Zeros) in the unit block. The decoding process is performed using a decoding look-up table that outputs a Zeros symbol obtained by subtracting 0 and a Skip symbol indicating the number of level coefficients arranged in succession.

  In the Run_before decoding process of the H.264 variable length decoding process, the variable is characterized by adaptively reducing the number of processing cycles according to the total_zeros to be decoded, reducing the number of accesses to the decoding lookup table, and reducing power consumption. Long decoding device.

  According to the present invention, in the Run_before decoding process of the H.264 variable length decoding process, the decoding look-up table is optimized to reduce the number of accesses to the look-up table. The processing cycle can be shortened to one cycle.

It is a block diagram which shows the structure of one Example of the variable-length decoding apparatus in this invention. It is a figure which shows the internal function block of one Example of the Run_before decoding part of the variable-length decoding apparatus of this invention. It is a block diagram which shows the structure of one Example of the conventional variable length decoding apparatus. It is a block diagram which shows the internal function structure of the conventional Coeff_token decoding part. It is an internal functional block diagram of the conventional level decoding part. It is an internal functional block diagram of the conventional Total_zeros decoding part. It is an internal functional block diagram of the conventional Run_before decoding part. It is a conventional Run_before decoding table. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention. It is a figure which shows one Example of the decoding lookup table in the variable-length decoding apparatus of this invention.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In addition, the following description is for describing one embodiment of the present invention, and does not limit the scope of the present invention. Accordingly, those skilled in the art can employ embodiments in which these elements or all of the elements are replaced with equivalent ones, and these embodiments are also included in the scope of the present invention.
In addition, in this document, in the following description of each drawing including FIGS. 3A to 3E and FIG. 4 described above, the same reference numerals are assigned to components having common functions, and the description thereof is omitted.

  FIG. 1 is a block diagram showing a configuration of an embodiment of a variable length decoding device according to the present invention. An embodiment of a decoding process in the variable length decoding device of the present invention will be described with reference to FIG. 100 is a variable length decoding device of the present invention, 105 is a decoding unit (Run_before decoding unit), 107 is a combined information storage unit, and 108 is a combining unit. The variable length decoding device 100 of FIG. 1 is provided with a decoding unit 105 instead of the decoding unit 305 and a combining unit 108 instead of the combining unit 308, as compared with the conventional variable length decoding device 300 (see FIG. 3A). A combined information storage unit 107 is provided between the decoding unit 105 and the combining unit 108.

  The five decoding units 101 to 105 decode the symbols of the Coeff_token coefficient, the Trailing_ones coefficient, the level coefficient, the Total_zeros coefficient, and the run coefficient in order from the decoding unit located at the upper level. Each decoding unit 101-105, when the upper decoding process is completed, the decoding process can be started using the decoded symbol, the same as the conventional decoding process, the decoding units 101-104, level The coefficient storage unit 106 has the same configuration and function as those of the conventional variable length decoding device 300 in FIG. 3A. Therefore, here, the Run_before decoding unit 105, the combination storage unit 107, and the combination unit 108 which are different from the conventional one will be described.

  First, the configuration and operation of the Run_before decoding unit 105 according to the present invention will be described with reference to FIG. FIG. 2 is a diagram showing internal function blocks of an embodiment of the Run_before decoding unit 105 of the variable length decoding device of the present invention. 251 is a Run_before decoding lookup table, 252 is Zeros_left selection means, and 253 is Zeros_left storage means. The Run_before decoding unit 105 in FIG. 2 is compared with the conventional Run_before decoding unit 305 (see FIG. 3E), and instead of the Run_before decoding table 151 described in JVT-G0501 of the ISO / IEC 14496-10 standard, the Run_before decoding lookup table 251 is provided, a Zeros_left selection unit 252 is provided instead of the Zeros_left selection unit 152, and a Zeros_left storage unit 253 is provided instead of the Zeros_left integration unit 153.

In the embodiment of FIG. 2, the stream storage means 120, the stream supply means 121, and the address generation means 150 are the same as in the prior art. The Zeros_left selection unit 252, the Run_before decoding lookup table 251, and the Zeros_left storage unit 253 are the parts that characterize the present invention.
The encoded stream fetched from the stream storage unit 120 to the stream supply unit 121 and Zeros_left stored in the Zeros_left selection unit 252 are input to the address generation unit 150 to generate a reference address of the Run_before decoding lookup table 251. .
The Run_before decoding lookup table 251 has the same interface as the conventional decoding table, but is the same in that the Run_before decoding table changes according to Zeros_left. However, the Run_before decoding lookup table 251 of the present invention focuses on a bit string of “1” continuously arranged from the head of the encoded stream when the conventional decoding table is optimized and matched with the encoded stream. And perform all bit search. As a result, unlike the conventional Run_before decoding table 151, in addition to the Run_before value, the Skip value indicating the arrangement of the level coefficient and the zero coefficient and the new zeos_left, which are associated with the matching code, can be output simultaneously as a decoding result. it can.

An embodiment of the decoding lookup table of the present invention will be described with reference to FIGS. 5A to 5X. 5A to 5X are diagrams showing an example of a decoding lookup table in the variable length decoding device of the present invention.
5A to 5X, the decoding lookup table is classified according to the input Zeros_left, and has 14 types of tables from Zeros_left = 1 to Zeros_left = 14. Also, the maximum bit width of the code stream referred to in one cycle is 25 bits from the head of the encoded stream, and the next three symbols, “1” and “0” in the 25 bits, and the next three symbols, Skip , Run_before and Next_Zeros_left are output at the same time every access.
Here, “Skip” is a symbol indicating whether or not these level coefficients become a continuous coefficient sequence when there are a plurality of decoded level coefficients. When Skip = “0”, the level coefficients are continuous. This means that zero coefficients are inserted during this time as many times as indicated by Run_before decoded at the same time.
The decoded symbol Next_Zeros_left is a symbol for determining whether or not the next cycle is necessary in the decoding of Run_before. A value obtained by subtracting Run_before from Zeros_left is assigned to Next_Zeros_left in advance, and Next_Zeros_left = “0”. The Run_before decoding process is repeated until “

On the other hand, when Next_Zeros_left ≠ “0”, the Run_before decoding lookup table 251 outputs the Next_Zeros_left value to the Zeros_left storage unit 253, and the Zeros_left storage unit 253 stores the input Next_Zeros_left value. At the same time, the Run_before decoding lookup table 251 outputs the bit length consumed by the Run_before decoding lookup table 251 to the stream supply unit 121. Then, when the next encoded stream whose read position is shifted by the consumed bit length is supplied from the stream supply unit 121, the Next_Zeros_left value stored in the Zeros_left storage unit 253 passes through the Zeros_left selection unit 252. And output as a new Zeros_left.
The Skip, Run_before, and Next_Zeros_left symbols decoded by the Run_before decoding process are stored in the subsequent combination information storage unit 107.
Finally, the combining unit 108 inserts a zero coefficient into the level coefficient stored in the level coefficient storage unit 106 in comparison with the result of the combined information storage unit 107, and combines it with a one-dimensional coefficient sequence. Is output.

Hereinafter, compared with the Run_before decoding process using the conventional decoding table, the above embodiment is compared with the process recycle number of the Run_before decoding process.
In the 4 × 4 SMB, there are 15 level coefficients that have already been decoded by the level coefficient decoding unit 103, Total_zeros = “1”, and the input encoded stream is “11111111111110...”.
As described in the related art, when decoding is started, the value of Total_zeros is the initial value of Zeros_left. Since the head of the bit string supplied from the stream supply means 121 is “1...”, The value of the first symbol Run_before (0) decoded in the Run_before decoding table of FIG.

  On the other hand, the Run_before (0) value of the decoding result is also sent to the Run_before integration unit 153, and the accumulated zeros are transferred to the subsequent zeros storage unit 152. The Zeros storage unit 152 subtracts the input Zeros from the value of Total_zeros, and stores this subtraction result (= “1” − “0”) as a new Zeros_left. Since Zeros_left ≠ “0”, the second decoding process starts. The subsequent decoding of the second symbol Run_before (1) is Zeros_left = “1”, shifted by the consumption bit by the stream supply means 121 and starts again from “1...”, So Run_before (1) = “0” It becomes. At the same time, Zeros_left of the Zeros storage unit 152 is updated to “1” (= “1” − “0”).

  In the input encoded stream, since “1” continues 11 times “111111111110...”, Run_before (2) = “0”, Run_before (3) = “0”, Run_before (4) = “0”,... Run_before (12) = “0” and 13 times after accessing the decoding table, the first bit of the input encoded stream becomes “0...” And Run_before (13) = “ 1 ”is sent to the Run_before integrating unit 153, and the accumulated zeros are changed to“ 1 ”and transferred to the subsequent Zeros storage unit 152. The Zeros storage unit 152 subtracts the input Zeros from the value of Total_zeros. As a result, Zeros_left = “0” (= “1” − “1”), and the Run_before decoding process ends. During this time, 14 decoded symbols (Run_before (0) to Run_before (13)) are decoded, and as a result, 14 cycles are required until decoding.

  On the other hand, when the decoding lookup table in the present invention is used, the decoding lookup table with Zeros_left = 1 is referred to among the four types of tables from Zeros_left = 1 to Zeros_left = 14. As a result, the code stream is pattern-searched from the first bit, the code string “11111111111110...” That matches all the bit patterns is found in one cycle, Skip = “13”, Run_before = “1”, Next_Zeros_left = “0” "Is decrypted. Since Next_Zeros_left = “0”, the Run_before decoding process ends. In addition, using this symbol, the combining unit 4 combines the same number (= 13) of Skip symbols with the same number (= 0) of Run_before symbols and the coefficient sequence in which zero coefficients are inserted after level coefficients are continuous. It becomes possible.

  As described above, according to the above-described embodiment, the number of accesses to the lookup table is reduced by optimizing the decoding lookup table in the Run_before decoding process of the H.264 variable length decoding process. It is possible to shorten the decryption processing cycle, which took 14 cycles at the maximum, to 1 cycle.

  101: 105: decoding unit, 106: level coefficient unit, 107: combination storage unit, 108: combination unit, 120: stream storage unit, 121: stream supply unit, 122: Coeff_token decoding table, 123: Total_coeff storage unit, 300: Conventional variable length decoding device, 305: decoding unit, 308: combining unit, 130: prefix decoding unit, 131: prefix storage unit, 132: level code calculation unit, 133: suffix decoding unit, 134: consumption bit selection unit, 150 : Address generation means, 151: Run_before decoding table, 152: Zeros storage means, 153: Run_before integration means, 251: Run_before decoding lookup table, 252: Zeros_left selection means, 253: Zeros_left storage means.

Claims (1)

  The encoded stream is input, and the Coeff_token decoding unit, the Trailing_ones decoding unit, the level decoding unit, the Total_zeros decoding unit, and whether the level coefficient and the zero coefficient are adjacent to each other are determined from the level coefficient on the high frequency component side. A Run_before decoding unit that optimizes a decoding look-up table so that the position where the zero coefficients are arranged and the number of arrangements thereof can be identified without sequentially decoding Run_before, a level coefficient unit, a combined information storage unit, and a combination A variable-length decoding device characterized by comprising a unit.

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