JP2011187033A - Current output device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a current output device capable of exactly detecting a stuck abnormality that an output current value sticks within a predetermined allowable range at low cost when the stuck abnormality is generated. <P>SOLUTION: The current output device includes: a current instruction means 25 for outputting a current instruction value of an output current; a current output means 4 for outputting the output current based on the current instruction value; return current detection means 5, 15 each detecting the output current; and an abnormality diagnostic means 26 for determining the return current value detected by the return current detection means as an abnormality when the return current value is out of an allowable range to the current instruction value where the abnormality diagnostic means 26 forcibly changes the current instruction value within an accuracy range of the output current value when the return current value is within the predetermined allowable range to the current instruction value, and performs current change abnormality diagnosis based on a change of the return current value at this time. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a current output device that outputs a current in a set reference range.

  As this type of current output device, for example, a transistor element having one end connected to the output terminal, a current detection resistor having one end connected to the other end of the transistor element, and a current detection resistor connected to the other end of the transistor element. A first operational amplifier that reads back the output current value from the applied voltage, and outputs a voltage corresponding to the deviation between the set value of the output current and the output current value read back by the first operational amplifier. A second operational amplifier that feeds back the output current value to the control terminal of the transistor element, a voltage detection circuit that detects an output voltage value of the second operational amplifier, and an output current read back by the first operational amplifier; An analog signal that determines that a break has occurred in the output line of the analog signal when the value is less than or equal to the predetermined reference value and the detected voltage value of the voltage detection circuit is abnormal in the predetermined reference value Force apparatus has been proposed (e.g., see Patent Document 1).

  In an analog output device that supplies an output current of a set reference range to an external device from a voltage source via an output terminal, a return current detection unit that detects a return current flowing through the external device, and a return current detection unit There has been proposed an analog output device including an abnormality diagnosing unit that determines that an abnormality is detected when a return current value acquired and read back is outside a predetermined allowable range with respect to the set output current (for example, , See Patent Document 2).

JP 2001-34348 A JP 2008-107224 A

However, in the conventional example described in Patent Document 1, the disconnection abnormality is detected based on the output current value read back and the output voltage value of the second operational amplifier that feedback-controls the output current value. However, there is an unsolved problem that it is impossible to detect a sticking abnormality in which an output current value sticks to a predetermined value due to, for example, an abnormality of a multiplexer.
Further, in the conventional example described in Patent Document 2, it can be determined that there is an abnormality when the return current value is outside a predetermined allowable range with respect to the set output current value. However, there is an unsolved problem that it is impossible to detect a sticking abnormality in which an output current value sticks within a predetermined allowable range due to a malfunction of the multiplexer.
Therefore, the present invention has been made paying attention to the unsolved problems of the above conventional example, and when a sticking abnormality occurs in which the output current value sticks within a predetermined allowable range, the sticking abnormality is reduced at a low cost. An object of the present invention is to provide a current output device that can be accurately detected.

  In order to achieve the above object, a current output device according to an embodiment of the present invention includes a current command unit that outputs a current command value of an output current, and a current output unit that outputs an output current based on the current command value. And a return current detection means for detecting the output current, and an abnormality diagnosis means for determining an abnormality when the return current value detected by the return current detection means is outside an allowable range with respect to the current command value. The abnormality diagnosing means forcibly changes the current command value within the accuracy range of the output current value when the return current value is within a predetermined allowable range with respect to the current command value. The current change abnormality diagnosis is performed based on the change in the return current value.

According to this configuration, the abnormality diagnosis means forcibly changes the current command value within the accuracy range of the output current value when the return current value is within a predetermined allowable range with respect to the current command value. It can be determined from the change in the return current value whether there is an abnormality in the sticking of the output current.
Further, in the current output device according to another aspect of the present invention, the abnormality diagnosing means sets the output current value to a lower limit value of the reference range when the return current value to be read back is outside the allowable range. It is characterized by the following control.
According to this configuration, when the return current value is outside the allowable range, the abnormality diagnosis unit can notify the abnormality by controlling the output current value to be equal to or lower than the lower limit value of the reference range.

  According to the present invention, the abnormality diagnosis means forcibly changes the current command value within the accuracy range of the output current value when the return current value is within a predetermined allowable range with respect to the current command value. Since it is determined whether or not an output current sticking abnormality has occurred based on a change in the return current value, it is possible to accurately detect the sticking abnormality without changing the hardware, and a highly reliable current output device Can be provided at low cost.

It is a block diagram showing one embodiment of a current output device concerning the present invention. It is a flowchart which shows an example of the abnormality detection process procedure performed with the arithmetic processing unit of FIG. It is explanatory drawing which shows the output current precision at the time of normal. It is explanatory drawing which shows the output current precision at the time of changing a current compulsorily at normal time.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, reference numeral 1 denotes a current output device used in a plant control system or the like. This current output device 1 has an external power supply 2 connected to power supply terminals tp and tn, and constant voltage is applied to the power supply terminals tp and tn. The input side of the circuit 3 is connected. On the output side of the constant voltage circuit 3, a constant current circuit 4 as a current output means, a current detection resistor 5, and a switch circuit 6 are connected in series. A load 7 is connected in series with the switch circuit 6.

  The constant current circuit 4 includes an NPN transistor 11 and an operational amplifier 12 that performs feedback control of the NPN transistor. The NPN transistor 11 has a collector connected to the power supply terminal tp on the positive side of the constant voltage circuit 3 via a current limiting resistor 13, and an emitter connected to the current detection resistor 5. The operational amplifier 12 has an inverting input connected between the emitter of the NPN transistor 11 and the current detection resistor 5, and an analog current command value is input to the non-inverting input.

Further, the voltage between both ends representing the return current value of the current detection resistor 5 is amplified by the current detection amplifier 15 and further converted into the digital return current value Idr by the A / D converter 17 via the multiplexer 16 to be processed by the arithmetic processing unit 20. Has been entered. Here, the current detection resistor 5 and the current detection amplifier 15 constitute a current detection means.
The arithmetic processing unit 20 is composed of a central processing unit (CPU), a microprocessor unit (MPU), etc., and outputs current command values for the constant current circuit 4 of each current output unit, as well as the constant current circuit 4, the multiplexer 16, 22 abnormality diagnosis is performed.

The arithmetic processing unit 20 is connected to a D / A converter 21 that converts the output current command value I ^* into an analog current command value. The analog current command value Ia converted by the D / A converter 21 is connected to the arithmetic processing unit 20. ^* Is supplied via a multiplexer 22 to a low-pass filter (LPF) 23 that removes noise, further amplified by an amplifier 24, and sampled and held by a capacitor C interposed between the output side and the ground, and then a constant current. This is supplied to the non-inverting input terminal of the operational amplifier 12 of the circuit 4.

The arithmetic processing unit 20 also outputs a current command means 25 that outputs a current command value within a reference range set for the constant current circuit 4, and current command values I ^* and A / output from the current command means 25. An abnormality diagnosis means 26 that performs current abnormality diagnosis based on the digital return current value Idr input from the D converter 17 is provided.
Here, a predetermined number of current output units including the external power source 2, the constant voltage circuit 3, the constant current circuit 4, the current detection resistor 5, the switch circuit 6, the load 7, the amplifier 15, the low-pass filter 23, and the amplifier 24 are included in a predetermined number of multiplexers. The analog current command value Ia ^* is output to the current output unit selected by the multiplexer 22 and the analog current detection value Iad of the current output unit selected by the multiplexer 16 is A / D converted. Is input to the device 17.

Moreover, the arithmetic processing unit 20 performs a current control process shown in FIG. The current control process is started when the arithmetic processing unit 20 is turned on. In step S1, the switch circuit 6 of each current output unit is controlled to be in an ON state, and then the process proceeds to step S2 and the multiplexer 16 is started. And a variable N for controlling 22 is set to “0”.
Next, the process proceeds to step S3, where the variable N is converted into a BCD code, for example, and output to the multiplexers 16 and 22.

Next, the process proceeds to step S4, and the current command value I ^* of each current output unit corresponding to the variable N that is preset and stored in the ROM, for example, is read. Then, the process proceeds to step S5, and the read current command is read. After the value I ^* is output to the D / A converter 21, the process proceeds to step S6.
In this step S6, it is determined whether or not a predetermined time in which the current command value I ^* output from the current detection amplifier 15 can be detected has elapsed. If the predetermined time has not elapsed, the process waits until the predetermined time elapses. When the predetermined time has elapsed, the process proceeds to step S7.

In step S7, the digital return current value Idr is read from the A / D converter 17, and the read digital return current value Idr is updated and stored in the reference value storage area formed in the RAM or the like as the reference value Idr (n). Then, the process proceeds to step S8, where the current accuracy Ip [%] is calculated according to the following equation (1) based on the read digital return current value Idr and the current command value I ^* output in step S5. The process proceeds to step S9.
Ip = (Idr−I ^* ) × 100 / I ^* (1)

In step S9, it is determined whether or not the calculated current accuracy Ip is within an allowable range defined by a specified lower limit value −Ips and a specified upper limit value + Ips. If Ip <−Ips or Ip> + Ip, current accuracy is determined. When it is determined that the abnormal state in which Ip exceeds the allowable range, the process proceeds to step S10, and a current interruption signal for controlling the switch circuit 6 to be turned off is output to the switch circuit 6, and then the process proceeds to step S11.
In step S11, the variable N is incremented by “1”, and then the process proceeds to step S12 to determine whether or not the variable N has reached the set value Ns. If N <Ns, the process returns to step S3. When N = Ns, the process returns to step S2.

If the determination result in step S9 is −Ips ≦ Ip ≦ + Ips, it is determined that the operation is normal, and the process proceeds to step S13. In this step S13, it is determined whether or not the current accuracy Ip is a positive value, that is, Ip ≧ 0. If Ip ≧ 0, the process proceeds to step S14 and, for example, a specified upper limit value is determined from the current current command value I ^*. A value (= I ^* −Ips / (100 × 2)) obtained by subtracting Ips / (100 × 2), which is half the value of Ips, is calculated as a new current change command value Ic ^* , and then the process proceeds to step S16. .

If the determination result in step S13 is Ip <0, the process proceeds to step S15, and for example, Ips / (100 × 2), which is a half value of the specified upper limit value Ips, is added to the current current command value I ^*. After the calculated value (= I ^* + Ips / (100 × 2)) is calculated as a new current change command value Ic ^* , the process proceeds to step S16.
In step S16, the current change command value Ic ^* calculated in step S14 or S15 is output to the D / A converter 21, and then the process proceeds to step S17. Whether or not a predetermined time similar to step S6 described above has elapsed. When the predetermined time has not elapsed, the system waits until this time elapses. When the predetermined time has elapsed, the process proceeds to step S18, and after reading the digital return current value Idr from the A / D converter 17, step S19 is performed. Migrate to

In step S19, an absolute value (| Idr (n) −Idr |) of a deviation between the reference value Idr (n) stored in the reference value storage area and the digital return current value Idr read this time is set in advance. It is determined whether or not the sticking judgment value ΔId is exceeded. If | Idr (n) −Idr |> ΔId, it is judged that the sticking judgment value ΔId is a normal value without sticking, and the process proceeds to step S20.
In step S20, the variable N is incremented by “1”, and then the process proceeds to step S21 to determine whether or not the variable N has reached the set value Ns. If N <Ns, the process directly proceeds to step S3. Returning to step S2, when N = Ns.

When the determination result in step S19 is | Idr (n) −Idr | ≦ ΔId, there is no change in the digital return current value Idr with respect to the change in the current command value I ^{*, and} a sticking abnormality has occurred. The process proceeds to step S22 and outputs a current cutoff signal that turns off the switch circuits 6 of all current output units, and then proceeds to step S23 to issue an alarm signal to the alarm circuit 27. Then, the current control process is terminated.
In the process of FIG. 2, the processes of steps S1 to S5 correspond to current command means, and the processes of steps S5 to S23 correspond to abnormality diagnosis means.

Next, the operation of the above embodiment will be described.
When the arithmetic processing unit 20 is turned on, the current control process shown in FIG. 2 is started. First, the variable N is set to “0”, whereby the multiplexers 16 and 22 output the 0th current output. Part is selected.
In this state, the current command value I ^* set in the load 7 of the 0th current output unit is read (step S4), and the read current command value I ^* is output to the D / A converter 21 ( Step S5). For this reason, the current command value I ^* is converted into an analog value by the D / A converter 21 and supplied to the low-pass filter 23 via the multiplexer 22 to remove noise, and then amplified by the amplifier 24 to be fed to the capacitor C by the analog current. The command value Ia ^* is sampled and held and supplied to the non-inverting terminal of the operational amplifier 12 of the constant current circuit 4.

For this reason, the output current I corresponding to the digital current command value I ^* output from the arithmetic processing unit 20 is controlled by the constant current control of the NPN transistor 11 by the output of the operational amplifier 12 through the current detection resistor 5 and the switch circuit 6. The load 7 is supplied in a constant current state.
When the constant current I flows through the current detection resistor 5 and the voltage between both ends thereof is output from the amplifier 15, this is supplied to the A / D converter 17 via the multiplexer 16, and this A / D converter 17. Is converted into a digital return current value Idr.
Therefore, in the current control process of FIG. 2, the digital return current value Idr converted by the A / D converter 17 is read and stored as the reference value Idr (n) in the reference value storage area (step S7). Based on the digital return current value Idr and the current command value I ^* , the calculation of the above-described equation (1) is performed to calculate the current accuracy Ip (step S8).

  Then, it is determined whether or not the calculated current accuracy Ip is within an allowable range by a preset specified lower limit value −Ips and a specified upper limit value + Ips, and the determination result is Ip <−Ips or Ip> + Ips and is allowed When it is out of the range, it is determined that the current system is disconnected or the constant current circuit 4 or the like is abnormal, and a current interruption signal for turning off the switch circuit 6 is output (step S10). For this reason, the current path including the constant current circuit 4 and the load 7 is interrupted, and the current supply to the load 7 is stopped. Thus, when the current path is cut off, the voltage across the current detection resistor 5 also becomes “0”. For this reason, when the current accuracy Ip is calculated, the current accuracy Ip becomes equal to or less than the specified lower limit value −Ip. The state can be confirmed.

On the other hand, when the current accuracy Ip calculated in step S8 is within the allowable range, that is, when −Ips ≦ Ip ≦ + Ips, it is determined that the current is normal, and the process proceeds to step S13.
At this time, assuming that the current accuracy Ip is a positive value larger than “0” as shown in FIG. 3, a value obtained by subtracting, for example, a specified upper limit value + Ips / (100 × 2) from the current current command value I ^*. It was calculated as a current change command value Ic ^*, and outputs the calculated current change command value Ic ^* to the D / a converter 21 (step S16).

Then, after a predetermined time has elapsed, the digital return current value Idr is read from the A / D converter 17 (step S18), and the read digital return current value Idr and the digital return current value when it was determined to be normal last time. It is determined whether or not the absolute value of the current deviation from the reference value Idr (n) is greater than or equal to the set value ΔId (step S19).
At this time, when the absolute value | Idr (n) −Idr | of the current deviation is equal to or larger than the set value ΔId, the current detection value is changed according to the change of the current command value, and it is not a sticking state but a normal state. The process proceeds to step S20, and the variable N is incremented by "1". Then, the process proceeds to step S21, and since the variable N is less than the set value Ns, the process returns to step S2 and the next current output is performed. The current control process is executed for the unit.

However, when the absolute value | Idr (n) −Idr | of the current deviation is less than the set value ΔId, there is almost no change in the output current even though the current command value I ^* is changed to the current change command value Ic ^*. Then, it is determined that an abnormality has occurred in at least one of the multiplexers 16 and 22, and the detected current is stuck, and the process proceeds to step S22, where the current cutoff signal is sent to the switch circuits 6 of all the current output units. Then, the process proceeds to step S23, where an alarm signal is output to the alarm circuit 27 to issue an alarm, and the current control process is terminated.

That is, for example, when the multiplexer 16 is normal but the multiplexer 22 is abnormal, or conversely, the multiplexer 16 is abnormal but the multiplexer 22 is normal, the output destination of the current command value I ^* of the multiplexer 22 is The current output unit and the current output unit selected by the multiplexer 16 are different.
At this time, when the current command values I ^* of the different current output units are different, that is, for example, when one is 10 mA and the other is 20 mA, when the current command value I ^* is output as 10 mA, the A / D converter 17 Since the digital return current value Idr input from is a value in the vicinity of 20 mA, when the current accuracy Ip is calculated in step S8 as described above, it is determined that there is an abnormality in step S9.

However, when the current command values I ^* of different current outputs are equal, for example, 10 mA, even if the current change command value Ic ^* is output to one current output unit, the other current output unit does not react and the current Since current output is performed based on the command value I ^* (= 10 mA), the change in the current command value I ^* is not reflected in the change in the return current value Idr, and the digital return output from the A / D converter 17 The current value Idr maintains the state before the current change command value Ic ^* is output, and is in a current sticking state.

In this state, there is almost no change between the reference value Idr (n) and the digital return current value Idr read after the output of the current change command value Ic ^* , and the determination result in step S17 described above is | Idr (n) −Idr | <ΔId, which is detected as a sticking abnormality, and the switch circuit 6 of each current output unit is controlled to be in an OFF state and an alarm is issued from the alarm circuit 27.
In addition, when the multiplexers 16 and 22 are normal but the output current I does not change with respect to the change of the current command value I ^* for some reason in the current output unit, it is detected as a sticking abnormality.

Thus, according to the above embodiment, when a sticking abnormality occurs in which the return commutation value Idr does not change with respect to a change in the current command value I ^* , such as when an abnormality occurs in at least one of the multiplexers 16 and 22. In addition, this sticking abnormality can be accurately detected.
In addition, no special hardware is required to detect sticking abnormalities, and sticking abnormalities can be detected only by software processing, so sticking abnormalities can be detected at low cost. A highly reliable current output device can be obtained.
In the above-described embodiment, the case where the current change command value Ic ^* is set to Ips / (100 × 2) with respect to the current command value I ^* has been described. Can be set to any detectable value.

In the above embodiment, when the current accuracy Ip is within the allowable range, decreasing values of the current command value I ^* to the current change command value Ic ^* is current accuracy Ip depending on whether a positive value and Although the case where the increase value is determined has been described, the present invention is not limited to this. When the current accuracy Ip has a margin with respect to the specified lower limit value −Ips or the specified upper limit value + Ips, the current accuracy Ip is set to the specified lower limit value. The current change command value Ic ^* may be changed to be larger than the digital return current value Idr so as to approach the value −Ips or the specified upper limit value + Ips. In this case, the current change command value Ic ^* exceeds the digital return current value Idr and the current accuracy Ip is changed in a direction approaching the specified lower limit value −Ips or the specified upper limit value + Ips. Occurs and the digital return current value Idr does not change, the sign of the current accuracy Ips is inverted before and after the current command value I ^* is changed, and the current sticking state depends on whether or not this sign inversion occurs. It is possible to diagnose whether or not.

That is, as shown in FIG. 4, when the current accuracy Ip is first calculated in step S8, a relatively small positive current accuracy Ips represented by the characteristic line L1 shown by the broken line is detected. When the change command value Ic ^* is a positive value larger than the digital return current value Idr, when it is normal, a positive current accuracy Ip represented by the characteristic line L2 shown by the solid line is detected.
However, when a sticking abnormality occurs, the digital return current value Idr remains as shown by the broken line, and Ic ^* > Idr. Therefore, the current accuracy Ip calculated by the equation (1) becomes a negative value, and the sticking Abnormalities can be detected.

Furthermore, when the current accuracy Ip determined to be steady within the allowable range is a positive value, for example, the current change command value Ic ^* is changed to a current command value corresponding to the specified lower limit value −Ips, and the current accuracy Ip is negative. The current change command value Ic ^* is changed to the digital return current value Idr when a sticking abnormality occurs by changing the current change command value Ic ^* to a current command value corresponding to the specified upper limit value + Ips ^. The current accuracy Ip calculated by the expression (1) based on the above may be set to exceed the specified upper limit value + Ips or the specified lower limit value −Ips.

In any case, the sticking abnormality may be detected based on the change of the current detection value when the current change command value Ic ^* is changed within the range of the current accuracy.
In the above embodiment, the case where the current detection resistor 5 is provided has been described. However, the present invention is not limited to this, and current detection may be performed by applying a current transformer (CT).

  DESCRIPTION OF SYMBOLS 1 ... Current output device, 2 ... External power supply, 3 ... Constant voltage circuit, 4 ... Constant current circuit, 5 ... Current detection resistor, 6 ... Switch circuit, 7 ... Load, 15 ... Amplifier, 16 ... Multiplexer, 17 ... A / D converter, 20 ... arithmetic processing unit, 21 ... D / A converter, 22 ... multiplexer, 23 ... low pass filter, 24 ... amplifier, 25 ... current command value means, 26 ... abnormality diagnosis means, 27 ... alarm circuit

Claims (2)

Current command means for outputting a current command value of the output current;
Current output means for outputting an output current based on the current command value;
Return current detecting means for detecting the output current;
An abnormality diagnosing unit for determining an abnormality when a return current value detected by the return current detecting unit is outside an allowable range with respect to the current command value;
The abnormality diagnosing means forcibly changes the current command value within the accuracy range of the output current value when the return current value is within a predetermined allowable range with respect to the current command value. A current output abnormality diagnosis is performed based on a change in the return current value.   The abnormality diagnosis unit controls the output current command value to be equal to or lower than a lower limit value of the reference range when the return current value to be read back is out of the allowable range. Current output device.

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