JP2011181462A - Method of manufacturing display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display panel with a high pattern precision, whose manufacturing process includes mutual attracting of a face of a substrate and a face of a mask electrostatically for causing the substrate and the mask to be adhered sufficiently to carry out vacuum deposition (vapor deposition, sputtering or the like) in order to solve the problem that even if a substrate is pressed unilaterally to a mask, the substrate and the mask can not be adhered sufficiently. <P>SOLUTION: The substrate 420 and the mask 520 in which one or a plurality of display panel circuits are formed are arranged overlapped, and an electric voltage is applied so that the substrate may be electrostatically attracted to the mask, and vacuum deposition is carried out on the substrate through the mask. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a display panel.

  As a process of manufacturing a display panel, a method of depositing an organic dye material on a TFT substrate using a mask is known (Patent Document 1), and a three-color light emitting layer is formed by using the mask. Separately deposited on the TFT substrate.

  FIG. 14 is a diagram showing a process of vapor-depositing an organic dye material on the TFT substrate. As shown in FIG. 14, a mask 120 supported by a mask support 110 and a vapor deposition source 130 are installed in a vacuum chamber (not shown). The vapor deposition source 130 is configured such that a heater 133 is installed around a crucible 132 containing an organic dye material 131.

  In the vapor deposition process, the TFT substrate 140 is placed on the mask 120, and the opening 121 of the mask 120 and the TFT substrate 140 are precisely aligned so that the organic dye material 131 is vapor deposited at an appropriate position on the TFT substrate. Aligned. Next, the organic pigment material 131 in the crucible 132 is heated and evaporated by the heater 133 and deposited on the TFT substrate 140 through the opening of the mask 120.

  At this time, as shown in FIG. 15, the TFT substrate 140 is slightly warped due to thermal distortion and film stress applied in the TFT formation process, and even if the TFT substrate 140 is placed on the mask 120, the entire TFT substrate 140 is warped. Does not adhere to the mask 120. Specifically, for example, the TFT substrate 140 and the mask 120 are in close contact with each other at the center of the TFT substrate 140 as shown in FIG. 15, but at the end of the TFT substrate 140 as shown in FIG. The TFT substrate 140 and the mask 120 do not adhere to each other due to the warpage of the TFT substrate 140.

  Even if the organic dye material 131 is vapor-deposited on the TFT substrate 140 in such a state, the organic dye material 131 is appropriately vapor-deposited in the central portion, but the end portion is larger than the opening 121 of the mask 120. It will be deposited. Specifically, for example, in the central portion of the TFT substrate 140, as shown in FIG. 16, the organic dye material 131 is appropriately formed in accordance with the opening 121 of the mask 120. 17, the organic dye material 131 is deposited by pulling out the skirt from the opening 121 of the mask 120 as shown in FIG. 17. As a result, when the display panel on which the organic dye material is vapor-deposited as described above is turned on, there is a problem that light emission colors are mixed or light emission is weakened.

JP 2008-59757 A

  Therefore, in order to bring the mask 120 and the TFT substrate 140 into close contact with each other in the vapor deposition process as described above, a method of mechanically pressing the TFT substrate 140 against the mask 120 can be considered.

  However, in such a method, the TFT substrate 140 is only unilaterally pressed against the mask 120, and it is difficult to make the TFT substrate 140 and the mask 120 adhere to each other as a whole. It can be distorted. Further, even if the contact can be achieved, the mask is pushed through the TFT substrate to be distorted, resulting in a pattern shift. The mask forms a correct pattern when it is flat, and if the mask is distorted, the pattern itself is also distorted, and the correct pattern cannot be maintained.

  In view of the above problems, the present invention performs patterning by vacuum deposition (evaporation, sputtering, etc.) by sufficiently bringing the substrate and the mask into close contact by attracting both the substrate and the mask by electrostatic adsorption. An object of the present invention is to provide a display panel with high height.

  (1) In the method for manufacturing a display panel according to the present invention, the substrate on which one or a plurality of display panel circuits are formed and a mask are arranged so as to overlap each other, and the substrate is electrostatically attracted to the mask. A voltage is applied to the mask, and vacuum deposition is performed on the substrate through the mask. With this configuration, it is possible to manufacture a display panel with high pattern accuracy by bringing both the substrate and the mask together by electrostatic attraction, and performing vacuum film formation after the substrate and the mask are sufficiently adhered to each other.

  (2) In the manufacturing method of the display panel described in (1), the mask may be grounded after the vacuum film formation.

  (3) In the display panel manufacturing method described in (1), a conductive film may be formed on a surface of the substrate that does not overlap the mask, and the conductive film may be grounded.

(4) In the method for manufacturing a display panel described in (3), the sheet resistance value of the conductive film may be 10 ^{3 to} 10 ⁶ Ω / □.

  (5) In the display panel manufacturing method described in (1), the mask may be covered with an insulating film.

  (6) In the display panel manufacturing method described in (5), a grounded ground terminal is formed on the insulating film, a terminal frame is formed on the substrate, and the terminal frame is in contact with the ground terminal. It may be characterized by.

  (7) In the display panel manufacturing method described in (6), the substrate may include a thin film transistor circuit, and the thin film transistor circuit may be connected to the terminal frame via a resistor. .

  (8) In the manufacturing method of the display panel described in (7), the thin film transistor circuit includes a driving power line, and the driving power line is connected to the terminal frame via the resistor. It may be a feature.

(9) In the manufacturing method of the display panel described in (7), the resistor may be 10 ^{3 to} 10 ⁸ Ω.

  (10) In the method for manufacturing a display panel described in (6), the terminal frame is provided on an outer periphery of the substrate so as to surround the one or more display panel circuits, and is in contact with a ground terminal. It is good also as including an outer peripheral part.

  (11) In the method of manufacturing a display panel described in (10), the terminal frame is a rectangle, and the terminal frame further includes a connection portion that connects opposite sides of the outer peripheral portion. It may be characterized by having.

  (12) In the display panel manufacturing method described in (1), the mask may be supported by a mask support.

  A display panel with high pattern accuracy can be manufactured by bringing both the substrate and the mask together by electrostatic attraction, and performing vacuum film formation after the substrate and the mask are sufficiently adhered to each other.

It is a figure which shows the outline of the display panel in embodiment concerning this invention. It is II-II sectional drawing of FIG. It is a figure which shows the outline of the layout of each pixel in the display area of FIG. It is a figure which shows the outline of the cross section of the display panel in 1st Embodiment. It is a figure which shows the outline of the vapor deposition apparatus in 1st Embodiment. It is a figure which shows the relationship between the electrostatic adsorption pressure and applied voltage in 1st Embodiment. It is a figure which shows the outline of the force which acts on a mask and a TFT substrate by the electrostatic attraction | suction in 1st Embodiment. It is a figure which shows the outline of the cross section of the display panel in 2nd Embodiment. It is a figure which shows the outline of the vapor deposition apparatus in 2nd Embodiment. It is a figure which shows the outline of a TFT substrate, a mask, etc. in 3rd Embodiment. It is a figure which shows the outline of the vapor deposition apparatus in 3rd Embodiment. It is a figure which shows the outline which expanded the display panel periphery in 3rd Embodiment. It is a figure which shows the relationship between the electrostatic adsorption pressure and applied voltage in 3rd Embodiment. It is a figure which shows the outline of the conventional vapor deposition apparatus. It is a figure which shows the outline of the force which acts on the mask and TFT substrate in the conventional method. FIG. 16 is an enlarged view of the center of the TFT substrate in FIG. 15. FIG. 16 is an enlarged view of an end portion of the TFT substrate in FIG. 15.

  In this embodiment, vacuum film formation (evaporation, sputtering, or the like) is performed on a substrate using a mask. In the manufacturing process of the organic EL display panel, a light emitting layer is formed by vapor deposition of an organic dye material. In the manufacturing process of the liquid crystal display panel, the transparent electrode is formed by sputtering indium tin oxide or indium zinc oxide. In either case, a film is formed while patterning is performed using a mask having a shape in which a region to be deposited is opened and a region not to be deposited is covered. The substrate to be vacuum-deposited is a TFT substrate on which a thin film transistor (Thin Film Transistor) for forming one or a plurality of display panels is formed. The TFT substrate corresponds to a substrate on which one or a plurality of display panel circuits described in the claims are formed. Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a diagram showing a schematic view of a display panel manufactured by the display panel manufacturing method according to the present embodiment. 2 is a cross-sectional view taken along the line II-II in FIG. As shown in FIGS. 1 and 2, a display region 160 is formed on the TFT substrate 150, and a wiring 161 from the display region 160 is connected to a terminal 162 at the end of the TFT substrate 150. Since the organic EL 210 forming the display region 160 is sensitive to moisture, as shown in FIG. 1, the upper portion thereof is covered with a transparent sealing glass 170, and a sealing seal is provided between the sealing glass 170 and the TFT substrate 150. It is sealed with a material 180.

  Furthermore, as shown in FIG. 2, a transparent drying material 220 may be installed between the upper portion of the organic EL 210 and the sealing glass 170 to add moisture. When the display panel 100 is turned on, each color light emitted from the display region 160 is emitted upward in FIG. 2 through the transparent drying material 220 and the transparent sealing glass 170.

  FIG. 3 is a schematic diagram showing the layout of each pixel in the display area 160 shown in FIG. As shown in FIG. 3, pixels 310, 320, and 330, which are red, green, and blue, which are the three primary colors of light, are formed side by side in a matrix. Note that the number of pixels is an example, and the present invention is not limited to the number of pixels shown in FIG. 3, but is adjusted to a number according to the size of a desired display panel. Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[First Embodiment]
FIG. 4 is a schematic view showing a cross section of the display panel manufactured in the first embodiment. As shown in FIG. 4, a TFT substrate 420 having a plurality of thin film transistors is formed on a glass substrate 401, and an organic EL element 430 is formed on the TFT substrate 420 corresponding to the arrangement of the thin film transistors. ing.

  Specifically, as shown in FIG. 4, a polycrystalline silicon 402, a gate electrode 403, a gate insulating film interlayer insulating film 404, a source / drain electrode 405, and a passivation film 406 are sequentially stacked on a glass substrate 401. A TFT substrate 420 on which a plurality of thin film transistors are formed is formed.

  The organic EL element 430 of each pixel is formed on the flattening film 407 formed on the TFT substrate 420 and is separated from each other by the bank material 408. Specifically, each organic EL element 430 includes a reflective metal 409, an anode 410, a hole transport layer 411, red, green, and blue light emitting layers 412, 413, and 414, an electron transport layer 415, and a flat film 407. A cathode 416 is formed by sequentially stacking.

  Next, a method for manufacturing the display panel 400 in the present embodiment will be described. First, a TFT substrate 420 including scanning signal lines, video signal lines, thin film transistors, and the like is formed on a glass substrate 401 by repeating processes such as lamination and patterning of a colored conductive film such as aluminum, a semiconductor film, and an insulating film. To do. Then, a passivation film 406 made of silicon nitride is laminated to protect these thin film transistors and the like, and a resin flattening film 407 such as acrylic or polyimide is laminated to flatten the TFT substrate 420.

  Next, the reflective metal 409 and the anode 410 are provided for each pixel region by patterning using, for example, photolithography. Further, after the anode 410 is stacked, a bank material 408 is provided so as to partition each pixel region in a lattice shape, and the hole transport layer 411 and the light emitting layer are formed in the region partitioned by the bank material 408 by, for example, vapor deposition. 412, 413, and 414, and an electron transport layer 415 are sequentially stacked. Here, the light emitting layers 412, 413, and 414 are deposited by using a mask three times in order to separate the three colors of red, green, and blue, which will be described in detail later. The cathode 416 is formed so as to cover the light emitting layers 412, 413, and 414 in each pixel region in common through the bank material 408. In this way, one or more display panels 400 are formed on one glass substrate 401. In addition, the manufacturing method of the above-mentioned display panel 400 shows the outline, Comprising: Other processes may be added as needed.

  In addition, as a substance which shows the hole transport property used for the hole transport layer 411, for example, a tetraarylbenzidine compound (triphenyldiamine: TPD), an aromatic tertiary amine, a hydrazone derivative, a carbazole derivative, a triazole derivative, an imidazole derivative, An oxadiazole derivative having an amino group, a polythiophene derivative, a copper phthalocyanine derivative, or the like is used. The light emitting material used for each of the light emitting layers 412, 413, and 414 is a material in which a dopant that emits fluorescence or phosphorescence by recombination of electrons and holes is added to a host material having electron and hole transport capability. There is no particular limitation as long as it can be formed as the third layer by co-evaporation. For example, as the host, tris (8-quinolinolato) aluminum, bis (8-quinolinolato) magnesium, bis (benzo {f} -8-quinolinolato ) Zinc, bis (2-methyl-8-quinolinolato) aluminum oxide, tris (8-quinolinolato) indium, tris (5-methyl-8-quinolinolato) aluminum, 8-quinolinolatolithium, tris (5-chloro-8) -Quinolinolato) gallium, bis (5-chloro-8-quinolinolato) calcium, , 7-dichloro-8-quinolinolato aluminum, tris (5,7-dibromo-8-hydroxyquinolinolato) aluminum, poly [zinc (II) -bis (8-hydroxy-5-quinolinyl)] methane Complex, anthracene derivative, carbazole derivative, and the like. In addition, the dopant captures electrons and holes in the host to recombine and emits light. For example, a red light emitting substance such as a pyran derivative, a green coumarin derivative, and a blue anthracene derivative, or iridium It may be a phosphorescent substance such as a complex or a pyridinate derivative. The electron transport layer 415 includes, for example, tris (8-quinolinolato) aluminum, tris (4-methyl-8-quinolinolato) aluminum, bis (2-methyl-8-quinolinolato) -4-phenylphenolate-aluminum, bis [2- [2-hydroxyphenyl] benzoxazolate] metal complexes such as zinc, 2- (4-biphenylyl) -5- (4-tert-butylphenyl) -1,3,4-oxadiazole, 1,3- Bis [5- (p-tert-butylphenyl) -1,3,4-oxadiazol-2-yl] benzene or the like is used. LiF or the like is used as the electron injection layer.

  Next, the process for forming each said light emitting layer 412, 413, 414 is explained in full detail below. FIG. 5 is a schematic view showing a vapor deposition apparatus 500 for vapor-depositing an organic dye material on the TFT substrate 420 using the mask 520.

  As shown in FIG. 5, in the vacuum chamber 510, a TFT substrate 420, a mask 520, a vapor deposition source 530, and the like are installed. Specifically, the mask 520 is supported and installed on the outer peripheral portion of the mask 520 by the mask support 540. Further, below the mask 520, an evaporation source 530 for depositing an organic dye material on the TFT substrate 420 is installed. On the other hand, on the mask 520, the TFT substrate 420 is placed on the mask 520 with the surface on which the organic dye material is deposited facing down. Further, a conductor 580 is disposed above the TFT substrate 420 in the vicinity of the TFT substrate 420. The conductor 580 is disposed from above the vacuum chamber 510 via a conductor support 590. The conductor 580 has a planar shape, has substantially the same area as the TFT substrate 420, and is disposed close to the TFT substrate 420 so as to cover the upper portion of the TFT substrate 420.

  On the other hand, a high voltage power supply 560 is installed outside the vacuum chamber 510, and the positive side of the high voltage power supply 560 is connected to the mask support 540 through the switch 550 and the metal wiring 570. On the other hand, the negative side of the high-voltage power supply 560 is connected to the outer wall of the vacuum chamber 510. With this configuration, when the switch 550 is turned on, the high voltage of the high voltage power source 560 is applied to the mask 520 through the mask support 540.

  Note that the positions of the TFT substrate 420 and the vapor deposition source 530 may be fixed to each other, or may be relatively moved. In FIG. 5, two vapor deposition sources 530 are provided, but the number is not limited to two. Further, the conductor 590 is extended from the upper part of the outer wall of the vacuum chamber 510 by the conductor support 590, but is limited to the arrangement shown in FIG. 5 as long as the organic dye material is appropriately deposited. Is not to be done. Note that the mask 520 and the mask support 540 are made of, for example, a metal such as nickel and are electrically connected to each other.

  Next, steps from setting the TFT substrate 420 on the mask 520 using the vapor deposition apparatus 500 to vapor-depositing an organic dye material and removing the TFT substrate 420 will be described.

  First, the opening 521 of the mask 520 and the TFT substrate 420 are aligned so that the organic dye material heated and evaporated from the vapor deposition source 530 is vapor-deposited at an appropriate position on the TFT substrate 420, and the mask 520 and the TFT are aligned. A substrate 420 is installed. Although not shown in FIG. 5, at this time, as described above, the TFT substrate 420 has a distorted shape due to thermal strain applied in the TFT formation process, the influence of film stress, or the like.

  Next, the switch 550 of the high voltage power source 560 is turned on, and the TFT substrate 420 and the mask 520 are electrostatically attracted. At this time, the state of the TFT substrate 420 is observed, and the voltage of the high-voltage power supply 560 is increased until it is confirmed that the TFT substrate 420 and the mask 520 are sufficiently adhered. The relationship between the electrostatic adsorption pressure and the applied voltage at this time is shown in FIG. The TFT substrate 420 and the mask 520 start to be adsorbed from about 1000 V, and sufficient adhesion can be obtained to appropriately deposit the organic dye material at about 7000 V.

  Thereafter, an organic dye material is deposited on the TFT substrate 420. Specifically, after the organic pigment material in the deposition source 530 is heated and evaporated by a heater (not shown) of the deposition source 530, the heated and evaporated organic pigment material passes through the opening 521 of the mask 520. Vapor deposition is performed at an appropriate position on the TFT substrate 420. After the deposition is completed, the switch 550 of the high voltage power source 560 is turned off and the TFT substrate 420 is removed from the mask 520.

  In the above process, for example, when the light emitting layers 412, 413, and 414 of three colors of red, green, and blue are formed on the TFT substrate 420, the mask 520, the evaporation source 530, and the organic dye material prepared for each color are used. Use for each color. Note that a vacuum chamber 510 for each color may be provided, and each time one organic dye material is deposited on the TFT substrate 420, the structure may be transported to the vacuum chamber 510 for depositing the organic dye material of the next color. The mask 520 and the vapor deposition source 530 may be replaced in one vacuum chamber 510. Furthermore, when vapor-depositing the organic dye material for each color, a hole transport layer (not shown) for each color may be vapor-deposited.

  As described above, the TFT substrate 420 and the mask 520 are attracted to each other by electrostatic adsorption, whereby the TFT substrate 420 and the mask 520 can be sufficiently adhered to each other to deposit the organic dye material of each color. Specifically, as indicated by arrows B and C in FIG. 7 by electrostatic attraction, the TFT substrate 420 as a whole receives an electrostatic attraction force toward the mask 520 side, and the mask 520 as a whole is electrostatically moved toward the TFT substrate 420 side. Receives adsorption force. That is, the TFT substrate 420 and the mask 520 are attracted from both sides as a whole, and the TFT substrate 420 and the mask 520 can be sufficiently adhered as compared with the conventional case where the TFT substrate 420 is unilaterally pressed against the mask 520. Become. Thus, the display panel 400 with higher pattern accuracy can be manufactured by depositing the organic dye material of each color after the TFT substrate 420 and the mask 520 are sufficiently adhered to each other.

[Second Embodiment]
FIG. 8 is a schematic view showing a cross section of a display panel manufactured in the second embodiment of the present invention. FIG. 9 is a schematic view showing a vapor deposition apparatus for vapor-depositing an organic dye material on a TFT substrate using a mask in the second embodiment. As shown in FIGS. 8 and 9, the second embodiment is mainly different in that a conductive film 810 is formed on a glass substrate 401 and the conductive film 810 is grounded. The second embodiment will be described in detail below, but the description of the same points as in the first embodiment will be omitted.

  As shown in FIG. 8, a conductive film 810 is formed on the surface of the glass substrate 401 opposite to the side where the thin film transistors and the like are formed. The conductive film 810 is formed by sputtering, for example. The conductive film 810 is formed before aligning the TFT substrate 820 with the mask 520 and evaporating red, green, and blue organic dye materials. The display panel 800 has the same configuration as that of the display panel 400 in the first embodiment except that the conductive film 810 is formed as described above.

  Further, as shown in FIG. 9, the conductive film 810 is grounded to the outside of the vacuum chamber (not shown) through a metal line 910, and has a larger area than the opening 521 of the mask of the TFT substrate 820. Formed. A high voltage power source 560 is installed outside the vacuum chamber (not shown), and a positive terminal of the high voltage power source 560 is connected to the metal wiring 920 through the switch 930. The metal wiring 920 is further drawn into a vacuum chamber (not shown) and then connected to the mask support 540. On the other hand, the negative terminal of the high voltage power supply 560 is grounded outside a vacuum chamber (not shown).

  The switch 930 includes a terminal 931 connected to the metal wiring 920, a grounded terminal 933, and a terminal 932 connected to the high voltage power source 560. The switch 930 can switch whether the terminal 931 connected to the metal wiring 920 is connected to the grounded terminal 933 or the terminal 932 connected to the high voltage power source 560. With this configuration, the switch 930 can switch whether the high voltage of the high voltage power supply 560 is applied to the mask 520 or the mask 520 is grounded.

  Next, using the vapor deposition apparatus 900 according to the second embodiment, a process from when the TFT substrate 820 is placed on the mask 520 to when the organic dye material is vapor-deposited and the TFT substrate 820 is taken out will be described. .

  First, the organic dye material is placed in alignment with the opening 521 of the mask 520 and the TFT substrate 820 so that the organic dye material is deposited at an appropriate position on the TFT substrate 820, and then the conductive film formed on the TFT substrate 820. 810 is grounded. Note that the mask 520 and the TFT substrate 820 may be aligned and installed after the conductive film 810 is grounded.

  Next, as in the first embodiment, the switch 930 is switched so that a high voltage is applied to the mask 520 by the high voltage power supply 560, and the mask 520 and the TFT substrate 820 are electrostatically adsorbed. Thereafter, an organic dye material is deposited on the TFT substrate 820.

  After the deposition, the switch 930 is switched so that the mask 520 is grounded, and the TFT substrate 820 is taken out.

  Through the above-described steps, the conductive film 810 formed on the TFT substrate 820 after electrostatic attraction is grounded, and the mask 520 is grounded after the deposition is completed, so that the charges accumulated on the TFT substrate 820 can be easily obtained. The TFT substrate 820 can be easily and quickly removed from the mask 520.

Here, if the resistance value of the conductive film 810 is too low, creeping discharge is likely to occur at the outer peripheral portion of the TFT substrate 820. When the discharge occurs, the voltage balance is lost, and the transistor characteristics of the TFT circuit formed on the TFT substrate 820, which includes the gate electrode 413, the drain, the source electrode 5, and the like are modulated, or the TFT circuit is broken. Conversely, if it is too high, it takes time to remove the TFT substrate 820. Therefore, in order to avoid such a problem, the resistance value of the conductive film 810 needs to be adjusted appropriately. For example, the sheet resistance value of the conductive film 810 has 10 ^{3 to} 10 ⁶ Ω / □. It is preferable to configure as described above. Note that the surface of the mask 520 may be covered with an insulating film (not shown) to make it difficult for discharge to occur.

  As described above, by appropriately adjusting the resistance value of the conductive film 810, the potential difference in the TFT circuit formed on the TFT substrate 820 can be almost eliminated in the above process, and the above problems can be avoided. At the same time, the TFT substrate 820 can be easily and quickly removed from the mask 520. In addition, a display panel with high pattern accuracy can be manufactured by sufficiently adhering the TFT substrate 820 and the mask 520 from both sides and performing vapor deposition of the organic dye material of each color by electrostatic adsorption.

[Third embodiment]
FIG. 10 is a schematic view showing a TFT substrate, a mask and a mask support used in the third embodiment. FIG. 11 is a schematic view showing an apparatus for depositing an organic dye material on a TFT substrate using a mask in the third embodiment. As shown in FIGS. 10 and 11, in the third embodiment, the terminal frame 240 is provided on the TFT substrate 230, the surface of the mask 260 is covered with an insulating film 280, and the terminal frame is formed on the insulating film 280. The main difference from the first and second embodiments is that a corresponding ground terminal is provided. The third embodiment is mainly different from the second embodiment in that the conductive film 417 is not provided on the display panel as in the second embodiment. The third embodiment will be described in detail below, but the description of the same points as in the first and second embodiments will be omitted.

  As shown in FIG. 10, a terminal frame 240 is formed on the TFT substrate 230. The terminal frame 240 has an outer peripheral portion 241 formed so as to surround a plurality of display panels 350 arranged in a matrix on the TFT substrate 230 along the outer periphery of the TFT substrate 230, and the outer peripheral portion 241 faces the outer peripheral portion 241. And a connecting portion 242 for connecting the sides. Specifically, for example, as shown in FIG. 12, the connection portions 242 are formed for each row and for each plurality of columns of the plurality of display panels 350 arranged in a matrix on the TFT substrate 230.

  Note that the connection portion 242 is not limited to the shape illustrated in FIG. 10 or 12, and may be formed so as to surround one or more display panels 350. Further, the cross-sectional structure of the TFT substrate 230 is the cross-sectional structure of the first embodiment shown in FIG. 4 except that the terminal frame 240 is formed and the high resistance body 360 described later is formed. It is the same.

  As shown in FIGS. 10 and 11, an insulating film 280 is formed on the surfaces of the mask 260 and the mask support 270, and a ground terminal 250 is formed on the surface of the insulating film 280 that overlaps the TFT substrate 230. . The ground terminal 250 may be formed of metal on the insulating film 280. The ground terminal 250 is formed so that the outer peripheral portion 241 of the terminal frame 240 of the TFT substrate 230 and the ground terminal 250 come into contact when the TFT substrate 230 is overlaid on the mask 260. That is, the shape of the outer peripheral portion 241 of the terminal frame 240 and the shape of the ground terminal 250 are the same. The ground terminal 250 is grounded outside the vacuum chamber (not shown) via the metal wiring 251.

As shown in FIG. 12, each display panel 350 has a display area 340 and a terminal 361, and one terminal 361 of each display area 340 is high so as to keep the TFT circuit in each display area 340 at the ground potential. It is connected to the terminal frame 240 through the resistor 360. The resistance value of the high resistance body 360 is preferably configured to have 10 ^{3 to} 10 ⁸ Ω. Specifically, for example, the terminal frame 240 is connected to an organic EL driving power line (not shown) formed in the display region 340 via a polycrystalline silicon wiring (not shown) doped with phosphorus. . For example, the polycrystalline silicon wiring has a resistance value of about 10 MΩ. In this manner, the TFT circuit in the display region 340 is grounded and maintained at the ground potential via the high resistor 360, the terminal frame 240, and the ground terminal 250, so that the electric field between the TFT circuit on the display panel surface and the vapor deposition mask can be reduced. Electroadsorption is possible. In addition, there is an effect of preventing the TFT circuit in the display panel 350 from being broken by the applied high voltage.

  As shown in FIG. 11, the mask support 270 is connected to the switch 291 via the metal wiring 290, and the switch 291 is configured so that the high-voltage power source 292 or the ground 293 can be switched. The second embodiment is the same as the second embodiment except that the mask 260 and the mask frame 270 are covered with the insulating film 280 in the third embodiment as described above. In FIG. 11, the vacuum chamber and the vapor deposition source are omitted.

  Next, using the vapor deposition apparatus 200 in the third embodiment, the TFT substrate 230 is placed over the mask 260, and then an organic dye material is vapor-deposited on the TFT substrate 230, and the TFT substrate 230 is removed from the mask 260. The process until removal will be described.

  First, the opening 261 of the mask 260 and the TFT substrate 230 are aligned and installed so that the organic dye material is deposited at an appropriate position on the TFT substrate 230, and the ground terminal 250 formed on the TFT substrate 230. Is grounded. At this time, the outer peripheral portion 241 of the terminal frame 240 of the TFT substrate 230 and the ground terminal 250 of the mask 260 are in contact with each other. Note that after the ground terminal 250 is grounded, the mask 260 and the TFT substrate 230 may be positioned and installed.

  Next, as in the first embodiment, the switch 291 is switched so that the voltage of the high-voltage power supply 292 is applied to the mask 260, and the TFT substrate 230 is electrostatically attracted to the mask 260, and then the TFT substrate. An organic dye material is vapor-deposited on 230. At this time, in the third embodiment, sufficient adsorption can be obtained only by raising the voltage of the high-voltage power supply 292 to about 300V. Specifically, as shown in FIG. 13, in order to obtain the same electrostatic adsorption pressure, the first and second embodiments require a voltage of about 7000 V, whereas the voltage is relatively low. A voltage of about 300V is sufficient. That is, in the third embodiment, the TFT substrate 230 and the mask 260 can be sufficiently adsorbed at a voltage of about 300V. Unlike the first and second embodiments, this uses the attractive force due to electrostatic attraction between the electric charge of the terminal frame 240 formed on the TFT substrate 230 and grounded through the ground terminal 250 and the mask 260. Is due to.

  After the deposition is completed, the switch 291 is switched so that the mask 260 is grounded as in the second embodiment, and the TFT substrate 230 is removed. Thereafter, the high resistor 360 connecting the terminal frame 240 and the terminal of the display panel 350 is removed by cutting, for example.

  Through the above process, in the third embodiment, the terminal frame 240 is grounded, and after electrostatic attraction, the switch 291 is switched to ground the mask 260 so that the charge accumulated in the TFT substrate 230 is collected. As a result, the TFT substrate 230 can be easily and quickly removed from the mask 260 after electrostatic attraction. Further, the mask 260 and the TFT substrate 230 can be sufficiently adhered at a relatively low voltage of about 300V. Furthermore, a display panel with high pattern accuracy can be manufactured by depositing the organic dye material of each color after the TFT substrate 230 and the mask 260 are sufficiently adhered by electrostatic adsorption.

  The present invention is not limited to the first to third embodiments, and various modifications can be made. For example, it can be replaced with a configuration that is substantially the same as the configuration described in Embodiments 1 to 3, a configuration that exhibits the same operational effects, or a configuration that can achieve the same purpose.

  110 mask support, 120 mask, 130 evaporation source, 150 TFT substrate, 160 display area, 170 sealing glass, 180 sealing sealing material, 220 transparent drying material, 240 terminal frame, 250 ground terminal, 310, 320, 330 Each pixel consisting of red, green and blue, 360 high resistance, 401 glass substrate, 402 polycrystalline silicon, 403 gate electrode, 404 gate insulating film interlayer insulating film, 405 source and drain electrodes, 406 passivation film, 430 organic EL element 407, planarization film, 409 reflective metal, 410 anode, 411 hole transport layer, 412, 413, 414 each color light emitting layer, 415 electron transport layer, 416 cathode, 510 vacuum chamber, 520 mask, 550 switch, 560 high voltage power supply, 810Film.

Claims (12)

  A substrate on which one or a plurality of display panel circuits are formed and a mask are arranged so as to overlap each other, a voltage is applied to the mask so that the substrate is electrostatically attracted to the mask, and the substrate is interposed through the mask. A method for manufacturing a display panel, characterized by vacuum film formation.   2. The method of manufacturing a display panel according to claim 1, wherein the mask is grounded after the vacuum film formation.   2. The method of manufacturing a display panel according to claim 1, wherein a conductive film is formed on a surface of the substrate that does not overlap the mask, and the conductive film is grounded. The sheet resistance value of the said electrically conductive film is 10 < ³ > thru | or 10 < ⁶ > ohm / square, The manufacturing method of the display panel of Claim 3 characterized by the above-mentioned.   The method for manufacturing a display panel according to claim 1, wherein the mask is covered with an insulating film.   6. The method of manufacturing a display panel according to claim 5, wherein a grounded ground terminal is formed on the insulating film, a terminal frame is formed on the substrate, and the terminal frame is in contact with the ground terminal.   The method for manufacturing a display panel according to claim 6, wherein the substrate has a thin film transistor circuit, and the thin film transistor circuit is connected to the terminal frame through a resistor.   8. The method of manufacturing a display panel according to claim 7, wherein the thin film transistor circuit includes a driving power line, and the driving power line is connected to the terminal frame via the resistor. The method of manufacturing a display panel according to claim 7, wherein the resistor is 10 ^{3 to} 10 ⁸ Ω.   7. The display panel according to claim 6, wherein the terminal frame is provided on an outer periphery of the substrate so as to surround the one or more display panel circuits, and includes an outer peripheral portion in contact with a ground terminal. Production method.   The method of manufacturing a display panel according to claim 10, wherein the terminal frame is rectangular, and the terminal frame further includes a connection portion that connects opposite sides of the outer peripheral portion.   The method of manufacturing a display panel according to claim 1, wherein the mask is supported by a mask support.

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