JP2011180401A - Capacitance type liquid crystal display device with touch panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a capacitance type liquid crystal display device with a touch panel, wherein malfunction by noise from the liquid crystal display device is suppressed when the touch panel and liquid crystal display device are used in an approaching state. <P>SOLUTION: The capacitance type liquid crystal display device with the touch panel includes a liquid crystal display panel 11 and the touch panel 12 that is stacked on the liquid crystal display panel 11 and has a plurality of detection electrodes 15. On the non-display region side of the liquid crystal display panel 11, wires are laid along the periphery of a display region and a wire NDL for noise detection where both ends are opened is formed. A noise output circuit 40 is connected to the wire NDL for noise detection. A coordinate detecting circuit (touch panel controller 36) includes a noise removal circuit for calculating the difference between the outputs of a capacity detection circuit and the noise output circuit. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

The present invention relates to a liquid crystal display device with an input device (touch panel) capable of detecting the contact position of an image, and more particularly, to suppress a malfunction caused by noise from the liquid crystal display device when the touch panel and the liquid crystal display device are used close to each other. The present invention relates to a liquid crystal display device with a capacitive touch panel.

In electronic devices such as mobile phones, navigation devices, personal computers, ticket machines, ATMs (Automated Teller Machine) terminals such as banks and post offices, tablet-type touch panels are arranged on the surface of liquid crystal display devices, etc. It is known that information corresponding to an image can be input by touching a place where the image is displayed with a finger or the like while referring to the image displayed in the image display area.

Such a touch panel includes a resistance film type and a capacitance type, but the resistance film type touch panel has a structure in which the film is pressed and short-circuited in a two-layer structure of film and glass, so that the operating temperature range is low. It has the disadvantage of being narrow and vulnerable to changes over time. On the other hand, a capacitive touch panel has a long life and a translucent conductive film formed on a single substrate.
Since it has the advantages of a high response speed and excellent resolution and the like, a capacitive touch panel is now widely used.

For example, in Patent Document 1 below, a translucent electrode pattern is extended in a direction crossing each other, and
There has been disclosed a capacitive touch panel of a type that detects an input position by detecting a change in capacitance between electrodes when a finger or the like comes into contact. In a capacitive touch panel, alternating current of the same phase and the same potential is applied to both ends of the translucent conductive film to detect a weak current that flows when a capacitor is formed in contact with or close to a finger. A type that detects an input position is also known.

In recent years, when the liquid crystal display device is AC driven, in order to suppress the voltage amplitude of the signal line, the voltage of the common electrode is alternately switched between a low voltage and a high voltage. Noise is generated when the voltage is switched. Therefore, when a liquid crystal display device and a capacitive touch panel are used in combination, malfunction may occur due to mixing of display noise from the liquid crystal display device.

Therefore, in the electrostatic capacitance type tablet device disclosed in Patent Document 2 below, one frame period of the liquid crystal display device is divided into a display period (writing period of the liquid crystal display device) and a touch detection period, and the display of the liquid crystal display device is performed. Noise is prevented from affecting touch detection. In the display device with a touch sensor disclosed in Patent Document 3 below, the horizontal synchronization signal of the liquid crystal display device is used as a strobe signal, and the noise current is subtracted from the touch panel current.
The noise due to the drive signal of the liquid crystal display device is canceled.

JP 2007-122326 A Japanese Patent Laid-Open No. 10-124233 International Publication No. 2006/043660 Pamphlet JP 2003-107527 A JP 2006-171386 A

According to the liquid crystal display device with a touch panel disclosed in Patent Documents 2 and 3, a position detection signal that eliminates the influence of noise from the liquid crystal display device can be obtained. However, there is a problem that the configuration for obtaining a position detection signal that eliminates the influence of noise from the liquid crystal display device is very complicated.

On the other hand, there is known one in which a rescue dummy line (see Patent Document 4) and a substrate crack diagnosis wiring (see Patent Document 5) are formed in a non-display area around the display area of the liquid crystal display panel. .

The rescue dummy line of the liquid crystal display panel disclosed in Patent Document 4 is disposed outside a plurality of rescue lines arranged on the outer peripheral side of the display area, and is a ground terminal or a common potential ( Vcom) terminal and has a shielding effect for requesting the influence of noise from the external device on the rescue line and the pixel wiring.

Further, the substrate crack diagnosis wiring of the liquid crystal display device disclosed in the above-mentioned Patent Document 5 has a first and a second via a region sandwiched between the region where the signal line is formed and the outer peripheral edge of the sealing material. It is electrically connected to two diagnostic pads, and it is diagnosed whether or not the substrate is cracked by examining whether or not the first and second diagnostic pads are electrically connected. It is.

However, the above cited references 4 and 5 show nothing about the electrical effect between the liquid crystal display device having the rescue dummy wiring or the substrate crack diagnosis wiring when combined with the touch panel. It has not been.

When the inventors combined a liquid crystal display device having a rescue dummy wiring or a substrate crack diagnosis wiring with a touch panel, the rescue dummy wiring or the substrate crack diagnosis wiring is accompanied by switching of the voltage of the common electrode of the liquid crystal display panel. It was found that noise was induced. Then, when the output signal of the touch panel is corrected based on the noise induced in the rescue dummy wiring or the board crack diagnosis wiring, it is found that the touched position of the touch panel can be accurately detected, and the present invention is completed. It came to.

That is, the present invention provides a liquid crystal display device with a capacitive touch panel that has a simple structure but is not easily affected by noise associated with switching of the voltage of the common electrode. The purpose is to provide.

In order to achieve the above object, the invention of the liquid crystal display device with a capacitive touch panel according to the present invention includes a plurality of pixels having gradations according to a voltage difference between a pixel electrode and a common electrode facing the pixel electrode. A liquid crystal display panel including a formed display region and a non-display region formed around the display region, and supplying data signals to the pixel electrodes, respectively, and using a first voltage and a first voltage A driving circuit that supplies a common signal alternately switched to a higher second voltage to the common electrode, a touch panel that is stacked on the liquid crystal display panel and includes a plurality of detection electrodes, and capacitances of the plurality of detection electrodes. In the liquid crystal display device with a capacitive touch panel, comprising: a capacitance detection circuit for outputting; and a coordinate detection circuit for outputting touch coordinates based on the output of the capacitance detection circuit. On the non-display area side of the display panel, a noise detection wiring that is wired along the periphery of the display area and that is open at both ends is formed, and a noise output circuit is connected to the noise detection wiring. The coordinate detection circuit includes a noise removal circuit that calculates a difference between the capacitance detection circuit and an output of the noise output circuit.

When a wiring having both ends open along the periphery of the display area of the liquid crystal display device is formed, the wiring having both ends open serves as an antenna, and a signal applied to the inside of the liquid crystal display panel or from the outside Noise due to the signal is induced. When the common signal applied to the common electrode is alternately switched between the first voltage and a second voltage higher than the first voltage in order to AC drive the liquid crystal, Since the potential difference between the first voltage and the second voltage is large, a large noise due to switching between the first voltage and the second voltage is induced in the wiring having both ends opened.

In the liquid crystal display device with a capacitive touch panel according to the present invention, the wiring having both ends opened is used as a noise detection wiring, and after passing through the noise output circuit, the noise detection circuit of the coordinate detection circuit and the noise detection circuit The difference from the circuit output is calculated. Therefore, according to the liquid crystal display device with a capacitive touch panel of the present invention, the capacitance can be detected based on the output from which noise has been removed with high accuracy by a simple configuration. The touched position, that is, touch coordinates can be accurately detected.

In the liquid crystal display device with a capacitive touch panel according to the present invention, the noise detection wiring is formed adjacent to the common signal wiring of the liquid crystal display panel so as to be positioned on the outer peripheral side of the common signal wiring. It is preferable.

If the noise detection wiring is formed adjacent to the common signal wiring of the liquid crystal display panel and located on the outer peripheral side of the common signal wiring, a capacitance is formed between the common wiring and the noise detection wiring. Therefore, it is possible to satisfactorily pick up noise caused by the signal applied to the common wiring. Therefore, according to the liquid crystal display device with a capacitive touch panel of the present invention, the touch coordinates can be detected more accurately.

In the liquid crystal display device with a capacitive touch panel according to the present invention, both ends of the noise detection wiring may be connected to a pair of diagnostic pads.

In the liquid crystal display device, most of the common wiring is wired on the outermost peripheral side around the display area. In the liquid crystal display device with a capacitive touch panel of the present invention, since the noise detection wiring is further wired on the outer peripheral side of the common wiring, the noise detection wiring is first disconnected when a substrate crack or the like occurs. To do. Therefore, according to the liquid crystal display device with a capacitive touch panel of the present invention, by measuring the electrical resistance between the pair of diagnostic pads, it is possible to easily break the noise detection wiring, i.e., break the substrate. Can be detected.

In the liquid crystal display device with a capacitive touch panel according to the present invention, it is preferable that the capacitance detection circuit and the noise output circuit each include a switch capacitor circuit.

If both the capacitance detection circuit and the noise output circuit have a switch capacitor circuit, the noise caused by the voltage applied to the common wiring is substantially the same for both the output of the capacitance detection circuit and the output of the noise output circuit. Influence. Therefore, according to the liquid crystal display device with a capacitive touch panel of the present invention, the adverse effect due to noise is reduced, and the touch coordinates can be obtained more accurately.

In the liquid crystal display device with a capacitive touch panel according to the present invention, it is preferable that the capacitance detection circuit and the switch capacitor circuit of the noise output circuit are operated in synchronization with each other.

If the capacitance detection circuit and the switch-capacitor circuit of the noise output circuit operate in synchronization with each other, noise can be more accurately removed. Therefore, according to the liquid crystal display device with a capacitive touch panel of the invention, the adverse effect due to noise is reduced,
Furthermore, the touch coordinates can be obtained accurately.

1A is a schematic perspective view of a liquid crystal display device with a capacitive touch panel according to an embodiment of the present invention, and FIG. 1B is a partially enlarged plan view of the touch panel of FIG. 1A. It is a figure which shows the structure of the liquid crystal display panel of FIG. 1A, and its drive circuit. It is an equivalent circuit diagram for several pixels of the liquid crystal display panel of FIG. 1A. It is a schematic plan view of the array substrate of the liquid crystal display panel of FIG. 1A. 1B is a timing chart showing the operation of the liquid crystal display panel of FIG. 1A. It is a figure which shows the capacity | capacitance detection circuit of the touchscreen of FIG. 1B. It is a figure which shows allocation of the detection operation | movement by the capacity | capacitance detection circuit of the touch panel of FIG. 1B. It is a timing chart which shows operation | movement of one electrode of the touchscreen of FIG. 1B. FIG. 9A is a diagram illustrating the operation of the touch panel during the settling period, and FIG. 9B is a diagram illustrating the operation of the touch panel during the counting period. It is a flowchart which shows operation | movement of a touchscreen controller. It is a timing chart of the capacity detection circuit of the touch panel of the embodiment. It is a figure which shows the actual measurement waveform of the conventional capacity | capacitance detection circuit. It is the schematic of the noise correction circuit of embodiment.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. However, the embodiments shown below are not intended to limit the present invention to those described here, and the present invention is not limited to patents. The present invention can be equally applied to various modifications without departing from the technical idea shown in the claims.

A specific configuration of a liquid crystal display device with a capacitive touch panel according to an embodiment of the present invention will be described with reference to FIG. 1A is a schematic perspective view of a liquid crystal display device with a capacitive touch panel according to an embodiment of the present invention, and FIG. 1B is a partially enlarged plan view of the touch panel of FIG. 1A.

As shown in FIG. 1A, the liquid crystal display device 10 with a capacitive touch panel of the embodiment has a configuration in which a liquid crystal display panel 11 and a touch panel 12 on which detection electrodes for touch detection are formed are stacked. . The liquid crystal display panel 11 is composed of a transmissive, reflective, or transflective active matrix liquid crystal display panel. In the case of a transmissive or transflective liquid crystal display panel, the liquid crystal display panel 11 is on the side opposite to the display light emission side. A backlight device (not shown) is arranged.

Further, in the liquid crystal display panel 11, a retardation plate and a polarizing plate (not shown) are disposed so as to overlap the liquid crystal display panel 11. The liquid crystal display panel 11 includes an array substrate 13, a counter substrate 14 disposed to face the array substrate 13, and a liquid crystal layer (not shown) held between the counter substrate 14 and the array substrate 13. Yes. In FIG. 1A, for the sake of explanation, the liquid crystal display panel 11 and the touch panel 12 are shown separated from each other, but in actuality, they are in close contact with each other.

As shown in FIG. 1B, the touch panel 12 according to the embodiment of the present invention includes a transparent first detection electrode 15a and a transparent second detection electrode 15b. In FIG. 1B, a part of the transparent first detection electrode 15a and the transparent second detection electrode 15b are extracted and shown. In the following description, when it is not necessary to distinguish the transparent first detection electrode 15a and the transparent second detection electrode 15b, both may be expressed as “detection electrode 15”.

The touch panel 12 is a capacitive touch panel, and a driving circuit for detecting an input position on the touch panel 12 is connected to a single light-transmitting substrate. In the touch panel 12, a plurality of rows of transparent first detection electrodes 15 a extending in the first direction indicated by the arrow X and the first area indicated by the arrow Y are provided in the input region on the upper surface of the translucent substrate. A plurality of rows of transparent second detection electrodes 15b extending in a second direction intersecting the direction are formed. Here, each of the transparent first detection electrode 15a and the transparent second detection electrode 15b has a rhombus shape.

The transparent first detection electrode 15a is connected at the intersection 15c with the transparent second detection electrode 15b, but the transparent second detection electrode 15b is at the intersection 15 with the transparent first detection electrode 15a.
Although interrupted at c, they are electrically connected by a relay electrode 15e formed on the interlayer insulating film 15d. That is, a translucent interlayer insulating film 15d is formed on the upper side of the transparent first detection electrode 15a in the intersection 15c, and the interlayer insulation film 15d is interrupted at the intersection 15c. A translucent relay electrode 15e that electrically connects the transparent second detection electrodes 15b is formed. For this reason, the transparent second detection electrode 15b is electrically connected in the second direction.

In the touch panel 12 having such a configuration, when a charge is applied by sequentially applying a detection voltage to the plurality of transparent first detection electrodes 15a and the plurality of transparent second detection electrodes 15b, a conductor is provided at any location. When the finger is touched, the transparent first detection electrode 15a and the transparent second detection electrode 15b
Between the first detection electrode 15a and the second detection electrode 15b.
Since the electrostatic capacity decreases in between, it is possible to detect which part the finger touches. The shape of the transparent first detection electrode 15a and the transparent second detection electrode 15b may be arranged in a matrix shape, for example, as a rectangular shape.

Here, the liquid crystal display panel 11 and its drive circuit 16 in the liquid crystal display device 10 with a capacitive touch panel according to the embodiment will be described with reference to FIGS. FIG. 2 is a diagram showing the configuration of the liquid crystal display panel 11 and its drive circuit 16. FIG. 3 is an equivalent circuit diagram for several pixels of the liquid crystal display panel 11. FIG. 4 is a schematic plan view of the array substrate of the liquid crystal display panel. FIG. 5 is a timing chart showing the operation of the liquid crystal display panel.

As shown in FIG. 2, in the liquid crystal display panel 11 of the embodiment, in the display area DA, for example, m rows of scanning lines 17 extend in the row direction (X direction), and n columns. The signal lines 18 are provided so as to extend in the column direction (Y direction), respectively. The pixels 19 are arranged corresponding to the intersections between the scanning lines 17 in the 1st to mth rows and the signal lines 18 in the 1st to nth columns. Therefore, in the liquid crystal display panel 11 of the embodiment, the pixel 19 is vertically m.
They are arranged in a matrix of rows × n columns. Further, the common signal VCOM is supplied to the common electrode 20 from the common signal supply circuit 21 through the common wiring 20 </ b> L, and is shared across all the pixels 19.

As shown in FIG. 3, the pixel 19 includes an n-channel thin film transistor (Thin F).
ilm Transistor: hereinafter simply referred to as “TFT”. ) 22 and a liquid crystal capacitor 23. The TFT 22 has a gate electrode connected to the scanning line 17, a source electrode connected to the signal line 18, and a drain electrode connected to the pixel electrode 24. Here, the pixel electrode 24 is formed on the array substrate 13. On the other hand, the common electrode 20 is formed on the counter substrate 14 so as to oppose all the pixel electrodes 24, and sandwiches the liquid crystal layer 25 between the pixel electrodes 24. Accordingly, a liquid crystal capacitor 23 including the pixel electrode 24, the common electrode 20, and the liquid crystal layer 25 is configured for each pixel 19.

In such a liquid crystal capacitor 23, the transmittance of light passing between the pixel electrode 24 and the common electrode 20 has a minimum value (darkest when the effective value of the voltage held in the liquid crystal capacitor 23 is zero. Is set to a normally black mode that gradually increases as the effective value increases. For this reason, the light irradiated by the backlight unit (not shown) is emitted at a ratio corresponding to the effective value of the voltage held in the liquid crystal capacitor 23 for each pixel 19. Therefore, the target image can be displayed by holding the voltage corresponding to the gradation in the liquid crystal capacitor 23 for each pixel 19.

In addition, the schematic plan view of the array substrate 13 of the liquid crystal display panel 11 of the embodiment is as shown in FIG. That is, around the display area DA of the array substrate 13, for example, a driver ICDr including the drive circuit 16 is disposed at one end portion on the short side. In addition, the plurality of scanning lines 17 in the display area DA are respectively connected to the scanning line lead wiring 17L formed around the display area DA.
The plurality of signal lines 18 are also connected to the driver ICDr via signal line routing wirings 18L. An external connection terminal T1 formed at one end on the short side of the array substrate 13 is formed from the driver ICDr.

In addition, a common line 20L is formed on the outer periphery of the display area DA so as to surround the display area DA. A common signal VCOM from the common signal supply circuit 21 is applied to the common wiring 20L and is electrically connected to the common electrode 20. The common signal supply circuit 21 may be built in the driver ICDr or supplied from an external circuit via the external connection terminal T1. In the array substrate 13 of the liquid crystal display panel 11 of the embodiment, noise detection wiring NDL is formed along the outer peripheral side of the common wiring 20L. Both ends of the noise detection wiring NDL are connected to diagnostic pads T2 arranged adjacent to the external connection terminals T1, respectively. Details of the noise detection wiring NDL and the diagnostic pad T2 will be described later.

As shown in FIG. 2, the drive circuit 16 includes a control circuit 26, a common signal supply circuit 21, a scanning line drive circuit 27, and a signal line drive circuit 28. Among these, the control circuit 26 outputs various control signals, and the common signal supply circuit 21, the scanning line driving circuit 27, and the signal line driving circuit 2.
Each part of 8 is controlled. The scanning line driving circuit 27 supplies the scanning signals Y1, Y2, Y3,..., Ym to the scanning lines 17 in the 1, 2, 3,. Specifically, as shown in FIG. 4, the scanning line driving circuit 27 counts the scanning lines 17 row by row from the top in FIG.
Selection is made in the order of rows for each horizontal scanning period (H), and the scanning signal to the selected scanning line 17 is set to H.
The selection voltage V _GH corresponding to the level is set, and the other scanning signals to the scanning line 17 are set to the voltage V _GL corresponding to the L level. In the present embodiment, one frame means a period required to display one image. As shown in FIG. 5, the first row scanning line 17 is selected and the mth row is selected. The period until the scanning line 17 is selected.

The signal line driving circuit 28 is a voltage according to the gradation of the pixel for the pixel 19 positioned on the scanning line 17 to which the selection voltage is applied via the scanning line routing wiring 17L by the scanning line driving circuit 27. A data signal having a voltage corresponding to the writing polarity designated by the circuit 26 is supplied to each of the signal lines 18 in the 1st to nth columns. Specifically, the signal line drive circuit 28 has a storage area (not shown) corresponding to a pixel matrix arrangement of m vertical rows and horizontal n columns, and in each storage area, the gradation ( Display data Da for designating (brightness) is stored.
Here, the signal line driving circuit 28 immediately before the selection voltage is applied to a certain scanning line 17,
While reading the display data Da of the pixel 19 located in the scanning line 17 from the storage area,
The voltage is converted into a voltage corresponding to the gradation and writing polarity specified by the read display data, and the signal line routing wiring 1 is used as a data signal in accordance with the timing at which the selection voltage is applied to the scanning line.
The signal is supplied to the signal line 18 through 8L.

The signal line driving circuit 28 executes this supply operation in parallel for each of the 1 to n columns positioned on the selected scanning line 17. Note that the display data Da stored in the storage area is rewritten when the display content is changed, the display data Da after the change is supplied together with the write address from an external higher circuit (not shown).

In this embodiment, the writing polarity to the pixel is a row inversion (also referred to as line inversion or scanning line inversion) method that inverts every row. Here, as shown in FIG. 5, it is located on the scanning line 17 in the odd-numbered (1, 3, 5,..., M−1) rows in a certain frame (denoted as “n frame”). Positive polarity is designated for the pixel 19, and even numbers (2, 4, 6,..., M
) When the negative polarity is designated for the pixel 19 located on the scanning line 17 in the row,
In the next frame (denoted as “(n + 1) frame”), the negative polarity is specified for the pixels 19 in the odd rows, and the positive polarity is specified for the pixels 19 in the even rows. The reason why the writing polarity is inverted for each frame in this way is to prevent the liquid crystal layer 25 from being deteriorated due to the application of the DC component.

The common signal supply circuit 21 supplies a common signal VCOM having the following voltage to the common electrode 20. More specifically, the common signal supply circuit 21 sets the common signal VCOM to the voltage VCOML when the positive polarity writing is designated in the horizontal scanning period (H) in which a certain scanning line is selected, and sets the negative polarity writing. Common signal VCOM is applied to voltage VCOMH.
And As shown in FIG. 5, the voltages VCOML and VCOMH are expressed as V _GL <VCO between a voltage V _GL corresponding to the L level and a selection voltage V _GH corresponding to the H level.
ML <VCOMH <V _GH .

Here, when the frame frequency is 60 Hz in the present embodiment, the period of one frame is 16.7 msec, and the horizontal scanning period (H) is 50 μsec, which is 1 / m. Accordingly, the common signal supply circuit 21 uses the 16-clock signal Clkb obtained by dividing the clock signal Clk of 12 MHz by 38 as a guideline for one horizontal scanning period (H).
It is only necessary to switch the voltage of OM.

Next, the operation of the liquid crystal display panel 11 will be described. As described above, in this embodiment,
In the n frame, first, the scanning line 17 in the first row is selected, and the scanning signal Y1 becomes the voltage V _GH corresponding to the H level. Further, since the positive polarity writing is designated in the odd-numbered rows in the n frame, the common signal VCO is used in the horizontal scanning period (H) in which the scanning signal Y1 is at the H level.
M becomes the voltage VCOML. Further, when the scanning signal Y1 becomes the H level in the n frame, the signal line driving circuit 28 sets the voltage specified by the display data Da of the pixels in the first row and the first, second, third,. Only, the voltage data signal X on the high side with respect to the voltage VCOML
1, X 2, X 3,..., Xn are supplied to 1, 2, 3,.
As a result, for example, the data signal Xj supplied to the signal line 18 in the j-th column becomes higher than the voltage VCOML as the gradation specified by the display data Da of the pixel 19 in the first row and j-th column becomes brighter. Voltage. When the scanning signal Y1 becomes H level, the TFTs 22 in the pixels in the 1st row and 1st column to the 1st row and the nth column are turned on, so that the data signals X1, X2,.
X3,..., Xn are applied. Therefore, the difference voltage between the voltage of the data signal and the voltage VCOML of the common signal VCOM, that is, the positive voltage corresponding to the gradation is written in the liquid crystal capacitor 23 of the first row and first column to the first row and n column. become.

Next, in the n frame, the scanning line 17 in the second row is selected, and the scanning signal Y2 becomes H level. In addition, since negative polarity writing is designated for even rows in the n frame, in the horizontal scanning period (H) in which the scanning signal Y2 is at the H level, the common signal VCOM is the voltage VCOM.
H. Further, when the scanning signal Y2 is at the H level, the signal line driving circuit 28 sets the voltage to the voltage specified by the display data Da of the pixels in the second row and in the first, second, third,. V
.., Xn are supplied to the signal lines 18 of 1, 2, 3,..., N columns, respectively, on the lower side with respect to COMH. Thus, for example, the signal line 1 in the j-th column
The data signal Xj supplied to 8 becomes a voltage lower than the voltage VCOMH as the gradation specified by the display data Da of the pixel 19 in the 2nd row and jth column becomes brighter. Scanning signal Y2
Since the TFTs 22 in the pixels in the 2nd row and 1st column to the 2nd row and the nth column are turned on, the data signals X1, X2, X3,..., Xn are applied to these pixel electrodes 24. Therefore, a negative voltage corresponding to the gradation is written in the liquid crystal capacitor 23 of 2 rows 1 column to 2 rows n columns.

In the n-th frame, the same operation is repeated thereafter, and the positive voltage corresponding to the gradation is written and held in the odd-numbered rows, and the negative voltage corresponding to the gradation is written in the even-numbered rows. Retained. The same operation is repeated in the next (n + 1) frame. However, since the writing polarity is inverted, the negative polarity voltage corresponding to the gradation is written and held in the odd-numbered row, and the gradation is changed in the even-numbered row. The corresponding positive voltage is written and held.

In FIG. 5, the voltage waveform of the data signal Xj supplied to the signal line 18 in the j-th column is represented by the scanning signal Y.
It is shown in relation to i and Y (i + 1). When the positive writing is designated in the horizontal scanning period (H) in which the i-th scanning line is selected, the common signal VCOM supplied to the common electrode 20 becomes the voltage VCOML in the horizontal scanning period (H). . A data signal Xj having a higher voltage (indicated by an upward arrow in FIG. 5) than the voltage VCOML by a voltage corresponding to the gradation of the pixel in i row and j column is supplied to the signal line 18 in the j column. Is done. As a result, the voltage difference between the voltage of the data signal Xj and the voltage VCOML of the common electrode 20, that is, the positive voltage corresponding to the gradation is written in the liquid crystal capacitor 23 in i row and j column.

In the horizontal scanning period (H) in which the next (i + 1) -th scanning line is selected, the writing polarity is reversed and negative polarity writing is designated, so that the scanning signal Y (i + 1) is at the H level. Horizontal scanning period (
In H), the common signal VCOM becomes the voltage VCOMH. The voltage V is applied to the signal line 18 in the j-th column.
A data signal Xj having a lower voltage (indicated by a downward arrow in FIG. 5) corresponding to the gradation of the pixel in (i + 1) rows and j columns from COMH is supplied. As a result, (i +
1) In the liquid crystal capacitor 23 in the row j column, the voltage of the data signal Xj and the voltage VC of the common electrode 20
A voltage difference from OMH, that is, a negative voltage corresponding to the gradation is written.

Next, regarding the touch panel in the liquid crystal display device 10 with a capacitive touch panel,
This will be described with reference to FIGS. FIG. 6 is a diagram showing a capacitance detection circuit of the touch panel of FIG. 1B. FIG. 7 is a diagram showing allocation of detection operations by the capacitance detection circuit of the touch panel of FIG. 1B. FIG. 8 is a timing chart showing the operation of one electrode of the touch panel of FIG. 1B.

This touch panel includes a touch panel 12 and detection electrodes 1 formed on the touch panel 12.
And a capacitance detection circuit 29 for detecting a capacitance of 5. Note that FIG.
3 is a block diagram showing a configuration of a main part of a capacitance detection circuit 29 using a successive approximation AD converter 30a as the D converter 30. FIG. As shown in FIG. 1B, the transparent first detection electrodes 15a are electrically connected to each other for each row, and the transparent second detection electrodes 15b are electrically connected to each other for each column. The capacitance detection circuit 29 includes n switch / capacitor circuits 31 that are individually provided so as to correspond to all the rows and all the columns, the constant current source 32, and the capacitive element 3.
3, a comparator 34 constituting a successive approximation AD converter 30 a, and a counter 35.

The n switch capacitor circuits 31 individually provided so as to correspond to all the rows and all the columns are structurally identical. Accordingly, the description will be made with reference to the first row or column. The first switch capacitor circuit 31 includes a switch SW1 having one end connected to the detection electrode 15 in the first row, and one end (detection electrode) of the switch SW1. 15 side) and a ground line of the potential GND and a switch SW2 which is turned on / off. Switch SW1 and switch SW2
The switch SW2 is turned off when the switch SW1 is turned on, and the switch SW2 is turned on when the switch SW1 is turned off. The switch-capacitor circuit 31 corresponding to the 2nd to n-th rows or columns has the same configuration as the switch-capacitor circuit 31 corresponding to the first row or column, but the operation timing is shifted. . Although not shown, these timings are controlled by clock pulses supplied to the switches SW1 and SW2 supplied to the respective switch / capacitor circuits 31. Since these circuits are well known, detailed description thereof is omitted.

In the switch capacitor circuit 31 corresponding to the 1st to nth rows or columns, the switch S
The other ends of W1 are connected in common. For convenience of explanation, this common connection point is referred to as a node A. The constant current source 32 has a constant current Ida from the higher power supply line of the power supply voltage toward the node A.
c. The capacitive element 33 is interposed between the node A and the ground line. The comparator 34 compares the voltage at the node A with the reference voltage Vref. When the voltage at the node A is lower than the reference voltage Vref, the comparator 34 becomes H level, and the voltage at the node A becomes the reference voltage Vref.
The output signal Vcmp which becomes L level when it becomes f or more is output. The counter 35 is allowed to count when the output signal Vcmp is at the H level, and the clock signal Osc
The count value Cnt is output to an external control circuit (not shown). The count value Cnt by the counter 35 is reset to zero by a pulse signal Ps supplied at the beginning of a count period described later.

Next, the capacity detection operation will be described. FIG. 7 is a diagram showing allocation of detection operations by the capacitance detection circuit 29. As shown in FIG. As shown in this figure, the capacitance detection circuit 29 repeats the operation of detecting the capacitance of the first, second, third,..., Nth row or column in this order. The period for detecting the capacity of each row or column is divided into a settling period and a count period. Here, the capacity detection operation corresponding to the first row or column will be described with reference to FIG.

As shown in FIG. 8, in the settling period among the periods for detecting the capacitance for the first row or column, the signal Ck1 alternately repeats the H level and the L level. In addition,
As the signal Ck1 in the settling period, for example, a signal obtained by dividing the clock signal Clk by four is used, and here, the frequency is 3 MHz.

Since the touch panel 12 is laminated on the liquid crystal display panel 11, various capacitances are parasitic on the detection electrode 15. For example, as the capacitance parasitic on a predetermined row or column, there is a coupling capacitance C _LCD with the liquid crystal display panel 11 (various electrodes thereof) and a combined capacitance _CE with a coupling capacitance with other electrodes and a stray capacitance. Among these, the capacitor C _LCD is grounded to the potential GND through various electrodes of the liquid crystal display panel 11, for example, the common electrode 20, the scanning line 17, the signal line 18, and the like. Here, for convenience, the combined capacity of the capacitor C _LCD and the capacitor _CE for a given row or column is represented by C
x.

Next, the operation principle of the switch / capacitor circuit will be described with reference to FIG. FIG. 9A is a diagram illustrating the operation during the settling period, and FIG. 9B is a diagram illustrating the operation during the count period. As shown in FIG. 9A, when the signal Ck1 is at the H level in the settling period, the switch S
Since W1 is turned on and the switch SW2 is turned off, the capacitor Cx is charged by the constant current Idac. At this time, since the capacitance Cx is sufficiently small, the current flowing through the capacitance Cx immediately becomes zero. Next, as shown in FIG. 9B, in the settling period, the signal Ck1
When the voltage becomes low, the switch SW1 is turned off and the switch SW2 is turned on. Therefore, a discharge current flows through the capacitor Cx due to the discharge, and eventually the discharge is completely zeroed.

Here, in the settling period, the charge charged in the capacitor Cx when the signal Ck1 is at the H level and the charge discharged from the capacitor Cx when the signal Ck1 is at the L level are equal to each other. When the ON / OFF of SW2 is repeated at a constant period, the current average value by charging and the current average value by discharging become the same magnitude. That is, it can be considered that the capacitance Cx viewed from the power supply voltage is equivalent to a resistance element in which an average value of charge / discharge current flows. This is the operating principle of the switched capacitor circuit.

For this reason, if the settling period is sufficiently long, the average voltage Va at the node A will settle to Idac / (fs · Cx) as shown in FIG. Here, the frequency fs is set so that the voltage {Idac / (fs · Cx1)} is lower than the reference voltage Vcmp.
The constant current Idac is set. When set in this way, the signal Vcmp from the comparator 34 becomes H level at the end of the settling period.

Subsequently, when the settling period ends and the process proceeds to the count period, the signal Ck1 becomes L level. As a result, the switch SW1 is fixed in the off state and the switch SW2 is fixed in the on state, so that the detection electrode 15 is disconnected from the node A and grounded to the potential GND. For this reason, since the capacitive element 33 is charged by the constant current Idac, the node A rises at a constant rate from the voltage {Idac / (fs · Cx1)}. In addition, the pulse signal Ps is output at the beginning of the count period, and the clock signal Osc is output from a separate oscillator (not shown).

For this reason, the count value Cnt of the counter 35 is reset to zero. Furthermore, the signal V
Since cmp is at the H level and the count operation is permitted, the counter 35 counts up the clock signal Osc. When the voltage at the node A rises and eventually reaches the reference voltage Vref, the signal Vcmp changes to the L level, so that the counter 35 is not allowed to count. Therefore, the count value Cnt is calculated from the start of the count period.
This is the number of cycles of the clock signal Osc until the node A reaches the reference voltage Vref.

Here, for example, when a finger or the like touches the first detection electrode 15, the capacitance _CE apparently increases due to electrostatic coupling with the finger or the like, and the combined capacitance Cx also increases. For this reason, at the end of the settling period, the voltage Va at the node A decreases as shown by a thin line in FIG. 8, so that the time until it reaches the reference voltage Vref is increased accordingly, and the count value Cnt increases. . Therefore, whether or not a finger or the like is touching the first detection electrode 15 by determining whether the count value Cnt by the counter 35 is large with reference to the value at the time of non-touch by the external control circuit. Can be detected.

As shown in FIG. 10, by repeating this operation in order for the first to nth detection electrodes 15, it is detected whether or not all the detection electrodes 15 are touched. The touched coordinates can be obtained from the detected values of the touched row and column by the touch panel controller 36 (corresponding to the “coordinate detection circuit” of the present invention).

In the coordinate calculation process, the baseline is corrected as appropriate. This baseline correction is performed by subtracting the baseline (threshold value) from the value after AD conversion from the successive approximation AD converter 30, and then obtaining the first to nth data, Calculate the centroid of the data and update the baseline based on this centroid. The baseline updated in this way is set as the next baseline.

Here, the relationship between the detection operation by the capacitance detection circuit 29 and the common signal VCOM will be described. As described above, in this embodiment, the horizontal scanning period (H) is 50 μsec. Therefore, in the same frame period, as shown in FIG. 5, the common signal VCOM is alternately switched between the voltages VCOMH and VCOML every horizontal scanning period (H). In the present embodiment, the horizontal scanning period (H) is set shorter than the settling period assigned for detection by the capacitance detection circuit 29. For this reason, as shown in FIG.
In the settling period for detecting the capacity of 5, the voltage of the common signal VCOM is always switched.

Since the common electrode 20 to which the common signal VCOM is applied is opposed to the pixel electrodes 24 of all the pixels, the common electrode 20 has a large area. Therefore, noise due to voltage switching of the common electrode 20 is detected by the detection electrode 15 formed on the touch panel 12. However, it is easy to propagate through the capacitor C _LCD . This phenomenon will be described with reference to FIG. FIG. 11 is a diagram showing voltage waveforms at various parts for explaining the inversion timing of the switch / capacitor circuit 31 and the common signal VCOM.

Here, for example, during the settling period of the first detection electrode 15, when the switch SW1 of the switch capacitor circuit 31 is in the on state and the switch SW2 is in the off state (arrow a portion), the common signal VCOM Noise associated with voltage switching is caused by capacitance C
Propagation to the node A through the _LCD affects the settling voltage Cmod. Note that the switch SW1 of the switch-capacitor circuit 31 is turned off, and the switch SW2
When C is in the ON state (arrow b portion), both ends of Cx are short-circuited, so that noise hardly occurs even when the voltage of the common signal VCOM is switched.

The actual measured value of the settling voltage Cmod is shown in FIG. 12A shows actual measurement values at the timing corresponding to the arrow a portion in FIG. 11, and FIG. 12B shows actual measurement values at the timing corresponding to the arrow b portion in FIG. 12A and 12B, the noise voltage accompanying the switching of the common signal VCOM is superimposed on the settling voltage Cmod in the arrow a part of FIG. 11, but the common signal VCOM is shown in the arrow b part of FIG. It can be seen that the noise is not superimposed even when is switched. Since the drive circuit of the conventional switch capacitor circuit, that is, the touch panel controller is driven independently of the LCD drive timing (asynchronous drive), there are cases where noise is superimposed on the settling voltage Cmod and where noise is not superimposed. It occurred randomly.

As described above, when the driving timing of the common signal VCOM and the touch panel controller are asynchronous, the noise associated with the switching of the voltage of the common signal VCOM due to the on / off states of the switches SW1 and SW2 of the switch / capacitor circuit 31 is settling voltage Cmod. Therefore, the settling voltage Cmod fluctuates. The variation of the settling voltage Cmod causes the count value Cnt to vary randomly every coordinate detection, and causes a variation in the count value obtained from each detection electrode 15 even during one coordinate detection operation. .

Usually, the liquid crystal display panel 11 and the touch panel 12 are manufactured separately and combined in the final process to form the liquid crystal display device 10 with a capacitive touch panel. Therefore, in general, the drive circuit of the switch / capacitor circuit, that is, the touch panel controller 36,
It is driven (asynchronously driven) independently of the LCD drive timing.

Therefore, in the liquid crystal display device 10 with a capacitive touch panel of the embodiment, the noise detection wiring N is arranged along the outer peripheral side of the common wiring 20L formed on the outer peripheral side of the liquid crystal display panel 11.
DL is arranged, and both ends of the noise detection wiring NDL are electrically connected to a diagnostic pad T2 disposed adjacent to the external connection terminal T1, respectively. This noise detection wiring NDL
Is floating.

The noise detection wiring NDL may be formed of the same material at the same time as the formation of the common wiring 20L when the scanning lines 17 to the signal lines 18 are formed. This eliminates the need for a special process for forming the noise detection wiring NDL. Since the noise detection wiring NDL is formed along the common wiring 20L, the noise detection wiring NDL and the common wiring 20 are formed.
Since a large capacitance is formed between L and L, it acts as a kind of antenna and the common wiring 2
Noise caused by the signal applied to 0L can be detected well.

In the liquid crystal display device 10 with the capacitive touch panel according to the embodiment, the capacitance signal detected by the touch panel controller 36 is detected by the noise detection circuit 40 based on the noise voltage induced in the noise detection wiring NDL. It is corrected by the noise signal so that accurate touch coordinates can be obtained. A schematic configuration of the noise detection circuit 40 will be described with reference to FIG.

The noise detection circuit 40 includes a noise amplification circuit 41 and an AD converter 42. The noise amplification circuit 41 includes a known buffer circuit and level adjustment circuit, amplifies the noise voltage appearing on one side of the diagnostic pad T2 of the liquid crystal display panel 11 and outputs the amplified voltage to the AD converter 42. The AD converter 42 can be used by appropriately selecting a known one, and AD-converts the amplified noise voltage. The output of the AD converter 42 is input to the microprocessor MPU of the touch panel controller 36.

Then, in the MPU, the touch detection with the noise component corrected is detected by calculating the digitized capacitance detection value detected by the detection electrode 15 of the touch panel 12 and the digitized noise signal. . When the AD converter 42 of the noise detection circuit 40 is operated in synchronization with the operation of the capacitance detection circuit 29, the touch coordinates can be detected more accurately. The synchronization between the noise detection circuit 40 and the capacitance detection circuit 29 can be easily performed by the microprocessor MPU. This microprocessor MPU
The touch panel controller 36 provided with corresponds to the coordinate detection circuit and the noise removal circuit of the present invention.

As described above, according to the liquid crystal display device 10 with the capacitive touch panel according to the embodiment, the detection value of the capacitance caused by the noise caused by the signal applied to the common wiring 20L can be accurately corrected. It becomes possible to obtain the correct touch coordinates.

In the liquid crystal display device 10 with the capacitive touch panel according to the above embodiment, an example in which the noise detection circuit 40 is provided separately from the touch panel controller 36 is shown. However, the noise detection circuit 40 is integrated in the touch panel controller 36. Can also be incorporated.

Note that, in the liquid crystal display device 10 with a capacitive touch panel according to the embodiment, both ends of the noise detection wiring NDL are connected to the pair of diagnostic pads T2. The noise detection wiring NDL is formed along the common wiring 20L further on the outer peripheral side of the common wiring 20L formed on the outer peripheral side of the liquid crystal display panel 11. Therefore, the noise detection wiring NDL is formed along the outermost peripheral side of the liquid crystal display panel.

For this reason, the noise detection wiring NDL can also be used for detecting a substrate crack or the like when the liquid crystal display panel 11 is manufactured. That is, when the substrate is cracked or chipped, the noise detection wiring NDL is disconnected first. Therefore, a pair of diagnostic pads T at the time of manufacture
By measuring the electrical resistance between the two, it is possible to easily detect the disconnection of the noise detection wiring NDL. Even if the noise detection wiring NDL is disconnected, the sensitivity is lowered, but noise detection is not so much affected. Therefore, a detailed inspection is performed on the liquid crystal display panel in which the disconnection of the noise detection wiring NDL is detected at the time of manufacture, and the liquid crystal display panel that has an adverse effect on the display can be eliminated.

In addition, the liquid crystal display device with a capacitive touch panel according to the above-described embodiment includes a mobile phone, a digital camera, a notebook computer, a liquid crystal television, a video recorder, a car navigation device, a pager, an electronic notebook, a calculator, a word processor, a workstation, The present invention can also be applied to devices such as videophones, POS terminals, and ATMs.

DESCRIPTION OF SYMBOLS 10 ... Liquid crystal display device with an electrostatic capacitance type touch panel 11 ... Liquid crystal display panel 12 ... Touch panel 13 ... Array substrate 14 ... Counter substrate 15 ... Detection electrode 15a ... 1st detection electrode 15b ... 2nd detection electrode 15c ... Intersection 15d ... Interlayer Insulating film 15e ... Relay electrode 1
6 ... Drive circuit 17 ... Scanning line 17L ... Scanning line routing wiring 18 ... Signal line 18L ... Signal line routing wiring 19 ... Pixel 20 ... Common electrode 20L ... Common wiring 21 ... Common signal supply circuit 22 ... Thin film transistor (TFT) 23 ... Liquid crystal capacitance 24 ... Pixel electrode
25 ... Liquid crystal layer 26 ... Control circuit 27 ... Scan line drive circuit 28 ... Signal line drive circuit 29 ...
Capacitance detection circuit 30 ... AD converter 30a ... Successive comparison type AD converter 31 ... Switch capacitor circuit 32 ... Constant current source 33 ... Capacitance element 34 ... Comparator 35 ... Counter 36 ... Touch panel controller 40 ... Noise detection circuit 41 ... Noise amplification circuit
42 ... AD converter NDL ... Noise detection wiring T1 ... External connection terminal T2 ... Diagnostic pad VCOM ... Common signal Da ... Display data SW1, SW2 ... Switch Vref
... reference voltage Vcmp ... (comparator) output signal Osc ... clock signal Cnt ...
Count value MPU: Microprocessor

Claims (5)

A liquid crystal display comprising: a display region in which a plurality of pixels having gradations according to a voltage difference between a pixel electrode and a common electrode facing the pixel electrode are formed; and a non-display region formed around the display region A driving circuit that supplies a data signal to the panel and a pixel signal, and supplies a common signal that is alternately switched between a first voltage and a second voltage that is higher than the first voltage to the common electrode; A touch panel stacked on the liquid crystal display panel and having a plurality of detection electrodes, a capacitance detection circuit for outputting capacitances of the plurality of detection electrodes, and a coordinate detection circuit for outputting touch coordinates based on the output of the capacitance detection circuit In a liquid crystal display device with a capacitive touch panel comprising:
On the non-display area side of the liquid crystal display panel, a noise detection wiring that is wired along the periphery of the display area and that is open at both ends is formed, and a noise output circuit is provided in the noise detection wiring. The capacitive touch panel-equipped liquid crystal display device, wherein the coordinate detection circuit includes a noise removal circuit that calculates a difference between the capacitance detection circuit and an output of the noise output circuit. 2. The capacitance according to claim 1, wherein the noise detection wiring is formed adjacent to a common signal wiring of the liquid crystal display panel and positioned on an outer peripheral side of the common signal wiring. Type liquid crystal display device with touch panel. 2. The liquid crystal display device with a capacitive touch panel according to claim 1, wherein both ends of the noise detection wiring are connected to a pair of diagnostic pads. The liquid crystal display device with a capacitive touch panel according to claim 1, wherein each of the capacitance detection circuit and the noise output circuit includes a switch capacitor circuit. 5. The capacitive touch panel liquid crystal display device according to claim 4, wherein the capacitance detection circuit and the switch capacitor circuit of the noise output circuit are operated in synchronization with each other.