JP2011175535A - Method and apparatus for managing memory device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method and an apparatus for managing a memory device which improve processing performance of a data processor composed of a reconfiguration device. <P>SOLUTION: A management data storage part includes: a configuration information pool for storing configuration information for each application; an initial data pool for storing initial data necessary for the application; a storage part request table indicating an area of a storage part included in the reconfiguration device to be used for storing the initial data of the application when the application is executed; and a storage part status table indicating an application using the storage part. When receiving an application execution request, a management part reads out the configuration information of the application, writes the read information to the storage part, and writes the initial data of an application not stored in the storage part to the storage part, by referring to the storage part request table and the storage part status table. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a memory device management method and apparatus suitable for managing a memory device included in a reconfigurable device.

  A configurable processor (reconfigurable device) is provided as a data processing device that includes a plurality of logic circuits (arithmetic units) capable of processing a plurality of instructions in parallel and whose configuration and connection of the logic circuits can be changed by software. is there. Configurable processors are roughly classified into FPGA (Field Programmable Gate Array) and reconfigurable processors.

  Details of the FPGA are described in Patent Document 1, for example.

  A DRP (Dynamic Reconfigurable Processor) is known as a reconfigurable processor. Details of DRP are described in, for example, Patent Documents 2 to 7. Patent Document 8 discloses a technology that eliminates the limitation of the storage destination of the configuration information for changing the configuration and connection of a plurality of arithmetic units included in the DRP, and allows one configuration information to be shared by a plurality of processes. Are listed.

  The reconstruction device includes a calculation unit that executes a calculation, a control unit that controls the operation of the calculation unit, and a storage unit that holds data used in the calculation. In the DRP, the arithmetic unit includes a plurality of arithmetic units and an interconnection unit that switches their connection, and various processes can be executed by switching instruction codes for the arithmetic units and the interconnection unit. The instruction code and data supplied to the arithmetic unit can be changed by software, and a circuit for executing a desired process and an initial state of the circuit can be realized by writing as the configuration information.

  Note that the configuration information refers to a calculation command for the arithmetic unit at a certain point in time, information indicating the connection relationship between the arithmetic units in the interconnection unit, information indicating the relationship between the event signal and the corresponding configuration information to be selected next, etc. Information necessary for configuring a virtual circuit in the reconfigurable device. A collection of configuration information necessary for executing a desired process (application) is called an object code.

US Reissue Patent No. 34363 Specification JP 2000-138579 A JP 2000-2224025 A JP 2000-232354 A JP 2000-232162 A Japanese Patent Laid-Open No. 2003-076668 JP 2003-099409 A International Publication No. 2007/114059 Pamphlet

  The above-described FPGA can hold one object code composed of one piece of configuration information. The FPGA can execute various processes by exchanging configuration information and object codes held therein. An FPGA that can hold a plurality of object codes and can switch the object codes when not processing is theoretically feasible.

  On the other hand, the DRP can hold an arbitrary number of object codes composed of one or a plurality of pieces of configuration information within the range of the storage capacity, and various processes can be executed by replacing them.

  However, in the above-described reconfigurable device such as FPGA or DRP, a processing data storage unit that holds data used for processing such as data to be processed, data in the middle of processing (intermediate data), table data, etc. I can't share with you. Therefore, when switching the application (object code) to be operated, it is necessary to replace the data held in the processing data storage unit. At this time, if there is the intermediate data, it is necessary to save the intermediate data to the external memory.

  In the memory device management method of the background art, each time an application is switched, a circuit that implements a process for reading data to be processed, a process for reading data used in the process, a process for saving intermediate data, etc., is stored in the reconfigurable device based on configuration information The data is written into and read from the processing data storage unit by the circuit. Constructing such a circuit for managing the processing data storage unit in the reconfigurable device means that the reconfigurable device is used for processing other than the application, which causes a delay in the processing of the application.

  In addition, since a user or the like must create a circuit for managing the processing data storage unit based on the configuration information, the burden on the user or the like is large, and the created circuit does not always operate normally. Cause malfunction.

  For example, when reading fixed data that does not need to be rewritten, such as table data to be referred to in processing, into the processing data storage unit, the fixed data can be included in the object code. However, even in such a case, when another application is operated once and the same application is executed again, it is necessary to read configuration information including fixed data again.

  The present invention has been made to solve the above-described problems of the prior art, and provides a memory device management method and apparatus capable of improving the processing performance of a data processing apparatus including a reconfigurable device. Objective.

In order to achieve the above object, a memory device management method of the present invention is a memory device management method for managing a storage unit included in a reconfigurable device,
A configuration information pool storing configuration information for each application executed by the reconfigurable device, an initial data pool storing initial data including data to be processed by the application and data necessary for the application, A management data storage unit including a storage unit request table indicating an area of the storage unit used for holding the initial data of the application at the time of execution, and a storage unit status table indicating an application using the storage unit; Every
Upon receiving the application execution request, the application configuration information is read from the configuration information pool and written to the storage unit,
In this method, the initial data of the application not in the storage unit is read from the initial data pool and written to the storage unit by referring to the storage unit request table and the storage unit status table.

On the other hand, the memory device management apparatus of the present invention is a memory device management apparatus that manages a storage unit included in the reconfiguration device,
A configuration information pool storing configuration information for each application executed by the reconfigurable device, an initial data pool storing initial data including data to be processed by the application and data necessary for the application, A management data storage unit comprising a storage unit request table indicating an area of the storage unit used for holding the initial data of the application at the time of execution, and a storage unit status table indicating an application using the storage unit;
When receiving the execution request of the application, the configuration information of the application is read from the configuration information pool and written to the storage unit, and the storage unit request table and the storage unit status table are referred to, and the storage unit is not in the storage unit. A management unit that reads the initial data of the application from the initial data pool and writes the initial data to the storage unit;
Have

  According to the present invention, it is possible to improve the processing performance (throughput) of a data processing apparatus including a reconfigurable device.

It is a block diagram which shows the structure of the memory device management apparatus of 1st Embodiment. It is a block diagram which shows the structure of the memory device management apparatus of 2nd Embodiment. It is a block diagram which shows the structure of the memory device management apparatus of 3rd Embodiment. It is a block diagram which shows the structure of the memory device management apparatus of 4th Embodiment. It is a block diagram which shows the structure of the memory device management apparatus of 5th Embodiment. It is a block diagram which shows the structure of the memory device management apparatus of 6th Embodiment. It is a block diagram which shows the structure of the memory device management apparatus of 1st Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 1st Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 1st Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 1st Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 1st Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 1st Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 1st Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 1st Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 1st Example. It is a block diagram which shows the structure of the memory device management apparatus of 2nd Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 2nd Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 2nd Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 2nd Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 2nd Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 2nd Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 2nd Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 2nd Example. It is a schematic diagram which shows the information hold | maintained at the management data storage part of 2nd Example.

Next, the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a block diagram showing the configuration of the memory device management apparatus according to the first embodiment.

  As shown in FIG. 1, the memory device management apparatus according to the first embodiment is configured to include a management data storage unit 1 and a management unit 2.

  The memory device management apparatus according to the first embodiment manages the first reconfigurable hardware 3 that is a reconfigurable device that can hold one object code composed of one piece of configuration information. As the first reconfigurable hardware 3, for example, there is the FPGA.

The first reconfigurable hardware 3 is necessary for the calculation unit 32 that executes the calculation, the control unit 31 that controls the operation of the calculation unit 32, and the data and processing to be processed by the calculation unit 32 and the control unit 31. The configuration includes a processing data storage unit 33 that holds data and a configuration information storage unit 34 that holds configuration information. The processing data storage unit 33 can be divided into a plurality of storage areas 33 _{1 to} 33 _{n serving} as management units.

  The management data storage unit 1 includes a configuration information pool 11, an initial data pool 12, and a storage unit management unit 13.

  The configuration information pool 11 stores configuration information of a plurality of applications executed by the first reconfigurable hardware 3. The configuration information includes calculation instructions, information indicating connection relations between various logic circuits (arithmetic units) created according to the configuration and functions of the first reconfigurable hardware 3, and various logical circuits (arithmetic units). ) Includes information specifying the processing order.

  In the initial data pool 12, data to be processed for each application executed by the first reconfigurable hardware 3 and fixed data necessary for the processing (hereinafter, these data are collectively referred to as “initial data”). ) Are stored respectively.

  The storage unit management unit 13 includes a storage unit request table 131 and a storage unit status table 132.

The storage unit request table 131 includes information indicating storage areas 33 _{1 to} 33 _n of the processing data storage unit 33 included in the first reconfigurable hardware 3 that is used to hold initial data of the application when the application is executed. Stored.

  The storage unit status table 132 stores information indicating an application that is currently using the processing data storage unit 33 of the first reconfigurable hardware 3.

  The management unit 2 reads the configuration information and initial data of the application from the management data storage unit 1 according to the application execution request transmitted from the outside, and stores the configuration information of the first reconfigurable hardware 3 The initial data is written to the processing data storage unit 33. When the writing of the configuration information and the initial data to the first reconfigurable hardware 3 is completed, the management unit 2 executes a process (application) on the first reconfigurable hardware 3 according to the written configuration information. Let

  When writing the initial data to the first reconfigurable hardware 3, the management unit 2 refers to the storage unit request table 131 and the storage unit status table 132 and needs to be written out of the initial data of the application to be executed next. Only initial data is written into the processing data storage unit 33.

  That is, the storage unit request table 131 and the storage unit status table 132 are compared, and if the initial data of the requested application is not stored in the processing data storage unit 33, the initial data is written in the processing data storage unit 33. In this case, the storage unit status table 132 is updated according to the state of the processing data storage unit 33 after writing. If the initial data of the application requested to be executed already exists in the processing data storage unit 33, the writing of the initial data to the processing data storage unit 33 is omitted.

  The memory device management apparatus according to the present embodiment performs the above processing for each application execution request.

  The management unit 2 shown in FIG. 1 can be realized by a CPU or MPU that executes processing according to a program. The first reconfigurable hardware 3 does not need to include the calculation unit 31, the control unit 32, the processing data storage unit 33, and the configuration information storage unit 34 independently, and arbitrary components are included in other components. The arbitrary component may be comprised by the some site | part. For example, the calculation unit 31 and the control unit 32 may be integrated, or the configuration information storage unit 34 may be distributed and arranged in the calculation unit 31 and the control unit 32.

  The management data storage unit 1 may be a rewritable storage device, and can be realized by, for example, a semiconductor storage device or a hard disk device.

  The above requirements for each component apply not only to the present embodiment, but also to the second to sixth embodiments described below.

  According to the present embodiment, it is not necessary to create a circuit for reading initial data into the reconfigurable device using the configuration information, so that it is not necessary for the reconfigurable device to execute processing other than the application.

  Further, only when the initial data of the requested application is not stored in the processing data storage unit 33, the initial data is written into the processing data storage unit 33, and the required initial data is already written in the processing data storage unit 33. Since initial data is not written to the processing data storage unit 33 that is not used or used, the initial data writing time is shortened particularly when a plurality of applications are repeatedly executed while being switched. Therefore, the ratio of the application processing time to the total processing time of the reconfigurable device can be increased.

Therefore, the processing performance (throughput) of the reconfigurable device is improved by using the memory device management apparatus of this embodiment.
(Second Embodiment)
FIG. 2 is a block diagram illustrating a configuration of the memory device management apparatus according to the second embodiment.

  As shown in FIG. 2, the memory device management apparatus according to the second embodiment has a configuration including a management data storage unit 1 and a management unit 2.

  The memory device management apparatus according to the second embodiment manages the second reconfigurable hardware 4 which is a reconfigurable device that can hold a predetermined number of object codes composed of one or a plurality of pieces of configuration information. To do. As the second reconfigurable hardware 4, for example, the above-mentioned theoretically feasible FPGA that can hold a plurality of object codes and can switch the object codes when not being processed can be considered.

The second reconfigurable hardware 4 is necessary for the calculation unit 42 that executes the calculation, the control unit 41 that controls the operation of the calculation unit 42, and the data and processing to be processed by the calculation unit 42 and the control unit 41. The configuration includes a processing data storage unit 43 that holds data and a configuration information storage unit 44 that holds configuration information. The processing data storage unit 43 can be divided into a plurality of storage areas 43 ₁ to 43 _{n serving} as management units.

  The management data storage unit 1 of this embodiment includes a configuration information pool 11, an initial data pool 12, a storage unit management unit 13, and a configuration status table 14.

  In the memory device management apparatus according to the second embodiment, since the configuration information storage unit 44 of the second reconfigurable hardware 4 can hold a plurality of object codes as described above, the configuration information storage unit 44 holds it. The configuration information is also managed. Therefore, the memory device management apparatus of the second embodiment stores the configuration status table 14 for managing the configuration information held in the configuration information storage unit 44 of the second reconfigurable hardware 4 as management data. It differs from the memory device management apparatus of the first embodiment in that it is provided in the unit 1.

  The configuration information pool 11 stores object codes of a plurality of applications that are executed by the second reconfigurable hardware 4. The configuration information of the object code includes calculation instructions, information indicating connection relationships between various logic circuits (arithmetic units) created according to the configuration and functions of the second reconfigurable hardware 4, and various logics. Information specifying the processing order of the circuit (arithmetic unit) is included.

  The initial data pool 12 stores initial data for each application executed by the second reconfigurable hardware 4.

  The storage unit management unit 13 includes a storage unit request table 131 and a storage unit status table 132.

The storage unit request table 131 stores information indicating the storage areas 43 ₁ to 43 _n of the processing data storage unit 43 of the second reconfigurable hardware 4 used for holding the initial data of the application when the application is executed. Is done.

  The storage unit status table 132 stores information indicating an application that is currently using the processing data storage unit 43 of the second reconfigurable hardware 4.

  The configuration status table 14 stores information for identifying configuration information currently held in the configuration information storage unit 44 of the second reconfigurable hardware 4.

  The management unit 2 reads the configuration information and initial data of the application from the management data storage unit 1 in accordance with the application execution request transmitted from the outside, and stores the configuration information of the second reconfigurable hardware 4 Write to the unit 44, and write initial data to the processing data storage unit 43. When the writing of the configuration information and the initial data to the second reconfigurable hardware 4 is completed, the management unit 2 executes processing (application) on the second reconfigurable hardware 4 according to the written configuration information. Let

  When the management unit 2 according to the present embodiment receives an execution request for another application to be executed next while executing an arbitrary application, the configuration information of the application to be executed next is configured with reference to the configuration status table 14 It is confirmed whether or not the information is already written in the information storage unit 44. When there is no configuration information of the application to be executed next in the configuration information storage unit 44, the configuration information of the application currently being executed is read from the configuration information pool 11 to a vacant storage area so as not to overwrite the configuration information. The configuration information of the application to be executed next is written.

  In addition, the management unit 2 refers to the storage unit request table 131 and the storage unit status table 132 and writes only the initial data that needs to be written to the processing data storage unit 43 among the initial data of the application to be executed next.

That is, the storage unit request table 131 and the storage unit status table 132 are compared, and if the initial data of the application to be executed next is not in the processing data storage unit 43, the initial data is written in the processing data storage unit 43. In this case, the storage unit status table 132 is updated according to the state of the processing data storage unit 43 after writing. If the initial data of the application to be executed next already exists in the processing data storage unit 43, the writing of the processing data to the processing data storage unit 43 is omitted. The management unit 2 refers to the storage unit status table 132 when writing the initial data of the application to be executed next to the processing data storage unit 43, and stores the processing data storage unit 43 used in the currently executing application. The storage areas 43 ₁ to 43 _n are not overwritten by writing after the processing of the application is completed.

  The memory device management apparatus according to the present embodiment performs the above processing for each application execution request.

According to the present embodiment, the configuration information of the application to be executed next to the storage area that is not used by the currently executing application in the configuration information storage unit 44 included in the second reconfigurable hardware 4. Therefore, the time required for rewriting configuration information is not required when switching applications. Therefore, the ratio of the application processing time to the total processing time of the reconfigurable device can be increased. Therefore, the processing performance (throughput) of the reconfigurable device is improved by using the memory device management apparatus of this embodiment.
(Third embodiment)
FIG. 3 is a block diagram illustrating a configuration of the memory device management apparatus according to the third embodiment.

  As illustrated in FIG. 3, the memory device management apparatus according to the third embodiment has a configuration including a management data storage unit 1 and a management unit 2.

  The memory device management apparatus according to the third embodiment is a reconfigurable device that is a reconfigurable device that can hold an arbitrary number of object codes composed of one or a plurality of pieces of configuration information within a storage capacity. The hardware 5 is managed. As the third reconfigurable hardware 5, for example, there is the DRP described above, which can execute various processes by exchanging the object code to be held.

The third reconfigurable hardware 5 is necessary for the calculation unit 52 that executes the calculation, the control unit 51 that controls the operation of the calculation unit 52, and the data and processing to be processed by the calculation unit 52 and the control unit 51. The configuration includes a processing data storage unit 53 that holds data and a configuration information storage unit 54 that holds configuration information. The processing data storage unit 53 can be divided into a plurality of storage areas 53 _{1 to} 53 _n serving as management units.

  As in the second embodiment, the management data storage unit 1 of the present embodiment includes a configuration information pool 11, an initial data pool 12, a storage unit management unit 13, and a configuration status table 14.

  In the memory device management apparatus according to the third embodiment, since the configuration information storage unit 54 of the third reconfigurable hardware 5 can hold a plurality of object codes, the configuration information held in the configuration information storage unit 54 Are also subject to management. Therefore, the memory device management apparatus according to the third embodiment stores the configuration status table 14 for managing configuration information held in the configuration information storage unit 54 of the third reconfigurable hardware 5 as management data. Part 1 is provided. However, the configuration information storage unit 54 of the third reconfigurable hardware 5 has the third reconfigurable hardware 4 shown in the second embodiment in that the storage capacity for holding the object code is variable. Is different.

  The configuration information pool 11 stores object codes of a plurality of applications executed by the third reconfigurable hardware 5. Each piece of configuration information of the object code includes calculation instructions, information indicating connection relations between various logic circuits (calculators) created according to the configuration and functions of the third reconfigurable hardware 5, and various logics. Information specifying the processing order of the circuit (arithmetic unit) is included.

  The initial data pool 12 stores initial data for each application executed by the third reconfigurable hardware 5.

  The storage unit management unit 13 includes a storage unit request table 131 and a storage unit status table 132.

  The storage unit request table 131 stores information indicating the storage area of the processing data storage unit 53 of the third reconfigurable hardware 5 that is used to hold the initial data of the application when the application is executed.

  The storage unit status table 132 stores information indicating an application that is currently using the processing data storage unit 53 of the third reconfigurable hardware 5.

  The configuration status table 14 stores information for identifying configuration information currently held in the configuration information storage unit 44 of the third reconfigurable hardware 5.

  The management unit 2 reads the configuration information and initial data of the application from the management data storage unit 1 in accordance with an application execution request transmitted from the outside, and stores the configuration information of the third reconfigurable hardware 5 The initial data is written to the processing data storage unit 53. When the writing of the configuration information and initial data to the third reconfigurable hardware 5 is completed, the management unit 2 executes processing (application) on the third reconfigurable hardware 5 according to the written configuration information. Let

  When the management unit 2 according to the present embodiment receives an execution request for another application to be executed next while executing an arbitrary application, the configuration information of the application to be executed next is obtained by referring to the configuration status table 14. It is confirmed whether or not it has already been written in the configuration information storage unit 54. If there is no configuration information of the application to be executed next in the configuration information storage unit 54, the configuration information pool 11 is stored in an empty storage area of the configuration information storage unit 54 so as not to overwrite the configuration information corresponding to the currently executing application. The configuration information of the application to be executed next read out from is written.

  At this time, the management unit 2 refers to the configuration status table 14 and has a large storage capacity necessary for the object code of the application to be executed next, and writes all the configuration information in a free storage area of the configuration information storage unit 54. If this is not possible, the remaining configuration information is written after processing of the currently executing application is completed.

Also, the management unit 2 refers to the storage unit request table 131 and the storage unit status table 132 and writes only the initial data that needs to be written to the processing data storage unit 53 among the initial data of the application to be executed next. That is, the storage unit request table 131 and the storage unit status table 132 are compared, and if the initial data of the application to be executed next is not in the processing data storage unit 53, the initial data is written in the processing data storage unit 53. In this case, the storage unit status table 132 is updated according to the state of the processing data storage unit 53 after writing. If the initial data of the application to be executed next already exists in the processing data storage unit 53, the writing of the processing data to the processing data storage unit 53 is omitted. At this time, the management unit 2 refers to the storage unit status table 132, and the processing of the application has been completed for the storage areas 53 _{1 to} 53 _n of the processing data storage unit 53 used by the currently executing application. Do not overwrite by writing later.

  The memory device management apparatus according to the present embodiment performs the above processing for each application execution request.

According to the present embodiment, the next application to be executed on a storage area that is not used by the currently executing application among the storage areas of the configuration information storage unit 54 included in the third reconfigurable hardware 5 Since the configuration information is written in advance according to the free storage area, the time required for rewriting the configuration information is shortened when the application is switched. Therefore, the ratio of the application processing time to the total processing time of the reconfigurable device can be increased. Therefore, the processing performance (throughput) of the reconfigurable device is improved by using the memory device management apparatus of this embodiment.
(Fourth embodiment)
FIG. 4 is a block diagram showing a configuration of the memory device management apparatus according to the fourth embodiment.

  As shown in FIG. 4, the memory device management apparatus according to the fourth embodiment has a configuration including a management data storage unit 1 and a management unit 2.

  The memory device management apparatus according to the fourth embodiment manages the first reconfigurable hardware 3 as in the first embodiment. Since the configuration of the first reconfigurable hardware 3 is the same as that of the first embodiment, the description thereof is omitted here.

  The management data storage unit 1 of this embodiment includes a configuration information pool 11, an initial data pool 12, a storage management unit 13, an intermediate data pool 15, and an intermediate data management table 16.

  The configuration information pool 11 stores configuration information corresponding to a plurality of applications executed by the first reconfigurable hardware 3. The configuration information includes calculation instructions, information indicating connection relations between the logic circuits (arithmetic units) created according to the configuration and functions of the first reconfigurable hardware 3, and processing of the logical circuits (calculation units). Information specifying the order is included.

  The initial data pool 12 stores initial data for each application executed by the first reconfigurable hardware 3.

  The storage unit management unit 13 includes a storage unit request table 131 and a storage unit status table 132.

  The storage unit request table 131 stores information indicating the storage area of the processing data storage unit 33 of the first reconfigurable hardware 3 that is used to hold the initial data of the application when the application is executed. The storage unit request table 131 also stores information indicating whether saving or rewriting is necessary as intermediate data described later.

  The storage unit status table 132 stores information indicating an application that is currently using the processing data storage unit 33 of the first reconfigurable hardware 3.

  The intermediate data pool 15 stores data (intermediate data) being processed by an arbitrary application and executed by the first reconfigurable hardware 3.

  The intermediate data management table 16 stores information indicating the storage area of the intermediate data pool 15 in which the intermediate data is stored.

  The management unit 2 reads the configuration information and initial data of the application from the management data storage unit 1 according to the application execution request transmitted from the outside, and stores the configuration information of the first reconfigurable hardware 3 The initial data is written to the processing data storage unit 33. When the writing of the configuration information and the initial data to the first reconfigurable hardware 3 is completed, the management unit 2 executes a process (application) on the first reconfigurable hardware 3 according to the written configuration information. Let

  In addition, when the management unit 2 of the present embodiment writes initial data to the first reconfigurable hardware 3, the management unit 2 refers to the storage unit request table 131 and the storage unit status table 132, and the initial data of the application to be executed next Of these, only the initial data that needs to be written is written into the processing data storage unit 33. That is, the storage unit request table 131 and the storage unit status table 132 are compared, and if the initial data of the requested application is not stored in the processing data storage unit 33, the initial data is written in the processing data storage unit 33. In this case, the storage unit status table 132 is updated according to the state of the processing data storage unit 33 after writing. If the initial data of the application requested to be executed already exists in the processing data storage unit 33, the writing of the initial data to the processing data storage unit 33 is omitted.

  In addition, when writing the initial data of the application to be executed next to the first reconfigurable hardware 3, the management unit 2 of the present embodiment refers to the storage unit request table 131 and relates to the application currently being executed. The required data is saved as intermediate data to the intermediate data pool 15 according to information indicating whether or not the data is held as intermediate data among the data held in the processing data storage unit 33. In addition, the management unit 2 updates the intermediate data management table 16 by writing information indicating the presence of intermediate data in the intermediate data pool 15 to the intermediate data management table 16. Thereafter, initial data of the application to be executed next is read from the initial data pool 12, and the initial data is written to the processing data storage unit 33.

  Furthermore, when the initial data of the application to be executed next is written to the first reconfigurable hardware 3, the management unit 2 according to the present embodiment refers to the intermediate data management table 16, and the intermediate data pool 15 requires intermediate data. If there is data, the intermediate data is read from the intermediate data pool 15 and written to the processing data storage unit 33.

  The memory device management apparatus according to the present embodiment performs the above processing for each application execution request.

According to the present embodiment, in addition to the same effects as those of the first embodiment, it is possible to manage whether or not intermediate data needs to be saved during the processing by the application. There is no need to create a circuit for reading. Therefore, the ratio of the application processing time to the total processing time of the reconfigurable device can be increased. Therefore, the processing performance (throughput) of the reconfigurable device is improved by using the memory device management apparatus of this embodiment.
(Fifth embodiment)
FIG. 5 is a block diagram showing the configuration of the memory device management apparatus according to the fifth embodiment.

  As shown in FIG. 5, the memory device management apparatus according to the fifth embodiment has a configuration including a management data storage unit 1 and a management unit 2.

  The memory device management apparatus according to the fifth embodiment manages the second reconfigurable hardware 4 as in the second embodiment. Since the configuration of the second reconfigurable hardware 4 is the same as that of the second embodiment, the description thereof is omitted here.

  The management data storage unit 1 of the present embodiment includes a configuration information pool 11, an initial data pool 12, a storage unit management unit 13, a configuration status table 14, an intermediate data pool 15, and an intermediate data management table 16.

  The configuration information pool 11 stores object codes of a plurality of applications that are executed by the second reconfigurable hardware 4. The configuration information of the object code includes calculation instructions, information indicating connection relationships between various logic circuits (arithmetic units) created according to the configuration and functions of the second reconfigurable hardware 4, and various logics. Information specifying the processing order of the circuit (arithmetic unit) is included.

  The initial data pool 12 stores initial data for each application executed by the second reconfigurable hardware 4.

  The storage unit management unit 13 includes a storage unit request table 131 and a storage unit status table 132.

  The storage unit request table 131 stores information indicating the storage area of the processing data storage unit 43 of the second reconfigurable hardware 3 that is used to hold the initial data of the application when the application is executed. The storage unit request table 131 also stores information indicating whether saving or rewriting is necessary as intermediate data described later.

  The storage unit status table 132 stores information indicating an application that is currently using the processing data storage unit 43 of the second reconfigurable hardware 4.

  The configuration status table 14 stores information for identifying configuration information currently held in the configuration information storage unit 44 of the second reconfigurable hardware 4.

  The intermediate data pool 15 stores data (intermediate data) being processed by an arbitrary application, which is executed by the second reconfigurable hardware 4.

  The intermediate data management table 16 stores information indicating the storage area of the intermediate data pool 15 in which the intermediate data is stored.

  The management unit 2 reads the configuration information and initial data of the application from the management data storage unit 1 in accordance with the application execution request transmitted from the outside, and stores the configuration information of the second reconfigurable hardware 4 Write to the unit 44, and write initial data to the processing data storage unit 43. When the writing of the configuration information and the initial data to the second reconfigurable hardware 4 is completed, the management unit 2 executes processing (application) on the second reconfigurable hardware 4 according to the written configuration information. Let

  When the management unit 2 receives an execution request for another application to be executed next while executing an arbitrary application, the management unit 2 refers to the configuration status table 14 and the configuration information of the application to be executed next is the configuration information. It is confirmed whether or not the data has already been written in the storage unit 44. If the configuration information storage unit 44 does not have the configuration information of the application to be executed next, the configuration information pool 11 is stored in an empty storage area of the configuration information storage unit 44 so as not to overwrite the configuration information corresponding to the currently executing application. The configuration information of the application to be executed next read out from is written.

In addition, the management unit 2 refers to the storage unit request table 131 and the storage unit status table 132 and writes only the initial data that needs to be written to the processing data storage unit 43 among the initial data of the application to be executed next. That is, the storage unit request table 131 and the storage unit status table 132 are compared, and if the initial data of the application to be executed next is not in the processing data storage unit 43, the initial data is written in the processing data storage unit 43. In this case, the storage unit status table 132 is updated according to the state of the processing data storage unit 43 after writing. If the initial data of the application to be executed next already exists in the processing data storage unit 43, the writing of the processing data to the processing data storage unit 43 is omitted. When the management unit 2 writes initial data of the application to be executed next in the processing data storage unit 43, the management unit 2 refers to the storage unit status table 132 and stores the processing data storage unit used in the currently executing application. The areas 43 ₁ to 43 _n are not overwritten by writing after the processing of the application is completed.

  In addition, when writing the initial data of the application to be executed next to the second reconfigurable hardware 4, the management unit 2 of the present embodiment refers to the storage unit request table 131 and relates to the application currently being executed. The required data is saved as intermediate data to the intermediate data pool 15 in accordance with information indicating whether or not to hold as intermediate data among the data held in the processing data storage unit 43. In addition, the management unit 2 updates the intermediate data management table 16 by writing information indicating the presence of intermediate data in the intermediate data pool 15 to the intermediate data management table 16. Thereafter, initial data of the application to be executed next is read from the initial data pool 12 and the initial data is written to the processing data storage unit 43.

  Furthermore, the management unit 2 of the present embodiment refers to the intermediate data management table 16 when writing initial data of an application to be executed next to the second reconfigurable hardware 4, and requires intermediate data required for the intermediate data pool 15. If there is data, the intermediate data is read from the intermediate data pool 15 and written to the processing data storage unit 43.

  The memory device management apparatus according to the present embodiment performs the above processing for each application execution request.

According to the present embodiment, in addition to the same effects as those of the second embodiment, it is possible to manage whether or not intermediate data needs to be saved during processing by the application. Therefore, saving of intermediate data and intermediate data can be performed using configuration information. There is no need to create a circuit for reading. Therefore, the ratio of the application processing time to the total processing time of the reconfigurable device can be increased. Therefore, the processing performance (throughput) of the reconfigurable device is improved by using the memory device management apparatus of this embodiment.
(Sixth embodiment)
FIG. 6 is a block diagram illustrating a configuration of a memory device management apparatus according to the sixth embodiment.

  As shown in FIG. 6, the memory device management apparatus according to the sixth embodiment has a configuration including a management data storage unit 1 and a management unit 2.

  The memory device management apparatus according to the sixth embodiment manages the third reconfigurable hardware 5 as in the third embodiment. Since the configuration of the third reconfigurable hardware 5 is the same as that of the third embodiment, the description thereof is omitted here.

  The management data storage unit 1 of the present embodiment includes a configuration information pool 11, an initial data pool 12, a storage unit management unit 13, a configuration status table 14, an intermediate data pool 15, and an intermediate data management table 16.

  The configuration information pool 11 stores object codes of a plurality of applications that are executed by the third reconfigurable hardware 5. Each piece of configuration information of the object code includes calculation instructions, information indicating connection relations between various logic circuits (calculators) created according to the configuration and functions of the third reconfigurable hardware 5, and various logics. Information specifying the processing order of the circuit (arithmetic unit) is included.

  The initial data pool 12 stores initial data for each application executed by the third reconfigurable hardware 5.

  The storage unit management unit 13 includes a storage unit request table 131 and a storage unit status table 132.

  The storage unit request table 131 stores information indicating the storage area of the processing data storage unit 53 of the third reconfigurable hardware 5 that is used to hold the initial data of the application when the application is executed. The storage unit request table 131 also stores information indicating whether saving or rewriting is necessary as intermediate data described later.

  The storage unit status table 132 stores information indicating an application that is currently using the processing data storage unit 53 of the third reconfigurable hardware 5.

  The configuration status table 14 stores information for identifying the configuration information currently held in the configuration information storage unit 54 of the third reconfigurable hardware 5.

  The intermediate data pool 15 stores data (intermediate data) being processed by an arbitrary application and executed by the third reconfigurable hardware 5.

  The intermediate data management table 16 stores information indicating the storage area of the intermediate data pool 15 in which the intermediate data is stored.

  The management unit 2 reads the configuration information and initial data of the application from the management data storage unit 1 in accordance with an application execution request transmitted from the outside, and stores the configuration information of the third reconfigurable hardware 5 The initial data is written to the processing data storage unit 53. When the writing of the configuration information and initial data to the third reconfigurable hardware 5 is completed, the management unit 2 executes processing (application) on the third reconfigurable hardware 5 according to the written configuration information. Let

  When the management unit 2 according to the present embodiment receives an execution request for another application to be executed next while executing an arbitrary application, the configuration information of the application to be executed next is obtained by referring to the configuration status table 14. It is confirmed whether or not it has already been written in the configuration information storage unit 54. If there is no configuration information of the application to be executed next in the configuration information storage unit 54, the configuration information pool 11 is stored in an empty storage area of the configuration information storage unit 54 so as not to overwrite the configuration information corresponding to the currently executing application. The configuration information of the application to be executed next read out from is written.

  At this time, the management unit 2 refers to the configuration status table 14 and has a large storage capacity necessary for the object code of the application to be executed next, and writes all the configuration information in a free storage area of the configuration information storage unit 54. If this is not possible, the remaining configuration information is written after the processing of the currently executing application is completed.

Also, the management unit 2 refers to the storage unit request table 131 and the storage unit status table 132 and writes only the initial data that needs to be written to the processing data storage unit 53 among the initial data of the application to be executed next. That is, the storage unit request table 131 and the storage unit status table 132 are compared, and if the initial data of the application to be executed next is not in the processing data storage unit 53, the initial data is written in the processing data storage unit 53. In this case, the storage unit status table 132 is updated according to the state of the processing data storage unit 53 after writing. If the initial data of the application to be executed next already exists in the processing data storage unit 53, the writing of the processing data to the processing data storage unit 53 is omitted. At this time, the management unit 2 refers to the storage unit status table 132, and for the storage areas 53 _{1 to} 53 _n of the processing data storage unit used by the currently executing application, after the processing of the application is completed Do not overwrite by writing.

  In addition, when writing the initial data of the application to be executed next to the third reconfigurable hardware 5, the management unit 2 of the present embodiment refers to the storage unit request table 131 and relates to the application currently being executed. The required data is saved as intermediate data to the intermediate data pool 15 in accordance with information indicating whether or not to hold as intermediate data among the data held in the processing data storage unit 53. In addition, the management unit 2 updates the intermediate data management table 16 by writing information indicating the presence of intermediate data in the intermediate data pool 15 to the intermediate data management table 16. Thereafter, initial data of the application to be executed next is read from the initial data pool 12, and the initial data is written in the processing data storage unit 53.

  Furthermore, the management unit 2 of the present embodiment refers to the intermediate data management table 16 when writing the initial data of the application to be executed next to the third reconfigurable hardware 5, and the intermediate data required for the intermediate data pool 15. If there is data, the intermediate data is read from the intermediate data pool 15 and written to the processing data storage unit 43.

  The memory device management apparatus according to the present embodiment performs the above processing for each application execution request.

  According to the present embodiment, in addition to the same effects as those of the third embodiment, it is possible to manage whether or not intermediate data is being saved during the processing by the application. There is no need to create a circuit for reading. Therefore, the ratio of the application processing time to the total processing time of the reconfigurable device can be increased. Therefore, the processing performance (throughput) of the reconfigurable device is improved by using the memory device management apparatus of this embodiment.

Next, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 7 is a block diagram showing the configuration of the memory device management apparatus of the first embodiment.

  As shown in FIG. 7, the memory device management apparatus according to the first embodiment includes a management data storage unit 6 and a management unit 7.

  The first example is an example in which the data processing apparatus including the FPGA 8 described in Patent Document 1 is managed by the memory device management apparatus according to the fourth embodiment described above.

  The FPGA 8 corresponds to the first reconfigurable hardware 3 shown in the first embodiment or the fourth embodiment.

The FPGA 8 includes a gate array 81 that executes application processing and a peripheral memory 83 that holds initial data and intermediate data. The peripheral memory 83 can be divided into a plurality of storage areas 83 _{1 to} 83 _{n serving} as management units.

  The gate array 81 has a data path (channel) including a LUT (look-up table), a D-flip-flop, a switch, and the like, and can hold configuration information specifying the configuration of the data path and its operation. is there.

  The gate array 81 corresponds to the arithmetic unit 32, the control unit 31, and the configuration information storage unit 34 of the first reconfigurable hardware 3 shown in the first embodiment or the fourth embodiment, and is a peripheral memory. Reference numeral 83 corresponds to the processing data storage unit 33 of the first reconfigurable hardware 3.

  The management data storage unit 6 includes a configuration information pool 61, an initial data pool 62, a peripheral memory management unit 63, a configuration status register 64, an intermediate data pool 65, and an intermediate data management table 66. The configuration information pool 61 corresponds to the configuration information pool 11 of the management data storage unit 1 described in the fourth embodiment, and the initial data pool 62 corresponds to the initial data pool 12 of the management data storage unit 1. The peripheral memory management unit 63 corresponds to the storage unit management unit 13 of the management data storage unit 1, and the configuration status register 64 corresponds to the configuration status table 14 of the management data storage unit 1. The intermediate data pool 65 corresponds to the intermediate data pool 15 of the management data storage unit 1, and the intermediate data management table 66 corresponds to the intermediate data management table 16 of the management data storage unit 1.

  The configuration information pool 61 stores configuration information for each of a plurality of applications executed by the FPGA 8.

  The initial data pool 62 stores initial data for each of a plurality of applications executed by the FPGA 8.

  The peripheral memory management unit 63 includes a peripheral memory request table 631 and a peripheral memory status table 632.

  The peripheral memory request table 631 stores information indicating the storage area of the peripheral memory 83 of the FPGA 8 that is used to hold initial data of the application when the application is executed. The peripheral memory request table 631 also stores information indicating whether saving or rewriting is necessary as intermediate data described later.

  The peripheral memory status table 632 stores information indicating an application that is currently using the peripheral memory 83 of the FPGA 8.

  The configuration status table 68 stores information for identifying configuration information currently held in the FPGA 8.

  The intermediate data pool 65 stores data (intermediate data) being processed by an arbitrary application executed by the FPGA 8.

  The intermediate data management table 66 stores information indicating the storage area of the intermediate data pool 65 in which intermediate data is stored.

  Hereinafter, the operation of the memory device management apparatus according to the first embodiment will be described by taking as an example the case where three types of applications A, B, and C are executed by the FPGA 8.

  FIG. 8 a shows information stored in the configuration information pool 61, the initial data pool 62, the peripheral memory management unit 63, the configuration status register 64, the intermediate data pool 65, and the intermediate data management table 66 included in the management data storage unit 6. Yes.

  In the example shown in FIG. 8A, the configuration information pool 61 stores configuration information corresponding to the applications A, B, and C, and the initial data pool 62 stores five storage areas (in the peripheral memory 83 corresponding to the application A ( 5), initial data corresponding to four storage areas (4 blocks) of the peripheral memory 83 is stored corresponding to the application B, and 4 of the peripheral memory 83 corresponding to the application C. Initial data corresponding to one storage area (4 blocks) is stored.

The peripheral memory request table 631 shows storage areas of the peripheral memory 83 used by the applications A, B, and C. Here, it is assumed that the peripheral memory 83 is divided into _eight storage areas 83 _{1 to} 83 ₈ .

  No information is currently stored in the peripheral memory status table 632, the intermediate data management table 66, and the configuration status register 64, and no intermediate data is stored in the intermediate data pool 65.

The vertical axes of the peripheral memory request table 631, the peripheral memory status table 632, and the intermediate data management table 66 shown in FIG. 8a correspond to the storage areas 83 _{1 to} 83 ₈ of the peripheral memory 83, and “1” is described. The area indicates that the area is used by an application corresponding to the storage area. A storage area with “2” indicates that data held in the storage area needs to be saved and rewritten as intermediate data.

  Here, the configuration information of the applications A, B, and C is stored in advance in the configuration information pool 61, the initial data of the applications A, B, and C is stored in the initial data pool 62, and the peripheral memory request table 631 is shown in FIG. It is assumed that the operation starts from a state in which information corresponding to the applications A, B, and C as shown is stored.

  When the FPGA 8 and the memory device management apparatus are activated and an execution request for the application A is received from the outside, the management unit 7 reads the configuration information of the application A from the configuration information pool 61 and writes it to the gate array 81. Is written in the configuration status register 64.

Further, the management unit 7 refers to the peripheral memory request table 631 and determines whether or not the initial data of the application A can be written in the storage areas 83 ₁ , 83 ₃ , 83 ₄ , 83 ₇ , and 83 ₈ of the peripheral memory 83. Determine.

Referring to peripheral memory request table 631 shown in FIG. 8a, but the storage area 83 _7, 83 ₈ is a storage area used for saving or writing intermediate data, referring to the intermediate data management table 66, there is no intermediate data at the moment .

Therefore, the management unit 7 reads the initial data of the application A from the initial data pool 62, writes the initial data to the storage areas 83 ₁ , 83 ₃ , 83 ₄ , 83 ₇ , 83 _{8 of} the peripheral memory 83, and the peripheral memory status The table 632 is updated according to the state of the peripheral memory 83 after the initial data is written.

In addition, when the writing of all the configuration information and the initial data is completed, the management unit 7 starts the processing of the application A by the FPGA 8. At this time, as shown in FIG. 8b, the peripheral memory status table 632 indicates that the storage areas 83 ₁ , 83 ₃ , 83 ₄ , 83 ₇ , and _{8 8} of the peripheral memory 83 are used by the application A. ing.

Next, when an execution request for application B is received during execution of application A, management unit 7 refers to peripheral memory request table 631 and peripheral memory status table 632, and initial data for application B is stored in the storage area of peripheral memory 83. 83 _1, 83 _2, 83 _6, 83 ₈ to determine whether or not it is possible to write.

Here, since the storage areas 83 ₁ and 83 ₈ are used by the currently executing application A, the initial data of the application B can be written only in the storage areas 83 ₂ and 83 ₆ . Therefore, the management unit 7 writes the initial data of the application B read from the initial data pool 62 to the storage areas 83 ₂ and 83 ₆ and updates the peripheral memory status table 632.

At this time, as shown in FIG. 8c, in the peripheral memory status table 632, the storage areas 83 ₁ , 83 ₃ , 83 ₄ , 83 ₇ , and _{8 8} of the peripheral memory 83 are used by the application A, and the storage areas 83 ₂ , it has been shown that using 83 ₆ in an application B.

When the processing of the application A is completed, the management unit 7 writes the initial data of the application B that could not be written during the execution of the application A into the storage areas 83 ₁ and 83 ₈ . Management unit 7 first to peripheral storage area 83 ₁ by referring to the memory status table 632, 83 ₈ of the initial data writing is required, by referring to the peripheral memory request table 631, held in the storage area 83 ₈ It can be seen that it is necessary to save the intermediate data of the application A. Therefore, the management unit 7 writes the data held in the storage area 83 ₈ to the first storage area of the intermediate data pool 65, from the intermediate data management table 66 in the storage area 83 ₈ to the intermediate data pool 65 of the application A Writes that the intermediate data has been saved. Thereafter, the management unit 7 writes the initial data of the application B in the storage areas 83 ₁ and 83 ₈ .

Subsequently, the management unit 7 writes the configuration information of the application B read from the configuration information pool 61 to the gate array 81 of the FPGA 8, and when the writing of the configuration information is completed, causes the FPGA 8 to start processing of the application B. At this time, as shown in FIG. 8d, the intermediate data pool 65 stores intermediate data of the application A that has been held in the storage area 83 _{8 (A-8)} is, the intermediate data management table 66, the application A The intermediate data (A-8) is saved in the first storage area of the intermediate data pool 65. The configuration status register 64 indicates that the configuration information of the application B is used in the gate array 81.

Next, when the execution request of the application A is received again during the execution of the application B, the management unit 7 refers to the peripheral memory request table 631 and the peripheral memory status table 632, and the initial data of the application A is stored in the peripheral memory 83. regions 83 _1, 83 _3, 83 _4, 83 _7, 83 ₈ to determine whether or not it is possible to write.

Here, since the storage areas 83 ₁ and 83 ₈ are used by the application B that is currently being executed, the initial data of the application A can be written only in the storage areas 83 ₃ , 83 ₄ , and 83 ₇ . However, referring to peripheral memory status table 632, the storage area 83 _3, 83 _4, 83 _7, since there is still the initial data when executing the last application A, there is no need to write again. For this reason, the management unit 7 does not execute rewriting of the peripheral memory 83 here.

When the processing of the application B is completed, the management unit 7 writes the initial data of the application A that could not be written during the execution of the application B in the storage areas 83 ₁ and 83 ₈ .

In this case, the management unit 7 refers to the intermediate data management table 66, writes the intermediate data saved in the first memory area of the intermediate data pool 65 (A-8) to the storage area 83 _8, storage writes the initial data read out from the initial data pool 62 in the region 83 _1. In addition, the management unit 7 invalidates the first storage area of the intermediate data pool 65. Invalidation is realized by deleting information indicating that the intermediate data (A-8) has been saved in the intermediate data pool 65 from the intermediate data management table 66.

  Subsequently, the management unit 7 writes the configuration information of the application A read from the configuration information pool 61 to the gate array 81 of the FPGA 8, and causes the FPGA 8 to start processing of the application A after the writing of the configuration information is completed. At this time, as shown in FIG. 8e, the information indicating the save destination of the intermediate data of application A is deleted in the intermediate data management table 66. Further, the intermediate data (A-8) of the application A remains in the first storage area of the intermediate data pool 65, but information indicating the save destination of the intermediate data is deleted from the intermediate data management table 66. Therefore, the intermediate data reading process is invalidated.

Next, when the execution request of the application C is received during the execution of the application A, the management unit 7 refers to the peripheral memory request table 631 and the peripheral memory status table 632, and the initial data of the application C is stored in the storage area of the peripheral memory 83. 83 _1, 83 _2, 83 _5, 83 _6, 83 ₇ determines whether or not writable.

Here, since the storage areas 83 ₁ and 83 ₇ are used by the currently executing application A, the initial data of the application C can be written only in the storage areas 83 ₂ , 83 ₅ , and 83 ₆ . Therefore, the management unit 7 writes the initial data of the application C read from the initial data pool 62 to the storage areas 83 ₅ and 83 ₆ and updates the peripheral memory status table 632. At this time, as shown in FIG. 8f, in the peripheral memory status table 632, the storage areas 83 ₁ , 83 ₃ , 83 ₄ , 83 ₇ , 83 ₈ are used by the application A, and the storage areas 83 ₂ , 83 ₅ , 83 are used. ₆ is used in application C.

When the processing of the application A is completed, the management unit 7 writes the initial data of the application C that could not be written during the execution of the application A into the storage areas 83 ₁ and 83 ₇ . Management unit 7 first the storage area 83 _1, 83 ₇ with reference to the peripheral memory status table 632 of the initial data writing is required, by referring to the peripheral memory request table 631, held in the storage area 83 ₇ It can be seen that it is necessary to save the intermediate data of the application A. Therefore, the management unit 7 writes the data held in the storage area 83 ₇ to the first memory area of the intermediate data pool 65, from the storage area 83 ₇ in the intermediate data management table 66 to the intermediate data pool 65 of the application A Writes that the intermediate data has been saved. Thereafter, the management unit 7 writes initial data of the application B in the storage areas 83 ₁ and 83 ₇ .

In addition, the management unit 7 writes the configuration information of the application C read from the configuration information pool 61 to the gate array 81 of the FPGA 8, and causes the FPGA 8 to start processing of the application C after completing the writing of the configuration information. At this time, as shown in FIG. 8 g, the intermediate data pool 65 stores intermediate data of the application A that has been held in the storage area 83 _{7 (A-7)} is, the intermediate data management table 66, the application A The intermediate data (A-7) is saved in the first storage area of the intermediate data pool 65. The configuration status register 64 indicates that the configuration information of the application C is used in the gate array 81.

Next, when the execution request of the application A is received again during the execution of the application C, the management unit 7 refers to the peripheral memory request table 631 and the peripheral memory status table 632, and the initial data of the application A is stored in the peripheral memory 83. regions 83 _1, 83 _3, 83 _4, 83 _7, 83 ₈ to determine whether or not it is possible to write.

Here, since the storage area 83 ₁ , 83 ₇ is used in the currently executing application C, the initial data of the application A can be written only in the storage areas 83 ₃ , 83 ₄ , 83 ₈ . However, referring to peripheral memory status table 632, the storage area 83 _3, 83 _4, 83 _8, since there is still the initial data stored in a previous run of the application A, it can be seen that there is no need to write again . For this reason, the management unit 7 does not execute rewriting of the peripheral memory 83 here.

When the processing of the application C is completed, the management unit 7 writes the initial data of the application A that could not be written during the execution of the application C into the storage areas 83 ₁ and 83 ₇ .

In this case, the management unit 7 refers to the intermediate data management table 66, writes the intermediate data saved in the first memory area of the intermediate data pool 65 (A-7) to the storage area 83 _7, stores writes the initial data read out from the initial data pool 62 in the region 83 _1. In addition, the management unit 7 invalidates the first storage area of the intermediate data pool 65. Invalidation is realized by deleting, from the intermediate data management table 66, information indicating saving of intermediate data (A-7) to the intermediate data pool 65.

  Subsequently, the management unit 7 writes the configuration information of the application A read from the configuration information pool 61 to the gate array 81 of the FPGA 8, and causes the FPGA 8 to start processing of the application A after the writing of the configuration information is completed. At this time, as shown in FIG. 8h, in the intermediate data management table 66, the information indicating the save destination of the intermediate data of the application A is deleted. Further, the intermediate data (A-7) of the application A remains in the first storage area of the intermediate data pool 65, but information indicating the save destination of the intermediate data is deleted from the intermediate data management table 66. Therefore, the intermediate data reading process is invalidated.

  Similarly, among the initial data and intermediate data of the application requested to be executed next, the initial data and intermediate data to be written to the peripheral memory 83 not used by the currently executing application are the same as those of the currently executing application. The initial data and intermediate data to be written without waiting for the end and written to the peripheral memory 83 used by the currently executing application are written after the end of the currently executing application. At that time, if it is necessary to save intermediate data in the peripheral memory 83 used by the currently executing application, the intermediate data is written to the intermediate data pool 65 and saved in the intermediate data management table 66. An area in which intermediate data is stored is stored.

  According to the memory device management apparatus of the present embodiment, the initial data of the application to be executed next is written in advance in the storage area not used by the currently executing application in the peripheral memory 83 provided in the FPGA 8. Therefore, it is possible to reduce the time required for rewriting initial data when switching applications.

  In addition, since it is not necessary to create a circuit for reading the initial data and intermediate data into the peripheral memory 83 using the configuration information, it is not necessary to cause the FPGA 8 to execute processes other than the application.

  Therefore, the ratio of the application processing time to the total processing time of the reconfigurable device can be increased. Therefore, by using the memory device management apparatus of this embodiment, the processing performance (throughput) of the reconfigurable device is improved.

(Second embodiment)
FIG. 9 is a block diagram showing the configuration of the memory device management apparatus of the second embodiment.

  As shown in FIG. 9, the memory device management apparatus according to the second embodiment includes a management data storage unit 6 and a management unit 7.

  The second example is an example in which the data processing apparatus including the DRP 9 described in Patent Document 9 is managed by the memory device management apparatus according to the sixth embodiment described above.

  The DRP 9 corresponds to the third reconfigurable hardware 5 shown in the third embodiment or the sixth embodiment.

The DRP 9 includes a PE group 91 that performs operations, an STC 92 that controls the operation of the PE group 91, and a peripheral memory 93 that holds initial data and intermediate data. The peripheral memory 93 can be divided into a plurality of storage areas 93 _{1 to} 93 _{n serving} as management units.

  The PE group 91 includes a plurality of PEs (Processor Elements) for executing operations, and each PE includes an instruction memory 94 for holding configuration information. The instruction memory 94 can be divided into a plurality of blocks 0 to n serving as management units. In the following, an example in which configuration information is held in each block of the instruction memory 94 is shown, but the configuration information can also be held in an internal memory (not shown) provided in the STC 92.

  The PE group 91 corresponds to the arithmetic unit 52 and the configuration information storage unit 54 of the third reconfigurable hardware 5 shown in the third embodiment or the sixth embodiment, and the STC 92 is the third reconfigurable hardware. The peripheral memory 93 corresponds to the processing data storage unit 53 of the third reconfigurable hardware 5 and corresponds to the control unit 51 of the configurable hardware 5.

  The management data storage unit 6 includes a configuration information pool 67, an initial data pool 62, a peripheral memory management unit 63, a configuration status table 68, an intermediate data pool 65, and an intermediate data management table 66. The configuration information pool 67 corresponds to the configuration information pool 11 of the management data storage unit 1 described in the sixth embodiment, and the initial data pool 62 corresponds to the initial data pool 12 of the management data storage unit 1. The peripheral memory management unit 63 corresponds to the storage unit management unit 13 of the management data storage unit 1, and the configuration status table 68 corresponds to the configuration status table 14 of the management data storage unit 1. The intermediate data pool 65 corresponds to the intermediate data pool 15 of the management data storage unit 1, and the intermediate data management table 66 corresponds to the intermediate data management table 16 of the management data storage unit 1.

  In the configuration information pool 67, configuration information for each of a plurality of applications executed by the DRP 9 is stored.

  The initial data pool 62 stores initial data for each of a plurality of applications executed by the DRP 9.

  The peripheral memory management unit 63 includes a peripheral memory request table 631 and a peripheral memory status table 632.

  The peripheral memory request table 631 stores information indicating the storage area of the peripheral memory 93 of the DRP 9 that is used to hold initial data and intermediate data of the application when the application is executed. The peripheral memory request table 631 also stores information indicating whether saving or rewriting is necessary as intermediate data described later.

  The peripheral memory status table 632 stores information indicating an application that is currently using the peripheral memory 93 of the DRP 9.

  The configuration status table 68 stores information for identifying configuration information currently held by the DRP 9.

  The intermediate data pool 65 stores data (intermediate data) being processed by an arbitrary application and executed by the DRP 9.

  The intermediate data management table 66 stores information indicating the storage area of the intermediate data pool 65 in which intermediate data is stored.

  The operation of the memory device management apparatus according to the second embodiment will be described below by taking as an example the case where three types of applications A, B, and C are executed by DRP9.

  FIG. 10 a shows information stored in the configuration information pool 67, the initial data pool 62, the peripheral memory management unit 63, the configuration status table 68, the intermediate data pool 65, and the intermediate data management table 66 included in the management data storage unit 6. Yes.

  In the example shown in FIG. 10A, configuration information corresponding to 8 blocks of the instruction memory 94 corresponding to the application A is stored in the configuration information pool 67, and corresponding to 6 blocks of the instruction memory 94 corresponding to the application B. Information is stored, and configuration information corresponding to 12 blocks of the instruction memory 94 corresponding to the application C is stored. The initial data pool 62 stores initial data corresponding to five storage areas of the peripheral memory 93 corresponding to the application A, and initial data corresponding to four storage areas of the peripheral memory 93 corresponding to the application B. Data is stored, and initial data corresponding to the four storage areas of the peripheral memory 93 is stored corresponding to the application C.

The peripheral memory request table 631 shows storage areas of the peripheral memory 93 used by the applications A, B, and C. Here, it is assumed that the peripheral memory 93 is divided into _eight storage areas 93 _{1 to} 934. The PE group 91 can hold the configuration information in 16 blocks (blocks 0 to 15) by the internal memory 94.

  No information is currently stored in the peripheral memory status table 632, the intermediate data management table 66, and the configuration status table 68, and no intermediate data is stored in the intermediate data pool 65.

Peripheral memory request table 631 shown in FIG. 10a, the longitudinal axis of the peripheral memory state table 632 and the intermediate data management table 66 corresponding to the storage area 93 ₁ to 93 ₈ after splitting the peripheral memory 93, "1" is described The storage area is used by an application corresponding to the storage area. A storage area with “2” indicates that data held in the storage area needs to be saved and rewritten as intermediate data. Here, the configuration information of the applications A, B, and C is stored in advance in the configuration information pool 61, the initial data of the applications A, B, and C is stored in the initial data pool 62, and the peripheral memory request table 631 is shown in FIG. It is assumed that the operation starts from a state in which information corresponding to each of the applications A, B, and C is stored.

  When the DRP 9 and the memory device management apparatus are activated and an application A execution request is received from the outside, the management unit 7 reads the configuration information of the application A from the configuration information pool 67, and the instruction memory 94 and the STC 92 included in the PE group 91 The configuration information is written into the internal memory provided, and information indicating that the configuration information of application A has been written is stored in the configuration status table 68.

The management unit 7 refers to the peripheral memory request table 631, whether the initial data of the application A can be written in the storage area 93 _1, 93 _3, 93 _4, 93 _7, 93 ₈ of peripheral memory 93 Determine.

Referring to peripheral memory request table 631 shown in FIG. 10a, but the storage area 93 _7, 93 ₈ is the area used in the save or writing intermediate data, referring to the intermediate data management table 66, the intermediate data is not at the moment.

Therefore, the management unit 7, the initial data pool 62 reads the initial data of the application A, writes the initial data into the storage area 93 _1, 93 _3, 93 _4, 93 _7, 93 _8, an initial peripheral memory status table 632 It is updated according to the state of the peripheral memory 93 after data writing.

When the writing of all the configuration information and initial data of the application A is completed, the management unit 7 starts processing of the application A by the DRP 9. At this time, as shown in FIG. 10b, the peripheral memory state table 632, shown to be used storage area 93 ₁ in the peripheral memory 93, 93 _3, 93 _4, 93 _7, 93 ₈ with application A ing. The configuration status table 68 indicates that the configuration information of the application A is held in the blocks 0 to 7 of the instruction memory 94.

Next, when an execution request for application B is received during execution of application A, management unit 7 refers to peripheral memory request table 631 and peripheral memory status table 632, and initial data of application B is stored in the storage area of peripheral memory 93. 93 _1, 93 _2, 93 _6, determined at 93 ₈ whether writable.

Here, the storage area 93 _1, 93 _8, because it uses the application A currently running, the initial data of the application B can be written only in the memory region 93 _2, 93 _6. Therefore, the management unit 7 writes the initial data of the application B read from the initial data pool 62 to the storage area 93 _2, 93 _6, and updates the peripheral memory status table 632.

  In addition, the management unit 7 refers to the configuration status table 68, and the configuration of the application B read from the configuration information pool 67 in the blocks 8 to 15 of the instruction memory 94 in which the configuration information of the currently executing application A is not written. Write information.

At this time, as shown in FIG. 10c, the peripheral memory state table 632, using the storage area 93 ₁ in the peripheral memory 93, 93 _3, 93 _4, 93 _7, 93 ₈ with application A, the storage area 93 _2, it has been shown that using 93 ₆ in an application B. Further, since the application B uses the six blocks of instruction memory 94 to hold the configuration information, the configuration status table 68 stores the configuration information of the application A in blocks 0 to 7 of the instruction memory 94, and blocks 8 to 13 shows that the configuration information of application B is stored.

When the processing of the application A is completed, the management unit 7 writes the initial data of the application B that could not be written during the execution of the application A in the storage areas 93 ₁ and 93 ₈ . Management unit 7 first storage area 93 ₁ by referring to the peripheral memory status table 632, 93 ₈ writing initial data to it is required, by referring to the peripheral memory request table 631, the data storage area 93 ₈ Is intermediate data to be saved. Therefore, the management unit 7 writes the data held in the storage area 93 ₈ to the first storage area of the intermediate data pool 65, a first intermediate data pool 65 to the intermediate data of the application A in the intermediate data management table 66 Information indicating that the data has been saved in the storage area is written. Then, the management unit 7 writes the initial data of the application B in the storage area 93 _1, 93 _8.

When the writing of all the initial data of the application B is completed, the management unit 7 causes the DRP 9 to start processing of the application B. At this time, as shown in FIG. 10d, the intermediate data of the application A that has been held in the storage area 93 ₈ of the peripheral memory 93 (A-8) is stored in the intermediate data pool 65, the intermediate data management table 66 The save destination of the intermediate data (A-8) of the application A (first storage area of the intermediate data pool 65) is shown.

Next, when the execution request of the application A is received again during the execution of the application B, the management unit 7 refers to the peripheral memory request table 631 and the peripheral memory status table 632, and the initial data of the application A is stored in the peripheral memory 93. regions 93 _1, 93 _3, 93 _4, 93 _7, determines to 93 ₈ whether writable.

Here, the storage area 93 _1, 93 ₈ because it uses the application B that is currently running, it is possible to write the initial data in the storage area 93 _3, 93 _4, 93 ₇ only application A. However, referring to peripheral memory status table 632, the storage area 93 _3, 93 _4, 93 _7, since there is still the initial data when executing the last application A, there is no need to write again. Further, since the configuration information of the application A remains in the blocks 0 to 7 of the instruction memory 94, it is not necessary to rewrite the configuration information. For this reason, the management unit 7 does not execute rewriting of the peripheral memory 93 and the instruction memory 94 here.

When the processing of the application B is completed, the management unit 7 writes the initial data of the application A that could not be written in the application B running in the storage area 93 _1, 93 _8. In this case, the management unit 7 refers to the intermediate data management table 66, writes the intermediate data saved in the first memory area of the intermediate data pool 65 (A-8) to the storage area 93 _8, storage writes the initial data read out from the initial data pool 62 in the region 93 _1. In addition, the management unit 7 invalidates the first storage area of the intermediate data pool 65. Invalidation is realized by deleting information indicating that the intermediate data (A-8) has been saved in the intermediate data pool 65 from the intermediate data management table 66.

  As described above, since the configuration information of the application A remains in the blocks 0 to 7 of the instruction memory 94, the management unit 7 stores the application A initial data in the peripheral memory 93 and then stores the application A in the DRP 9. Start processing. At this time, as shown in FIG. 10E, information indicating the save destination of the intermediate data of application A is deleted in the intermediate data management table 66. Further, the intermediate data (A-8) of the application A remains in the first storage area of the intermediate data pool 65, but information indicating the save destination of the intermediate data is deleted from the intermediate data management table 66. Therefore, the intermediate data reading process is invalidated.

Next, when an execution request for application C is received during execution of application A, management unit 7 refers to peripheral memory request table 631 and peripheral memory status table 632, and initial data for application C is stored in the storage area of peripheral memory 93. 93 _1, 93 _2, 93 _5, 93 _6, 93 ₇ determines whether or not writable.

Here, the storage area 93 _1, 93 _7, because it uses the application A currently running, initial data storage area 93 _2, 93 _5, 93 ₆ only application C is writable. Therefore, the management unit 7 writes the initial data of the application C read from the initial data pool 62 to the storage area 93 _5, 93 _6, and updates the peripheral memory status table 632.

In addition, the management unit 7 refers to the configuration status table 68, and the configuration of the application C read from the configuration information pool 67 in the blocks 8 to 15 of the instruction memory 94 in which the configuration information of the currently executing application A is not written. Write information. However, referring to the configuration information pool 67, the application C requires 12 blocks of instruction memory 94 to hold the configuration information. Therefore, the management unit 7 reads only the configuration information C0 to C7 that can be stored in the empty block of the instruction memory 94 from the configuration information of the application C, and writes it to the blocks 8 to 15 of the instruction memory 94. At this time, as shown in FIG. 10f, the peripheral memory state table 632, using the storage area 93 ₁ in the peripheral memory 93, 93 _3, 93 _4, 93 _7, 93 ₈ with application A, the storage area 93 _2, it has been shown that using 93 _5, 93 ₆ in the application C. The configuration status table 68 indicates that the configuration information of application A is held in blocks 0 to 7 of the instruction memory 94 and the configuration information of application C is held in blocks 8 to 15 of the instruction memory 94. ing.

When the processing of the application A is completed, the management unit 7 writes the initial data of the application C that could not be written while the application A running in the storage area 93 _1, 93 _7. Management unit 7 first the storage area 93 _1, 93 ₇ with reference to the peripheral memory status table 632 of the initial data writing is required, by referring to the peripheral memory request table 631, held in the storage area 93 ₇ It can be seen that it is necessary to save the intermediate data of the application A. Therefore, the management unit 7 writes the data held in the storage area 93 ₇ to the first memory area of the intermediate data pool 65, from the storage area 93 ₇ in the intermediate data management table 66 to the intermediate data pool 65 of the application A Write information indicating that intermediate data has been saved. Then, the management unit 7 writes the initial data of the application C into the storage area 93 _1, 93 _7.

  Further, the management unit 7 reads the configuration information C9 to C11 of the application C that could not be written during the execution of the application A from the configuration information pool 67 with reference to the configuration status table 68, for example, the instruction memory used in the application A Write to 94 blocks 0-3.

When the writing of all the configuration information of the application C is completed, the management unit 7 causes the DRP 9 to start processing of the application C. At this time, as shown in FIG. 10 g, the intermediate data pool 65 stores intermediate data of the application A that has been held in the storage area 93 _{7 (A-7)} is, the intermediate data management table 66, the application A The intermediate data (A-7) save destination (first storage area of the intermediate data pool 65) is shown. In the configuration status table 68, the configuration information of the application A is held in the blocks 4 to 7 of the instruction memory 94, and the configuration information of the application C is held in the blocks 8 to 15 and 0 to 3 of the instruction memory 94. It has been shown.

Next, when the execution request of the application A is received again during the execution of the application C, the management unit 7 refers to the peripheral memory request table 631 and the peripheral memory status table 632, and the initial data of the application A is stored in the peripheral memory 93. regions 93 _1, 93 _3, 93 _4, 93 _7, determines to 93 ₈ whether writable.

Here, due to the use of the storage area 93 _1, 93 ₇ the application C currently running, it is possible to write the initial data in the storage area 93 _3, 93 _4, 93 ₇ only application A. However, referring to peripheral memory status table 632, the storage area 93 _3, 93 _4, 93 _7, since there is still the initial data when executing the last application A, there is no need to write again. In addition, since the configuration information A4 to A7 of the application A remains in the blocks 4 to 7 of the instruction memory 94 and the other blocks are used by the application C, the management unit 7 does not use the peripheral memory 93 or the instruction here. The memory 94 is not rewritten.

When the processing of the application C is completed, the management unit 7 writes the initial data of the application A that could not be written in the application C run in the storage area 93 _1, 93 _7. At this time, the management unit 7 refers to the intermediate data management table 66 to store the intermediate data (A-7) saved in the first storage area of the intermediate data pool 65 in the storage area 93 _{7 of the} peripheral memory 93. to write, writing the initial data in the storage area 93 ₁ is read from the initial data pool 62. In addition, the management unit 7 invalidates the first storage area of the intermediate data pool 65. Invalidation is realized by deleting information indicating saving to the intermediate data pool 65 from the intermediate data management table 66.

  Further, the management unit 7 writes the configuration information A0 to A3 of the application A that cannot be written during the execution of the application C to the blocks 0 to 3 of the instruction memory 94, and after the writing of all the configuration information of the application A is completed, The DRP 9 is made to start processing of the application A. At this time, as shown in FIG. 10h, in the intermediate data management table 66, information indicating the save destination of the intermediate data of application A is deleted. Further, the intermediate data (A-7) of the application A remains in the first storage area of the intermediate data pool 65, but information indicating the save destination of the intermediate data is deleted from the intermediate data management table 66. Therefore, the intermediate data reading process is invalidated. The configuration status table 68 indicates that the configuration information of application A is held in blocks 0 to 7 of the instruction memory 94 and the configuration information of application C is held in blocks 8 to 15 of the instruction memory 94. ing.

  In the same manner, among the initial data and intermediate data of the application to be executed next, the initial data and intermediate data to be written to the peripheral memory 93 not used by the currently executing application indicate that the currently executing application is terminated. The initial data and intermediate data to be written without waiting and written to the peripheral memory 93 used by the currently executing application are written after the currently executing application is finished. At this time, if it is necessary to save intermediate data in the peripheral memory 93 used by the currently executing application, the intermediate data is written to the intermediate data pool 65 and saved in the intermediate data management table 66. An area in which intermediate data is stored is stored.

  Further, of the configuration information of the application to be executed next, the block of the instruction memory 94 that is not used by the currently executing application includes the configuration information of the application to be executed next without waiting for the end of the currently executing application. In the block of the instruction memory 94 used by the currently executing application, the configuration information of the application to be executed next is written after the end of the currently executing application.

  According to the memory device management apparatus of the present embodiment, the application to be executed next is stored in a storage area (block) that is not used by the currently executing application among the instruction memory 94 and the peripheral memory 93 provided in the DRP 9. Since the configuration information and the initial data are written in advance, the time required for rewriting the configuration information and the initial data can be shortened when the application is switched.

  In addition, since it is not necessary to create a circuit for reading the initial data and intermediate data into the peripheral memory 93 using the configuration information, it is not necessary for the DRP 9 to execute processing other than the application.

  Therefore, the ratio of the application processing time to the total processing time of the reconfigurable device can be increased. Therefore, by using the memory device management apparatus of this embodiment, the processing performance (throughput) of the reconfigurable device is improved.

DESCRIPTION OF SYMBOLS 1, 6 Management data storage part 2, 7 Management part 3 1st reconfigurable hardware 4 2nd reconfigurable hardware 5 3rd reconfigurable hardware 8 FPGA
9 DRP
11, 61, 67 Configuration information pool 12, 62 Initial data pool 13 Storage management unit 14, 68 Configuration status table 15, 65 Intermediate data pool 16, 66 Intermediate data management table 31, 41, 51 Control unit 32, 42, 52 Arithmetic unit 33, 43, 53 Processing data storage unit 34, 44, 54 Configuration information storage unit 63 Peripheral memory management unit 64 Configuration status register 81 Gate array 83, 93 Peripheral memory 91 PE group 92 STC
94 Instruction memory 131 Storage unit request table 132 Storage unit status table 631 Peripheral memory request table 632 Peripheral memory status table

Claims (8)

A memory device management method for managing a storage unit included in a reconfigurable device,
A configuration information pool storing configuration information for each application executed by the reconfigurable device, an initial data pool storing initial data including data to be processed by the application and data necessary for the application, A management data storage unit including a storage unit request table indicating an area of the storage unit used for holding the initial data of the application at the time of execution, and a storage unit status table indicating an application using the storage unit; Every
Upon receiving the application execution request, the application configuration information is read from the configuration information pool and written to the storage unit,
A memory device management method that reads the initial data of the application that is not in the storage unit from the initial data pool and writes it in the storage unit with reference to the storage unit request table and the storage unit status table.   3. The memory device according to claim 2, wherein the initial data of an application to be executed next is written in an area of the storage unit that is not used by a running application with reference to the storage unit request table and the storage unit status table. Management method. In the management data storage unit,
An intermediate data pool that stores intermediate data that is being processed by the application; an intermediate data management table that indicates a storage area of the intermediate data pool in which the intermediate data is stored; and the storage unit request table includes the intermediate data management table Including information indicating whether saving or rewriting is required as data,
Referring to the storage unit request table, the intermediate data is saved in the intermediate data pool when the application is processed, and the storage unit request table and the intermediate data management table are referred to when the application is re-executed. 3. The memory device management method according to claim 1, wherein required intermediate data is written from the intermediate data pool to the storage unit. In the management data storage unit,
Comprising a configuration status table indicating configuration information of the application held in the storage unit;
The memory device management according to any one of claims 1 to 3, wherein configuration information of an application to be executed next is written in an area of the storage unit that is not used by an application being executed with reference to the configuration status table. Method. A memory device management apparatus for managing a storage unit included in a reconfigurable device,
A configuration information pool storing configuration information for each application executed by the reconfigurable device, an initial data pool storing initial data including data to be processed by the application and data necessary for the application, A management data storage unit comprising a storage unit request table indicating an area of the storage unit used for holding the initial data of the application at the time of execution, and a storage unit status table indicating an application using the storage unit;
When receiving the execution request of the application, the configuration information of the application is read from the configuration information pool and written to the storage unit, and the storage unit request table and the storage unit status table are referred to, and the storage unit is not in the storage unit. A management unit that reads the initial data of the application from the initial data pool and writes the initial data to the storage unit;
A memory device management apparatus. The management unit
6. The memory device according to claim 5, wherein the initial data of the application to be executed next is written to an area of the storage unit that is not used by a running application with reference to the storage unit request table and the storage unit status table. Management device. The management data storage unit
An intermediate data pool that stores intermediate data that is being processed by the application; an intermediate data management table that indicates a storage area of the intermediate data pool in which the intermediate data is stored; and the storage unit request table includes the intermediate data management table Including information indicating whether saving or rewriting is required as data,
The management unit
Referring to the storage unit request table, the intermediate data is saved in the intermediate data pool when the application is processed, and the storage unit request table and the intermediate data management table are referred to when the application is re-executed. 7. The memory device management apparatus according to claim 5, wherein required intermediate data is written from the intermediate data pool to the storage unit. The management data storage unit
Comprising a configuration status table indicating configuration information of the application held in the storage unit;
The management unit
8. The memory device management according to claim 5, wherein configuration information of an application to be executed next is written in an area of the storage unit that is not used by an application being executed with reference to the configuration status table. apparatus.

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