JP2011171750A - Plasma processing device - Google Patents

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JP2011171750A
JP2011171750A JP2011065636A JP2011065636A JP2011171750A JP 2011171750 A JP2011171750 A JP 2011171750A JP 2011065636 A JP2011065636 A JP 2011065636A JP 2011065636 A JP2011065636 A JP 2011065636A JP 2011171750 A JP2011171750 A JP 2011171750A
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Yohei Yamazawa
陽平 山澤
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Tokyo Electron Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To optimize respective actions or functions of both high frequencies at the same time in a system of applying two high frequencies (or high frequencies and direct current) different in frequencies to one-side electrode of a capacitive coupling type. <P>SOLUTION: An upper electrode 80 facing a susceptor (lower electrode) 14 interposing a plasma space PS includes a first upper electrode 84 and a second upper electrode 86. A DC voltage is applied to the first upper electrode 84 functioning also as a shower head from a variable DC power source 92. A processing gas supply source 62 is connected to the inside of the first upper electrode 84 or a gas chamber through a gas supply tube 60. The second upper electrode 86 is arranged behind the first upper electrode 84, and electrically insulated from the first upper electrode 84 and a chamber 90. A plasma-generating high frequency is applied to the second upper electrode 86 through a matching unit from a high-frequency power source 96. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、被処理基板にプラズマ処理を施す技術に係り、特に2周波重畳印加方式の容量結合型プラズマ処理装置に関する。   The present invention relates to a technique for performing plasma processing on a substrate to be processed, and more particularly to a capacitively coupled plasma processing apparatus of a two-frequency superimposition application method.

半導体デバイスやFPD(Flat Panel Display)の製造プロセスにおけるエッチング、堆積、酸化、スパッタリング等の微細加工または処理には、処理ガスに比較的低温で良好な反応を行わせるためにプラズマが利用されている。従来より、枚葉式のプラズマ処理装置、特にプラズマエッチング装置の中では、容量結合型のプラズマ処理装置が主流となっている。   Plasma is used for fine processing or processing such as etching, deposition, oxidation, sputtering, etc. in the manufacturing process of semiconductor devices and FPD (Flat Panel Display) in order to cause a favorable reaction at a relatively low temperature with the processing gas. . Conventionally, among single-wafer plasma processing apparatuses, particularly plasma etching apparatuses, capacitively coupled plasma processing apparatuses have been mainstream.

一般に、容量結合型プラズマ処理装置は、真空チャンバとして構成される処理容器内に上部電極と下部電極とを平行に配置し、下部電極の上に被処理基板(半導体ウエハ、ガラス基板等)を載置し、両電極のいずれか一方に高周波を印加する。この高周波によって形成される電界により電子が加速され、電子と処理ガスとの衝突電離によってプラズマが発生し、プラズマ中のラジカルやイオンによって基板表面に所望の微細加工(たとえばエッチング加工)が施される。   Generally, in a capacitively coupled plasma processing apparatus, an upper electrode and a lower electrode are arranged in parallel in a processing container configured as a vacuum chamber, and a substrate to be processed (semiconductor wafer, glass substrate, etc.) is mounted on the lower electrode. And applying a high frequency to one of the two electrodes. Electrons are accelerated by the electric field formed by this high frequency, plasma is generated by impact ionization between the electrons and the processing gas, and desired fine processing (for example, etching processing) is performed on the substrate surface by radicals or ions in the plasma. .

ところで、最近は、製造プロセスにおけるデザインルールの微細化につれてプラズマ処理に低圧下での高密度プラズマが要求されており、上記のような容量結合型のプラズマ処理装置では従来(一般に13.56MHz)よりも格段に高い高周波数領域(40MHz以上)の周波数を用いるようになってきている。しかしながら、高周波放電の周波数が高くなると、高周波電源から給電棒を介して電極の背面または裏面に印加される高周波が表皮効果により電極表面を伝わって電極主面(プラズマと対向する面)に回り、電極主面上で高周波電流がエッジ部から中心部に向って流れる。このため、電極主面の中心部における電界強度がエッジ部における電界強度よりも高くなって、生成されるプラズマの密度も電極中心部側が電極エッジ部側より高くなり、プロセス特性が半径方向でばらつくという問題が顕著になってきている。   Recently, with the miniaturization of design rules in the manufacturing process, high-density plasma under a low pressure is required for plasma processing, and the capacitively coupled plasma processing apparatus as described above (generally, 13.56 MHz) than before. However, the frequency of a remarkably high high frequency region (40 MHz or higher) has been used. However, when the frequency of the high frequency discharge is increased, a high frequency applied from the high frequency power source to the back surface or back surface of the electrode via the feeding rod is transmitted to the electrode main surface (surface facing the plasma) by the skin effect, A high-frequency current flows from the edge portion toward the center portion on the electrode main surface. For this reason, the electric field intensity at the center of the electrode main surface is higher than the electric field intensity at the edge, and the density of the generated plasma is higher at the electrode center than at the electrode edge, and the process characteristics vary in the radial direction. The problem is becoming prominent.

この問題に対処するため、高周波を印加する電極の主面にすり鉢状またはテーパ状の凹部を設けてその中に誘電体を埋め込むなどの工夫が行われている(たとえば特許文献1参照)。かかる電極構造によれば、プラズマ側に対して相対的に電極中心部側のインピーダンスが大きく電極エッジ部側のインピーダンスが低いため、電極エッジ部側における高周波電界が強められる一方で電極中心部側の高周波電界が弱められ、電界強度ないしプラズマ密度の均一性が改善される。また、ジュール熱による電力消費の増大を伴うが、電極主面の中心部に高抵抗部材を設ける電極構造も知られている(たとえば特許文献2参照)。   In order to cope with this problem, contrivances such as providing a mortar-shaped or tapered recess on the main surface of the electrode to which a high frequency is applied and embedding a dielectric therein are performed (for example, see Patent Document 1). According to such an electrode structure, since the impedance on the electrode center side is relatively large with respect to the plasma side and the impedance on the electrode edge side is low, the high-frequency electric field on the electrode edge side is strengthened while the electrode center side is on the side. The high frequency electric field is weakened, and the uniformity of the electric field strength or plasma density is improved. In addition, an electrode structure in which a high resistance member is provided at the center of the electrode main surface is also known, although the power consumption increases due to Joule heat (see, for example, Patent Document 2).

一方で、容量結合型プラズマ処理装置においては、プラズマの密度および異方性エッチングの選択性をそれぞれ個別的に最適化するために、基板を支持する下部電極にプラズマ生成に適した比較的高い周波数(一般に27MHz以上)の第1高周波とイオン引き込みに適した比較的低い周波数(一般に13.56MHz以下)の第2高周波とを重畳して印加する下部2周波重畳印加方式も近年主流になりつつある(たとえば特許文献3参照)。   On the other hand, in the capacitively coupled plasma processing apparatus, in order to individually optimize the plasma density and the selectivity of anisotropic etching, the lower electrode supporting the substrate has a relatively high frequency suitable for plasma generation. In recent years, a lower two-frequency superimposing application method that superimposes and applies a first high frequency (generally 27 MHz or higher) and a second high frequency of a relatively low frequency (generally 13.56 MHz or lower) suitable for ion attraction is becoming mainstream. (For example, refer to Patent Document 3).

特開2004−363552JP 2004-363552 A 特開2000−323456JP 2000-323456 A 特開2000−156370JP 2000-156370 A

しかしながら、上記のような下部2周波重畳印加方式を採る従来のプラズマ処理装置において、プラズマ生成用に高い高周波数領域(40MHz以上)を使用し、上記のように誘電体や高抵抗部材を埋め込んで電極中心部のインピーダンスを電極エッジ部のインピーダンスよりも相対的に高くする構造の下部電極を採用した場合は、下部電極の主面(上面)における電界強度分布がプラズマ生成用の周波数の高い高周波については均一性が向上する反面、イオン引き込み用の周波数の低い高周波については電極中心部側が電極エッジ部側よりも低くなり、却って均一性が低下する。このため、プラズマ密度の均一性を改善できてもそれと引き換えに異方性エッチング精度の均一性が低下するというトレードオフの問題があった。   However, in the conventional plasma processing apparatus adopting the lower two-frequency superimposition application method as described above, a high high frequency region (40 MHz or more) is used for plasma generation, and a dielectric or a high resistance member is embedded as described above. When a lower electrode with a structure in which the impedance at the center of the electrode is relatively higher than the impedance at the electrode edge is used, the electric field strength distribution on the main surface (upper surface) of the lower electrode is high with a high frequency for plasma generation. On the other hand, the uniformity is improved, but at the high frequency with a low frequency for ion attraction, the electrode center side is lower than the electrode edge side, and the uniformity is lowered. For this reason, even if the uniformity of the plasma density can be improved, there is a trade-off problem that the uniformity of the anisotropic etching accuracy is lowered in exchange.

本発明は、上記のような従来技術の問題点に鑑みてなされたものであって、容量結合型の片側の電極に周波数の異なる2つの高周波(または直流と高周波)を印加する方式において両高周波(または直流と高周波)のそれぞれの作用または働きを同時に最適化できるようにしたプラズマ処理装置を提供する。   The present invention has been made in view of the above-described problems of the prior art, and in a system in which two high frequencies (or direct current and high frequency) having different frequencies are applied to a capacitively coupled electrode on one side. A plasma processing apparatus capable of simultaneously optimizing (or direct current and high frequency) actions or functions is provided.

本発明のプラズマ処理装置は、真空排気可能な処理容器と、前記処理容器内でプラズマ空間に臨むように配置される第1の電極と、前記プラズマ空間側から見て前記第1の電極の背後に配置される第2の電極と、前記プラズマ空間に所望の処理ガスを供給する処理ガス供給部と、前記第1の電極に第1の高周波または直流を印加する第1の給電部と、前記第2の電極に第2の高周波を印加する第2の給電部とを有する。   The plasma processing apparatus of the present invention includes a processing container that can be evacuated, a first electrode that is disposed in the processing container so as to face the plasma space, and a back side of the first electrode when viewed from the plasma space side. A second electrode disposed on the first electrode, a processing gas supply unit that supplies a desired processing gas to the plasma space, a first power supply unit that applies a first high frequency or direct current to the first electrode, And a second power supply unit that applies a second high frequency to the second electrode.

上記の構成においては、プラズマ空間に臨む第1の電極には第1の高周波または直流を印加し、第1の電極の背後に配置される第2の電極には第2の高周波を印加するので、第1の電極に第1の高周波または直流の作用に最適な電極構造をもたせ、第2の電極に第2の高周波の作用に最適な電極構造をもたせることができる。   In the above configuration, the first high frequency or direct current is applied to the first electrode facing the plasma space, and the second high frequency is applied to the second electrode disposed behind the first electrode. The first electrode can have an electrode structure optimal for the action of the first high frequency or direct current, and the second electrode can have the electrode structure optimum for the action of the second high frequency.

本発明の好適な一態様によれば、プラズマ空間を挟んで第1の電極の真向かいに第3の電極が平行に配置される。そして、第3の給電部より第3の電極に第3の高周波が印加される。   According to a preferred aspect of the present invention, the third electrode is arranged in parallel directly opposite the first electrode across the plasma space. Then, a third high frequency is applied to the third electrode from the third power feeding unit.

また、本発明の好適な一態様によれば、第2の電極の主面に凹部が形成され、その凹部に誘電体が埋め込まれる。この場合、誘電体の厚さが電極中心部から電極エッジ部に向って次第に小さくなる構成が好ましい。かかる電極構造によれば、プラズマ密度を高めるために第2の高周波の周波数を相当高くした場合に、第2の電極における表皮効果をキャンセルして第2の高周波に基づく高周波電界を電極半径方向において均一化させ、ひいてはプラズマ空間のプラズマ密度を電極半径方向において均一化させることができる。   According to a preferred aspect of the present invention, a recess is formed in the main surface of the second electrode, and a dielectric is embedded in the recess. In this case, a configuration in which the thickness of the dielectric gradually decreases from the electrode center portion toward the electrode edge portion is preferable. According to such an electrode structure, when the frequency of the second high frequency is considerably increased in order to increase the plasma density, the skin effect in the second electrode is canceled and a high frequency electric field based on the second high frequency is generated in the electrode radial direction. The plasma density in the plasma space can be made uniform in the radial direction of the electrode.

また、本発明の好適な一態様によれば、第1の電極において、処理ガス供給部のシャワーヘッドを兼ねた電極構造が採られる。   Moreover, according to the suitable one aspect | mode of this invention, the electrode structure which served as the shower head of the process gas supply part in the 1st electrode is taken.

本発明のプラズマ処理装置によれば、上記のように、容量結合型の片側の電極に周波数の異なる2つの高周波(または直流と高周波)を印加する方式において、該片側電極を上下に2分割して両高周波(または直流と高周波)を別々に印加するようにしたので、両高周波(または直流と高周波)のそれぞれの作用または働きを同時に最適化することができる。   According to the plasma processing apparatus of the present invention, as described above, in the method of applying two high frequencies (or DC and high frequency) having different frequencies to the capacitively coupled one side electrode, the one side electrode is divided into two vertically. Thus, both high frequencies (or direct current and high frequency) are applied separately, so that the action or function of both high frequencies (or direct current and high frequency) can be optimized simultaneously.

本発明の一実施形態におけるプラズマエッチング装置の構成を示す縦断面図である。It is a longitudinal cross-sectional view which shows the structure of the plasma etching apparatus in one Embodiment of this invention. 実施形態の一変形例におけるプラズマエッチング装置の構成を示す縦断面図である。It is a longitudinal cross-sectional view which shows the structure of the plasma etching apparatus in one modification of embodiment. 本発明の別の実施例によるプラズマエッチング装置の構成を示す縦断面図である。It is a longitudinal cross-sectional view which shows the structure of the plasma etching apparatus by another Example of this invention.

以下、添付図を参照して本発明の好適な実施の形態を説明する。   Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

図1に、本発明の第1の実施形態によるプラズマエッチング装置の構成を示す。このプラズマエッチング装置は、下部2周波重畳印加方式の容量結合型プラズマエッチング装置として構成されており、たとえばアルミニウムまたはステンレス鋼からなる金属製の円筒型チャンバ(処理容器)10を有している。チャンバ10は保安接地されている。   FIG. 1 shows the configuration of a plasma etching apparatus according to the first embodiment of the present invention. This plasma etching apparatus is configured as a capacitive coupling type plasma etching apparatus of a lower two-frequency superimposing application method, and has a cylindrical chamber (processing vessel) 10 made of metal made of, for example, aluminum or stainless steel. The chamber 10 is grounded for safety.

チャンバ10の底面には、たとえばセラミックからなる環状の絶縁部材12を介して下部電極と基板保持台を兼ねるサセプタ14が設けられる。このサセプタ14は、本発明における第1および第2の下部電極をそれぞれ構成する上部サセプタ電極16および下部サセプタ電極18を有している。   A susceptor 14 serving as a lower electrode and a substrate holding table is provided on the bottom surface of the chamber 10 via an annular insulating member 12 made of ceramic, for example. The susceptor 14 has an upper susceptor electrode 16 and a lower susceptor electrode 18 that constitute the first and second lower electrodes in the present invention, respectively.

上記環状絶縁部材12の上に環状または円筒状の給電体20が配置され、この円筒給電体20の上部に上部サセプタ電極16が略水平に取り付けられる。この上部サセプタ電極16は、被処理基板たとえば半導体ウエハWより一回り大きな口径を有する円形の平板電極であり、後述する理由から好ましくは抵抗率の高い導電材料たとえばタングステン(W)あるいはシリコン(Si)などで構成されている。環状絶縁部材12は、伝送損失の少ない低抵抗率の材質たとえばアルミニウムからなる。   An annular or cylindrical power supply body 20 is disposed on the annular insulating member 12, and the upper susceptor electrode 16 is mounted substantially horizontally on the cylindrical power supply body 20. The upper susceptor electrode 16 is a circular flat plate electrode having a diameter that is slightly larger than that of the substrate to be processed, for example, the semiconductor wafer W, and is preferably a conductive material having a high resistivity, such as tungsten (W) or silicon (Si), for the reason described later. Etc. The annular insulating member 12 is made of a low resistivity material such as aluminum with little transmission loss.

上部サセプタ電極16には、第1高周波電源22が整合器24、給電棒26および円筒給電体20を介して電気的に接続されている。第1高周波電源22は、サセプタ14上に保持される半導体ウエハWに対するイオンの引き込みに主として寄与する所定の周波数たとえば2MHzの第1高周波を所望のパワーで出力する。この第1高周波電源22からの第1高周波(2MHz)は、整合器24、給電棒26および円筒給電体20を通って上部サセプタ電極16に供給される。そして、上部サセプタ電極16の主面(上面)より上方のプラズマ空間PSに向けて放出されるようになっている。   A first high frequency power source 22 is electrically connected to the upper susceptor electrode 16 via a matching unit 24, a power feeding rod 26, and a cylindrical power feeding body 20. The first high frequency power supply 22 outputs a first high frequency of a predetermined frequency, for example, 2 MHz, which contributes mainly to the drawing of ions into the semiconductor wafer W held on the susceptor 14 with a desired power. The first high frequency (2 MHz) from the first high frequency power supply 22 is supplied to the upper susceptor electrode 16 through the matching unit 24, the power supply rod 26 and the cylindrical power supply body 20. And it is emitted toward the plasma space PS above the main surface (upper surface) of the upper susceptor electrode 16.

下部サセプタ電極18は、抵抗率の低い導電材料たとえばアルミニウムからなる円形の略平板電極である。周囲(16,20)から電気的に絶縁された状態で環状絶縁部材12の内側かつ上部サセプタ電極16の直下に配置される。図示のように、下部サセプタ電極18の主面(上面)には電極中心が底になるようなテーパ状の凹部が形成され、この凹部に誘電体28が埋め込まれている。かかる電極構造は、電極径方向における電界強度ないしプラズマ密度の均一性を向上させるためのものであり、上記特許文献1(特開2004−363552)記載の技術を用いている。下部サセプタ電極18と環状絶縁部材12、上部サセプタ電極16との間の隙間は、放電を防止するために、たとえばセラミックからなる筒状絶縁体30および円板形絶縁体32で塞いでおくのが好ましい。   The lower susceptor electrode 18 is a circular substantially flat electrode made of a conductive material having a low resistivity, for example, aluminum. It is disposed inside the annular insulating member 12 and directly below the upper susceptor electrode 16 in a state of being electrically insulated from the surroundings (16, 20). As shown in the drawing, a tapered concave portion is formed on the main surface (upper surface) of the lower susceptor electrode 18 so that the center of the electrode is at the bottom, and a dielectric 28 is embedded in the concave portion. Such an electrode structure is for improving the uniformity of the electric field strength or plasma density in the electrode radial direction, and uses the technique described in Patent Document 1 (Japanese Patent Laid-Open No. 2004-363552). The gaps between the lower susceptor electrode 18 and the annular insulating member 12 and the upper susceptor electrode 16 are closed with, for example, a cylindrical insulator 30 and a disc insulator 32 made of ceramic in order to prevent discharge. preferable.

下部サセプタ電極18には、第2高周波電源34が整合器36および給電棒38を介して電気的に接続されている。第2高周波電源34は、プラズマの生成に主として寄与する所定の周波数たとえば40MHzの高周波を所望のパワーで出力する。この第2高周波電源34からの第2高周波(40MHz)は、整合器36および給電棒38を通って下部サセプタ電極18に供給される。そして、下部サセプタ電極18の主面(上面)より上方のプラズマ空間PSに向けて放出されるようになっている。   A second high frequency power supply 34 is electrically connected to the lower susceptor electrode 18 via a matching unit 36 and a power feed rod 38. The second high frequency power supply 34 outputs a predetermined frequency, for example, a high frequency of 40 MHz, which mainly contributes to plasma generation, with a desired power. The second high frequency (40 MHz) from the second high frequency power supply 34 is supplied to the lower susceptor electrode 18 through the matching unit 36 and the power feed rod 38. And it is emitted toward the plasma space PS above the main surface (upper surface) of the lower susceptor electrode 18.

上部サセプタ電極16の上面には、半導体ウエハWを静電吸着力で保持するための静電チャック40が設けられている。この静電チャック40は導電膜からなる電極42を一対の絶縁層または絶縁シート44の間に挟み込んだものであり、電極42には直流電源46が電気的に接続されている。直流電源46からの直流電圧により、クーロン力で半導体ウエハWをチャック上に吸着保持できるようになっている。静電チャック40の周囲には、エッチングの均一性を向上させるためのたとえばシリコンからなるフォーカスリング48が配置されている。環状絶縁部材12および円筒状給電体20の外周面にはたとえば石英からなる円筒状の内壁部材50が貼り付けられている。   An electrostatic chuck 40 is provided on the upper surface of the upper susceptor electrode 16 to hold the semiconductor wafer W with an electrostatic adsorption force. The electrostatic chuck 40 is obtained by sandwiching an electrode 42 made of a conductive film between a pair of insulating layers or insulating sheets 44, and a DC power supply 46 is electrically connected to the electrode 42. The semiconductor wafer W can be attracted and held on the chuck by a Coulomb force by a DC voltage from the DC power supply 46. Around the electrostatic chuck 40, a focus ring 48 made of, for example, silicon is arranged to improve etching uniformity. A cylindrical inner wall member 50 made of, for example, quartz is attached to the outer peripheral surfaces of the annular insulating member 12 and the cylindrical power feeder 20.

サセプタ14に載置される半導体ウエハWの温度を制御するために、上部サセプタ電極16の内部に冷媒室または冷媒通路(図示せず)を設け、外付けのチラーユニット(図示せず)より該冷媒通路に所定温度の冷媒たとえば冷却水を循環供給する構成も可能である。また、同じく半導体ウエハWの温度を制御するために、伝熱ガス供給機構(図示せず)からの伝熱ガスたとえばHeガスをガス供給ライン(図示せず)を介して静電チャック40の上面と半導体ウエハWの裏面との間に供給する構成も可能である。   In order to control the temperature of the semiconductor wafer W placed on the susceptor 14, a refrigerant chamber or a refrigerant passage (not shown) is provided inside the upper susceptor electrode 16, and the external chiller unit (not shown) A configuration in which a coolant having a predetermined temperature, such as cooling water, is circulated and supplied to the coolant passage is also possible. Similarly, in order to control the temperature of the semiconductor wafer W, a heat transfer gas such as He gas from a heat transfer gas supply mechanism (not shown) is supplied to the upper surface of the electrostatic chuck 40 via a gas supply line (not shown). It is also possible to supply between the semiconductor wafer W and the back surface of the semiconductor wafer W.

チャンバ10の天井には、サセプタ12と平行に向かい合って接地電位の上部電極を兼ねるシャワーヘッド52が設けられている。このシャワーヘッド52は、多数のガス通気孔54aを有する下面の電極板54と、この電極板54を着脱可能に支持する電極支持体56とを有する。電極板54はたとえばSi,SiCからなり、電極支持体56はたとえばアルマイト処理されたアルミニウムからなる。電極支持体56の内部にガス室58が設けられ、このガス室58にはガス供給管60を介して処理ガス供給源62が接続されており、ガス供給管60にマスフローコントローラ(MFC)64および開閉バルブ66が設けられている。処理ガス供給源62より所定の処理ガスがガス室58に導入されると、電極板54のガス噴出孔54aよりサセプタ14上の半導体ウエハWに向けて処理ガスがシャワー状に噴出されるようになっている。   On the ceiling of the chamber 10, there is provided a shower head 52 that is parallel to the susceptor 12 and also serves as an upper electrode of the ground potential. The shower head 52 includes a lower electrode plate 54 having a large number of gas vent holes 54a, and an electrode support 56 that detachably supports the electrode plate 54. The electrode plate 54 is made of, for example, Si or SiC, and the electrode support 56 is made of, for example, anodized aluminum. A gas chamber 58 is provided inside the electrode support 56, and a processing gas supply source 62 is connected to the gas chamber 58 via a gas supply pipe 60. A mass flow controller (MFC) 64 and a gas flow pipe 60 are connected to the gas supply pipe 60. An open / close valve 66 is provided. When a predetermined processing gas is introduced from the processing gas supply source 62 into the gas chamber 58, the processing gas is ejected in a shower shape from the gas ejection holes 54 a of the electrode plate 54 toward the semiconductor wafer W on the susceptor 14. It has become.

サセプタ14とチャンバ10の側壁との間に形成される環状の空間は排気空間となっており、この排気空間の底にはチャンバ10の排気口68が設けられている。この排気口68に排気管70を介して排気装置72が接続されている。排気装置72は、ターボ分子ポンプなどの真空ポンプを有しており、チャンバ10の室内、特にプラズマ処理空間を所望の真空度まで減圧できるようになっている。また、チャンバ10の側壁には半導体ウエハWの搬入出口74を開閉するゲートバルブ76が取り付けられている。   An annular space formed between the susceptor 14 and the side wall of the chamber 10 is an exhaust space, and an exhaust port 68 of the chamber 10 is provided at the bottom of the exhaust space. An exhaust device 72 is connected to the exhaust port 68 via an exhaust pipe 70. The exhaust device 72 has a vacuum pump such as a turbo molecular pump, and can depressurize the interior of the chamber 10, particularly the plasma processing space, to a desired degree of vacuum. A gate valve 76 that opens and closes the loading / unloading port 74 for the semiconductor wafer W is attached to the side wall of the chamber 10.

このプラズマエッチング装置において、エッチングを行なうには、先ずゲートバルブ76を開状態にして加工対象の半導体ウエハWをチャンバ10内に搬入して、静電チャック40の上に載置する。そして、処理ガス供給源62より所定の処理ガスつまりエッチングガス(一般に混合ガス)を所定の流量および流量比でチャンバ10内に導入し、排気装置72による真空排気でチャンバ10内の圧力を設定値にする。さらに、第1高周波電源22よりそれぞれ所定のパワーで第1高周波(2MHz)を上部サセプタ電極16に印加すると同時に、第2高周波電源34よりそれぞれ所定のパワーで第2高周波(40MHz)を下部サセプタ電極18に印加する。また、直流電源46より直流電圧を静電チャック40の電極42に印加して、半導体ウエハWを静電チャック40上に固定する。上部電極またはシャワーヘッド52より吐出されたエッチングガスは処理空間PSで高周波の放電によってプラズマ化し、このプラズマで生成されるラジカルやイオンによって半導体ウエハWの主面の膜がエッチングされる。   In order to perform etching in this plasma etching apparatus, first, the gate valve 76 is opened, and the semiconductor wafer W to be processed is loaded into the chamber 10 and placed on the electrostatic chuck 40. Then, a predetermined processing gas, that is, an etching gas (generally a mixed gas) is introduced into the chamber 10 from the processing gas supply source 62 at a predetermined flow rate and flow rate ratio, and the pressure in the chamber 10 is set to a set value by vacuum evacuation by the exhaust device 72. To. Furthermore, a first high frequency (2 MHz) is applied from the first high frequency power supply 22 to the upper susceptor electrode 16 at a predetermined power, and at the same time, a second high frequency (40 MHz) is applied from the second high frequency power supply 34 to the lower susceptor electrode. 18 is applied. Further, a DC voltage is applied from the DC power supply 46 to the electrode 42 of the electrostatic chuck 40 to fix the semiconductor wafer W on the electrostatic chuck 40. The etching gas discharged from the upper electrode or the shower head 52 is converted into plasma by high-frequency discharge in the processing space PS, and the film on the main surface of the semiconductor wafer W is etched by radicals and ions generated from the plasma.

この容量結合型プラズマエッチング装置は、サセプタ14の下部サセプタ電極18に40MHzというプラズマ生成に適した比較的高い周波数の第2高周波を印加することにより、プラズマを好ましい解離状態で高密度化し、より低圧の条件下でも高密度プラズマを形成することができる。それと同時に、サセプタ14の上部サセプタ電極16に2MHzというイオン引き込みに適した比較的低い周波数の第1高周波を印加することにより、サセプタ14の上方の半導体ウエハWに対して選択性の高い異方性のエッチングを施すことができる。   In this capacitively coupled plasma etching apparatus, by applying a second high frequency of a relatively high frequency suitable for plasma generation of 40 MHz to the lower susceptor electrode 18 of the susceptor 14, the plasma is densified in a preferable dissociation state, and the pressure is lower. High density plasma can be formed even under the above conditions. At the same time, by applying a first high frequency of a relatively low frequency suitable for ion attraction of 2 MHz to the upper susceptor electrode 16 of the susceptor 14, anisotropy having high selectivity with respect to the semiconductor wafer W above the susceptor 14. Etching can be performed.

次に、この実施形態のプラズマエッチング装置において本発明の特徴部分であるサセプタ14の作用を詳細に説明する。   Next, the operation of the susceptor 14 which is a characteristic part of the present invention in the plasma etching apparatus of this embodiment will be described in detail.

上記したように、サセプタ14は上部サセプタ電極16と下部サセプタ電極18とに上下に2分割されており、上部サセプタ電極16には第1高周波電源22からの第1高周波(2MHz)が印加され、下部サセプタ電極18には第2高周波電源34からの第2高周波(40MHz)が印加される。   As described above, the susceptor 14 is vertically divided into the upper susceptor electrode 16 and the lower susceptor electrode 18, and a first high frequency (2 MHz) from the first high frequency power supply 22 is applied to the upper susceptor electrode 16, A second high frequency (40 MHz) from the second high frequency power supply 34 is applied to the lower susceptor electrode 18.

ここで、上部サセプタ電極16は単一材質かつ一定板厚の平板電極である。周波数の低い第1高周波(2MHz)の電流が上部サセプタ電極16の主面を流れる際の表面厚さは厚く(表皮効果は小さく)、電極中心部に偏ることなく電極主面の各位置からほぼ均一にプラズマ空間PSへ放出される。これにより、第1高周波(2MHz)によってサセプタ14上に形成される高周波電界の強度分布を電極半径方向においてほぼ均一化することができる。よって、該高周波電界に追従して半導体ウエハWに入射するイオンの引き込み量をウエハ面内の各部で均一化させ、ひいては異方性エッチングの形状または選択性の面内均一性を向上させることができる。   Here, the upper susceptor electrode 16 is a flat electrode having a single material and a constant plate thickness. The surface thickness when the first high-frequency (2 MHz) current having a low frequency flows through the main surface of the upper susceptor electrode 16 is thick (the skin effect is small), and is almost from each position on the electrode main surface without being biased toward the center of the electrode. It is uniformly emitted into the plasma space PS. Thereby, the intensity distribution of the high frequency electric field formed on the susceptor 14 by the first high frequency (2 MHz) can be made substantially uniform in the electrode radial direction. Therefore, the amount of ions attracted to the semiconductor wafer W following the high-frequency electric field can be made uniform in each part of the wafer surface, and the anisotropic etching shape or selectivity in-plane uniformity can be improved. it can.

一方、下部サセプタ電極18は、上記のように電極主面(上面)にテーパ状の凹部を形成し、この凹部に誘電体28を埋め込んでいる。周波数が相当高くて表皮厚さの薄い(表皮効果の大きい)第2高周波(40MHz)の電流に対しては電極中心への集中を抑制する作用が効いて、電極主面の各位置からほぼ均一にプラズマ空間PSへ放出させる。これにより、第2高周波(40MHz)によってサセプタ14上に形成される高周波電界の強度分布を電極半径方向においてほぼ均一化することができる。よって、高周波電界による加速でプラズマ空間PS内のガス分子に衝突する高周波電流または電子電流の大きさひいてはプラズマの密度をウエハ直上で均一化させ、ひいてはエッチングレートの面内均一性を向上させることができる。   On the other hand, the lower susceptor electrode 18 has a tapered recess formed on the electrode main surface (upper surface) as described above, and the dielectric 28 is embedded in the recess. For the current of the second high frequency (40 MHz) with a considerably high frequency and a thin skin thickness (large skin effect), the action of suppressing the concentration at the center of the electrode works, and it is almost uniform from each position on the electrode main surface. To the plasma space PS. Thereby, the intensity distribution of the high frequency electric field formed on the susceptor 14 by the second high frequency (40 MHz) can be made substantially uniform in the electrode radial direction. Therefore, the magnitude of the high-frequency current or electron current that collides with gas molecules in the plasma space PS due to acceleration by the high-frequency electric field, and hence the plasma density, can be made uniform directly on the wafer, and the in-plane uniformity of the etching rate can be improved. it can.

なお、下部サセプタ電極18からプラズマ空間PSに向って高周波電流が放出されるに際して、上部サセプタ電極16にうず電流が流れ、このうず電流によって生成される磁界が下部サセプタ電極18からの高周波の直進を妨げるように働く。このことから、この実施形態では、上部サセプタ電極16を抵抗率の高い材質で構成することで、うず電流を抑制し、下部サセプタ電極18からプラズマ空間PSに向って放出される高周波が上部サセプタ電極16で受ける影響を少なくしている。   When a high-frequency current is emitted from the lower susceptor electrode 18 toward the plasma space PS, an eddy current flows through the upper susceptor electrode 16, and a magnetic field generated by this eddy current causes high-frequency straight travel from the lower susceptor electrode 18. Work to hinder. Therefore, in this embodiment, the upper susceptor electrode 16 is made of a material having a high resistivity to suppress the eddy current, and the high frequency emitted from the lower susceptor electrode 18 toward the plasma space PS is increased. 16 is less affected.

以上、本発明の好適な実施形態について説明したが、上述した実施形態は本発明を限定するものではない。当業者にあっては、具体的な実施態様において本発明の技術思想および技術範囲から逸脱せずに種々の変形・変更を加えることが可能である。   As mentioned above, although preferred embodiment of this invention was described, embodiment mentioned above does not limit this invention. Those skilled in the art can make various modifications and changes in specific embodiments without departing from the technical idea and technical scope of the present invention.

たとえば、上記した実施形態における下部サセプタ電極18の電極構造は一例にすぎない。下部サセプタ電極18においては、電極径方向における電界強度ないしプラズマ密度の均一性を向上させるためにたとえば上記特許文献1に開示されるような種々の電極構造を採ることが可能であり、特に本発明においては上部サセプタ電極16から独立しているので、一層自由な電極構造を採ることが可能である。   For example, the electrode structure of the lower susceptor electrode 18 in the above-described embodiment is merely an example. The lower susceptor electrode 18 can employ various electrode structures as disclosed in, for example, the above-mentioned Patent Document 1 in order to improve the uniformity of the electric field strength or plasma density in the electrode radial direction. Is independent of the upper susceptor electrode 16, it is possible to adopt a more free electrode structure.

たとえば、図2に示すように、下部サセプタ電極18をリング状に形成し、下部サセプタ電極18よりプラズマ空間PSに向って放出させる第2高周波を電極中心部で相対的かつ積極的に弱める構成とすることも可能である。また、下部サセプタ電極18をこのようにリング状に形成することで、上部サセプタ電極16に接続する給電棒26を下部サセプタ電極18の中心開口に通すこともできる。この場合、給電棒26と下部サセプタ電極18の内周面との間の隙間を円筒状の絶縁体78で塞いでよい。   For example, as shown in FIG. 2, the lower susceptor electrode 18 is formed in a ring shape, and the second high frequency emitted from the lower susceptor electrode 18 toward the plasma space PS is relatively weakened relatively and actively at the center of the electrode. It is also possible to do. Further, by forming the lower susceptor electrode 18 like this in a ring shape, the power feeding rod 26 connected to the upper susceptor electrode 16 can be passed through the central opening of the lower susceptor electrode 18. In this case, the gap between the power supply rod 26 and the inner peripheral surface of the lower susceptor electrode 18 may be closed with a cylindrical insulator 78.

また、本発明は上部電極側に高周波を印加する方式にも適用可能である。たとえば、図3に示す変形例は、上部電極80およびサセプタ(下部電極)82に周波数の異なる高周波をそれぞれ印加する方式の容量結合型プラズマエッチング装置において、上部電極80に本発明を応用したものである。この上部電極80は、プラズマ空間PSを挟んで直下のサセプタ82と対向する第1上部電極84と、この第1上部電極84の背後または上方に配置されている第2上部電極86とを有している。   The present invention can also be applied to a method of applying a high frequency to the upper electrode side. For example, the modification shown in FIG. 3 is an application of the present invention to the upper electrode 80 in a capacitively coupled plasma etching apparatus that applies high frequencies having different frequencies to the upper electrode 80 and the susceptor (lower electrode) 82. is there. The upper electrode 80 includes a first upper electrode 84 facing the susceptor 82 directly below the plasma space PS, and a second upper electrode 86 disposed behind or above the first upper electrode 84. ing.

より詳細には、第1上部電極84は、シャワーヘッドを兼ねた電極構造を有しており、リング状の誘電体88によってチャンバ90から電気的に絶縁された状態つまりフローティング状態で取り付けられている。この第1上部電極84には可変直流電源92より直流電圧が印加される。また、第1上部電極84の内部またはガス室にはガス供給管60を介して処理ガス供給源62が接続される。   More specifically, the first upper electrode 84 has an electrode structure that also serves as a shower head, and is attached in a state of being electrically insulated from the chamber 90 by a ring-shaped dielectric 88, that is, in a floating state. . A DC voltage is applied to the first upper electrode 84 from a variable DC power source 92. A processing gas supply source 62 is connected to the inside of the first upper electrode 84 or the gas chamber via a gas supply pipe 60.

第2上部電極86は、上記実施形態における下部サセプタ電極18と同様の電極構造を有するものでよく、逆さの向きで(下方を向いて)配置される。また、周囲を絶縁体94で囲まれており、第1上部電極84やチャンバ90から電気的に絶縁されている。この第2上部電極86には高周波電源96より整合器(図示せず)を介してプラズマ生成用の高周波(たとえば60MHz)が印加される。   The second upper electrode 86 may have an electrode structure similar to that of the lower susceptor electrode 18 in the above embodiment, and is arranged in an inverted direction (facing downward). The periphery is surrounded by an insulator 94 and is electrically insulated from the first upper electrode 84 and the chamber 90. A high frequency (eg, 60 MHz) for plasma generation is applied to the second upper electrode 86 from a high frequency power source 96 through a matching unit (not shown).

サセプタ82は、通常の円板形に形成され、その上面に半導体ウエハWを保持する電極構造を有しており、高周波電源98より整合器(図示せず)を介してイオン引き込み用の高周波(たとえば13.56MHz)を印加される。   The susceptor 82 is formed in a normal disk shape, and has an electrode structure for holding the semiconductor wafer W on the upper surface thereof. The susceptor 82 has a high frequency for ion attraction (not shown) from a high frequency power source 98 via a matching unit (not shown). For example, 13.56 MHz) is applied.

このプラズマエッチング装置においては、第2上部電極86よりプラズマ空間PSに向けて放出される高周波(60MHz)によって電極半径方向において均一化されたプラズマを生成することができる。また、プラズマ生成用の高周波(60MHz)から独立してサセプタ82よりプラズマ空間PSに向けて放出される高周波(13.56MHz)によって電極半径方向においてほぼ均一に半導体ウエハWにイオンを引き込むことができる。   In this plasma etching apparatus, plasma made uniform in the electrode radial direction can be generated by the high frequency (60 MHz) emitted from the second upper electrode 86 toward the plasma space PS. Further, ions can be drawn into the semiconductor wafer W almost uniformly in the radial direction of the electrode by the high frequency (13.56 MHz) emitted from the susceptor 82 toward the plasma space PS independently of the high frequency for plasma generation (60 MHz). .

第1上部電極86は、上記した実施形態と同様に、たとえばタングステンやシリコンなどの高抵抗率の材質からなり、第2上部電極86からプラズマ空間PSに向う高周波(60MHz)を妨害しないようにしてよい。また、直流電源92より印加される直流電圧により、たとえばプラズマに種々の作用(たとえばプラズマポテンシャルを制御する作用、プラズマ密度を上昇させる作用)を加えることができる。   The first upper electrode 86 is made of a material having a high resistivity such as tungsten or silicon, as in the above-described embodiment, and does not interfere with the high frequency (60 MHz) from the second upper electrode 86 toward the plasma space PS. Good. Further, various actions (for example, an action for controlling the plasma potential and an action for increasing the plasma density) can be applied to the plasma by the DC voltage applied from the DC power supply 92.

本発明は、上記実施形態のようなプラズマエッチングに限定されず、プラズマCVD、プラズマ酸化、プラズマ窒化、スパッタリングなどの他のプラズマ処理にも適用可能である。また、本発明における被処理基板は半導体ウエハに限るものではなく、フラットパネルディスプレイ用の基板や、フォトマスク、CD基板、プリント基板等も可能である。   The present invention is not limited to plasma etching as in the above embodiment, but can be applied to other plasma processes such as plasma CVD, plasma oxidation, plasma nitridation, and sputtering. In addition, the substrate to be processed in the present invention is not limited to a semiconductor wafer, and a flat panel display substrate, a photomask, a CD substrate, a printed substrate, and the like are also possible.

10 チャンバ
14 サセプタ
16 上部サセプタ電極
18 下部サセプタ電極
22 第1高周波電源
30,32 絶縁体
34 第2高周波電源
52 上部電極(シャワーヘッド)
62 処理ガス供給源
80 上部電極
82 サセプタ
84 第1上部電極
86 第2上部電極
90 チャンバ
92 可変直流電源
96,98 高周波電源
10 Chamber 14 Susceptor 16 Upper susceptor electrode 18 Lower susceptor electrode
22 First high frequency power source 30, 32 Insulator 34 Second high frequency power source 52 Upper electrode (shower head)
62 Processing gas supply source 80 Upper electrode 82 Susceptor 84 First upper electrode 86 Second upper electrode 90 Chamber 92 Variable DC power supply 96, 98 High frequency power supply

Claims (6)

真空排気可能な処理容器と、
前記処理容器内でプラズマ空間に臨むように配置される第1の電極と、
前記プラズマ空間側から見て前記第1の電極の背後に配置される第2の電極と、
前記プラズマ空間に所望の処理ガスを供給する処理ガス供給部と、
前記第1の電極に第1の高周波または直流を印加する第1の給電部と、
前記第2の電極に第2の高周波を印加する第2の給電部と
を有するプラズマ処理装置。
A processing container capable of being evacuated;
A first electrode arranged to face the plasma space in the processing vessel;
A second electrode disposed behind the first electrode when viewed from the plasma space side;
A processing gas supply unit for supplying a desired processing gas to the plasma space;
A first power feeding unit that applies a first high frequency or direct current to the first electrode;
A plasma processing apparatus, comprising: a second power supply unit that applies a second high frequency to the second electrode.
前記プラズマ空間を挟んで前記第1の電極の真向かいに平行に配置される第3の電極を有する、請求項1に記載のプラズマ処理装置。   2. The plasma processing apparatus according to claim 1, further comprising a third electrode disposed in parallel with and directly opposite to the first electrode across the plasma space. 前記第3の電極に第3の高周波を印加する第3の給電部を有する、請求項2に記載のプラズマ処理装置。   The plasma processing apparatus according to claim 2, further comprising a third power feeding unit that applies a third high frequency to the third electrode. 前記処理ガス供給部が、前記処理ガスをシャワー状に噴出するように前記第1の電極に設けられたシャワーヘッドを有する、請求項1〜3のいずれか一項に記載のプラズマ処理装置。   The plasma processing apparatus according to claim 1, wherein the processing gas supply unit includes a shower head provided on the first electrode so as to eject the processing gas in a shower shape. 前記第2の下部電極の主面に凹部が形成され、その凹部に誘電体が埋め込まれている、請求項1〜4のいずれか一項に記載のプラズマ処理装置。   The plasma processing apparatus according to any one of claims 1 to 4, wherein a recess is formed in a main surface of the second lower electrode, and a dielectric is embedded in the recess. 前記誘電体の厚さが電極中心部から電極エッジ部に向って次第に小さくなる、請求項5に記載のプラズマ処理装置。   The plasma processing apparatus according to claim 5, wherein a thickness of the dielectric gradually decreases from an electrode center portion toward an electrode edge portion.
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