JP2011171660A

JP2011171660A - Method of manufacturing electronic component

Info

Publication number: JP2011171660A
Application number: JP2010036274A
Authority: JP
Inventors: Yuki Ito; 由規伊藤; Katsutoshi Kawaharada; 克俊川原田
Original assignee: Oki Semiconductor Co Ltd
Current assignee: Lapis Semiconductor Co Ltd
Priority date: 2010-02-22
Filing date: 2010-02-22
Publication date: 2011-09-01

Abstract

<P>PROBLEM TO BE SOLVED: To easily form conductive sections such as bump, wiring, etc. <P>SOLUTION: The method of manufacturing electronic components includes a step for forming photoresists 20 and 22 on a substrate 10, a step for forming at a part of the photoresists 20 and 22 an opening 24 whose opening width on the lower part of an opening is larger than that on the upper part of the opening, a step for forming a film over a conductive section 26 on the exposed surface of the substrate 10 when viewed from the photoresist 22, and a step for removing the photoresists 20 and 22 and the conductive section 26 on the photoresist 22 respectively and leaving the conductive section 26 within the opening 24. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、電子部品の製造方法に関する。 The present invention relates to a method for manufacturing an electronic component.

従来の電子部品の製造方法では、基材上に導電部を成膜し、フォトリソグラフィ工程及びエッチング工程により所望のパターンのみ導電部を残すことにより、バンプや配線などを形成していた。 In a conventional method for manufacturing an electronic component, a conductive part is formed on a base material, and only a desired pattern is left by a photolithography process and an etching process, thereby forming bumps and wirings.

他にも、上記バンプの形成方法としては、例えばプリント配線板に形成された導電性回路の電極表面に粘着性を付与し、当該電極表面にハンダ粉末を付着・溶融して形成する方法がある（特許文献１参照）。 In addition, as a method for forming the bump, for example, there is a method in which adhesiveness is imparted to the electrode surface of a conductive circuit formed on a printed wiring board, and solder powder is attached and melted on the electrode surface. (See Patent Document 1).

特開２００８−０４１８０３号公報JP 2008-041803 A

しかしながら、従来のエッチング工程を用いる電子部品の製造方法では、エッチングが困難な導電部を用いる場合には、バンプや配線などを容易に形成できない。 However, in a method for manufacturing an electronic component using a conventional etching process, bumps, wirings, and the like cannot be easily formed when a conductive portion that is difficult to etch is used.

また、特許文献１に記載のバンプの形成方法では、使用するハンダ粉末の径が７０μｍ程度とされており、例えばＬＳＩチップ等で要求される微細なバンプ（１０μｍ程度）には、寸法上適用できない。ここで、微細なハンダ粉末を用いれば微細なバンプを形成できる、とも考えられる。しかし、微細なハンダ粉末は、静電気力の影響を大きく受けるため選択性が阻害され、目的とする電極表面以外の部分にも容易に付着する一方で、目的とする電極表面に付着させづらいという問題があり、バンプを容易に形成できない。 Further, in the bump forming method described in Patent Document 1, the diameter of the solder powder to be used is about 70 μm, and cannot be applied to the fine bumps (about 10 μm) required for LSI chips, for example, due to the dimensions. . Here, it is considered that fine bumps can be formed by using fine solder powder. However, the fine solder powder is greatly affected by the electrostatic force, so the selectivity is hindered and it easily adheres to parts other than the target electrode surface, but it is difficult to adhere to the target electrode surface. And bumps cannot be easily formed.

本発明は上記事実を考慮し、バンプや配線などの導電部を容易に形成することが可能な電子部品の製造方法を提供することを目的とする。 In consideration of the above-described facts, an object of the present invention is to provide a method of manufacturing an electronic component that can easily form conductive portions such as bumps and wirings.

本発明の第１態様に係る電子部品の製造方法は、基材上にレジストを形成する工程と、前記レジストの一部に、開口の下部における開口幅が前記開口の上部における開口幅よりも広い開口部を形成する工程と、前記基材の前記レジストから見た露出面上に導電部を成膜する工程と、前記レジスト、及び前記レジスト上の前記導電部をそれぞれ除去し、前記開口部内の前記導電部を残す工程と、を有する。
この製造方法によれば、レジストの開口部において、その開口の下部における開口幅が、その開口の上部における開口幅よりも広くされるため、導電部を成膜する工程の際、レジストとレジストの開口部内の導電部が連結しない。このため、レジスト等を除去する工程が容易となり、もってバンプや配線などの導電部を容易に形成することができる。 The method of manufacturing an electronic component according to the first aspect of the present invention includes a step of forming a resist on a base material, and an opening width at a lower portion of the opening is wider than an opening width at an upper portion of the opening. A step of forming an opening; a step of forming a conductive portion on an exposed surface of the base material as viewed from the resist; and removing the resist and the conductive portion on the resist, respectively, Leaving the conductive portion.
According to this manufacturing method, since the opening width at the lower part of the opening is wider than the opening width at the upper part of the opening in the opening of the resist, the resist and the resist are formed in the process of forming the conductive part. The conductive part in the opening is not connected. For this reason, the process of removing the resist or the like is facilitated, and thus conductive portions such as bumps and wirings can be easily formed.

本発明の第２態様に係る電子部品の製造方法は、前記レジストを形成する工程の前に、前記基材上に複数の電極を形成する工程と、前記基材上及び各電極上に絶縁膜を形成する工程と、前記絶縁膜に、前記各電極が露出する開口部を形成する工程と、を有し、前記レジストを形成する工程では、前記絶縁膜の開口部から露出する各電極上及び前記絶縁膜上に前記レジストを形成し、前記レジストの開口部を形成する工程では、前記各電極上の前記レジストを開口し、前記各電極を露出させ、かつ、前記レジストの開口部の上部開口の開口幅が、前記絶縁膜の開口部の開口幅以下となるように、前記レジストの開口部を形成する。
この製造方法によれば、レジストの開口部の上部開口の開口幅が、絶縁膜の開口部の開口幅以下とされるため、レジストの開口部及び絶縁膜の開口部から露出する各電極上には、絶縁膜の開口部の開口幅よりも全体にわたって幅が狭い導電部が形成される。 The method of manufacturing an electronic component according to the second aspect of the present invention includes a step of forming a plurality of electrodes on the base material before the step of forming the resist, and an insulating film on the base material and each electrode. And forming an opening through which the electrodes are exposed in the insulating film. In the step of forming the resist, each of the electrodes exposed from the opening of the insulating film and In the step of forming the resist on the insulating film and forming the opening of the resist, the resist on the electrodes is opened, the electrodes are exposed, and an upper opening of the opening of the resist The opening portion of the resist is formed so that the opening width is equal to or smaller than the opening width of the opening portion of the insulating film.
According to this manufacturing method, since the opening width of the upper opening of the resist opening is equal to or smaller than the opening width of the opening of the insulating film, the resist is exposed on each electrode exposed from the opening of the insulating film and the opening of the insulating film. A conductive portion having a width that is narrower than the entire opening width of the opening portion of the insulating film is formed.

本発明の第３態様に係る電子部品の製造方法は、前記導電部を成膜する工程では、前記絶縁膜の開口部の開口幅よりも幅が狭い前記導電部としてのバンプ部材を、前記レジストの開口部及び前記絶縁膜の開口部から露出する各電極上に形成する。
このように、バンプ部材は、絶縁膜の開口部の開口幅よりも幅が狭く形成される。このため、バンプ部材間が狭いピッチでも、電子部品の貼り合わせの際に、バンプ部材同士の接触を抑制し、信頼性の高い電子部品の貼り合わせが実現できる。 In the method of manufacturing an electronic component according to the third aspect of the present invention, in the step of forming the conductive portion, the bump member serving as the conductive portion that is narrower than the opening width of the opening portion of the insulating film is used as the resist. And on each electrode exposed from the opening of the insulating film.
As described above, the bump member is formed to be narrower than the opening width of the opening of the insulating film. For this reason, even when the pitch between the bump members is narrow, the contact between the bump members can be suppressed when the electronic components are bonded together, and the bonding of the highly reliable electronic components can be realized.

本発明の第４態様に係る電子部品の製造方法は、前記導電部を成膜する工程では、前記バンプ部材を、上部に向かって幅が狭いテーパー状に形成する。
このように、バンプ部材は、上部に向かって幅が狭いテーパー状に形成される。このため、バンプ部材間が狭いピッチでも、電子部品の貼り合わせの際に、バンプ部材同士の接触を抑制し、信頼性の高い電子部品の貼り合わせが実現できる。 In the method of manufacturing an electronic component according to the fourth aspect of the present invention, in the step of forming the conductive portion, the bump member is formed in a tapered shape having a narrow width toward the top.
As described above, the bump member is formed in a tapered shape having a narrow width toward the top. For this reason, even when the pitch between the bump members is narrow, the contact between the bump members can be suppressed when the electronic components are bonded together, and the bonding of the highly reliable electronic components can be realized.

本発明の第５態様に係る電子部品の製造方法は、前記導電部を成膜する工程では、一方向に向かって成膜する成膜手法を用いて前記バンプ部材を形成する。
このように、導電部を成膜する工程では、一方向に向かって成膜する成膜手法を用いれば、絶縁膜の開口部の隅に導電部が成膜されることを防止でき、絶縁膜の開口部の開口幅よりも幅が狭いバンプ部材を容易に形成することができる。また各電極上の中心部に導電部を多く堆積することができ、上部に向かって幅が狭いテーパー状にバンプ部材を形成することができる。 In the method for manufacturing an electronic component according to the fifth aspect of the present invention, in the step of forming the conductive portion, the bump member is formed using a film forming method of forming a film in one direction.
As described above, in the step of forming the conductive portion, if a film forming method for forming the film in one direction is used, the conductive portion can be prevented from being formed at the corner of the opening of the insulating film. A bump member having a narrower width than the opening width of the opening can be easily formed. In addition, a large number of conductive portions can be deposited at the center on each electrode, and the bump member can be formed in a tapered shape with a narrow width toward the top.

本発明の第６態様に係る電子部品の製造方法は、前記レジストを形成する工程では、第１レジストと、第１レジストよりも現像速度が遅い第２レジストを、基板上に順次形成し、
前記レジストの開口部を形成する工程では、前記第１レジスト及び前記第２レジストの一部を開口し、前記第１レジストの開口の開口幅が前記第２レジストの開口の開口幅よりも広い前記レジストの開口部を形成する。
このように、レジストを形成する工程では、第１レジストと、第１レジストよりも現像速度が遅い第２レジストを、基板上に順次形成し、レジストの開口部を形成する工程では、第１レジスト及び第２レジストの一部を開口し、第１レジストの開口の開口幅が第２レジストの開口の開口幅よりも広いレジストの開口部を形成することができる。 In the method of manufacturing an electronic component according to a sixth aspect of the present invention, in the step of forming the resist, a first resist and a second resist having a slower development speed than the first resist are sequentially formed on the substrate,
In the step of forming the opening of the resist, a part of the first resist and the second resist is opened, and the opening width of the opening of the first resist is wider than the opening width of the opening of the second resist. A resist opening is formed.
As described above, in the step of forming the resist, the first resist and the second resist having a slower development speed than the first resist are sequentially formed on the substrate, and in the step of forming the resist opening, the first resist In addition, a part of the second resist is opened, and an opening of the resist in which the opening width of the opening of the first resist is wider than the opening width of the opening of the second resist can be formed.

本発明は、上記構成としたので、バンプや配線を容易に形成することが可能な電子部品又は電子部品の製造方法を提供することができた。 Since the present invention has the above-described configuration, it is possible to provide an electronic component or a method of manufacturing an electronic component that can easily form bumps and wirings.

本発明の第１実施形態に係る電子部品の製造方法の製造手順を示す図である。It is a figure which shows the manufacture procedure of the manufacturing method of the electronic component which concerns on 1st Embodiment of this invention. 図１に示す製造手順の続きの製造手順を示す図であって、（Ａ）は電子部品の一部同士を貼り合せる前の電子部品の断面図であり、（Ｂ）は電子部品の一部同士を貼り合せた後の電子部品の断面図である。It is a figure which shows the manufacturing procedure following the manufacturing procedure shown in FIG. 1, Comprising: (A) is sectional drawing of the electronic component before bonding some electronic components together, (B) is a part of electronic components It is sectional drawing of the electronic component after bonding together. 従来の電子部品の製造方法の製造手順を示す図であり、（Ａ）は電子部品の一部同士を貼り合せる前の電子部品の断面図であり、（Ｂ）は電子部品の一部同士を貼り合せた後の電子部品の断面図である。It is a figure which shows the manufacturing procedure of the manufacturing method of the conventional electronic component, (A) is sectional drawing of the electronic component before bonding some electronic components together, (B) is some electronic components. It is sectional drawing of the electronic component after bonding. 本発明の第２実施形態に係る電子部品の製造方法の製造手順を示す図である。It is a figure which shows the manufacture procedure of the manufacturing method of the electronic component which concerns on 2nd Embodiment of this invention.

（第１実施形態）
以下、本発明の第１実施形態に係る電子部品の製造方法について図面に基づき説明する。図１は、本発明の第１実施形態に係る電子部品の製造方法の製造手順を示す図である。 (First embodiment)
Hereinafter, an electronic component manufacturing method according to a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a manufacturing procedure of an electronic component manufacturing method according to the first embodiment of the present invention.

−製造方法−
本発明の第１実施形態に係る電子部品の製造方法においては、まず、図１（Ａ）に示すように、基材１０を用意する。この基材１０の種類は、特に限定されないが、例えばシリコンなどの半導体からなる支持基板１２と、支持基板１２上に形成されたトランジスタや回路を含む下地層１３と、を有する半導体基板１０である。 -Manufacturing method-
In the method for manufacturing an electronic component according to the first embodiment of the present invention, first, a base material 10 is prepared as shown in FIG. Although the kind of this base material 10 is not specifically limited, For example, it is the semiconductor substrate 10 which has the support substrate 12 which consists of semiconductors, such as a silicon | silicone, and the base layer 13 containing the transistor and circuit which were formed on the support substrate 12. .

１．電極形成工程
続いて、半導体基板１０の下地層１３上に、真空蒸着法を用いて導電部を成膜し、当該導電部をフォトリソグラフィ工程及びエッチング工程で加工して、複数の電極１４を形成する。
導電部の成膜方法としては、例えば、印刷方式、コーティング方式等の湿式方式、真空蒸着法、スパッタリング法、イオンプレーティング法等の物理的方式、ＣＶＤ、プラズマＣＶＤ法等の化学的方式などの中から使用する材料との適性を考慮して適宜選択し得る。
また、電極１４の材料としては、導電体であれば、特に限定はされないが、例えば、Ａｌ，Ｍｏ，Ｃｒ，Ｔａ，Ｔｉ，Ａｕ，Ａｇなどの金属、Ａｌ−Ｎｄ、ＡＰＣなどの合金、酸化錫、酸化亜鉛、酸化インジウム、酸化インジウム錫（ＩＴＯ）、酸化亜鉛インジウム（ＩＺＯ）等の金属酸化物導電膜等が挙げられる。 1. Electrode Forming Step Subsequently, a conductive portion is formed on the base layer 13 of the semiconductor substrate 10 using a vacuum deposition method, and the conductive portion is processed by a photolithography step and an etching step to form a plurality of electrodes 14. To do.
As a method for forming the conductive portion, for example, a wet method such as a printing method or a coating method, a physical method such as a vacuum deposition method, a sputtering method, or an ion plating method, or a chemical method such as CVD or plasma CVD method may be used. It can be appropriately selected in consideration of suitability with the material to be used.
The material of the electrode 14 is not particularly limited as long as it is a conductor. For example, metals such as Al, Mo, Cr, Ta, Ti, Au, and Ag, alloys such as Al—Nd and APC, and oxidation Examples thereof include metal oxide conductive films such as tin, zinc oxide, indium oxide, indium tin oxide (ITO), and zinc indium oxide (IZO).

２．絶縁膜形成工程
そして、下地層１３及び各電極１４の上に、絶縁膜１６を形成する。
絶縁膜１６は、絶縁性を有するものとし、例えば、ＳｉＯ_２，ＳｉＮ_ｘ，ＳｉＯＮ，Ａｌ_２Ｏ_３，Ｙ_２Ｏ_３，Ｔａ_２Ｏ_５，ＨｆＯ_２等の絶縁膜、又はこれらの化合物を二つ以上含む絶縁膜としてもよい。絶縁膜１６も、印刷方式、コーティング方式等の湿式方式、真空蒸着法、スパッタリング法、イオンプレーティング法等の物理的方式、ＣＶＤ、プラズマＣＶＤ法等の化学的方式、などの中から使用する材料との適性を考慮して適宜選択した方法に従って成膜し、必要に応じてフォトリソグラフィ法によって所定の形状にパターニングを行う。
３．絶縁膜の開口部形成工程
この絶縁膜１６を形成した後は、フォトリソグラフィ工程及びエッチング工程を用いて各電極１４上の絶縁膜１６を開口し、各電極１４が露出する開口幅Ｌ１の開口部１８を形成する。この開口部１８の形状は、例えば略円形状の穴である。 2. Insulating Film Formation Step Then, an insulating film 16 is formed on the base layer 13 and each electrode 14.
The insulating film 16 has insulating properties, and for example, an insulating film such as SiO ₂ , SiN _x , SiON, Al ₂ O ₃ , Y ₂ O ₃ , Ta ₂ O ₅ , HfO ₂ , or a compound of these is used. An insulating film including two or more may be used. The insulating film 16 is also a material used from a wet method such as a printing method or a coating method, a physical method such as a vacuum deposition method, a sputtering method or an ion plating method, or a chemical method such as a CVD or plasma CVD method. The film is formed in accordance with a method selected in consideration of the suitability of the film and patterned into a predetermined shape by a photolithography method as necessary.
3. Insulating Film Opening Formation Step After the insulating film 16 is formed, the insulating film 16 on each electrode 14 is opened using a photolithography process and an etching process, and an opening having an opening width L1 from which each electrode 14 is exposed. 18 is formed. The shape of the opening 18 is, for example, a substantially circular hole.

４．レジスト形成工程
次に、図１（Ｂ）に示すように、絶縁膜１６上及び各電極１４の露出面上に、現像速度の異なる２種のフォトレジスト２０，２２を順次塗布又は吹き付ける。具体的には、フォトレジスト２２よりも現像速度が速いフォトレジスト２０と、フォトレジスト２０よりも現像速度が遅いフォトレジスト２２を順次塗布又は吹き付ける。
現像速度が速いフォトレジスト２０の材料としては、ＰｒｏＬＩＦＴシリーズ（日産化学工業製）などが挙げられる。現像速度が遅いフォトレジスト２２の材料としては、例えばＴＤＭＲ−ＡＲシリーズやＴＨＭＲ−ｉＰ／ｉＮシリーズ（東京応化工業製）などが挙げられる。 4). Next, as shown in FIG. 1B, two types of photoresists 20 and 22 having different development speeds are sequentially applied or sprayed on the insulating film 16 and the exposed surfaces of the electrodes 14. Specifically, a photoresist 20 having a higher development speed than the photoresist 22 and a photoresist 22 having a lower development speed than the photoresist 20 are sequentially applied or sprayed.
Examples of the material of the photoresist 20 having a high development speed include the ProLIFT series (manufactured by Nissan Chemical Industries). Examples of the material of the photoresist 22 having a low development speed include the TDMR-AR series and the THMR-iP / iN series (manufactured by Tokyo Ohka Kogyo Co., Ltd.).

以上のフォトレジスト２０，２２を塗布することにより、絶縁膜１６上及び各電極１４の露出面上には、フォトレジスト２０の一様な層とフォトレジスト２２の一様な層の２層構造からなるレジストが形成される。なお、塗布されるフォトレジスト２０、２２の厚さは、要求される後述のバンプの高さに応じて決定される。 By applying the photoresists 20 and 22, the two-layer structure of the uniform layer of the photoresist 20 and the uniform layer of the photoresist 22 is formed on the insulating film 16 and the exposed surface of each electrode 14. A resist is formed. Note that the thicknesses of the applied photoresists 20 and 22 are determined according to the required bump height described later.

５．レジストの開口部形成工程
次に、図１（Ｃ）に示すように、所定の露光・現像装置により、各電極１４上のフォトレジスト２０，２２を開口し、各電極１４が露出する開口部２４を形成する。具体的には、開口部２４のうちフォトレジスト２２の開口の開口幅Ｌ３が、開口部１８の開口幅Ｌ１以下となるように、開口部２４を形成する。より具体的には、後述の微細なバンプ部材２８を形成するために、フォトレジスト２２の開口の開口幅Ｌ３が、１０μｍ以下とされ、好ましくは５μｍ以下、より好ましくは４μｍ程度となるように、開口部２４を形成する。
この露光・現像工程の結果、形成された開口部２４のうち、フォトレジスト２０の開口の開口幅Ｌ２は、フォトレジスト２０の材料がフォトレジスト２２のものよりも現像速度が速いため、フォトレジスト２２の開口の開口幅Ｌ３よりも広くなるとともに、開口部１８の開口幅Ｌ１よりも広くなる。 5. Next, as shown in FIG. 1C, the photoresists 20 and 22 on the electrodes 14 are opened by a predetermined exposure / development apparatus, and the openings 24 through which the electrodes 14 are exposed. Form. Specifically, the opening 24 is formed so that the opening width L3 of the opening of the photoresist 22 in the opening 24 is equal to or smaller than the opening width L1 of the opening 18. More specifically, in order to form a fine bump member 28 described later, the opening width L3 of the opening of the photoresist 22 is set to 10 μm or less, preferably 5 μm or less, more preferably about 4 μm. Opening 24 is formed.
As a result of this exposure / development process, the opening width L2 of the opening of the photoresist 20 among the formed openings 24 has a higher development speed than the material of the photoresist 22 because the material of the photoresist 20 is faster. And the opening width L3 of the opening 18 is wider than the opening width L3 of the opening 18.

６．導電部成膜工程
次に、図１（Ｄ）に示すように、半導体基板１０上のフォトレジスト２２から見た露出面上に導電部２６を成膜する。具体的には、一方向に向かって成膜する成膜手法を用いて、フォトレジスト２２上及び各電極１４上に、導電部２６を成膜する。 6). Next, as shown in FIG. 1D, a conductive portion 26 is formed on the exposed surface of the semiconductor substrate 10 as viewed from the photoresist 22. Specifically, the conductive portion 26 is formed on the photoresist 22 and each electrode 14 by using a film formation method for forming the film in one direction.

成膜する導電部２６の材料としては、融点の低い材料、特に金属が挙げられ、例えばインジウムやアルミニウムなどが挙げられる。 Examples of the material of the conductive portion 26 to be formed include a material having a low melting point, particularly a metal, such as indium and aluminum.

ここで、上述の「一方向に向かって成膜する成膜手法」とは、例えばステップカバレージの低い蒸着法やスパッタ法などが挙げられる。 Here, examples of the above-described “film formation method for forming a film in one direction” include an evaporation method and a sputtering method with low step coverage.

このような一方向に向かって成膜する成膜手法によって成膜した結果、開口部２４，１８から露出する各電極１４上には、開口部２４の上部の開口、すなわちフォトレジスト２２側の開口の開口幅Ｌ３が、開口部１８の開口幅Ｌ１以下であるため、導電部２６からなり、開口部１８の開口幅Ｌ１よりも幅が狭いバンプ部材２８が形成される。
また、このバンプ部材２８は、導電部２６の成膜方向が一方向であるために、電極１４上の中心部に導電部が多く堆積されて、上部に向かって幅が狭くされたテーパー状となる。
また、開口部２４のうち、下部にあるフォトレジスト２０の開口の開口幅Ｌ２が、上部にあるフォトレジスト２２の開口の開口幅Ｌ３よりも広いため、成膜の際、フォトレジスト２０と導電部２６が連結することなく、バンプ部材２８が形成される。
また、フォトレジスト２２の開口の開口幅Ｌ３が、１０μｍ以下とされ、好ましくは５μｍ以下、より好ましくは４μｍ程度であるため、開口幅Ｌ３と同程度の幅を有した微細なバンプ部材２８が形成される。 As a result of film formation by such a film formation method for forming a film in one direction, an opening above the opening 24, that is, an opening on the photoresist 22 side is formed on each electrode 14 exposed from the openings 24 and 18. Since the opening width L3 of the opening portion 18 is equal to or smaller than the opening width L1 of the opening portion 18, the bump member 28 made of the conductive portion 26 and narrower than the opening width L1 of the opening portion 18 is formed.
The bump member 28 has a taper shape in which the conductive portion 26 is formed in one direction, so that a large number of conductive portions are deposited at the center on the electrode 14 and the width is narrowed toward the upper portion. Become.
Moreover, since the opening width L2 of the opening of the photoresist 20 in the lower part of the opening 24 is wider than the opening width L3 of the opening of the photoresist 22 in the upper part, the photoresist 20 and the conductive part are formed during film formation. Bump member 28 is formed without connecting 26.
Further, since the opening width L3 of the opening of the photoresist 22 is set to 10 μm or less, preferably 5 μm or less, more preferably about 4 μm, a fine bump member 28 having the same width as the opening width L3 is formed. Is done.

なお、バンプ部材２８の高さ調整は、例えば蒸着やスパッタの膜厚の変更で任意に調整することができる。 The height of the bump member 28 can be arbitrarily adjusted, for example, by changing the film thickness of vapor deposition or sputtering.

７．リフトオフ工程
次に、図１（Ｅ）に示すように、リフトオフ工程を行う。すなわち、リフトオフ装置を用いて、フォトレジスト２０，２２及びフォトレジスト２２上の導電部２６をそれぞれ除去し（リフトオフ）、開口部１８内にある導電部２６（バンプ部材２８）を残すようにする。この結果、基材１０上にバンプ部材２８を有する電子部品の一部３０を得ることができる。 7). Lift-off process Next, as shown in FIG. 1E, a lift-off process is performed. That is, using the lift-off device, the photoresists 20 and 22 and the conductive portion 26 on the photoresist 22 are removed (lift-off), and the conductive portion 26 (bump member 28) in the opening 18 is left. As a result, a part 30 of the electronic component having the bump member 28 on the substrate 10 can be obtained.

最後に、図２（Ａ）及び図２（Ｂ）に示すように、本発明の第１実施形態に係る電子部品の製造方法により得られた電子部品の一部３０と、電子部品の一部３０と同じ製造方法で製造した電子部品の他の一部４０とを、互いのバンプ部材２８が対向するように接触させて、バンプ部材２８を溶融（リフロー）する。これにより、電子部品の一部３０と電子部品の他の一部４０が貼り合わせられて、電子部品５０が完成する。 Finally, as shown in FIG. 2A and FIG. 2B, a part 30 of the electronic component obtained by the electronic component manufacturing method according to the first embodiment of the present invention, and a part of the electronic part The other part 40 of the electronic component manufactured by the same manufacturing method as 30 is brought into contact so that the bump members 28 face each other, and the bump members 28 are melted (reflowed). Thereby, the part 30 of the electronic component and the other part 40 of the electronic component are bonded together to complete the electronic component 50.

−作用−
以上、本発明の第１実施形態の電子部品５０の製造方法によれば、開口部２４のうち、下部にあるフォトレジスト２０の開口の開口幅Ｌ２が、上部にあるフォトレジスト２２の開口の開口幅Ｌ３よりも広いため、成膜の際、フォトレジスト２０と導電部２６が連結することなく、バンプ部材２８が形成される。
ここで、フォトレジスト２０と導電部２６が連結しており、特に微細なバンプ部材２８を形成する比較例では、形成されるべきバンプ部材２８の一部又は全部が後工程である導電部２６のリフトオフ工程においてフォトレジスト２０，２２と一緒に除去されるなどの虞がある。
しかし、本第１実施形態では、フォトレジスト２０と導電部２６が連結していないため、上記リフトオフ工程が容易となり、もって各電極１４上にバンプ部材２８を容易に形成することができる。 -Action-
As described above, according to the method for manufacturing the electronic component 50 of the first embodiment of the present invention, the opening width L2 of the opening of the photoresist 20 in the lower part of the opening 24 is the opening of the opening of the photoresist 22 in the upper part. Since the width is larger than the width L3, the bump member 28 is formed without connecting the photoresist 20 and the conductive portion 26 during film formation.
Here, in the comparative example in which the photoresist 20 and the conductive portion 26 are connected, and particularly the fine bump member 28 is formed, part or all of the bump member 28 to be formed is a post-process of the conductive portion 26. In the lift-off process, it may be removed together with the photoresists 20 and 22.
However, in the first embodiment, since the photoresist 20 and the conductive portion 26 are not connected, the lift-off process is facilitated, and the bump member 28 can be easily formed on each electrode 14.

また、図３（Ａ）に示す比較例に係る電子部品の製造方法では、バンプ部材６０の材料（導電部）が、絶縁膜１６の開口部１８を塞ぎ、又は／及び、バンプ部材６０の形状が、上部に向かって鉛直に延びる形状となる。このようなバンプ部材６０を半導体基板１０上に備えた電子部品の一部７０と、電子部品の他の一部８０を貼り合せると、図３（Ｂ）に示すように、バンプ部材６０間で互いに接触することのないように、バンプ部材６０間のピッチを広げていた。 3A, the material (conductive portion) of the bump member 60 closes the opening 18 of the insulating film 16 and / or the shape of the bump member 60. In the method of manufacturing the electronic component according to the comparative example shown in FIG. However, it becomes the shape extended perpendicularly | vertically toward an upper part. When a part 70 of the electronic component provided with such a bump member 60 on the semiconductor substrate 10 and another part 80 of the electronic component are bonded together, as shown in FIG. The pitch between the bump members 60 is widened so as not to contact each other.

しかし、本第１実施形態では、図２（Ａ）に示すように、バンプ部材２８は、絶縁膜１６の開口部１８の開口幅Ｌ１よりも全体にわたって幅が狭く、かつ、上部に向かって幅が狭くされたテーパー状である。このため、図２（Ｂ）に示すように、バンプ部材２８間が狭いピッチでも、電子部品の一部３０と他の一部４０との貼り合わせの際、バンプ部材２８同士の接触がなく、信頼性の高い貼り合わせが実現できる。 However, in the first embodiment, as shown in FIG. 2A, the bump member 28 is narrower in width than the opening width L1 of the opening 18 of the insulating film 16 and wide toward the top. Is a tapered taper. For this reason, as shown in FIG. 2B, even when the pitch between the bump members 28 is narrow, there is no contact between the bump members 28 when the electronic component part 30 and the other part 40 are bonded together. Highly reliable bonding can be realized.

以上の作用の結果、本第１実施形態では、例えば既存の半導体製造装置を用いて、微細のバンプ形成や寸法の異なるバンプ形成、挟ピッチのバンプ間ショートの無い信頼性の高いバンプ形成が可能となる。 As a result of the above operation, in the first embodiment, for example, an existing semiconductor manufacturing apparatus can be used to form a fine bump, to form a bump having a different size, or to form a highly reliable bump without a short-circuit between bumps at a narrow pitch. It becomes.

（第２実施形態）
次に、本発明の第２実施形態に係る電子部品の製造方法について図面に基づき説明する。図４は、本発明の第２実施形態に係る電子部品の製造方法の製造手順を示す図である。 (Second Embodiment)
Next, an electronic component manufacturing method according to a second embodiment of the present invention will be described with reference to the drawings. FIG. 4 is a diagram showing a manufacturing procedure of the electronic component manufacturing method according to the second embodiment of the present invention.

−製造方法−
１．電極、絶縁膜及び絶縁膜の開口部形成工程
本発明の第２実施形態に係る電子部品の製造方法においては、まず、図３（Ａ）と同様の工程である図４（Ａ）に示すように、基材１０上に、複数の電極１４と絶縁膜１６を形成し、絶縁膜１６に各電極１４が露出する開口幅Ｌ１の開口部１８を形成する。 -Manufacturing method-
1. Electrode, Insulating Film, and Insulating Film Opening Forming Process In the electronic component manufacturing method according to the second embodiment of the present invention, first, as shown in FIG. 4A, which is the same process as FIG. In addition, a plurality of electrodes 14 and an insulating film 16 are formed on the base material 10, and an opening 18 having an opening width L <b> 1 from which each electrode 14 is exposed is formed in the insulating film 16.

２．フォトレジスト形成工程
次に、図４（Ｂ）に示すように、絶縁膜１６上及び各電極１４の露出面上に、フォトレジスト１００を塗布又は吹き付ける。この時、後述の露光・現像時にフォトレジスト１００の下部（電極１４付近）が大きく開口されるように、フォトレジスト１００の材料又は露光条件を用いる。 2. Photoresist Formation Step Next, as shown in FIG. 4B, a photoresist 100 is applied or sprayed on the insulating film 16 and the exposed surfaces of the electrodes 14. At this time, the material of the photoresist 100 or the exposure conditions are used so that the lower portion of the photoresist 100 (in the vicinity of the electrode 14) is opened largely during exposure and development described later.

後述の露光・現像時にフォトレジスト１００の下部（電極１４付近）が大きく開口されるフォトレジスト１００の材料としては、ＴＬＯＲ−Ｐ００３ＨＰ（東京応化工業製）などが挙げられる。また、後述の露光・現像時にフォトレジスト１００の下部（電極１４付近）が大きく開口される露光条件としては、露光時間を十分長く設定するなど（ただし、レジスト膜厚で露光時間も異なる）が挙げられる。ただし、露光時間により開口寸法も異なり、露光時間が短いと開口寸法は小さくなり、長いと大きくなるので、それに合せてマスク寸法を決定する必要がある。
具体例としては、以下のような条件が挙げられる。
レジスト材料：ＴＬＯＲ−Ｐ００３ＨＰ（東京応化工業製）
レジスト厚：１．０μｍ
露光時間：３２０ｍｓ Examples of the material of the photoresist 100 in which the lower portion of the photoresist 100 (in the vicinity of the electrode 14) is opened greatly during exposure and development described later include TLOR-P003HP (manufactured by Tokyo Ohka Kogyo Co., Ltd.). In addition, as an exposure condition in which a lower portion of the photoresist 100 (near the electrode 14) is opened greatly during exposure / development described later, the exposure time is set sufficiently long (however, the exposure time varies depending on the resist film thickness). It is done. However, the aperture size varies depending on the exposure time. When the exposure time is short, the aperture size becomes small, and when the exposure time is long, the aperture size becomes large. Therefore, it is necessary to determine the mask size accordingly.
Specific examples include the following conditions.
Resist material: TLOR-P003HP (manufactured by Tokyo Ohka Kogyo Co., Ltd.)
Resist thickness: 1.0 μm
Exposure time: 320ms

３．レジストの開口部形成工程
次に、図４（Ｃ）に示すように、露光・現像装置により、各電極１４上のフォトレジスト１００を開口し、各電極１４が露出する開口部１０２を形成する。具体的には、開口部１０２のうち上端部の開口幅Ｌ４が、開口部１８の開口幅Ｌ１以下となるように、開口部１０２を形成する。より具体的には、後述の微細なバンプ部材２８を形成するために、開口部１０２のうち上端部の開口幅Ｌ４が、１０μｍ以下とされ、好ましくは５μｍ以下、より好ましくは４μｍ程度となるように、開口部１０２を形成する。
この露光・現像工程の結果、上述のフォトレジスト１００の材料又は露光条件の選択により、形成された開口部１０２は、逆テーパー状となり、開口部１０２のうち下端部の開口幅Ｌ５は、開口部１０２の上端部の開口幅Ｌ４よりも広くなる。 3. Next, as shown in FIG. 4C, a photoresist 100 on each electrode 14 is opened by an exposure / development apparatus, and an opening 102 through which each electrode 14 is exposed is formed. Specifically, the opening 102 is formed so that the opening width L4 at the upper end of the opening 102 is equal to or smaller than the opening width L1 of the opening 18. More specifically, in order to form a fine bump member 28 to be described later, the opening width L4 of the upper end portion of the opening 102 is set to 10 μm or less, preferably 5 μm or less, more preferably about 4 μm. Then, the opening 102 is formed.
As a result of the exposure / development process, the opening 102 formed by the selection of the material of the photoresist 100 or the exposure conditions has a reverse taper shape, and the opening width L5 at the lower end of the opening 102 is the opening. It becomes wider than the opening width L4 of the upper end part of 102.

４．導電部の成膜工程
次に、図４（Ｄ）に示すように、半導体基板１０上のフォトレジスト１００から見た露出面上に導電部１０４を成膜する。具体的には、第１実施形態と同様に、一方向に向かって成膜する成膜手法を用いて、フォトレジスト１００上及び各電極１４上に、導電部１０４を成膜する。 4). Next, as shown in FIG. 4D, a conductive portion 104 is formed on the exposed surface of the semiconductor substrate 10 as viewed from the photoresist 100. Specifically, as in the first embodiment, the conductive portion 104 is formed on the photoresist 100 and each electrode 14 by using a film formation method for forming a film in one direction.

成膜する導電部１０４の材料としては、融点の低い材料、特に金属が挙げられ、例えばインジウムやアルミニウムなどが挙げられる。 Examples of the material of the conductive portion 104 to be formed include a material having a low melting point, particularly a metal, such as indium and aluminum.

このような一方向に向かって成膜する成膜手法によって成膜した結果、開口部１０２，１８から露出する各電極１４上には、開口部１０２の上端部の開口幅Ｌ４が、開口部１８の開口幅Ｌ１以下であるため、導電部１０４からなり、開口部１８の開口幅Ｌ１よりも全体にわたって幅が狭いバンプ部材１０６が形成される。
また、このバンプ部材１０６は、導電部１０４の成膜方向が一方向であるために、電極１４上の中心部に導電部が多く堆積されて、上部に向かって幅が狭くされたテーパー状となる。
また、開口部１０２の下端部の開口幅Ｌ５が、開口部１０２の上端部の開口幅Ｌ４よりも広いため、成膜の際、フォトレジスト１００と導電部１０４が連結することなく、バンプ部材１０６が形成される。
また、開口部１０２の上端部の開口幅Ｌ４が、１０μｍ以下とされ、好ましくは５μｍ以下、より好ましくは４μｍ程度であるため、開口幅Ｌ４と同程度の幅を有した微細なバンプ部材１０６が形成される。 As a result of forming the film by such a film forming method for forming the film in one direction, the opening width L4 of the upper end portion of the opening 102 is formed on each electrode 14 exposed from the openings 102 and 18. Since the opening width L1 is equal to or smaller than the opening width L1, the bump member 106 which is formed of the conductive portion 104 and is narrower than the opening width L1 of the opening portion 18 is formed.
Further, the bump member 106 has a tapered shape in which the conductive portion 104 is formed in one direction, so that a large amount of the conductive portion is deposited at the central portion on the electrode 14 and the width is narrowed toward the upper portion. Become.
Further, since the opening width L5 at the lower end of the opening 102 is wider than the opening width L4 at the upper end of the opening 102, the bump member 106 is not connected between the photoresist 100 and the conductive portion 104 during film formation. Is formed.
Further, the opening width L4 at the upper end of the opening 102 is set to 10 μm or less, preferably 5 μm or less, and more preferably about 4 μm. Therefore, a fine bump member 106 having a width comparable to the opening width L4 is formed. It is formed.

５．リフトオフ工程
次に、図４（Ｅ）に示すように、リフトオフ工程を行う。すなわち、フォトレジスト１００及びフォトレジスト１００上の導電部１０４をそれぞれ除去し（リフトオフ）、開口部１８内にある導電部１０４（バンプ部材１０６）を残すようにする。この結果、基材１０上にバンプ部材１０６を有する電子部品の一部１１０を得ることができる。 5. Lift-off process Next, as shown in FIG. 4E, a lift-off process is performed. That is, the photoresist 100 and the conductive portion 104 on the photoresist 100 are removed (lift-off), and the conductive portion 104 (bump member 106) in the opening 18 is left. As a result, a part 110 of the electronic component having the bump member 106 on the substrate 10 can be obtained.

最後に、前述した図２（Ａ）及び図２（Ｂ）に示す工程と同様の工程を行い、基材１０上にバンプ部材１０６を有する電子部品の一部１１０と、電子部品の一部１１０と同じ製造方法で製造した電子部品の他の一部（不図示）が貼り合わせられて、電子部品が完成する。 Finally, a process similar to the process shown in FIG. 2A and FIG. 2B is performed, and a part 110 of the electronic component having the bump member 106 on the substrate 10 and a part 110 of the electronic part. The other part (not shown) of the electronic component manufactured by the same manufacturing method is attached to complete the electronic component.

−作用−
本発明の第２実施形態に係る電子部品の製造方法によれば、第１実施形態で説明した効果を奏する他、第１実施形態に比べ、絶縁膜１６及び各電極１４上にフォトレジストを一層形成するだけでよいので、手間とコストを低減できる。
また、フォトレジスト１００の底部開口幅Ｌ５を、露光量を調整することで第１実施形態におけるレジスト２０の開口幅Ｌ２より小さくできる為、よりバンプ間の幅が狭い複数のバンプ部材１０６形成において有利になる。 -Action-
According to the method for manufacturing an electronic component according to the second embodiment of the present invention, in addition to the effects described in the first embodiment, a photoresist is further deposited on the insulating film 16 and each electrode 14 as compared with the first embodiment. Since it only needs to be formed, labor and cost can be reduced.
Further, since the bottom opening width L5 of the photoresist 100 can be made smaller than the opening width L2 of the resist 20 in the first embodiment by adjusting the exposure amount, it is advantageous in forming a plurality of bump members 106 having a narrower width between the bumps. become.

（変形例）
本発明は、上記の実施形態に限るものではなく、種々の変形、変更、改良が可能である。
例えば、第１及び第２実施形態では、フォトレジスト２０，２２，１００を用いたが、これらのフォトレジスト２０，２２，１００に限らず、水溶性の材料や溶剤で除去可能な材料、又はバンプ部材２８，１０６とする導電部２６，１０４とのエッチングにおける選択性が得られる材料、所謂「レジスト」であってもよい。 (Modification)
The present invention is not limited to the above-described embodiment, and various modifications, changes, and improvements can be made.
For example, in the first and second embodiments, the photoresists 20, 22, and 100 are used. However, the photoresists are not limited to the photoresists 20, 22, and 100, but are water-soluble materials, materials that can be removed with a solvent, or bumps. A material capable of obtaining selectivity in etching with the conductive portions 26 and 104 serving as the members 28 and 106, a so-called “resist” may be used.

また、第１及び第２実施形態の電子部品の製造方法は、バンプ部材２８，１０６の形成に限らず、基材１０上の配線や電極形成にも適用可能である。 The electronic component manufacturing method according to the first and second embodiments is not limited to the formation of the bump members 28 and 106 but can be applied to the formation of wiring and electrodes on the substrate 10.

以下に、本発明に係る電子部品の製造方法について、実施例により説明するが、本発明はこれら実施例により何ら限定されるものではない。 Hereinafter, the method for manufacturing an electronic component according to the present invention will be described with reference to examples, but the present invention is not limited to these examples.

本発明の実施例では、図１に示す製造工程を用いて、電子部品の一部３０を製造した。なお、電極１４の材料として、アルミニウムを用い、絶縁膜１６の材料として、窒化膜を用いた。また、下層のフォトレジスト２０の材料として、ＰｒｏＬＩＦＴシリーズ（日産化学工業製）を用い、上層のフォトレジスト２２として、ＴＤＭＲ−ＡＲシリーズ（東京応化工業製）を用いた。 In the example of the present invention, a part 30 of the electronic component was manufactured using the manufacturing process shown in FIG. Note that aluminum was used as the material of the electrode 14, and a nitride film was used as the material of the insulating film 16. Further, the ProLIFT series (manufactured by Nissan Chemical Industries) was used as the material for the lower layer photoresist 20, and the TDMR-AR series (manufactured by Tokyo Ohka Kogyo) was used as the upper layer photoresist 22.

この結果、導電部からなり、絶縁膜１６の開口部１８の開口幅Ｌ１よりも全体にわたって幅が狭いバンプ部材２８が形成されることが確認できた。
また、このバンプ部材２８は、上部に向かって幅が狭くされたテーパー状となることが確認できた。また、成膜の際、フォトレジスト２０と導電部２６が連結することなく、バンプ部材２８が形成されることが確認できた。また、上層のフォトレジスト２２の開口の開口幅Ｌ３と同程度の幅を有した微細なバンプ部材２８が形成されることが確認できた。 As a result, it was confirmed that a bump member 28 made of a conductive portion and having a narrower width than the opening width L1 of the opening 18 of the insulating film 16 was formed.
Further, it was confirmed that the bump member 28 has a tapered shape with a width narrowed toward the top. Further, it was confirmed that the bump member 28 was formed without connecting the photoresist 20 and the conductive portion 26 during the film formation. In addition, it was confirmed that the fine bump member 28 having the same width as the opening width L3 of the opening of the upper layer photoresist 22 was formed.

また、絶縁膜１６の開口部１８の開口幅Ｌ１は、４．０μｍであり、下層にあるフォトレジスト２０の開口の開口幅Ｌ２は、９．５μｍであり、上層にあるフォトレジスト２２の開口の開口幅Ｌ３は、３．８μｍであった。 The opening width L1 of the opening 18 of the insulating film 16 is 4.0 μm, the opening width L2 of the opening of the photoresist 20 in the lower layer is 9.5 μm, and the opening width L2 of the photoresist 22 in the upper layer is The opening width L3 was 3.8 μm.

１０基材、半導体基板
１４電極
１６絶縁膜
１８開口部（絶縁膜の開口部）
２０フォトレジスト（レジスト）
２２フォトレジスト（レジスト）
２４開口部（レジストの開口部）
２６導電部
２８バンプ部材
５０電子部品
６０バンプ部材
１００フォトレジスト（レジスト）
１０２開口部（レジストの開口部）
１０４導電部
１０６バンプ部材
Ｌ１開口幅
Ｌ２開口幅
Ｌ３開口幅
Ｌ４開口幅
Ｌ５開口幅 10 substrate, semiconductor substrate 14 electrode 16 insulating film 18 opening (opening of insulating film)
20 Photoresist (resist)
22 Photoresist (resist)
24 opening (resist opening)
26 Conductive portion 28 Bump member 50 Electronic component 60 Bump member 100 Photoresist (resist)
102 opening (resist opening)
104 Conductive part 106 Bump member L1 Opening width L2 Opening width L3 Opening width L4 Opening width L5 Opening width

Claims

Forming a resist on the substrate;
Forming a part of the resist having an opening having an opening width at a lower portion of the opening wider than an opening width at an upper portion of the opening;
Forming a conductive portion on the exposed surface of the substrate as viewed from the resist;
Removing the resist and the conductive portion on the resist, respectively, and leaving the conductive portion in the opening;
The manufacturing method of the electronic component which has this.

Before the step of forming the resist, a step of forming a plurality of electrodes on the base material, a step of forming an insulating film on the base material and each electrode, and each electrode on the insulating film Forming an exposed opening, and
In the step of forming the resist, the resist is formed on each electrode and the insulating film exposed from the opening of the insulating film,
In the step of forming the opening of the resist, the resist on the electrodes is opened to expose the electrodes, and the opening width of the upper opening of the resist opening is the opening of the insulating film. Forming the opening of the resist so as to be equal to or less than the opening width of
The manufacturing method of the electronic component of Claim 1.

In the step of forming the conductive portion, each electrode exposing the bump member as the conductive portion, which is narrower than the opening width of the opening portion of the insulating film, from the opening portion of the resist and the opening portion of the insulating film The manufacturing method of the electronic component of Claim 2 formed on top.

The method of manufacturing an electronic component according to claim 3, wherein in the step of forming the conductive portion, the bump member is formed in a tapered shape having a narrow width toward the top.

5. The method of manufacturing an electronic component according to claim 3, wherein, in the step of forming the conductive portion, the bump member is formed using a film forming method of forming a film in one direction.

In the step of forming the resist, a first resist and a second resist having a slower development speed than the first resist are sequentially formed on the substrate,
In the step of forming the opening of the resist, a part of the first resist and the second resist is opened, and the opening width of the opening of the first resist is wider than the opening width of the opening of the second resist. The method for manufacturing an electronic component according to any one of claims 1 to 5, wherein an opening of the resist is formed.