JP2011171323A - Etching method for copper or copper alloy - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an etching method for copper or copper alloy that is used for manufacturing a printed wiring board, having a fine wiring pattern, with an excellent yield and without causing a short-circuit defect when executing etching by an etchant containing a banking agent. <P>SOLUTION: The etching method of copper or copper alloy is configured as follows. The surface of copper or a copper alloy is polished by chemical polishing. Then, a resist pattern is formed on the surface of the copper or the copper alloy. The surface of the copper or the copper alloy is etched by an etchant containing a banking agent. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an etchant for copper or copper alloy.

  An etching method is widely used as a method for forming a wiring pattern of a printed wiring board. In recent years, printed wiring boards are required to have finer wiring patterns in order to cope with the advancement and miniaturization of electronic devices.

  FIG. 1 is a schematic cross-sectional view of a conductor pattern obtained by an etching method. A conductor pattern 2 is provided on the substrate 3 with copper or a copper alloy (hereinafter may be abbreviated as “copper or the like”), and a resist pattern 1 used for etching is present on the conductor pattern 2. When the conductor pattern is formed by etching, a phenomenon occurs in which the line width of the conductor pattern 2 becomes narrower than the line width of the resist pattern 1 at the end of the etching, and this phenomenon is called “side etching”.

A value defined by 2 · t / (w ₂ −w ₁ ) depending on the thickness t of the copper foil, the top width w _{1 of} the conductor pattern, and the bottom width w ₂ of the conductor pattern is referred to as “etching factor”. The value defined by (w ₃ −w ₁ ) depending on the line width w ₃ of the resist pattern and the top width w ₁ of the conductor pattern is referred to as “side etch amount”. In order to form a fine wiring pattern by the etching method, it is required that the absolute value of the etching factor is large and the amount of side etching is small.

That the absolute value of the etching factor is large indicates that the difference between the bottom width w ₂ and the top width w ₁ of the conductor pattern is small compared to the copper foil thickness t. In the printed wiring board, in order to ensure electrical insulation from the adjacent conductor pattern, it is necessary to secure an appropriate space at both the top and bottom of the conductor pattern. For this reason, in a fine wiring pattern, if the absolute value of the etching factor is small, the top width w ₁ or the bottom width w ₂ becomes too narrow and sufficient electrical characteristics cannot be maintained. In addition, if the top width w ₁ is too narrow, the width of the resist pattern 1 that is not supported by the conductor pattern 2, that is, the side etch amount is compared with the top width w _{1 of the} conductor pattern. If it becomes too wide, there arises a problem that the resist pattern 1 is peeled off from the conductor pattern 2 during the etching and the conductor pattern 2 is disconnected. Further, when the bottom width w ₂ is too narrow, problems such as the conductive pattern 2 from the substrate 3 is disconnected by peeling occurs.

  In addition, when the space width between the conductor patterns is the same, the space width of the resist pattern 1 must be reduced compared with the case where the side etch amount is large, and the required resolution of the resist pattern is reduced. It will be high. Therefore, in order to form a fine wiring pattern, a small amount of side etching is required. Specifically, the side etch amount per side of the conductor pattern (hereinafter referred to as “one side side etch amount”) is preferably within 3 μm.

  As a technology to suppress side etching and increase the absolute value of the etching factor, a compound that inhibits etching by forming an etching inhibition layer (bank) by adsorbing and reacting with copper, etc., a so-called “banking agent” An etchant containing the solution has been proposed (see, for example, Non-Patent Document 1). For example, an iron (III) chloride aqueous solution to which thiourea is added (for example, see Patent Document 1), an iron (III) chloride aqueous solution to which formamidine disulfide is added (for example, see Patent Document 2), and ethylenethiourea are added. Iron (III) chloride aqueous solution (for example, refer to Patent Document 3), iron (III) chloride aqueous solution to which thiourea and a nonionic or anionic surfactant are added (for example, refer to Patent Document 4), 2- Copper (II) chloride aqueous solution to which aminobenzothiazole compound, polyethylene glycol and polyamine compound are added (see, for example, Patent Document 5), 2-aminobenzothiazole compound, benzotriazole compound, ethanolamine compound, glycol ether compound and N-methyl Copper (II) chloride aqueous solution to which 2-pyrrolidone or dimethylformamide is added (for example, Etching solution such as sulfuric acid-hydrogen peroxide aqueous solution added with amines or azines (for example, see Patent Literature 7). Further, Patent Document 8 proposes an etching solution in which oxalic acid is added to an iron (III) chloride aqueous solution.

  The etching method using an etching solution containing such a banking agent can suppress side etching and increase the etching factor, but compared with the case where an etching solution containing no banking agent is used, There is a problem called “copper residue” in which copper or the like in the non-patterned portion is not locally removed. When the copper residue in the non-pattern part is remarkable, the insulation between the conductor patterns is lost and a short defect occurs. Such a short defect is particularly likely to occur when etching using an etchant containing a banking agent and the etching amount on one side is 3 μm or less, and becomes a serious problem when a fine wiring pattern is formed. It was.

US Pat. No. 2,746,848 Japanese Patent Publication No.37-15209 Japanese Examined Patent Publication No. 39-27516 Japanese Patent Publication No. 50-20950 JP-A-6-57453 JP 2006-274291 A JP 2006-13307 A International Publication No. 2009/091012 Pamphlet

Toshiki Sparrow, Masato Ishii, Masanori Akiyama, and Noriori Kato, “Etching Technology for Printed Wiring Boards Really Useful for Business”, Nikkan Kogyo Shimbun, May 30, 2009, p73

  An object of the present invention is to etch copper or copper alloy that can produce a printed wiring board having a fine wiring pattern with a high yield without causing a short-circuit defect between wirings when an etching solution containing a banking agent is used. It is to provide a method. In particular, the present invention provides a copper or copper alloy etching method that is effective even when the amount of side etching on one side, which is desirable for forming a fine wiring pattern, is 3 μm or less.

  In the copper or copper alloy etching method for forming a conductor pattern by forming a resist pattern on copper or copper alloy and then etching with an etching solution containing a banking agent, before forming the resist pattern, copper or copper alloy The present inventors have found an etching method for copper or a copper alloy characterized in that the surface is treated by chemical polishing.

  In the copper or copper alloy etching method of the present invention, the surface of copper or the like is treated by chemical polishing before the resist pattern is formed. In the production of printed wiring boards, in general, prior to the formation of a resist pattern, in order to improve the adhesive strength between the resist pattern and copper or the like, the surface of copper or the like is roughened, and the depth is 0.5 μm. Irregularities of about 5 μm are formed. As the roughening method, mechanical polishing such as buff polishing or pad polishing is often used, but the etching method of the present invention uses chemical polishing. Chemical polishing is a method of forming irregularities on the surface of copper or the like using a chemical solution that dissolves the surface of copper or the like uniformly macroscopically and non-uniformly microscopically.

  The unevenness formed by mechanical polishing generally has a length of several tens of μm to several tens of mm along the polishing direction. In the etching method using an etching solution to which a banking agent is added, a linear bank is formed at the initial stage of etching in a concave portion having a relatively large width and depth among such concave and convex portions. The progress of etching around the linear bank is remarkably hindered, and after the etching is finished, the copper remains and remains as a short defect. On the other hand, the unevenness formed by chemical polishing does not have a structure along a certain direction. If this unevenness is caused by chemical polishing, even if a bank is formed inside the bank, the shape of the bank becomes a minute dot, which is scattered by the flow of the etchant at the very beginning of etching, so the copper remaining Therefore, short-circuit defects are not generated.

  In addition, short defects caused by mechanical polishing are particularly likely to occur when the one-side side etch amount is 3 μm or less, which has been a major obstacle in forming a fine wiring pattern, but by using chemical polishing, Even when an etching solution containing a banking agent is used, a high yield can be achieved without causing a short-circuit defect between wirings.

It is the schematic which shows the cross-sectional shape of the conductor pattern obtained by the etching method. It is a comb wiring pattern for evaluation used in an example and a comparative example. It is an enlarged view of the wavy ellipse part of FIG.

  In the present invention, in the etching method using an etching solution containing a banking agent, in order to suppress the occurrence of short defects and improve the yield, the surface of copper or the like is treated by chemical polishing, and then a resist pattern is formed. Etching is performed.

  Chemical abrasives used in the etching method of the present invention include hydrogen peroxide-sulfuric acid-based, persulfate-based, copper (II) chloride-based, iron (III) chloride-based, alkali-based, and organic acid-based chemical abrasives. Can be mentioned.

  Chemical polishing methods include spray spraying and immersion treatment, and either method may be used. The thickness of the copper foil removed by chemical polishing is preferably 0.5 to 10.0 μm, more preferably 1.0 to 5.0 μm.

  In addition, when chemical polishing is performed in the presence of organic impurities and metal oxides such as oils and fats, grease, etc. on the surface of copper, etc., dissolution of the sites where impurities are present is hindered, and chemical polishing becomes uniform. May not progress. Organic impurities by degreasing treatment using alkali degreasing agent such as sodium hydroxide, sodium carbonate, sodium metasilicate, trisodium phosphate, sodium pyrotetraphosphate, solvent, emulsion degreasing agent, etc. before chemical polishing treatment Chemical polishing is uniformly performed by removing metal oxides by acid cleaning using sulfuric acid, hydrochloric acid, sulfamic acid, phosphoric acid, oxalic acid, tartaric acid, citric acid, formic acid, glycolic acid, acetic acid, etc. This can increase the effect of suppressing short-circuit defects.

  In the etching method of the present invention, even if mechanical polishing is performed prior to chemical polishing, the effect of suppressing short-circuit defects can be obtained.

  Short defects caused by performing mechanical polishing on the surface of copper or the like before forming a resist pattern are particularly likely to occur when the one side etch is 3 μm or less, which is desirable for forming a fine pattern. According to the etching method of the present invention, even when the one side etching is 3 μm or less, a high yield can be obtained without causing a short-circuit defect between wirings.

  In the etching method of copper or the like of the present invention, the copper alloy refers to an alloy containing 95% by mass or more of copper, and examples thereof include a copper alloy containing tin, zinc, chromium, zirconium, nickel and the like. Further, in the etching method of copper or the like of the present invention, the copper foil used as a layer of copper or the like is formed by vapor deposition, sputtering, electroless plating, etc. in addition to the rolled copper foil and the electrolytic copper foil. Can be mentioned.

  In the present invention, when a photoresist is used for forming a resist pattern, either a photocurable negative resist or a photodissolvable positive resist may be used, and a photosensitive dry film is used for attaching the resist. If a liquid resist is used, a coating method is used. If an electrodeposition type resist is used, an electrodeposition method is used. After applying the resist, exposure is performed using an exposure mask, and the resist pattern is formed by dissolving and removing the exposed or non-exposed portion of the resist with an alkaline aqueous solution. In addition to the case where a photoresist is used, a method of forming a resist pattern by a screen printing method or an ink jet printing method using a non-photosensitive liquid resist may be used.

  In the etching method for copper and the like of the present invention, examples of the etching solution containing a banking agent include an iron (III) chloride aqueous solution to which thiourea is added, an iron (III) chloride aqueous solution to which formamidine disulfide is added, and ethylenethiourea. Iron (III) chloride aqueous solution added with thiourea and iron (III) chloride aqueous solution added with nonionic or anionic surfactant, 2-aminobenzothiazole compound, polyethylene glycol and chloride added with polyamine compound Copper (II) aqueous solution, 2-aminobenzothiazole compound, benzotriazole compound, ethanolamine compound, glycol ether compound and copper (II) chloride aqueous solution to which N-methyl-2-pyrrolidone or dimethylformamide is added, amines or azines Sulfuric acid-hydrogen peroxide aqueous solution, Examples thereof include an etching solution such as an aqueous solution of iron (III) chloride to which oxalic acid is added.

  Examples of the present invention will be described below.

[Example 1]
<Preparation of etching solution>
Commercially available 40 ° Baume iron chloride (III) aqueous solution (concentration: 37% by mass) 13.5 kg (5.00 kg as anhydride), 1.40 kg oxalic acid dihydrate (1.00 kg as anhydride) with water In addition, 100 kg of an etching solution containing 5.0% by mass of iron (III) chloride and 1.0% by mass of oxalic acid was prepared.

<Preparation of chemical abrasive>
As a chemical abrasive, 1 kg of an aqueous solution containing 3.0% by mass of hydrogen peroxide and 5.0% by mass of sulfuric acid was prepared.

<Adjustment of acid cleaning solution>
As an acid cleaning solution, 1 kg of an aqueous solution containing 10% by mass of sulfuric acid was prepared.

<Acid cleaning before polishing>
Four laminated materials (15 cm × 20 cm) obtained by laminating a polyimide insulating material having a thickness of 40 μm and a copper foil having a thickness of 18 μm were immersed in the acid cleaning solution for 30 seconds and then washed with water.

<Chemical polishing>
The laminated material after acid cleaning was immersed in the chemical polishing agent at a liquid temperature of 30 ° C. for 30 seconds and washed with water. When the amount of decrease in the copper thickness due to the polishing treatment (hereinafter referred to as “polishing amount”) was measured, it was reduced by 1 μm. The amount of polishing was calculated from the decrease in mass before and after the polishing treatment of the laminated material.

<Acid cleaning after polishing>
The laminated material after the chemical polishing treatment was immersed in the acid cleaning solution for 30 seconds and then washed with water.

<Resist pattern formation>
A resist pattern in which the evaluation comb-shaped wiring pattern shown in FIG. FIG. 3 is an enlarged view of the wavy ellipse portion of FIG. Specifically, after applying a positive liquid resist to the laminated material after the chemical polishing treatment, using a photomask in which the line / space of the comb wiring pattern for evaluation is 28 μm / 28 μm, the positive liquid is used. The resist was exposed, and then the exposed portion was dissolved and removed with an alkaline aqueous solution to form a resist pattern having a line / space of 28 μm / 28 μm.

<Etching>
A printed wiring board for evaluation was produced by spraying the etching solution onto the laminated material on which the resist pattern was formed using a spray etching apparatus. The etching was finished when the copper remaining on the insulating material between the adjacent conductor patterns was completely removed.

[Example 2]
Using a photomask in which the chemical polishing time is 90 seconds and the line / space of the comb wiring pattern for evaluation is 25 μm / 25 μm, a resist pattern having a line / space of 25 μm / 25 μm is formed. A printed wiring board for evaluation was produced in the same manner as in Example 1 except that the above was performed. When the polishing amount was measured, it decreased by 3 μm.

[Example 3]
A resist pattern having a line / space of 21 μm / 21 μm is formed by using a photomask having a chemical polishing process time of 150 seconds and a line / space of an evaluation comb wiring pattern of 21 μm / 21 μm. A printed wiring board for evaluation was produced in the same manner as in Example 1 except that the above was performed. When the polishing amount was measured, it decreased by 5 μm.

[Examples 4 to 6]
A printed wiring board for evaluation was produced in the same manner as in Examples 1 to 3, except that the composition of the chemical abrasive and the chemical polishing treatment time were changed as shown in Table 1. The amount of polishing is shown in Table 1.

[Examples 7 to 9]
A printed wiring board for evaluation was produced in the same manner as in Examples 1 to 3, except that the composition of the chemical abrasive and the chemical polishing treatment time were changed as shown in Table 1. The amount of polishing is shown in Table 1.

[Examples 10 to 12]
A printed wiring board for evaluation was produced in the same manner as in Examples 1 to 3, except that the composition of the chemical abrasive and the chemical polishing treatment time were changed as shown in Table 1. The amount of polishing is shown in Table 1.

[Examples 13 to 15]
Examples 1 to 3 except that the commercially available hydrogen peroxide-sulfuric acid-based printed circuit board surface treatment agent shown in Table 1 was used as the chemical abrasive and the chemical polishing treatment time was changed as shown in Table 1. Similarly, a printed wiring board for evaluation was produced. The amount of polishing is shown in Table 1.

[Examples 16 to 18]
Examples 1 to 3 except that the commercially available hydrogen peroxide-sulfuric acid-based printed circuit board surface treatment agent shown in Table 1 was used as the chemical abrasive and the chemical polishing treatment time was changed as shown in Table 1. Similarly, a printed wiring board for evaluation was produced. The amount of polishing is shown in Table 1.

[Examples 19 to 21]
As a chemical abrasive, using the commercially available organic acid copper surface super roughening agent shown in Table 1, except that the chemical polishing treatment time was changed as shown in Table 1, as in Examples 1-3, A printed wiring board for evaluation was produced. The amount of polishing is shown in Table 1.

[Examples 22 to 24]
A printed wiring board for evaluation was produced in the same manner as in Examples 1 to 3, except that the composition of the etching solution was changed as shown in Table 2. The amount of polishing is shown in Table 1.

[Examples 25 to 27]
A printed wiring board for evaluation was produced in the same manner as in Examples 1 to 3, except that the composition of the etching solution was changed as shown in Table 2. The amount of polishing is shown in Table 1.

[Comparative Examples 1-3]
A printed wiring board for evaluation was produced in the same manner as in Examples 1 to 3, except that the polishing treatment was performed by buffing and the polishing amount was as shown in Table 1.

[Comparative Examples 4 to 6]
A printed wiring board for evaluation was produced in the same manner as in Comparative Examples 1 to 3, except that the composition of the etching solution was changed as shown in Table 2.

<Evaluation of side etch amount>
The top width w ₁ of the conductor pattern was measured for each section of the evaluation printed wiring board produced in each Example and Comparative Example, and the one-side side etch amount was determined.

<Etching factor evaluation>
For each section of the printed wiring board for evaluation produced in each example and comparative example, the top width w _{1 of} the conductor pattern and the bottom width w ₂ of the conductor pattern were measured, and the absolute value of the etching factor was determined. It was.

<Yield evaluation>
In each example and comparative example, for each section of the printed wiring board for evaluation produced, the presence or absence of conduction between the conductor part A and the conductor part B was inspected, and there was no conduction between the conductor part A and the conductor part B. Yields were determined by using good products and defective products as shown in Table 2. The conduction between the conductor part A and the conductor part B means that a short defect has occurred in the space part between the two conductor parts. In such a case, even if a wiring board for practical use is manufactured under the same conditions, the same short defect is likely to occur.

  In addition to the short-circuit defect, the defect generated in the wiring pattern of the printed wiring board includes an open defect, that is, a defect in which the two points that should originally be conductive are not conductive. Under these etching conditions, the incidence of open defects was sufficiently low, 1% or less.

  As can be seen from Examples 1 to 27, when etching with an etching solution containing a banking agent, the surface of copper or the like is chemically polished before forming the resist layer, thereby maintaining a high etching factor absolute value and shorting. The generation of defects can be suppressed and the yield can be improved.

  On the other hand, as can be seen from Comparative Examples 1 to 6, when the mechanical polishing process is performed without performing the chemical polishing process, short defects are likely to occur and the yield is low.

  As can be seen from Examples 22 to 27 and Comparative Examples 4 to 6, when the one-side side etch amount exceeds 3 μm, the chemical polishing treatment improves the yield by nearly 30%. Further, as can be seen from Examples 1 to 21 and Comparative Examples 1 to 3, when the one-side side etch is 3 μm, the yield is improved by nearly 65%, and the etching method of the present invention forms a fine wiring pattern. It can be seen that this is particularly effective.

  The etching method of the present invention can be used when a fine wiring pattern is formed by etching in the production of a printed wiring board.

t Thickness of copper foil w ₁ Top width of conductor pattern w ₂ Bottom width of conductor pattern w ₃ Line width of resist pattern 1 Resist pattern 2 Conductor pattern 3 Base material

Claims (2)

  In the copper or copper alloy etching method for forming a conductor pattern by forming a resist pattern on copper or copper alloy and then etching with an etching solution containing a banking agent, before forming the resist pattern, copper or copper alloy An etching method comprising treating a surface by chemical polishing.   The etching method according to claim 1, wherein the difference between the line width of the resist pattern and the top width of the conductor pattern is 3 μm or less per side of the conductor pattern.

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