JP2011166234A - Solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging device that reduces a dark current noise component due to dark current variance of a charge holding unit during continuous shooting. <P>SOLUTION: With a first frame before a starting frame of the continuous shooting and a second frame after a final frame of the continuous shooting, a photoelectric conversion unit and the charge holding unit are reset not in an accumulation period and a first signal based upon the resetting is output; and the photoelectric conversion unit is reset in the accumulation period, and a second signal is output at the end of the accumulation period. An image process circuits 7-5 performs a subtraction process between the first signal and second signal output with the first frame and a subtraction process between the first signal and second signal output with the second frame, and makes correction for reducing a noise component due to the dark current variance of the charge holding unit using at least one of results of those subtraction processes. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device in which pixels are arranged two-dimensionally.

  Conventionally, as a solid-state imaging device, a MOS type solid-state imaging device using a pixel having an amplification read function is known. FIG. 8 shows a pixel configuration of the MOS type solid-state imaging device. A pixel 100 illustrated in FIG. 8 includes a photodiode 101, a transfer transistor 102, a charge holding portion (FD: floating diffusion) 103, a floating diffusion reset transistor 104, an amplification transistor 105, a selection transistor 106, and a photodiode reset transistor 107. Further, the pixel power supply line 110, the floating diffusion reset line 111, the transfer line 112, the selection line 113, the vertical signal line 114, and the photodiode reset line 115 are shared among a plurality of pixels.

  The photodiode 101 is a photoelectric conversion element in which the amount of accumulated charge changes according to incident light. The transfer transistor 102 is a transistor for transferring (reading) the signal charge generated in the photodiode 101 to the charge holding unit 103. The charge holding unit 103 has a charge holding function for holding the charge transferred from the photodiode 101. The floating diffusion reset transistor 104 is a transistor for resetting the charge holding unit 103. The amplification transistor 105 is a transistor for amplifying and reading the voltage level of the charge holding unit 103. The selection transistor 106 is a transistor for selecting a specific pixel that outputs the output of the amplification transistor 105 as an output signal and transmitting the output of the amplification transistor 105 to the vertical signal line 114. The photodiode reset transistor 107 is a transistor for resetting the photodiode 101. Here, light is shielded except for the photodiode 101.

  The pixel power supply line 110 is a wiring for applying the power supply voltage VDD, and is electrically connected to the drain side of the floating diffusion reset transistor 104, the drain side of the amplification transistor 105, and the drain side of the photodiode reset transistor 107. Yes. The floating diffusion reset line 111 is a wiring for applying a floating diffusion reset pulse φRMi for resetting the charge holding unit 103 for one row, and is connected to the gate of the floating diffusion reset transistor 104 for one row. .

  The transfer line 112 is a wiring to which a row transfer pulse φTRi for transferring the signal charges of the pixels for one row to the charge holding unit 103 of each pixel is applied, and the gate of the transfer transistor 102 of the pixels for one row. Is electrically connected. The selection line 113 is a wiring to which a row selection pulse φSEi for selecting pixels for one row is applied, and is electrically connected to the gate of the selection transistor 106 of the pixels for one row. The photodiode reset line 115 is a wiring to which a row photodiode reset pulse φRPDi for resetting the photodiode 101 for one row is applied, and is connected to the gate of the photodiode reset transistor 107 for one row. Thus, a pixel configuration using five transistors realizes a photoelectric conversion function, a photodiode reset function, an electrification holding unit reset function, an amplification read function, a temporary memory function, and a selection function.

  The MOS type solid-state imaging device has a pixel array in which pixels having such a configuration are arranged two-dimensionally in m rows × n columns. A method of reading out the signals of all the pixels by sequentially selecting and reading out the signals of the pixels in each row from the first row to the m-th row is called a normal XY address reading method. However, in the normal XY address readout method, since the signal accumulation time differs for each row of the pixel array, the signal is read out in the first row where the signal is read first and the m-th row where the signal is read out last. The time differs by up to one frame. Therefore, there arises a problem that an image is distorted when an object moving at high speed is photographed.

  As a method for solving the above problems, there is a global shutter readout method (see, for example, Patent Documents 1 and 2). In Patent Document 1, a global shutter readout method is adopted, and in order to cancel kTC noise, signals for two frames of a reset frame and a video frame are acquired, and driving for obtaining a difference between the signals is performed.

 Hereinafter, the operation of the global shutter readout method will be described with reference to FIG. FIG. 7 is a timing chart obtained by extracting a part of the drive sequence from the continuous drive sequence in which the predetermined operation is continuously repeated. First, the “Hi” level is applied to the photodiode reset pulses φRPD1 to φRPDm of all rows. As a result, the photodiodes 101 in all rows are reset.

 Subsequently, in the signal reset frame, the “Hi” level is applied to the floating diffusion reset pulse φRMi for each row, and the charge holding unit 103 is reset. Subsequently, the “Hi” level is applied to the row selection pulse φSEi for each row, and a reset signal based on the reset potential of the charge holding unit 103 is output to the vertical signal line 114 through the amplification transistor 105 and the selection transistor 106. .

 Thereafter, in the exposure period (accumulation period), the “Lo” level is applied to the photodiode reset pulses φRPD1 to φRPDm. As a result, the reset of the photodiodes 101 in all rows is simultaneously released, and accumulation in the pixels in all rows is started simultaneously. After a certain period of time, the “Hi” level is applied to the row transfer pulses φTR1 to φTRm of all rows, and the signal components (optical signals) generated by the accumulation (exposure) are transferred to the charge holding unit 103 in a batch for all rows. The After this transfer is completed, the “Hi” level is applied again to the photodiode reset pulses φRPD1 to φRPDm of all rows. As a result, accumulation in the pixels of all rows is completed at the same time, and the exposure period is completed. Thereafter, in the signal video frame, the “Hi” level is applied to the row selection pulses φSE1 to φSEm in order from the first row, and an optical signal is output.

 Hereinafter, reading in the signal reset frame and the signal video frame will be described with reference to FIG. 10 showing the above schematic timing. In FIG. 10, φTR1 to m correspond to the row transfer pulses φTR1 to φTRm from the first row to the mth row in FIG. φRPD1 to m correspond to the photodiode reset pulses φRPD1 to φRPDm in the first to mth rows in FIG. A broken line 20 indicates the timing of the reset operation of the charge holding unit 103 in the signal reset frame. A solid line 21 indicates the read timing of the reset signal in the signal reset frame. A solid line 22 indicates the optical signal readout timing in the signal video frame. Dark current charges are accumulated in the charge holding unit 103 during a period from the reset signal readout timing indicated by the solid line 21 to the optical signal readout timing indicated by the solid line 22. Since the slopes of the straight lines corresponding to the solid lines 21 and 22 are the same, that is, the readout speed of the reset signal and the optical signal is the same, the dark current charges accumulated in the charge holding unit 103 should be the same in all rows.

 The noise component (Noise [Reset_Frame]) included in the reset signal of the signal reset frame is expressed by equation (1), and the noise component (Noise [Video_Frame]) included in the optical signal of the signal video frame is expressed by equation (2). The feedthrough noise is a noise component generated at the potential of the charge holding unit 103 depending on the capacitance variation of the charge holding unit 103.

After obtaining the reset signal (Signal [Reset_Frame]) and the optical signal (Signal [Video_Frame]), an image signal in which kTC noise is canceled is obtained by subtracting each signal as shown in the equation (3).
Subtraction result: Signal [Reset_Frame]-Signal [Video_Frame] (3)

  The noise component included in the result of the subtraction process is expressed by equation (4).

JP 2005-65184 A JP 2006-262070 A

  In the subtraction process described above, kTC noise can be canceled, but the dark current noise component due to the dark current variation of the charge holding unit 103 remains as processed noise. In particular, during continuous shooting, the dark current noise component due to the dark current variation of the charge holding unit 103 is very likely to adversely affect image quality due to the temperature rise of the image sensor due to continuous shooting.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a solid-state imaging device capable of reducing a dark current noise component due to dark current variation of a charge holding unit during continuous shooting. And

  The present invention has been made to solve the above-described problems, and converts a light incident during an accumulation period into a signal charge and accumulates the signal, and resets the signal charge accumulated in the photoelectric conversion part. A first reset unit, a read unit that reads the signal charge from the photoelectric conversion unit, a charge holding unit that holds the signal charge read through the read unit, and the charge holding unit that holds the signal charge An amplifying unit for amplifying a signal charge; a second reset unit for resetting the signal charge held in the charge holding unit; and a selecting unit for selecting a specific pixel that outputs the output of the amplifying unit as an output signal; , A pixel unit in which pixels provided in a two-dimensional array, a control unit that controls the operation of the pixel, a signal processing unit that performs a first subtraction process on a reset signal and an optical signal output from the pixel, The The control unit causes the first reset unit and the second reset unit to perform a reset outside the accumulation period and outputs the reset signal from the pixel in each frame during continuous shooting. At the start of the accumulation period, all pixels in a predetermined area are simultaneously reset by the first reset unit, and at the end of the accumulation period, the signal charges are simultaneously read out by the readout sections of all pixels in the predetermined area. The optical signal is output from the pixel, and the first frame before the first frame of the continuous shooting and the second frame after the last frame of the continuous shooting are out of the accumulation period. Reset the second reset unit and the second reset unit to output a first signal based on the reset from the pixel, and reset the first reset unit within the accumulation period. The second signal is output from the pixel at the end of the accumulation period, and the signal processing unit is configured to output the first signal and the second signal output in the first frame. Performing a second subtraction process, performing a third subtraction process between the first signal and the second signal output in the second frame, and performing the second subtraction process and the third subtraction. A solid-state imaging device, wherein at least one of the processing results is used to perform correction for reducing a noise component caused by dark current variation of the charge holding unit, which is included in the result of the first subtraction processing. is there.

  In the solid-state imaging device of the present invention, the signal processing unit functions as a function of the temperature change of each frame during continuous shooting based on the temperature detected by the temperature sensor provided in the solid-state imaging device. The change amount of the noise component in each frame is obtained from the function of the temperature change, and at least one of the result of the second subtraction process and the result of the third subtraction process and the change amount of the noise component are used. The correction for reducing the noise component included in the result of the first subtraction process is performed.

  In the solid-state imaging device according to the aspect of the invention, the signal processing unit may calculate the result of the fourth subtraction process between the result of the second subtraction process and the result of the third subtraction process as the total number of frames for continuous shooting. The change of the noise component per frame is obtained by equally dividing the difference, and at least one of the result of the second subtraction process and the result of the third subtraction process and the change of the noise component are obtained. And performing correction for reducing the noise component included in the result of the first subtraction process.

  Further, in the solid-state imaging device according to the present invention, the signal processing unit may determine the result of the second subtraction process and the third based on a result of comparing a temperature detected by a temperature sensor provided in the solid-state imaging device with a threshold value. One of the results of the subtraction process is selected, and the correction for reducing the noise component included in the result of the first subtraction process is performed using the result of the selected subtraction process.

  In the solid-state imaging device according to the present invention, the signal processing unit may determine the result of the second subtraction process and the result of the third subtraction process based on a result of comparing the number of frames during continuous shooting with a threshold value. Is selected, and correction for reducing the noise component included in the result of the first subtraction process is performed using the result of the selected subtraction process.

  According to the present invention, in the first frame and the second frame, the reset by the first reset unit is performed both outside and within the accumulation period. The result of the subtraction process includes a dark current noise component due to the dark current variation of the charge holding unit, but a noise component such as shot noise related to the photoelectric conversion unit is reduced. Therefore, by correcting the result of the first subtraction process using at least one of the results of the second subtraction process and the third subtraction process, the dark current due to the dark current variation of the charge holding unit during continuous shooting is obtained. Noise components can be reduced.

1 is a block diagram showing a configuration of a camera system according to a first embodiment of the present invention. 1 is a block diagram showing a configuration of a solid-state imaging device according to a first embodiment of the present invention. 3 is a timing chart showing drive timing of the solid-state imaging device according to the first embodiment of the present invention. 3 is a timing chart showing signal readout timing of the solid-state imaging device according to the first embodiment of the present invention. 3 is a graph showing the relationship between the number of frames and the chip temperature in the first embodiment of the present invention. FIG. 5 is a block diagram showing a configuration of a camera system according to a second embodiment of the present invention. FIG. 6 is a block diagram showing a configuration of a camera system according to a third embodiment of the present invention. It is a circuit diagram which shows the structure of a pixel. It is a timing chart which shows the drive timing of a solid-state image sensor. It is a timing chart which shows the signal read-out timing of a solid-state image sensor.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that, as a configuration of the solid-state imaging device, a configuration in which single pixels are arranged in 4 rows and 4 columns is shown, but the following example can be implemented regardless of the number of rows and the number of columns.

(First embodiment)
First, a first embodiment of the present invention will be described. FIG. 1 shows the configuration of a digital camera (camera system) having a solid-state imaging device according to the present embodiment. A digital camera 7-1a shown in FIG. 1 includes a lens 7-2, a mechanical shutter 7-3, an image sensor 7-4, an image processing circuit 7-5, a memory 7-6, a recording device 7-7, and a lens control device 7. -8, a shutter driving device 7-9, an imager driving device 7-10, a camera control device 7-11, a display device 7-12, and a temperature sensor 7-13.

  The lens 7-2 forms a subject image on the image sensor 7-4. The image sensor 7-4 is a solid-state image sensor. The image processing circuit 7-5 performs various processes such as correction and compression on the image signal output from the image sensor 7-4. The image processing circuit 7-5 has a counter 7-5a that counts the number of frames (signal frames) in continuous shooting (number of continuous shots).

  The memory 7-6 temporarily stores the image signal. The recording device 7-7 records the image signal processed by the image processing circuit 7-5 on a recording medium. The lens control device 7-8 controls the zoom, focus, aperture, etc. of the lens 7-2. The shutter driving device 7-9 controls driving of the mechanical shutter 7-3. The imager driving device 7-10 controls driving of the image sensor 7-4. The camera control device 7-11 controls the entire digital camera 7-1. The display device 7-12 displays an image based on the image signal. The temperature sensor 7-13 is provided, for example, on the surface or inside of the image sensor 7-4, measures the chip temperature of the image sensor 7-4, and outputs a signal indicating the measurement result.

  FIG. 2 shows the configuration of the solid-state imaging device according to the present embodiment. The solid-state imaging device shown in FIG. 2 includes a pixel unit 200, a vertical scanning circuit 300, a horizontal signal readout circuit 400, a current source 150, and various wirings.

  The pixel unit 200 has a structure in which the pixels 100 shown in FIG. 8 are arranged in a two-dimensional form with a plurality of rows and a plurality of columns. The vertical scanning circuit 300 performs pixel drive control in units of rows. For this drive control, the vertical scanning circuit 300 includes a control circuit that can independently control the floating diffusion reset pulse φRMi, the row transfer pulse φTRi, the photodiode reset pulse φRPDi, and the row selection pulse φSEi for each row. ing. The signals of the pixels in the row that are selectively controlled by these pulses are output to the vertical signal line 114 provided for each column.

  The horizontal signal readout circuit 400 outputs the pixel signals for one row output to the vertical signal line 114 from the output terminal 410 in time series in the horizontal arrangement order. The current source 150 is connected to the vertical signal line 114 and supplies a bias current. The floating diffusion reset line 111 is a wiring to which a floating diffusion reset pulse φRMi is applied. The transfer line 112 is a wiring to which a row transfer pulse φTRi is applied. The selection line 113 is a wiring to which a row selection pulse φSEi is applied. The photodiode reset line 115 is a wiring to which a photodiode reset pulse φRPDi is applied. Note that the pixel power supply line 110 that supplies pixel power is not shown.

  Next, the drive sequence in this embodiment will be described. As shown in FIG. 3, a floating diffusion dark current reference frame (floating diffusion dark current reference frame First, floating diffusion dark current reference frame Last) is provided before and after the signal frame corresponding to the continuous shooting period.

  In FIG. 3, φTR1 to m correspond to row transfer pulses φTR1 to φTRm from the first row to the mth row. φRPD1 to m correspond to photodiode reset pulses φRPD1 to φRPDm in the first to mth rows. The floating diffusion dark current reference frame First and the floating diffusion dark current reference frame Last include a floating diffusion reset frame, a standby period (accumulation period) having a predetermined length, and a floating diffusion video frame. The signal frame includes a signal reset frame, an exposure period (accumulation period) having a predetermined length, and a signal video frame.

  A broken line 10 indicates the timing of the reset operation of the charge holding unit 103 in the floating diffusion reset frame and the signal reset frame. A solid line 11 indicates the read timing of the reset signal in the floating diffusion reset frame and the signal reset frame. A solid line 12 indicates the readout timing of the dark current signal and the optical signal in the floating diffusion video frame and the signal video frame. A signal acquired in the floating diffusion video frame is referred to as a dark current signal for convenience in order to distinguish it from other signals. Dark current charges are accumulated in the charge holding unit 103 during a period from the reset signal readout timing indicated by the solid line 11 to the dark current signal or optical signal readout timing indicated by the solid line 12.

  FIG. 4 shows a detailed driving sequence in the floating diffusion dark current reference frame First and the first signal frame of FIG. First, the vertical scanning circuit 300 applies the “Hi” level to the photodiode reset pulses φRPD1 to φRPDm of all rows to reset the photodiodes 101 of all rows. Subsequently, in the floating diffusion reset frame, the vertical scanning circuit 300 applies the “Hi” level to the floating diffusion reset pulse φRMi for each row, and sequentially resets the charge holding units 103 in each row.

  Further, the vertical scanning circuit 300 applies a “Hi” level to the row selection pulse φSEi for each row. As a result, a reset signal based on the reset potential of the charge holding unit 103 is output to the vertical signal line 114 through the amplification transistor 105 and the selection transistor 106 and output through the horizontal signal readout circuit 400. After the reset signals for all rows are output, in order to make the dark current noise component accumulated in the charge holding unit 103 the same in the floating diffusion dark current reference frame and the signal frame, a standby period of the same time as the exposure period is set. Is provided.

  After the end of the waiting period, in the floating diffusion video frame, the vertical scanning circuit 300 applies the “Hi” level to the row selection pulse φSEi for each row. Accordingly, the dark current signal accumulated in the charge holding unit 103 is output to the vertical signal line 114 through the amplification transistor 105 and the selection transistor 106 and is output through the horizontal signal readout circuit 400. When the dark current signals of all rows are output, the floating diffusion dark current reference frame First ends.

  Since the drive timing in the subsequent signal frame is the same as in FIG. 9, description thereof is omitted. In each signal frame, the temperature sensor 7-13 measures the chip temperature. Also in the floating diffusion dark current reference frame Last after the end of the last signal frame, a dark current signal is output by the same driving as described above. In parallel with the above driving, the counter 7-5a counts up by one in each signal frame.

  The drive shown in FIG. 4 is summarized as follows. In each signal frame at the time of continuous shooting, the photodiode 101 and the charge holding unit 103 are reset by the various pulses from the vertical scanning circuit 300 before the exposure period starts, and a reset signal is output from the pixel 100. Also, various pulses from the vertical scanning circuit 300 simultaneously release the reset of the photodiodes of all the pixels in the predetermined region at the start of the exposure period, and the signal charges of all the pixels in the predetermined region from the photodiode 101 at the end of the exposure period. Simultaneously read out, optical signals based on the signal charges are sequentially output from the pixels 100.

  In the floating diffusion dark current reference frame First and the floating diffusion dark current reference frame Last, the photodiode 101 and the charge holding unit 103 are reset by the various pulses from the vertical scanning circuit 300 before the start of the standby period. A reset signal is output from 100. In addition, due to various pulses from the vertical scanning circuit 300, the photodiode is continuously reset during the standby period, and a dark current signal is sequentially output from the pixel 100 at the end of the standby period. The reset signal, optical signal, and dark current signal output from the pixel 100 are temporarily stored in the memory 7-6.

 When the floating diffusion dark current reference frame Last is completed, the image processing circuit 7-5 associates the number of frames corresponding to each signal frame during continuous shooting with the chip temperature in each signal frame, and calculates the temperature change of each signal frame. Make it a function. FIG. 5 shows a temperature change with respect to the number of frames. The X axis in FIG. 5 is the number of frames, and the Y axis is the chip temperature. As shown in FIG. 5, the chip temperature increases as the continuous shooting progresses and the number of frames increases, and the number of frames and temperature change can be defined by a certain function. The image processing circuit 7-5 calculates a function Y = f (X) that approximates the relationship of FIG.

 In order to calculate the approximate function, the image processing circuit 7-5 calculates the difference between the reset signal and the dark current signal for each of the floating diffusion dark current reference frame First and the floating diffusion dark current reference frame Last. This calculation result indicates a dark current noise component (a dark current increase) accumulated in the charge holding unit 103 from when the reset signal is read to when the dark current signal is read. The image processing circuit 7-5 calculates a function indicating the increase in dark current in each frame as follows.

A function indicating the increase in dark current can be expressed as y = α × f (x) + β using the function Y = f (X) shown in FIG. The dark current increase in the floating diffusion dark current reference frame First is a, and the dark current increase in the floating diffusion dark current reference frame Last is b. If the dark current increases in the first and last signal frames are approximately a and b, α and β can be calculated from the following equations (5) and (6). However, N is the number of frames corresponding to the last signal frame.
a = α × 1 + β (5)
b = α × N + β (6)

By using the above function, the increase in dark current in each signal frame can be obtained. The image processing circuit 7-5 includes a reset signal (Signal [Reset_Frame]) and an optical signal (Signal [Video_Frame]) of the first signal frame, a reset signal (Signal [FD_Reset_Frame_First]) and dark signal of the floating diffusion dark current reference frame First. Using the current signal (Signal [FD_Video_Frame_First]), the subtraction process shown in the following equation (7) is performed.
Subtraction result: (Signal [Reset_Frame]-Signal [Video_Frame])
-(Signal [FD_Reset_Frame_First]-Signal [FD_Video_Frame_First]) (7)

 The noise component (Noise [Reset_Frame]) included in the reset signal of the first signal frame is expressed by equation (8), and the noise component (Noise [Video_Frame]) included in the optical signal is expressed by equation (9). In addition, the noise component (Noise [FD_Reset_Frame_First]) included in the reset signal of the floating diffusion dark current reference frame First is expressed by Equation (10), and the noise component included in the dark current signal of the floating diffusion dark current reference frame First (Noise [FD_Video_Frame_First ]) Becomes the equation (11).

 Symbols in the equations (8) to (11) are the same as those in the equations (1) and (2). The noise component included in the subtraction result of equation (7) is equation (12).

As shown by the equation (12), the dark current noise component (N ² _FDv ) due to the dark current variation of the charge holding unit 103 can be canceled.

The image processing circuit 7-5 includes a reset signal (Signal [Reset_Frame]) and an optical signal (Signal [Video_Frame]) of the second and subsequent frames, and a reset signal (Signal [FD_Reset_Frame_First] of the floating diffusion dark current reference frame First. ) And the dark current signal (Signal [FD_Video_Frame_First]) and the dark current increase in each signal frame, the subtraction process shown in the following equation (13) is performed.
Subtraction result: (Signal [Reset_Frame]-Signal [Video_Frame])
-(Signal [FD_Reset_Frame_First]-Signal [FD_Video_Frame_First] + Dark current increase in each signal frame) (13)

 As shown in equation (13), the dark current increases as the chip temperature increases for the dark current noise component (Signal [FD_Reset_Frame_First] -Signal [FD_Video_Frame_First]) that increases in each signal frame during the subtraction process. By adding the minutes, the dark current noise component that increases in each signal frame can be obtained more accurately, and the dark current noise component included in the subtraction processing result can be reduced. In the present embodiment, since the floating diffusion dark current reference frames are prepared one by one before the first signal frame and after the last signal frame, there is no need to insert extra floating diffusion dark current reference frames. Further, it is possible to prevent a decrease in the frame rate for continuous shooting.

(Second embodiment)
Next, a second embodiment of the present invention will be described. FIG. 6 shows the configuration of the camera system according to the present embodiment. A digital camera 7-1b shown in FIG. 6 is obtained by removing the temperature sensor 7-13 from the digital camera 7-1a shown in FIG. Other configurations are the same as those of the digital camera 7-1a.

 Since the continuous shooting drive sequence is the same as the sequence shown in FIGS. 3 and 4, description thereof will be omitted. In the first embodiment, the relationship between the number of frames and the chip temperature is obtained, and a function that approximates the increase in dark current in each signal frame is obtained. In the second embodiment, the number of frames and the increase in dark current are obtained. As the relationship is linear, the increase in dark current in each signal frame is obtained.

  The image processing circuit 7-5 calculates the increase in dark current by calculating the difference between the reset signal and the dark current signal for each of the floating diffusion dark current reference frame First and the floating diffusion dark current reference frame Last. The dark current increase in the floating diffusion dark current reference frame First is a, and the dark current increase in the floating diffusion dark current reference frame Last is b. Also, if the increase in dark current in the first and last signal frames is approximately a and b, and the total number of signal frames is N, the increase in dark current is averaged every frame (b-a) / N To increase. This increase is defined as the dark current average increase.

The image processing circuit 7-5 includes a reset signal (Signal [Reset_Frame]) and an optical signal (Signal [Video_Frame]) of the first signal frame, a reset signal (Signal [FD_Reset_Frame_First]) and dark signal of the floating diffusion dark current reference frame First. Using the current signal (Signal [FD_Video_Frame_First]), the subtraction process shown in the following equation (14) is performed.
Subtraction result: (Signal [Reset_Frame]-Signal [Video_Frame])
-(Signal [FD_Reset_Frame_First]-Signal [FD_Video_Frame_First]) (14)

The image processing circuit 7-5 also includes a reset signal (Signal [Reset_Frame]) and an optical signal (Signal [Video_Frame]) of the nth frame (1 <n ≦ N) of the second and subsequent frames, and floating diffusion. Using the dark current reference frame First reset signal (Signal [FD_Reset_Frame_First]) and dark current signal (Signal [FD_Video_Frame_First]) and the dark current average increment, the subtraction process shown in the following equation (15) is performed.
Subtraction result: (Signal [Reset_Frame]-Signal [Video_Frame])
-(Signal [FD_Reset_Frame_First]-Signal [FD_Video_Frame_First] + Dark current average increase x (n-1)) (15)

  As described above, the dark current noise component included in the subtraction processing result can be reduced. Compared to the first embodiment, the dark current increase can be calculated by a simple calculation.

(Third embodiment)
Next, a third embodiment of the present invention will be described. FIG. 7 shows the configuration of the camera system according to the present embodiment. A digital camera 7-1c shown in FIG. 7 is obtained by removing the counter 7-5a from the digital camera 7-1a shown in FIG. Other configurations are the same as those of the digital camera 7-1a.

 Since the continuous shooting drive sequence is the same as the sequence shown in FIGS. 3 and 4, description thereof will be omitted. In the first embodiment, the relationship between the number of frames and the chip temperature is obtained, and a function that approximates the increase in dark current in each signal frame is obtained, but in the third embodiment, the chip temperature of each signal frame is calculated. Accordingly, the dark current increase of either the floating diffusion dark current reference frame First or the floating diffusion dark current reference frame Last is used for the subtraction process.

  The image processing circuit 7-5 calculates the increase in dark current by calculating the difference between the reset signal and the dark current signal for each of the floating diffusion dark current reference frame First and the floating diffusion dark current reference frame Last.

Further, when performing the signal frame subtraction process, the image processing circuit 7-5 compares the chip temperature of each signal frame with a predetermined threshold value, and performs the following subtraction process according to the comparison result. When the chip temperature is lower than the threshold, the dark current increase in the floating diffusion dark current reference frame First is approximately used as the dark current increase in each signal frame. That is, the image processing circuit 7-5 includes a signal frame reset signal (Signal [Reset_Frame]) and an optical signal (Signal [Video_Frame]), a floating diffusion dark current reference frame First reset signal (Signal [FD_Reset_Frame_First]), and a dark signal. Using the current signal (Signal [FD_Video_Frame_First]), the subtraction process shown in the following equation (16) is performed.
Subtraction result: (Signal [Reset_Frame]-Signal [Video_Frame])
-(Signal [FD_Reset_Frame_First]-Signal [FD_Video_Frame_First]) (16)

When the chip temperature is equal to or higher than the threshold value, the dark current increase in the floating diffusion dark current reference frame Last is approximately used as the dark current increase in each signal frame. That is, the image processing circuit 7-5 includes a signal frame reset signal (Signal [Reset_Frame]) and an optical signal (Signal [Video_Frame]), a floating diffusion dark current reference frame Last reset signal (Signal [FD_Reset_Frame_Last]), and a dark signal. Using the current signal (Signal [FD_Video_Frame_Last]), the subtraction process shown in the following equation (17) is performed.
Subtraction result: (Signal [Reset_Frame]-Signal [Video_Frame])
-(Signal [FD_Reset_Frame_Last]-Signal [FD_Video_Frame_Last]) (17)

  As described above, the dark current noise component included in the subtraction processing result can be reduced. Compared to the first embodiment, the dark current increase can be calculated by a simple calculation. Note that the chip temperature threshold can be arbitrarily changed.

(Fourth embodiment)
Next, a fourth embodiment of the present invention will be described. The configuration of the camera system according to the present embodiment is the same as the configuration of the digital camera 7-1b shown in FIG.

 Since the continuous shooting drive sequence is the same as the sequence shown in FIGS. 3 and 4, description thereof will be omitted. In the first embodiment, the relationship between the number of frames and the chip temperature is obtained, and a function that approximates the dark current increase in each signal frame is obtained, but in the third embodiment, the number of frames in each signal frame is calculated. Accordingly, the dark current increase of either the floating diffusion dark current reference frame First or the floating diffusion dark current reference frame Last is used for the subtraction process.

  The image processing circuit 7-5 calculates the increase in dark current by calculating the difference between the reset signal and the dark current signal for each of the floating diffusion dark current reference frame First and the floating diffusion dark current reference frame Last.

  In addition, when performing signal frame subtraction processing, the image processing circuit 7-5 compares the number of frames corresponding to each signal frame with (maximum number of frames / 2), and performs the following subtraction processing according to the comparison result. Do. The maximum number of frames is the number of frames corresponding to the last signal frame, that is, the total number of signal frames.

When the number of frames is less than (maximum number of frames / 2), the dark current increase of the floating diffusion dark current reference frame First is approximately used as the dark current increase of each signal frame. That is, the image processing circuit 7-5 includes a signal frame reset signal (Signal [Reset_Frame]) and an optical signal (Signal [Video_Frame]), a floating diffusion dark current reference frame First reset signal (Signal [FD_Reset_Frame_First]), and a dark signal. Using the current signal (Signal [FD_Video_Frame_First]), the subtraction process shown in the following equation (18) is performed.
Subtraction result: (Signal [Reset_Frame]-Signal [Video_Frame])
-(Signal [FD_Reset_Frame_First]-Signal [FD_Video_Frame_First]) (18)

When the number of frames is equal to or greater than (the maximum number of frames / 2), the dark current increase of the floating diffusion dark current reference frame Last is approximately used as the dark current increase of each signal frame. That is, the image processing circuit 7-5 performs the reset signal (Signal [Reset_Frame]) and the optical signal (Signal [Video_Frame]) of the signal frame, the reset signal (Signal [FD_Reset_Frame_Last]) and the dark signal of the floating diffusion dark current reference frame Last. Using the current signal (Signal [FD_Video_Frame_Last]), the subtraction process shown in the following equation (19) is performed.
Subtraction result: (Signal [Reset_Frame]-Signal [Video_Frame])
-(Signal [FD_Reset_Frame_Last]-Signal [FD_Video_Frame_Last]) (19)

  As described above, the dark current noise component included in the subtraction processing result can be reduced. Compared to the first embodiment, the dark current increase can be calculated by a simple calculation. Although the threshold for the number of frames is (maximum number of frames / 2), it can be changed arbitrarily.

  As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the specific configuration is not limited to the above-described embodiments, and includes design changes and the like without departing from the gist of the present invention. .

  7-1a, 7-1b, 7-1c: Digital camera (solid-state imaging device), 7-4: Image sensor, 7-5: Image processing circuit (signal processing unit), 7-5a ..Counter, 7-13 ... temperature sensor, 100 ... pixel, 101 ... photodiode (photoelectric conversion unit), 102 ... transfer transistor (readout unit), 103 ... charge holding unit, 104 ... floating diffusion reset transistor (second reset unit), 105 ... amplification transistor (amplification unit), 106 ... selection transistor (selection unit), 107 ... photodiode reset transistor (first Reset unit), 150 ... current source, 200 ... pixel unit, 300 ... vertical scanning circuit (control unit), 400 ... horizontal signal readout circuit

Claims (5)

A photoelectric conversion unit that converts the light incident during the accumulation period into a signal charge and accumulates it; and
A first reset unit that resets signal charges accumulated in the photoelectric conversion unit;
A readout unit for reading out the signal charges from the photoelectric conversion unit;
A charge holding unit for holding the signal charge read through the reading unit;
An amplifying unit for amplifying the signal charge held in the charge holding unit;
A second reset unit that resets the signal charge held in the charge holding unit;
A selection unit that selects a specific pixel that outputs the output of the amplification unit as an output signal;
A pixel portion in which pixels provided with two-dimensionally arranged;
A control unit for controlling the operation of the pixel;
A signal processing unit for performing a first subtraction process of the reset signal and the optical signal output from the pixel;
With
The controller is
In each frame at the time of continuous shooting, the first reset unit and the second reset unit are reset outside the accumulation period, the reset signal is output from the pixel, and predetermined at the start of the accumulation period. The reset by the first reset unit of all the pixels in the region is canceled at the same time, and at the end of the accumulation period, the signal charge is simultaneously read out by the reading unit of all the pixels in the predetermined region, and the optical signal is output from the pixel Output
In the first frame before the first frame of the continuous shooting and the second frame after the last frame of the continuous shooting, the first reset unit and the second reset unit are outside the accumulation period. Causing the pixel to output a first signal based on the reset, causing the first reset unit to perform a reset within the accumulation period, and causing the pixel to receive a second signal at the end of the accumulation period. Output
The signal processing unit performs a second subtraction process between the first signal output in the first frame and the second signal, and outputs the first signal output in the second frame. And a third subtraction process between the second signal and the second subtraction process, using at least one of the second subtraction process and the third subtraction process, and included in the first subtraction process result, A solid-state imaging device that performs correction to reduce a noise component caused by dark current variation in the charge holding unit.   The signal processing unit functions as a function of a temperature change of each frame during continuous shooting based on a temperature detected by a temperature sensor provided in the solid-state imaging device, and a change amount of the noise component in each frame during continuous shooting. Is obtained from the function of the temperature change, and the result of the first subtraction process is obtained using at least one of the result of the second subtraction process and the result of the third subtraction process and the change amount of the noise component. The solid-state imaging device according to claim 1, wherein correction is performed to reduce the included noise component.   The signal processing unit equally divides the result of the fourth subtraction process between the result of the second subtraction process and the result of the third subtraction process according to the total number of frames for continuous shooting, thereby obtaining one frame. And a change amount of the noise component is obtained by using at least one of the result of the second subtraction process and the result of the third subtraction process and the change amount of the noise component. The solid-state imaging device according to claim 1, wherein correction is performed to reduce the noise component included in the result.   The signal processing unit selects either the result of the second subtraction process or the result of the third subtraction process based on a result of comparing a temperature detected by a temperature sensor provided in the solid-state imaging device with a threshold value. The solid-state imaging device according to claim 1, wherein correction is performed to reduce the noise component included in the result of the first subtraction process using the result of the selected subtraction process.   The signal processing unit selects either the result of the second subtraction process or the result of the third subtraction process based on the result of comparing the number of frames during continuous shooting with a threshold value, and the selected subtraction The solid-state imaging device according to claim 1, wherein a correction for reducing the noise component included in the result of the first subtraction process is performed using a result of the process.

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