JP2011165778A - P-type organic thin film transistor, method of manufacturing the same, and coating solution - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a p-type organic thin film transistor with high efficiency of charge injection, to provide a method of manufacturing the p-type organic thin film transistor in which a metal oxide does not melt to cause electrode peeling even if the metal oxide is used as a charge injection layer, and to provide a coating liquid used for the manufacturing method. <P>SOLUTION: The p-type organic thin film transistor 10A includes a gate electrode 12 provided on an insulating substrate 11, a gate insulating layer 13 provided to cover the gate electrode 12, a source electrode 14a and a drain electrode 14b provided on the gate insulating layer 13, a metal oxide layer 15 provided on the surfaces of a source electrode 14a and a drain electrode 14b, and a p-type organic semiconductor layer 16 which is provided on the gate insulating layer 13, between the drain electrode 14b and the source electrode 14a where the metal oxide layer 15 is formed. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an organic thin film transistor, a manufacturing method thereof, and a coating solution used in the manufacturing method.

  Currently, the mainstream of semiconductors is Si-based, but from the viewpoints of flexibility and weight reduction, research on transistors using organic semiconductors (organic TFTs) has become active. In general, when an organic semiconductor is used, a coating film can be formed using a solution, a large area process using various printing methods can be applied, and the cost can be significantly reduced. Moreover, since it is a low-temperature manufacturing process, there is an advantage that a flexible substrate such as plastic can be used.

  The field of application of organic TFTs is wide, and they are used as drive elements for actively driving display devices such as organic EL displays, liquid crystals, and electronic paper, and applications to RFID tags and sensors are also being studied. However, current organic TFTs have not reached practical levels in mobility, operating voltage, and driving stability. Therefore, there is an urgent need to improve not only organic semiconductors but also various aspects such as element configuration and manufacturing process.

  In particular, the problem of contact resistance at the interface between the organic semiconductor and the source electrode is significant, and the transistor characteristics vary greatly depending on how efficiently charges can be injected from the source into the organic semiconductor layer. The contact resistance between the organic semiconductor and the source electrode varies depending on the following two states. One is a physical contact state between the organic semiconductor and the metal serving as the source electrode, and the other is the HOMO (highest occupied orbital) level of the organic semiconductor and the work function of the metal serving as the source electrode. This is the size of the charge injection barrier expressed by the energy difference.

  Since the crystal growth of the organic semiconductor is likely to be inhibited on the metal surface, a crystal grain boundary is likely to be formed in the vicinity of the interface. This grain boundary increases the contact resistance between the source electrode and the organic semiconductor. In order to solve this problem, the surface of the source electrode is surface-treated with a self-assembled monolayer such as thiol to improve the crystal growth of the organic semiconductor in the vicinity of the interface and reduce the crystal grain boundary. It has been found that the physical contact state is improved and the charge injection efficiency is improved (see Non-Patent Document 1).

  In addition, since the HOMO level of the p-type organic semiconductor is approximately 5.0 to 5.5 eV, the charge injection barrier is reduced by using platinum having a deep work function (work function: 5.4 eV) as the source electrode. It has also been found that the charge injection efficiency is improved (see Non-Patent Document 2). Further, a metal oxide such as molybdenum oxide having a deeper work function (work function: 5.6 eV) is supplementarily used as a charge injection layer, and the charge injection barrier is reduced by using the stacked structure as the source electrode, whereby the transistor It is also known that the characteristics are improved (see Non-Patent Document 3).

  In particular, the technique of using a metal oxide such as molybdenum oxide as the charge injection layer is very effective because the metal oxide has a deeper work function than a metal such as platinum, so that the charge injection efficiency is greatly improved. It is a technique. When the metal oxide charge injection layer is used in this way, as shown in FIG. 10, a gate electrode 102, a gate insulating layer (gate insulating film) 103, a source / drain electrode 104, a metal oxide are formed on an insulating substrate 101. In the organic TFT 100 in which the layer 105 and the p-type organic semiconductor layer 106 are formed, the metal oxide layer 105 serving as the charge injection layer is provided between the metal layer 104 serving as the source / drain electrode 104 and the gate insulating layer 103. Also, it functions as an adhesion layer for fixing the source / drain electrode 104 on the gate insulating layer 103 (see Non-Patent Document 3).

IEEE ELECTRON DEVICE LETTERS, VOL. 22, NO. 12, DECEMBER 2001 APPLIED PHYSICS LETTERS 87, 193508 (2005) APPLIED PHYSICS LETTERS 92, 013301 (2008)

However, the conventional organic TFT and its manufacturing method have the following problems.
Usually, when an organic TFT is used in a display driving circuit, the organic TFT is arranged in a high-definition pixel, and therefore, very fine patterning is performed by a photolithography process. However, when a metal oxide is used as a charge injection layer as in the structure shown in FIG. 10, the metal oxide is dissolved in a developer or an etching solution, and electrode peeling occurs. There is a problem that it cannot cope with the photolithographic process performed in the process.

  The present invention has been made in view of such circumstances, and even when a p-type organic thin film transistor having high charge injection efficiency and a metal oxide are used as a charge injection layer, electrode peeling is caused by dissolution of the metal oxide. It is an object of the present invention to provide a method for producing a p-type organic thin film transistor that does not occur, and a coating solution used in the production method.

  As a result of intensive research, the inventors have previously patterned a source / drain electrode by photolithography, applied a solution in which a metal oxide is dissolved on the substrate, and formed a metal oxide serving as a charge injection layer on the source / drain electrode. The present invention has been accomplished by finding a method for forming a physical layer.

  That is, the p-type organic thin film transistor according to the present invention includes a gate electrode provided on an insulating substrate, a gate insulating layer provided to cover the gate electrode, a source electrode provided on the gate insulating layer, and A drain electrode; a metal oxide layer provided on a surface of the source electrode and the drain electrode; and a gate oxide layer provided between the source electrode and the drain electrode on which the metal oxide layer is formed. and a p-type organic semiconductor layer.

  According to such a configuration, in a p-type organic thin film transistor called a bottom-gate / bottom-contact structure, the charge injection barrier is reduced because the metal oxide layer is provided at the interface between the p-type organic semiconductor layer and the source / drain electrodes. As a result, the charge injection efficiency is improved.

  The p-type organic thin film transistor according to the present invention includes a source electrode and a drain electrode provided on an insulating substrate, a metal oxide layer provided on a surface of the source electrode and the drain electrode, the insulating substrate, and the metal A p-type organic semiconductor layer provided between the source electrode and the drain electrode on which the oxide layer is formed and on the metal oxide layer; and a gate insulating layer provided on the p-type organic semiconductor layer; And a gate electrode provided on the gate insulating layer.

  According to such a configuration, in the p-type organic thin film transistor called a top gate / bottom contact structure, the charge injection barrier is reduced because the metal oxide layer is provided at the interface between the p-type organic semiconductor layer and the source / drain electrodes. As a result, the charge injection efficiency is improved.

  The p-type organic thin film transistor according to the present invention is characterized in that the metal oxide layer is made of at least one of molybdenum oxide, vanadium oxide, tungsten oxide, and rhenium oxide.

  By using these metal oxides, the charge injection barrier from the source electrode to the organic semiconductor layer is reduced. Moreover, acquisition is easy and economical efficiency improves.

  The method for manufacturing a p-type organic thin film transistor according to the present invention includes a gate electrode forming step of providing a gate electrode on an insulating substrate, a gate insulating layer forming step of covering the gate electrode and providing a gate insulating layer, and the gate insulating layer A source / drain electrode forming step of providing a source electrode and a drain electrode thereon, a metal oxide layer forming step of providing a metal oxide layer on a surface of the source electrode and the drain electrode, and the metal oxide layer on the gate insulating layer A p-type organic semiconductor layer forming step of providing a p-type organic semiconductor layer between a source electrode and a drain electrode on which a physical layer is formed, and the surface energy of the gate insulating layer is 40 mN / m or less, The metal oxide layer forming step is characterized in that the metal oxide layer is formed by applying a coating solution in which the metal oxide is dissolved.

According to such a manufacturing method, since the surface energy of the gate insulating layer is 40 mN / m (= mJ / m ² ) or less, the coating solution is applied to the gate after the coating solution is applied in the metal oxide layer forming step. A metal oxide layer is formed only on the surface of the source electrode and the surface of the drain electrode without remaining on the surface of the insulating layer.

  A method of manufacturing a p-type organic thin film transistor according to the present invention includes a source / drain electrode forming step of providing a source electrode and a drain electrode on an insulating substrate, and a metal oxide of providing a metal oxide layer on the surface of the source electrode and the drain electrode. A p-type organic semiconductor layer in which a p-type organic semiconductor layer is provided on the insulating substrate and between the source electrode and the drain electrode on which the metal oxide layer is formed and on the metal oxide layer. Forming a gate insulating layer on the p-type organic semiconductor layer, and forming a gate electrode on the gate insulating layer, wherein the surface energy of the insulating substrate is 40 mN / m or less, and the metal oxide layer forming step forms the metal oxide layer by applying a coating solution in which the metal oxide is dissolved. It is characterized in.

  According to such a manufacturing method, since the surface energy of the insulating substrate is 40 mN / m or less, after applying the coating solution in the metal oxide layer forming step, the coating solution does not remain on the surface of the insulating substrate, A metal oxide layer is formed only on the surface of the source electrode and the surface of the drain electrode.

  The coating solution according to the present invention is a coating solution used in the above-described metal oxide layer forming step, wherein the metal oxide is dissolved in a solvent.

  According to such a configuration, since the metal oxide is dissolved in the solvent, it can be used to form the metal oxide layer in the metal oxide layer forming step.

The p-type organic thin film transistor according to the present invention can flow more current at a low voltage by efficient charge injection. Further, it can be arranged in a high-definition pixel, and can be used for a display driving circuit or the like.
The method for producing a p-type organic thin film transistor according to the present invention is easy even in a p-type organic thin film transistor integrated at a high density, with a metal oxide layer serving as a charge injection layer only on the surface of the source electrode and the surface of the drain electrode. And it can be provided with high quality. Therefore, it is possible to provide a p-type organic thin film transistor that can flow more current at a low voltage by efficient charge injection.
By using the coating solution according to the present invention, a metal oxide layer can be easily and simply formed.

It is sectional drawing which shows typically the 1st form of the p-type organic thin-film transistor which concerns on this invention. It is sectional drawing which shows typically the 2nd form of the p-type organic thin-film transistor which concerns on this invention. It is a schematic diagram which shows the process of the manufacturing method of the p-type organic thin-film transistor of the 1st form which concerns on this invention. It is a schematic diagram which shows the process of the manufacturing method of the p-type organic thin-film transistor of the 2nd form which concerns on this invention. 4 is a graph showing transistor characteristics of an element in which a charge injection layer is formed and an element in which no charge injection layer is formed in an example. 4 is a graph showing transistor characteristics of an element in which a charge injection layer is formed and an element in which no charge injection layer is formed in an example. It is a graph which shows the relationship between the threshold voltage of each element and the density | concentration of the molybdenum oxide solution used at the time of film-forming of a charge injection layer in an Example. 4 is a graph showing transistor characteristics of an element in which a charge injection layer is formed and an element in which no charge injection layer is formed in an example. 4 is a graph showing transistor characteristics of an element in which a charge injection layer is formed and an element in which no charge injection layer is formed in an example. It is sectional drawing which shows the form of the conventional p-type organic thin-film transistor typically.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Note that the size, positional relationship, and the like of the members shown in each drawing may be exaggerated for clarity of explanation. Further, in the following description, the same name and reference sign indicate the same or the same members, and detailed description will be omitted as appropriate.

≪P-type organic thin film transistor≫
First, a p-type organic thin film transistor (hereinafter, appropriately referred to as an organic TFT) will be described with reference to FIGS.
<First Embodiment>
The first embodiment of the organic TFT according to the present invention relates to an organic TFT called a bottom gate / bottom contact structure.

As shown in FIG. 1, the organic TFT 10 </ b> A includes a gate electrode 12 provided on the insulating substrate 11, a gate insulating layer 13 provided so as to cover the gate electrode 12, and a source provided on the gate insulating layer 13. Electrode 14a and drain electrode 14b (hereinafter referred to as source / drain electrode 14 as appropriate), metal oxide layer 15 provided on the surface of source electrode 14a and drain electrode 14b, gate insulating layer 13, and metal oxide A p-type organic semiconductor layer (hereinafter referred to as a semiconductor layer as appropriate) 16 provided between the source electrode 14a and the drain electrode 14b on which the layer 15 is formed.
Each configuration will be described below.

[Insulated substrate]
The insulating substrate 11 is a base for the organic TFT 10A.
Examples of the material of the insulating substrate 11 include glass substrates such as quartz and silicon, polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), polyimide (PI), polyetherimide (PEI), Known plastic films such as polystyrene (PS), polyvinyl chloride (PVC), polyethylene (PE), polypropylene (PP), nylon, and polycarbonate can be used. Further, a metal foil or the like can be used as the substrate if the surface is treated with insulation.

[Gate electrode]
The gate electrode 12 is provided by being stacked on the insulating substrate 11. As shown in FIG. 1, the gate electrode 12 is provided in the center of the insulating substrate 11 here, but may be laminated on the entire insulating substrate 11. That is, the gate electrode 12 is provided on at least a part of the insulating substrate 11.

  The material of the gate electrode 12 is, for example, Al, Cr, Au, In, Mo, low resistance silicon, indium oxide, tin oxide, ITO (indium tin oxide), MoW, Al / Cr (laminated in order from the left). Various conductive polymers such as a conductive metal, conductive polyaniline, conductive polypyrrole, conductive polythiophene, polyethylenedioxythiophene (PEDOT), polystyrene sulfonic acid (PSS) can be used. However, it is appropriate in consideration of adhesion to the insulating substrate 11, flatness of the gate insulating layer 13 formed on the gate electrode 12, workability for patterning, resistance to chemical substances used in subsequent processes, and the like. It is necessary to select a new material.

[Gate insulation layer]
The gate insulating layer 13 is provided by being stacked on the gate electrode 12. The gate insulating layer 13 is provided on the gate electrode 12. However, when the gate electrode 12 is provided at the center of the insulating substrate 11, as shown in FIG. Layer 13 is provided. The gate insulating layer 13 in the organic TFT 10A has a predetermined surface energy as will be described later.
Examples of the material of the gate insulating layer 13 include polyethylene (PE), polypropylene (PP), polystyrene (in addition to insulating metal oxides such as SiO ₂ , Ti ₂ O ₅ , SiN, SiON, and A1 ₂ O _3. Insulating polymers such as PS), polyvinylphenol (PVP), polyvinyl alcohol (PVA), polymethyl methacrylate (PMMA), Cytop (registered trademark), and Teflon (registered trademark) can be used. A silane coupling agent or a phosphoric acid-based self-assembled monomolecular film having a long difference alkyl can also be used as a material for the gate insulating layer.

[Source and drain electrodes]
The source / drain electrodes 14 are stacked on the gate insulating layer 13 with a predetermined gap between the electrodes.
Examples of the material of the source / drain electrode 14 include a solution in which metal colloidal particles such as gold, silver and nickel are dispersed, or a paste using metal particles such as silver as a conductive material. As will be described later, when sputtering or vapor deposition is used, metal materials such as aluminum, molybdenum, chromium, titanium, tantalum, nickel, copper, silver, gold, platinum, and palladium, and transparent conductive materials such as ITO are used. A film material can be used.

[Metal oxide layer]
The metal oxide layer 15 is provided as a charge injection layer, and is provided on the surfaces of the source electrode 14a and the drain electrode 14b. In the drawing, the left and right ends on the paper surface are cross sections of the organic TFT 10A, and the illustration of the metal oxide layer 15 is omitted.

As the metal oxide, molybdenum oxide, vanadium oxide, tungsten oxide, rhenium oxide, and a mixture thereof can be used.
Examples of the molybdenum oxide include MoO ₃ , examples of the vanadium oxide include V ₂ O ₅ , examples of the tungsten oxide include WO ₃ , and examples of the rhenium oxide include Re ₂ O ₇ .

However, the oxidation number of these substances may be slightly reduced. When a metal oxide is used, the oxidation number of the metal oxide is slightly reduced as a whole in the manufacturing process described later. As a result, electrons are bonded to the site from which oxygen is removed, and exchange of electrons is performed, thereby further increasing the charge injection efficiency.
The metal oxide layer 15 can contain an organic compound, a polymer compound, or the like. The thickness of the metal oxide layer 15 is not particularly limited, but is preferably 10 nm or less.

  Here, there is a charge injection layer used by dissolving a conductive polymer in a solution. However, since the conductive polymer solution has a high viscosity, it tends to remain on the gate insulating layer 13 in the manufacturing process described later. As a result, a leak occurs between the source / drain electrodes 14, and good transistor characteristics cannot be obtained. As the transistor becomes finer (higher definition), the probability that the conductive polymer solution remains on the gate insulating layer 13 across the source / drain electrodes 14 increases, and the yield decreases when used in a display driver circuit. Draw. This problem becomes prominent particularly when the distance between the source electrode 14a and the drain electrode 14b is 10 μm or less.

[P-type organic semiconductor layer]
The semiconductor layer 16 is formed on the gate insulating layer 13 and between the source electrode 14a and the drain electrode 14b on which the metal oxide layer 15 is formed, that is, on the portion where the source / drain electrode 14 on the gate insulating layer 13 is not formed. Are provided in a stacked manner. As shown in FIG. 1, the semiconductor layer 16 may be provided up to part of the upper part of the source electrode 14a and the drain electrode 14b on which the metal oxide layer 15 is formed. It may be provided up to the entire upper part of the electrode 14a and the drain electrode 14b.

  Since the charge injection layer constituting the present invention is the metal oxide layer 15, the work TFT has a large work function and is suitable for reducing the contact resistance of the p-type organic semiconductor. It is suitable to use a p-type organic semiconductor as the layer.

  Examples of the material of the semiconductor layer 16 include dinaphthothienothiophene (DNTT), pentacene, naphthacene, thiophene oligomer, perylene, α-sexiphenyl, and derivatives thereof, naphthalene, anthracene, rubrene, and derivatives thereof. Coronene and derivatives thereof, and low molecular semiconductors such as metal-containing phthalocyanine, metal-free phthalocyanine, and derivatives thereof can be used. Alternatively, poly (2,5-bis (3-alkylthiophene-2-yl) thieno [3,2-b] thiophene) (PBTTT), polyalkylthiophene, polyalkylfluorene based on thiophene or fluorene, and A polymer semiconductor such as a derivative thereof can be used.

  Further, the film thickness of the semiconductor layer 16 is not particularly limited, but the obtained transistor characteristics are often greatly influenced by the film thickness of the semiconductor layer 16. The optimum film thickness varies depending on the material of the organic semiconductor, but is generally preferably in the range of several nm to 100 nm.

  In the organic TFT 10A described above, when driving the organic TFT 10A, a negative potential (minus potential) is applied to the gate electrode 12, a ground potential (0 V, ground) is applied to the source electrode 14a, and a negative potential is applied to the drain electrode 14b. As a result, charges are injected from the source electrode 14 a into the semiconductor layer 16. In the present invention, since the metal oxide layer 15 is provided at the interface between the semiconductor layer 16 and the source / drain electrode 14, charges are efficiently injected from the source electrode 14 a into the semiconductor layer 16.

Second Embodiment
The second embodiment of the organic TFT according to the present invention relates to an organic TFT called a top gate / bottom contact structure.

As shown in FIG. 2, the organic TFT 10B includes a source electrode 14a and a drain electrode 14b provided on the insulating substrate 11, a metal oxide layer 15 provided on the surface of the source electrode 14a and the drain electrode 14b, and the insulating A p-type organic semiconductor layer 16 and a p-type organic semiconductor layer provided on the substrate 11, between the source electrode 14 a and the drain electrode 14 b on which the metal oxide layer 15 is formed, and on the metal oxide layer 15. 16 is provided with a gate insulating layer 13 provided on the gate insulating layer 13 and a gate electrode 12 provided on the gate insulating layer 13.
Each configuration will be described below.

  In addition, about the material which comprises the insulating substrate 11, the source electrode 14a, the drain electrode 14b, the semiconductor layer 16, the metal oxide layer 15, etc., the insulating substrate 11, the source electrode 14a, the drain electrode 14b in the said 1st Embodiment, Since it is the same as that of the semiconductor layer 16, the metal oxide layer 15, etc., description is abbreviate | omitted here.

[Insulated substrate]
The insulating substrate 11 is a base of the organic TFT 10B. The insulating substrate 11 in the organic TFT 10B has a predetermined surface energy as will be described later.

[Source and drain electrodes]
The source / drain electrodes 14 are stacked on the insulating substrate 11 with a predetermined gap between the electrodes.

[Metal oxide layer]
The metal oxide layer 15 is provided as a charge injection layer, and is provided on the surfaces of the source electrode 14a and the drain electrode 14b. In the drawing, the left and right ends on the paper surface are cross sections of the organic TFT 10B, and the illustration of the metal oxide layer 15 is omitted.

[P-type organic semiconductor layer]
The semiconductor layer 16 is provided on the insulating substrate 11, between the source electrode 14 a and the drain electrode 14 b on which the metal oxide layer 15 is formed, and on the metal oxide layer 15. That is, the insulating layer 11 is provided by being laminated on the portion where the source / drain electrode 14 is not formed and on the metal oxide layer 15 covered with the source / drain electrode 14.

[Gate insulation layer]
The gate insulating layer 13 is provided by being stacked on the semiconductor layer 16.

[Gate electrode]
The gate electrode 12 is provided by being stacked on the gate insulating layer 13. As shown in FIG. 2, the gate electrode 12 is provided in the center of the gate insulating layer 13 here, but may be stacked on the entire gate insulating layer 13. That is, the gate electrode 12 is provided on at least a part of the gate insulating layer 13.

  In the organic TFT 10B described above, when driving the organic TFT 10B, a negative potential (minus potential) is applied to the gate electrode 12, a ground potential (0 V, ground) is applied to the source electrode 14a, and a negative potential is applied to the drain electrode 14b. As a result, charges are injected from the source electrode 14 a into the semiconductor layer 16. In the present invention, since the metal oxide layer 15 is provided at the interface between the semiconductor layer 16 and the source / drain electrode 14, charges are efficiently injected from the source electrode 14 a into the semiconductor layer 16.

≪Method for manufacturing p-type organic thin film transistor≫
Next, a method for manufacturing a p-type organic thin film transistor will be described with reference to FIGS.
<First manufacturing method>
As shown in FIGS. 3A to 3E, the first manufacturing method of the organic TFT according to the present invention is a manufacturing method of the organic TFT 10A according to the first embodiment, and a gate electrode forming step (FIG. 3). (A)), a gate insulating layer forming step (FIG. 3 (b)), a source / drain electrode forming step (FIG. 3 (c)), a metal oxide layer forming step (FIG. 3 (d)), and a p-type organic semiconductor layer forming step (hereinafter, appropriately referred to as a semiconductor layer forming step) (FIG. 3E).
Hereinafter, each step will be described.

[Gate electrode formation process]
As shown in FIG. 3A, the gate electrode forming step is a step of providing the gate electrode 12 on the insulating substrate 11.
The gate electrode 12 can be formed by a well-known film forming method such as vacuum vapor deposition, electron beam vapor deposition, RF sputtering, or printing.

[Gate insulation layer formation process]
As shown in FIG. 3B, the gate insulating layer forming step is a step of covering the gate electrode 12 and providing the gate insulating layer 13. That is, the gate insulating layer 13 is provided on the gate electrode 12, but when the gate electrode 12 is provided in the center of the insulating substrate 11, as shown in FIG. Layer 13 is provided.
The gate insulating layer 13 can be formed using a material for the gate insulating layer 13 by a known film formation method such as a spin coating method, a sputtering method, a CVD method, or a printing method.

Here, as described later, in the manufacture of the organic TFT 10A, the metal oxide is applied only to the surface of the source / drain electrode 14 by applying a coating solution in which the metal oxide is dissolved in the solvent in the metal oxide layer forming step. Layer 15 is formed. Therefore, since it is necessary to prevent the applied solution from remaining on the surface of the gate insulating layer 13, the surface energy of the gate insulating layer 13 is set to 40 mN / m or less. By setting the surface energy to 40 mN / m or less, liquid repellency is imparted to the surface of the gate insulating layer 13, the applied solution is repelled, and the coating solution does not remain on the gate insulating layer 13.
Further, by setting the surface energy of the gate insulating layer 13 to 40 mN / m or less, it becomes smaller than the surface energy of the source / drain electrode 14 and the applied solution remains only on the source / drain electrode 14 in a self-organized manner. The patterning process of the metal oxide layer 15 can be omitted.
The gate insulating layer 13 only needs to have liquid repellency on the surface, but there is no problem as long as the surface energy is 40 mN / m or less with respect to a general organic solvent or water used in the substrate manufacturing process. Since liquid repellency is imparted, the surface energy is set to 40 mN / m or less in the present invention.

In order to obtain such surface energy, a material having a surface energy of 40 mN / m or less, such as a fluorine-based polymer material, may be used as the material of the gate insulating layer 13.
Alternatively, when the gate insulating layer 13 having a large surface energy is used, the surface energy is set to 40 mN / m or less by performing a surface treatment. Specifically, the channel region in which the gate insulating layer 13 is exposed is surface-treated with a silane coupling agent having an alkyl group or a fluorinated alkyl group or HMDS (hexamethyldisilazane), so that the surface is self-organized. A monomolecular film is formed so that the surface energy is 40 mN / m or less. A phosphoric acid-based self-assembled monolayer having a long-difference alkyl group can also be used. Note that a structure in which an insulating film with a small surface energy, that is, an insulating film with a surface energy of 40 mN / m or less is stacked over an insulating film with a large surface energy can also be used. The lower limit value of the surface energy is not particularly limited, and is preferably lower. However, a certain degree of adhesion to the gate electrode 12, the source / drain electrode 14 and the insulating substrate 11 with which the gate insulating layer 13 is in contact is necessary. Therefore, it may be set to 10 mN / m or more. The surface energy can be measured by, for example, the Zisman plot method or the Owens-Wendt method.

[Source / drain electrode formation process]
As shown in FIG. 3C, the source / drain electrode formation step is a step of providing the source electrode 14 a and the drain electrode 14 b on the gate insulating layer 13.
The source / drain electrodes 14 can be formed by, for example, a printing method such as a screen printing method, an ink jet method, a flexographic printing method, and a reverse offset printing method in addition to a photolithography method and a dispenser method.

  For example, a metal, an alloy, or a transparent conductive film material is first formed on the entire surface by sputtering or vapor deposition, and then a desired resist pattern is formed by photolithography or screen printing using a resist material. Thereafter, a desired pattern can be formed by etching with an etchant such as an acid. In addition, a desired pattern can be directly formed from a metal, an alloy, or a transparent conductive film material by a sputtering method or a vapor deposition method using a mask.

[Metal oxide layer forming step]
As shown in FIG. 3D, the metal oxide layer forming step is a step of providing the metal oxide layer 15 on the surfaces of the source electrode 14a and the drain electrode 14b.
The formation of the metal oxide layer 15 includes a step of applying a coating solution in which the metal oxide is dissolved and a step of leaving the coating solution on the source / drain electrodes 14.
The formation of the metal oxide layer 15 will be specifically described in the case of using a spin coating method. First, a solution is applied on a substrate on which the source / drain electrodes 14 are patterned (in a stage where the source / drain electrodes 14 are formed), that is, on the gate insulating layer 13 and on the source / drain electrodes 14. . Since the surface energy of the gate insulating layer 13 is 40 mN / m or less, the applied solution can remain only on the source / drain electrodes 14 by rotating the substrate after applying the solution. From the viewpoint of more efficiently leaving the solution only on the source / drain electrodes 14, the rotation speed of the substrate is preferably 1000 to 4000 rpm.

  Moreover, as a coating method of the solution other than the spin coating method, various printing methods such as screen printing, ink jet printing, and gravure printing, and coating methods such as a casting method can be used. In these methods, since the surface energy of the gate insulating layer 13 is 40 mN / m or less, an excess solution can be blown off simply by blowing the surface of the gate insulating layer 13 after coating after applying the solution. Thereby, the metal oxide layer 15 which is a charge injection layer can be formed only on the source / drain electrode 14. The coating solution will be described later.

  After the metal oxide is coated and formed in this way, the metal oxide layer 15 can be formed on the source / drain electrode 14 by annealing on a hot plate to dry the solvent.

[P-type organic semiconductor layer forming step]
As shown in FIG. 3E, in the semiconductor layer forming step, the semiconductor layer 16 is provided on the gate insulating layer 13 and between the source electrode 14a and the drain electrode 14b on which the metal oxide layer 15 is formed. It is. As shown in FIG. 3, the semiconductor layer 16 may be provided up to a part of the upper part of the source electrode 14a and the drain electrode 14b on which the metal oxide layer 15 is formed. It may be provided up to the entire upper part of the electrode 14a and the drain electrode 14b.
The method for forming the semiconductor layer 16 is generally a vacuum deposition method in the case of a low molecular organic semiconductor, and is generally a spin coating method, a printing method, an ink jet method, or the like in the case of a polymer organic semiconductor. As a matter of course, there are materials that can use the same manufacturing method as that of high-molecular organic semiconductors even in low-molecular organic semiconductors.

<Second production method>
As shown in FIGS. 4A to 4E, the second manufacturing method of the organic TFT manufacturing method according to the present invention is a manufacturing method of the organic TFT 10B according to the second embodiment, and includes a source / drain electrode. Forming step (FIG. 4A), metal oxide layer forming step (FIG. 4B), and p-type organic semiconductor layer forming step (hereinafter referred to as a semiconductor layer forming step as appropriate) (FIG. 4C). ), A gate insulating layer forming step (FIG. 4D), and a gate electrode forming step (FIG. 4E).
Hereinafter, each step will be described.

[Source and drain electrode formation process]
As shown in FIG. 4A, the source / drain electrode formation step is a step of providing the source electrode 14a and the drain electrode 14b on the insulating substrate 11.
Here, as will be described later, in the manufacture of the organic TFT 10B of the present invention, by applying a coating solution in which a metal oxide is dissolved in a solvent in the metal oxide layer forming step, only the surface of the source / drain electrode 14 is applied. A metal oxide layer 15 is formed. Therefore, since it is necessary to prevent the applied solution from remaining on the surface of the insulating substrate 11, the surface energy of the insulating substrate 11 is set to 40 mN / m or less. By setting the surface energy to 40 mN / m or less, liquid repellency is imparted to the surface of the insulating substrate 11, the applied solution is repelled, and the coating solution does not remain on the insulating substrate 11.
Moreover, by making the surface energy of the insulating substrate 11 40 mN / m or less, the surface energy of the source / drain electrode 14 becomes smaller, and the applied solution remains only on the source / drain electrode 14 in a self-organized manner. The patterning process of the metal oxide layer 15 can be omitted.
The insulating substrate 11 only needs to have liquid repellency on the surface. However, if the surface energy is 40 mN / m or less with respect to a general organic solvent or water used in the substrate forming process, the insulating substrate 11 has no problem. Since liquidity is imparted, in the present invention, the surface energy is set to 40 mN / m or less.

In order to obtain such surface energy, a material having a surface energy of 40 mN / m or less, such as a fluorine-based polymer material, may be used as the material of the insulating substrate 11.
Alternatively, when the insulating substrate 11 having a large surface energy is used, the surface energy is set to 40 mN / m or less by performing a surface treatment. Specifically, the channel region where the insulating substrate 11 is exposed is surface-treated with a silane coupling agent having an alkyl group or a fluorinated alkyl group or HMDS (hexamethyldisilazane), thereby self-organizing on the surface. A monomolecular film is formed so that the surface energy is 40 mN / m or less. Alternatively, the surface energy can be reduced to 40 mN / m or less by using a surface coating treatment with an insulating material having a small surface energy, a fluorinated plasma treatment, or the like. The lower limit value of the surface energy is not particularly limited and is preferably low. However, since the adhesiveness with the source / drain electrode 14 with which the insulating substrate 11 is in contact is required to some extent, the lower limit is 10 mN / m or more. Good. The surface energy can be measured by, for example, the Zisman plot method or the Owens-Wendt method.
In addition, since the method for forming the source / drain electrode 14 is the same as that of the first manufacturing method, description thereof is omitted here.

[Metal oxide layer forming step]
As shown in FIG. 4B, the metal oxide layer forming step is a step of providing the metal oxide layer 15 on the surfaces of the source electrode 14a and the drain electrode 14b. The metal oxide layer 15 is formed on the substrate on which the source / drain electrodes 14 are patterned (on the stage where the source / drain electrodes 14 are formed), that is, on the insulating substrate 11 and the source / drain electrodes. 14 is the same as the first manufacturing method except that the solution is applied onto the substrate 14, and the description thereof is omitted here.

[P-type organic semiconductor layer forming step]
As shown in FIG. 4C, the semiconductor layer forming step is performed on the insulating substrate 11, between the source electrode 14a and the drain electrode 14b on which the metal oxide layer 15 is formed, and on the metal oxide layer 15. This is a step of providing the semiconductor layer 16. Since the method for forming the semiconductor layer 16 is the same as the first manufacturing method, description thereof is omitted here.

[Gate insulation layer formation process]
As shown in FIG. 4D, the gate insulating layer forming step is a step of providing the gate insulating layer 13 on the semiconductor layer 16. Since the method for forming the gate insulating layer 13 is the same as the first manufacturing method, description thereof is omitted here.

[Gate electrode formation process]
As shown in FIG. 4E, the gate electrode forming step is a step of providing the gate electrode 12 on the gate insulating layer 13. Since the formation method of the gate electrode 12 is the same as that of the first manufacturing method, description thereof is omitted here.

≪Coating solution≫
Next, the coating solution will be described.
The coating solution according to the present invention is a coating solution used in the metal oxide layer forming step (FIGS. 3D and 4B), in which the metal oxide is dissolved in a solvent.

As the solvent, pure water or an alcohol such as ethanol, or an organic solvent such as toluene or dichloroethane can be used.
As the metal oxide, molybdenum oxide, vanadium oxide, tungsten oxide, rhenium oxide, and a mixture thereof can be used. Examples of the molybdenum oxide include MoO ₃ , examples of the vanadium oxide include V ₂ O ₅ , examples of the tungsten oxide include WO ₃ , and examples of the rhenium oxide include Re ₂ O ₇ .

  Although the density | concentration of the metal oxide in a coating solution is not specifically limited, It is preferable that it is 0.01-0.05 mass%. In this concentration range, since the charge injection barrier is further reduced, the charge injection efficiency is further increased. The coating solution can contain an organic compound, a polymer compound, and the like.

  The embodiment according to the present invention has been described above. However, the present invention is not limited to the above-described embodiment, and can be appropriately changed without departing from the gist of the present invention.

For example, the organic TFT of the present invention can be provided with a sealing layer, a light shielding layer and the like as required.
Also in the manufacturing method, other steps may be included before or after each step or between each step as long as each step is not adversely affected. Examples of the other processes include a cleaning process for cleaning the insulating substrate and an unnecessary object removing process for removing unnecessary substances such as dust.

  Next, examples of the present invention will be described in detail, but the present invention is not limited to the following examples. Here, a configuration that does not belong to the present invention will be taken up and explained as appropriate. In the present invention, there is no difference in effect between the organic TFT 10A called a bottom gate / bottom contact structure and the organic TFT 10B called a top gate / bottom contact structure. Therefore, in this embodiment, the organic TFT 10A is representative. The experiment was conducted.

[First embodiment]
As a first embodiment, an organic TFT having the structure shown in FIG. 1 is formed using a low molecular semiconductor DNTT described in “J. AM. CHEM. SOC. VOL. 129, NO. 8, 2007 2224-2225”. It was produced by the procedure.

Example 1
First, a glass substrate was used as an insulating substrate, and Al serving as a gate electrode was formed on this substrate to a thickness of 30 nm by vacuum deposition.
Next, Teflon AF1600 (manufactured by Mitsui DuPont Fluorochemical) (surface energy: 15.7 mN / m) as a gate insulating layer material was formed by a spin coating method, followed by 30 minutes at 90 ° C. and 2 hours at 120 ° C. In order, baking was performed on a hot plate to form a gate insulating layer having a thickness of 150 nm.

  Next, Au was deposited on the entire surface of the substrate formed up to the gate insulating layer by a vacuum deposition method so as to have a thickness of 30 nm. And the resist was apply | coated on the board | substrate, the pattern of the source / drain electrode was exposed, and the resist was peeled with the developing solution. The substrate was immersed in an etching solution of Au to etch the source / drain electrode pattern, and the remaining resist was immersed in acetone and peeled off. Next, after washing with isopropyl alcohol, the isopropyl alcohol was dried by blowing nitrogen to produce a substrate on which source / drain electrodes were formed.

  Next, molybdenum trioxide (high purity chemical) is dispersed in pure water and stirred for 3 hours in a state heated to 80 ° C., so that the concentration of the coating solution of the metal oxide to be the charge injection layer becomes 0.001% by mass. It was adjusted. The substrate formed up to the source / drain electrodes is set on a spin coater (Mikasa: 1H-D7), and the molybdenum oxide aqueous solution is dropped on the substrate through a 0.2 μm filter, and then the substrate is rotated at 2000 rpm. And rotated for 30 seconds. This substrate was transferred to a hot plate and baked at a temperature of 120 ° C. for 30 minutes to form a metal oxide layer to be a charge injection layer. Then, a low molecular semiconductor DNTT was vacuum-deposited on the substrate on which the charge injection layer was formed to a film thickness of 50 nm to form a semiconductor layer.

(Example 2)
An organic TFT in which a charge injection layer is formed using a coating solution in which only the concentration of metal oxide is changed and molybdenum trioxide (high purity chemical) is 0.005% by mass in the manufacturing method according to Example 1. Produced.

(Example 3)
An organic TFT in which a charge injection layer is formed using a coating solution in which only the concentration of metal oxide is changed and molybdenum trioxide (high-purity chemistry) is 0.01% by mass in the manufacturing method according to Example 1. It was made.

Example 4
An organic TFT in which a charge injection layer was formed using a coating solution in which only the concentration of metal oxide was changed and molybdenum trioxide (high purity chemical) was 0.05% by mass in the manufacturing method according to Example 1. Produced.

(Example 5)
An organic TFT in which a charge injection layer is formed using a coating solution in which only the concentration of metal oxide is changed and molybdenum trioxide (high-purity chemistry) is 0.1% by mass in the manufacturing method according to Example 1. Produced.

(Comparative Example 1)
In order to confirm the effect of the charge injection layer, an organic TFT having the same element structure as in Example 1 but having the same manufacturing process except that the charge injection layer was not formed was manufactured.

The transistor characteristics of the element in which the charge injection layer of Example 3 is formed and the element in which the charge injection layer of Comparative Example 1 is not formed are shown in FIGS.
As shown in FIG. 5, the gate voltage with a current value exceeding 10 ⁻⁵ A is about −20 V in the device of Comparative Example 1, whereas it is about −15 V in the device of Example 3, A voltage reduction of 5V has been achieved.
Here, the threshold voltage as an index of the operating voltage of the transistor can be calculated from the slope of the graph obtained by taking the drain current in FIG. 6 to the ½ power, and when the straight line with the slope is extrapolated, the horizontal axis ( (Gate voltage). The threshold voltage obtained by this method was −6.8 V for the device of Comparative Example 1 and −5.1 V for the device of Example 3 into which the charge injection layer was introduced. Due to the effect of the charge injection layer, the threshold voltage of the device of Example 3 is lowered to about half. As can be seen from the above results, it can be seen that in the organic TFT shown in FIG. 1 using a low molecular semiconductor, the charge injection layer using the molybdenum oxide solution functions effectively.

  FIG. 7 shows the relationship between the threshold voltage of each element and the concentration of the molybdenum oxide solution used when forming the charge injection layer for the organic TFTs of Examples 1 to 5 and Comparative Example 1. As can be seen from FIG. 7, the threshold voltage decreases as the concentration of the molybdenum oxide solution increases, and a sufficient characteristic improvement effect can be obtained at 0.01% by mass or more. Moreover, when the optimal solution concentration is estimated, it is 0.01-0.05 mass%.

[Second Embodiment]
As a second embodiment, using the polymer semiconductor PB16TTT described in “JOURNAL OF APPLIED PHYSICS 101, 054517 (2007) 054517-1-054517-5”, an organic TFT having the structure shown in FIG. Produced.

(Example 6)
A polymer semiconductor PB16TTT dissolved in a toluene solution at a concentration of 0.3% by mass on a substrate on which a charge injection layer was formed by the same manufacturing method as in Example 3 was formed by spin coating, and then 150 ° C. Was baked on a hot plate for 30 minutes to form a polymer semiconductor layer having a thickness of 30 nm.

(Comparative Example 2)
In order to confirm the effect of the charge injection layer, an organic TFT having the same element structure as that of Example 6 except that the charge injection layer was not formed and the other manufacturing processes were the same.

FIG. 8 and FIG. 9 show transistor characteristics of the device in which the charge injection layer of Example 6 is formed and the device of Comparative Example 2 in which the charge injection layer is not formed.
As shown in FIG. 8, the gate voltage with a current value exceeding 10 ⁻⁷ A is about −16 V in the element of Comparative Example 2, whereas it is about −4 V in the element of Example 6, and about A voltage reduction of 12V has been achieved.
Further, the threshold voltage obtained from FIG. 9 was −1.7 V for the device of Comparative Example 2, and −1.5 V for the device of Example 6 into which the charge injection layer was introduced. Due to the effect of the charge injection layer, the threshold voltage of the device of Example 6 is lowered. As can be seen from this result, the charge injection layer using the molybdenum oxide solution functions effectively also in the organic TFT using the polymer semiconductor.

  As described above, according to the organic TFT manufacturing method of the present invention, the metal oxide layer can be formed on the surface of the source / drain electrode, that is, the interface between the semiconductor layer and the source / drain electrode. Thus, the organic TFT of the present invention which has a form that has not been conventionally obtained can be produced. In this organic TFT, the metal oxide layer exhibits a sufficient effect as a charge injection layer, and is excellent in charge injection efficiency.

10A, 10B p-type organic thin film transistor (organic TFT)
DESCRIPTION OF SYMBOLS 11 Insulating substrate 12 Gate electrode 13 Gate insulating layer 14 Source / drain electrode 14a Source electrode 14b Drain electrode 15 Metal oxide layer (charge injection layer)
16 p-type organic semiconductor layer (semiconductor layer)

Claims (6)

A gate electrode provided on an insulating substrate;
A gate insulating layer provided to cover the gate electrode;
A source electrode and a drain electrode provided on the gate insulating layer;
A metal oxide layer provided on the surfaces of the source electrode and the drain electrode;
A p-type organic thin film transistor, comprising: a p-type organic semiconductor layer provided on the gate insulating layer and between a source electrode and a drain electrode on which the metal oxide layer is formed. A source electrode and a drain electrode provided on an insulating substrate;
A metal oxide layer provided on the surfaces of the source electrode and the drain electrode;
A p-type organic semiconductor layer provided on the insulating substrate, between the source electrode and the drain electrode on which the metal oxide layer is formed, and on the metal oxide layer;
A gate insulating layer provided on the p-type organic semiconductor layer;
A p-type organic thin film transistor, comprising: a gate electrode provided on the gate insulating layer.   3. The p-type organic thin film transistor according to claim 1, wherein the metal oxide layer is made of at least one of molybdenum oxide, vanadium oxide, tungsten oxide, and rhenium oxide. A gate electrode forming step of providing a gate electrode on an insulating substrate;
A gate insulating layer forming step of covering the gate electrode and providing a gate insulating layer;
A source / drain electrode forming step of providing a source electrode and a drain electrode on the gate insulating layer;
A metal oxide layer forming step of providing a metal oxide layer on the surfaces of the source electrode and the drain electrode;
A p-type organic semiconductor layer forming step of providing a p-type organic semiconductor layer on the gate insulating layer and between the source electrode and the drain electrode on which the metal oxide layer is formed,
The surface energy of the gate insulating layer is 40 mN / m or less,
In the metal oxide layer forming step, the metal oxide layer is formed by applying a coating solution in which a metal oxide is dissolved. A source / drain electrode forming step of providing a source electrode and a drain electrode on an insulating substrate;
A metal oxide layer forming step of providing a metal oxide layer on the surfaces of the source electrode and the drain electrode;
A p-type organic semiconductor layer forming step of providing a p-type organic semiconductor layer on the insulating substrate and between the source electrode and the drain electrode on which the metal oxide layer is formed and on the metal oxide layer;
A gate insulating layer forming step of providing a gate insulating layer on the p-type organic semiconductor layer;
A gate electrode forming step of providing a gate electrode on the gate insulating layer,
The surface energy of the insulating substrate is 40 mN / m or less,
In the metal oxide layer forming step, the metal oxide layer is formed by applying a coating solution in which a metal oxide is dissolved.   A coating solution used in the metal oxide layer forming step according to claim 4 or 5, wherein the metal oxide is dissolved in a solvent.

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