JP2011164281A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device for achieving low power consumption. <P>SOLUTION: The display device includes: a plurality of pixel electrodes PE arranged like a matrix on a substrate SB1; a plurality of scanning lines GL arranged along rows where the pixel electrodes PE are arranged; a plurality of signal lines SL arranged along columns where the pixel electrodes PE are arranged; pixel switches SW disposed in the vicinity of positions where the plurality of scanning lines GL and the plurality of signal lines SL cross each other; a signal line short-circuiting circuit 10 configured to short-circuiting each plurality of pairs of the plurality of signal lines SL; and a driving part 7 configured to supply video signals different in polarity by the number of the plurality of pairs to pixel electrodes PE in a row direction and a column direction where the plurality of pixel electrodes PE are arranged. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a display device, and more particularly to an active matrix display device.

  As a signal line driving method used in an active matrix type liquid crystal display device, that is, a video signal writing method from each signal line to each pixel, crosstalk and flicker are prevented and compared with the H / V inversion driving method. A 2H2V inversion method has been proposed as one that can reduce power consumption (see, for example, Patent Document 1).

  In the 2H2V inversion driving, the positive and negative polarities of video signals applied to the left and right (horizontal scanning direction) pixel electrodes adjacent to an arbitrary pixel electrode are made different from each other, and the vertical (vertical scanning) adjacent to the arbitrary pixel electrode is made different. The positive and negative polarities of the video signals applied to the pixel electrodes in the (direction) are also controlled to be different from each other.

  By performing such control, since the polarity of the pixel capacitance of the display pixels arranged in the vertical scanning direction is inverted every two horizontal scanning periods, the pixel potential caused by the coupling capacitance between the signal line and the pixel electrode is reversed. The fluctuation is canceled and the occurrence of vertical crosstalk can be prevented.

  In addition, even during one row in one horizontal scanning period, the number of positive and negative pixels is almost equal, and there is no deviation, so that occurrence of lateral crosstalk can be prevented. Furthermore, since the number of positive and negative pixels is almost equal for each frame and there is no deviation, flicker does not occur and good display quality can be obtained. Further, since the positive / negative inversion period of the video signal in the vertical scanning direction is every two horizontal scanning periods, power consumption can be suppressed as compared with the H / V inversion driving method as shown in FIG.

  By the way, as a method for driving a signal line used in an active matrix display device, a driving method using a signal line short circuit has been proposed particularly for the purpose of reducing power consumption (for example, Patent Document 2). reference).

  In the driving method described in the above document, positive and negative write data signals are alternately applied to a plurality of signal lines in a certain horizontal scanning period, and positive and negative polarities are applied to each pixel electrode. Write signals alternately. Then, all the signal lines are short-circuited before writing to the pixel electrode electrically connected to the scanning line driven in the next horizontal scanning period.

  Thereafter, scanning data driven in the next one horizontal scanning period is applied by alternately applying write data signals of positive polarity and negative polarity to a plurality of signal lines so that the polarity is opposite to that of the previous one horizontal scanning period. Writing is performed on the pixel electrode electrically connected to the line. At this time, the potential of each signal line repeats a pattern of positive (negative) potential, intermediate potential, negative (positive) potential, intermediate potential,.

  In normal image data, assuming that the average gradation of all positive pixels and all negative pixels in one screen is substantially the same, all signal lines are short-circuited, so that all signal lines have an intermediate potential. It becomes. Since only the signal lines are short-circuited, power supply from the signal line driving circuit is unnecessary, and the signal line driving circuit shifts each signal line potential from a positive (negative) potential to a negative (positive) potential. Instead, it is only necessary to shift from the intermediate potential to the negative (positive) potential, so that the power consumption is halved.

JP 2003-215540 A JP-A-9-243998

  Consider a case where the two driving methods of 2H2V inversion driving and signal line short-circuit driving as described above are combined. Even when 2H2V inversion drive is adopted, in normal image data, all the signal lines are short-circuited, assuming that the average gradation of all the positive polarity pixels and all the negative polarity pixels in one screen is substantially the same. As a result, all signal line potentials become intermediate potentials.

  At this time, the potential of each signal line is positive (negative) potential, intermediate potential, positive (negative) potential, intermediate potential, negative (positive) potential, intermediate potential, negative (positive) potential, intermediate potential, positive (negative) ) Repeat pattern of potential. In a row where the polarity changes from a positive (negative) potential to a negative (positive) potential, the signal line driver circuit does not displace each signal line potential from a positive (negative) potential to a negative (positive) potential. Since it is only necessary to shift from a potential to a negative (positive) potential, power consumption is halved. On the other hand, in a row where the polarity does not change from the positive (negative) potential to the positive (negative) potential, the power is increased because the potential is changed from the positive (negative) potential to the positive (negative) potential via the intermediate potential again. Will end up.

  Therefore, when the 2H2V inversion driving and the signal line short-circuit driving are combined, it is difficult to reduce power consumption as a whole. The present invention has been made in view of the above, and an object thereof is to provide a display device that achieves low power consumption.

  The display device according to the first aspect of the present invention includes a plurality of pixel electrodes arranged in a matrix on a substrate, a plurality of scanning lines arranged along a row in which the pixel electrodes are arranged, and the pixel electrodes arranged A plurality of signal lines disposed along a column to be aligned, a pixel switch disposed near a position where each of the plurality of scanning lines and the plurality of signal lines intersects, and a plurality of sets of the plurality of signal lines In the row direction and the column direction in which the plurality of pixel electrodes are arranged and the signal line short circuit configured to be short-circuited every time, video signals having different polarities for each number of the plurality of sets are supplied to the pixel electrodes. And a drive unit configured as described above.

  A display device according to a second aspect of the present invention includes a plurality of pixel electrodes arranged in a matrix on a substrate, a plurality of scanning lines arranged along a row in which the pixel electrodes are arranged, and the pixel electrodes arranged A plurality of signal lines disposed along a column to be aligned, a pixel switch disposed near a position where each of the plurality of scanning lines and the plurality of signal lines intersects, and a plurality of sets of the plurality of signal lines A precharge circuit configured to supply a precharge voltage every time, and supplying video signals having different polarities for each of the plurality of sets in the row direction and the column direction in which the plurality of pixel electrodes are arranged And a drive unit configured to do so.

  ADVANTAGE OF THE INVENTION According to this invention, the display apparatus which implement | achieves low power consumption can be provided.

It is a figure for demonstrating the structural example of the display apparatus which concerns on one Embodiment of this invention. FIG. 2 is a diagram for describing a configuration example of a signal line driver circuit of the display device illustrated in FIG. 1. FIG. 3 is a diagram for describing a configuration example of a switching element that configures a signal line driving circuit of the display device illustrated in FIG. 2. 3 is a timing chart for explaining an example of a method for driving the display device shown in FIGS. 1 and 2. It is a figure for demonstrating the polarity inversion system in the display apparatus shown in FIG. 1 and FIG. It is a figure for demonstrating the polarity inversion system in the display apparatus shown in FIG. 1 and FIG. FIG. 10 is a diagram for describing another configuration example of the signal line driver circuit of the display device illustrated in FIG. 1. It is a figure for demonstrating the structural example of the signal line drive circuit of the display apparatus which concerns on a comparative example. 12 is a timing chart for explaining an example of a driving method of a display device according to a comparative example.

  Hereinafter, a display device and a driving method of the display device according to the first embodiment of the present invention will be described with reference to the drawings. The display device according to the present embodiment includes an array substrate SB1, a counter substrate (not shown) arranged so as to face the array substrate SB1, and a liquid crystal layer sandwiched between the array substrate SB1 and the counter substrate ( The liquid crystal display device includes a display unit including a plurality of display pixels arranged in a matrix.

  As shown in FIG. 1, the array substrate SB1 includes pixel electrodes PE disposed on each of the plurality of display pixels. In the pixel region DYP in which the plurality of pixel electrodes PE of the array substrate SB1 are arranged, a plurality of scanning lines GL extending along a row in which the plurality of pixel electrodes PE are arranged, and along a column in which the plurality of pixel electrodes PE are arranged. A plurality of signal lines SL extending in parallel with each other and a pixel switch SW provided in the vicinity of a position where the scanning line GL and the signal line SL intersect with each other are disposed.

  The pixel switch SW includes a thin film transistor as a switching element. The gate electrode GE of the pixel switch SW is electrically connected to the corresponding scanning line GL (or formed integrally). The source electrode of the pixel switch SW is electrically connected to the corresponding signal line SL (or formed integrally). The drain electrode of the pixel switch SW is electrically connected (or integrally formed) with the corresponding pixel electrode PE.

  Around the pixel region DYP of the array substrate SB1, a scanning line driving circuit GD that sequentially drives the plurality of scanning lines GL is disposed. A plurality of scanning lines GL are electrically connected to the scanning line driving circuit GD. The scanning line driving circuit GD is integrally formed on the substrate of the array substrate SB1 by the same manufacturing process as the pixel switch SW. The scanning line driving circuit GD drives a plurality of scanning lines GL.

  A circuit board 11 is connected to one end of the array substrate SB1 via a flexible wiring board (TCP: Tape Carrier Package) 8. A driving IC 7 is mounted on the flexible wiring board 8. The other end of the flexible wiring board 8 is electrically connected to a circuit board 11 as an external circuit board.

  A signal line switching circuit 9 and a signal line short circuit 10 are arranged around the pixel region DYP of the array substrate SB1. The drive IC 7, the signal line switching circuit 9, and the signal line short circuit 10 constitute a signal line drive circuit SD that drives a plurality of signal lines SL. A plurality of signal lines SL are electrically connected to the signal line short circuit 10. The signal line switching circuit 9 and the signal line short circuit 10 are formed on the array substrate SB1 by the same manufacturing process as the pixel switch SW.

  As shown in FIG. 2, the signal line switching circuit 9 is supplied with signals from the flexible wiring board 8 and the driving IC 7. As shown in FIGS. 2 and 3, the signal line switching circuit 9 includes a plurality of switching circuits. 2 and 3, eight switching circuits SW1A to SW8A of the signal line switching circuit 9 are shown. The switching circuits SW1A to SW8A include thin film transistors as switching elements.

  The gate electrodes GE of the switching circuits SW1A, SW3A, SW5A, SW7A are electrically connected to the control wiring AL1. A switching control signal ASW1 from the flexible wiring board 8 is supplied to the control wiring AL1. The gate electrodes GE of the switching circuits SW2A, SW4A, SW6A, SW8A are electrically connected to the control wiring AL2. A switching control signal ASW2 from the flexible wiring board 8 is supplied to the control wiring AL2.

  The source electrodes SE of the switching circuit SW1A and the switching circuit SW2A are electrically connected to the output terminal OUT1 of the driving IC 7. The source electrodes SE of the switching circuit SW3A and the switching circuit SW4A are electrically connected to the output terminal OUT2 of the driving IC 7. The source electrodes SE of the switching circuit SW5A and the switching circuit SW6A are electrically connected to the output terminal OUT3 of the driving IC 7. The source electrodes SE of the switching circuit SW7A and the switching circuit SW8A are electrically connected to the output terminal OUT4 of the driving IC 7. The drain electrodes DE of the switching circuits SW1A to SW8A are electrically connected to the signal lines SL1 to SL8.

  By arranging the switching circuit as described above, the signal line connected to the output terminal of the drive IC 7 can be switched between the odd number and the even number. For example, when the switching control signal ASW1 is the on-voltage of the switching circuit and the switching control signal ASW2 is the off-voltage of the switching circuit, the odd-numbered switching circuits SW1A, SW3A, SW5A, and SW7A are connected between the source and drain. The output terminals OUT1 to OUT4 of the driving IC 7 and the signal lines SL1, SL3, SL5, SL7 are electrically connected.

  When the switching control signal ASW1 is the off-voltage of the switching circuit and the switching control signal ASW2 is the on-voltage of the switching circuit, the even-numbered switching circuits SW2A, SW4A, SW6A, SW8A are connected between the source and drain. The output terminals OUT1 to OUT4 of the driving IC 7 and the signal lines SL2, SL4, SL6, and SL8 are electrically connected.

  Control signals PREC 1 and PREC 2 are supplied from the flexible wiring board 8 to the signal line short circuit 10. The signal line short circuit 10 includes a plurality of switching circuits. 2 and 3 show the eight switching circuits SW1B to SW8B of the signal line short circuit 10. FIG.

  The gate electrodes GE of the switching circuits SW1B, SW3B, SW5B, SW7B are electrically connected to the control wiring PL1. The gate electrodes GE of the switching circuits SW2B, SW4B, SW6B, SW8B are electrically connected to the control wiring PL2.

  The source electrodes SE of the switching circuits SW1B to SW8B are electrically connected to the signal lines SL1 to SL8. The drain electrodes DE of the switching circuits SW1B, SW3B, SW5B, SW7B are electrically connected to the short-circuit wiring SHL1. The drain electrodes DE of the switching circuits SW2B, SW4B, SW6B, and SW8B are electrically connected to the short-circuit wiring SHL2.

  By arranging the switching circuits SW1B to SW8B in this way, even-numbered signal lines or odd-numbered signal lines can be electrically connected. That is, the signal line short circuit 10 is configured to short-circuit each of a plurality of sets of the plurality of signal lines SL. In the present embodiment, the signal line short circuit 10 is configured to be able to short-circuit a set of odd-numbered signal lines SL1, SL3, SL5... And a set of even-numbered signal lines SL2, SL4, SL6. Has been.

  For example, when the control signal PREC1 is the on-voltage of the switching circuit and the control signal PREC2 is the off-voltage of the switching circuit, the odd-numbered signal lines SL1, SL3, SL5, SL7 are electrically connected to each other and short-circuited. It will be in the state. When the control signal PREC1 is an off voltage of the switching circuit and the control signal PREC2 is an on voltage of the switching circuit, the even-numbered signal lines SL2, SL4, SL6, and SL8 are electrically connected to each other and short-circuited. It becomes.

  The drive IC 7 is configured to supply video signals having different polarities to the pixel electrodes PE for each number of sets of signal lines in the row direction and the column direction in which the plurality of pixel electrodes PE are arranged. In the present embodiment, since the number of signal lines is two, the polarity of the video signal supplied to the pixel electrode PE is two pixel electrodes PE in the row direction and the column direction in which the plurality of pixel electrodes PE are arranged. Inverted every time.

  As shown in FIG. 3, it is preferable that the layouts (channel directions) of thin film transistors (TFTs) constituting the signal line switching circuit 9 and the signal line short circuit 10 are the same. In FIG. 3, the thin film transistors constituting the signal line switching circuit 9 and the signal line short circuit 10 have the source-drain path and the gate electrode GE arranged in the same layout with respect to the semiconductor layer SC.

  When a thin film transistor including a polysilicon layer is formed as the semiconductor layer SC, the characteristics of the thin film transistor may change depending on the irradiation direction of ELA (Excimer Laser Anneal). As shown in FIG. By making the layouts the same, the variation in characteristics of the thin film transistors is reduced, the writing characteristics to the signal lines SL are uniform in the screen, and display with good image quality can be realized.

  Next, a method for driving the display device will be described with reference to the drawings. FIG. 4 is a timing chart for explaining an example of a method for driving the display device according to this embodiment. In the first horizontal period (1H) shown in FIG. 4, the scanning line driving circuit GD supplies the ON voltage of the pixel switch SW to the scanning line GL. Then, the signal line driving circuit SD uses the control signal PREC1 as the ON voltage of the switching circuit, and short-circuits the odd-numbered signal lines SL1, SL3,. Therefore, the potentials S1, S3 of the odd-numbered signal lines SL1, SL3,... Are intermediate potentials (time t0 to t1).

  Before the time t0, the signal lines SL1, SL3, SL5... Have almost the same number of positive and negative potentials, and therefore, by short-circuiting the signal lines SL1, SL3,. The potentials S1, S3,... Of the signal lines SL1, SL3,.

  The signal line drive circuit SD sets the control signal PREC1 to the off voltage of the switching circuit and the control signal ASW1 to the on voltage of the switching circuit after the odd-numbered signal lines SL1, SL3,. Time t2 to t3).

  At this time, the source and drain of the switching circuits SW1A, SW3A,... Are electrically connected, and the output terminals OUT1, OUT2,... Of the driving IC 7 and the odd-numbered signal lines SL1, SL3,. As shown in FIG. 4, a negative video signal is supplied from the output terminal OUT1 of the driving IC 7 to the signal line SL1, and a positive video signal is supplied from the output terminal OUT2 of the driving IC 7 to the signal line SL3. The potential S1 of the signal line SL1 has a negative polarity, and the potential S3 of the signal line SL3 has a positive polarity.

  Here, a positive polarity signal or a negative polarity signal is written to the signal lines SL1, SL3, SL5... From the driving IC 7, but the potentials S1, S3, S5. The drive IC 7 only needs to change the signal line potentials S1, S3, S5... From the intermediate potential to the positive potential or the negative potential because the potential is at the intermediate potential.

  Further, at time t3, the control signal ASW1 becomes the off voltage of the switching circuit, and at time t4, the control signal ASW2 becomes the on voltage of the switching circuit, and the sources and drains of the switching circuits SW2A, SW4A, SW6A,. The initial potentials of the signal lines SL2, SL4, SL6... Before the control signal ASW2 becomes the on voltage are negative, positive, negative..., And after the control signal ASW2 becomes the on voltage, the signal lines SL2, SL4. , SL6... Are also negative, positive, negative..., So that it is not necessary to change the polarities of the potentials S2, S4, S6... Of the signal lines SL2, SL4, SL6. Therefore, at this timing, the drive IC 7 hardly consumes power.

  In the next one horizontal period (1H), the scanning line driving circuit GD supplies the ON voltage of the pixel switch SW to the scanning line GLn + 1. Then, the signal line drive circuit SD uses the control signal PREC2 as the ON voltage of the switching circuit, and shorts even-numbered signal lines SL2, SL4,. Therefore, the potentials S2, S4 of the even-numbered signal lines SL2, SL4,... Become intermediate potentials (time t6 to t7).

  The signal line drive circuit SD sets the control signal PREC2 as the off voltage of the switching circuit and the control signal ASW2 as the on voltage of the switching circuit after the even-numbered signal lines SL2, SL4,. Time t8 to t9).

  At this time, the source and drain of the switching circuits SW2A, SW4A,... Are electrically connected, and the output terminals OUT1, OUT2,... Of the driving IC 7 and the even-numbered signal lines SL2, SL4,. As shown in FIG. 4, a positive video signal is supplied from the output terminal OUT1 of the driving IC 7 to the signal line SL2, and a negative video signal is supplied from the output terminal OUT2 of the driving IC 7 to the signal line SL4.

  Here, a positive signal or a negative signal is written to the signal lines SL2, SL4, SL6,... From the drive IC 7. However, the potentials S2, S4, S6,. The drive IC 7 only needs to change the signal line potentials S2, S4, S6,... From the intermediate potential to the positive potential or the negative potential because of the intermediate potential.

  Further, at time t9, the control signal ASW2 becomes the off voltage of the switching circuit, and at time t10, the control signal ASW1 becomes the on voltage of the switching circuit, and the sources and drains of the switching circuits SW1A, SW3A, SW5A,. The initial potentials of the signal lines SL1, SL3, SL5... Before the control signal ASW1 becomes the on voltage are negative, positive, negative..., And after the control signal ASW1 becomes the on voltage, the signal lines SL1, SL3. , SL5... Are also negative, positive, negative, etc., so that it is not necessary to change the polarity of the potentials of the signal lines SL1, SL3, SL5. Therefore, at this timing, the drive IC 7 hardly consumes power.

  FIG. 5A and FIG. 5B show an example of the positive / negative polarity distribution in the screen in any one vertical scanning period by the 2H2V driving method. FIG. 5A shows a positive / negative polarity distribution in an arbitrary n frame, and FIG. 5B shows a positive / negative polarity distribution in an arbitrary n + 1 frame. As shown in FIGS. 5A and 5B, the polarity of the signal supplied to each pixel electrode PE is inverted every frame.

  Here, for example, as shown in FIG. 7, the case where the signal line short circuit 10 is configured to short all the signal lines SL will be considered. The configuration of the display device illustrated in FIG. 7 is the same as the configuration of the display device according to the above-described embodiment except for the configuration of the signal line short circuit 10.

  The signal line short circuit 10 shown in FIG. 7 includes a plurality of switching circuits SW1C to SW8C. The switching circuits SW1C to SW8C... Have thin film transistors as switching elements. The gate electrodes GE of the switching circuits SW1C to SW8C... Are electrically connected to the control wiring PL. The source electrodes SE of the switching circuits SW1C to SW8C are electrically connected to the signal lines SL1 to SL8. The drain electrodes DE of the switching circuits SW1C to SW8C... Are electrically connected to the short-circuit wiring SHL.

  In the above display device, when the 2H2V driving method and the signal line short-circuit driving are combined, as shown in FIG. 8, for example, the potential S1 of the signal line SL1 changes from the negative polarity to the intermediate potential at time t6, and time t8 In FIG. 5, the intermediate potential is changed to the negative polarity again. As described above, even when the polarity of the signal line SL is not inverted in the next one horizontal period, all the signal lines SL are once short-circuited to become an intermediate potential, and thus it becomes difficult to suppress the power consumption of the driving IC 7. .

  On the other hand, in the display device according to the present embodiment, the odd-numbered signal lines SL1, SL3, SL5... And the even-numbered signal lines SL2, SL4, SL6. 10 can maximize the power consumption reduction effect of the 2H2V driving method and the signal line short-circuit driving. That is, according to the display device according to the present embodiment, it is possible to provide a display device that realizes low power consumption.

  Next, a display device and a display device driving method according to the second embodiment of the present invention will be described below with reference to the drawings. In the following description, the same components as those of the display device according to the first embodiment described above are denoted by the same reference numerals and description thereof is omitted.

  As shown in FIG. 6, the display device according to the present embodiment is the same as the display device according to the first embodiment described above except for the configuration of the signal line drive circuit SD. The signal line short circuit 10 of the signal line drive circuit SD includes precharge wirings PRL1 and PRL2 instead of the short circuit wiring.

  The precharge wiring PRL1 is electrically connected to the drain electrodes DE of the switching circuits SW1B, SW3B, SW5B, SW7B. The precharge wiring PRL2 is electrically connected to the drain electrodes DE of the switching circuits SW2B, SW4B, SW6B, SW8B.

  That is, the signal line short circuit 10 is a precharge circuit configured to supply a precharge voltage to a plurality of sets of a plurality of signal lines SL. In the present embodiment, the signal line short circuit 10 applies a precharge voltage to each pair of the odd-numbered signal lines SL1, SL3, SL5... And the even-numbered signal lines SL2, SL4, SL6. It can be supplied.

  A precharge voltage Vpre is supplied from the circuit board 11 to the precharge wirings PRL1 and PRL2 via the flexible wiring board 8. As the precharge voltage Vpre, an intermediate voltage between positive polarity and negative polarity is adopted. The intermediate voltage is, for example, a voltage that is a substantially central value between the maximum value of the positive polarity signal and the maximum value of the negative polarity signal.

  This ensures that the signal line electrically connected to the precharge wiring during the precharge period (period in which the ON voltage of the switching circuit is supplied to the control wiring PREC1 or PREC2) regardless of the display screen. The potential of SL can be set to an intermediate potential. Therefore, according to the display device according to the present embodiment, it is possible to stably obtain the power consumption reduction effect. That is, according to the display device according to the present embodiment, it is possible to provide a display device that realizes low power consumption.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage.

  In the display devices according to the first and second embodiments described above, the number of output terminals of the drive IC 7 is half of the number of signal lines, and the signal line switching circuit 9 provides two output terminals for one output terminal of the drive IC 7. Although the video signal is output by switching the signal line, the present invention is not limited to this.

  For example, the number of output terminals OUT can be reduced to a quarter of the number of signal lines. In this case, four signal lines can be switched for one output terminal of the drive IC 7. The configuration of the signal line short circuit and the signal line precharge circuit of this embodiment is not limited to the number of selected signal lines, and a power consumption reduction effect can be obtained.

  Further, in the display devices according to the first and second embodiments, the case where the 2H2V inversion method is adopted as the polarity inversion method has been described, but the present invention can also be applied to display devices employing other polarity inversion methods. For example, in a display device employing the 3H3V inversion method, the signal line short circuit 10 includes a switching circuit that short-circuits the signal lines SL1, SL4, a switching circuit that short-circuits the signal lines SL2, SL5, and signal lines SL3 and SL6. And a switching circuit for short-circuiting. Thus, by dividing the signal line SL and short-circuiting it independently, the same effects as those of the display devices according to the first and second embodiments described above can be obtained.

  Further, the display device according to the first and second embodiments is a liquid crystal display device, but the present invention can be applied to other display devices such as an organic EL device. By providing the signal line short circuit similarly to the display devices according to the first and second embodiments, the same effects as those of the display devices according to the first and second embodiments described above can be obtained.

  In addition, various inventions can be formed by appropriately combining a plurality of components disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined.

  PE ... pixel electrode, GL ... scanning line, SL ... signal line, SW ... pixel switch, GD ... scanning line driving circuit, SD ... signal line driving circuit, 1 ... array substrate SB, 7 ... driving IC, 8 ... flexible wiring board , 9 ... Signal line switching circuit, 10 ... Signal line short circuit, 11 ... Circuit board

Claims (5)

A plurality of pixel electrodes arranged in a matrix on the substrate;
A plurality of scanning lines arranged along a row in which the pixel electrodes are arranged;
A plurality of signal lines arranged along a column in which the pixel electrodes are arranged;
A pixel switch disposed in the vicinity of a position where each of the plurality of scanning lines and the plurality of signal lines intersects;
A signal line short circuit configured to short-circuit each of a plurality of sets of the plurality of signal lines; and
And a driving unit configured to supply video signals having different polarities to the pixel electrodes in the row direction and the column direction in which the pixel electrodes are arranged. A plurality of pixel electrodes arranged in a matrix on the substrate;
A plurality of scanning lines arranged along a row in which the pixel electrodes are arranged;
A plurality of signal lines arranged along a column in which the pixel electrodes are arranged;
A pixel switch disposed in the vicinity of a position where each of the plurality of scanning lines and the plurality of signal lines intersects;
A precharge circuit configured to supply a precharge voltage for each of the plurality of sets of the plurality of signal lines;
And a driving unit configured to supply video signals having different polarities to each of the plurality of sets in the row direction and the column direction in which the plurality of pixel electrodes are arranged.   The display device according to claim 1, further comprising a signal line switching circuit that switches connection between an output terminal of the driving unit and the plurality of sets of signal lines.   The drive unit is configured so that polarities of video signals applied to pixel electrodes adjacent to any of the pixel electrodes are different from each other in a row direction and a column direction in which the plurality of pixel electrodes are arranged. Item 3. A display device according to item 1 or 2. The signal line short circuit or precharge circuit and the signal line switching circuit comprise a plurality of switching circuits,
The display device according to claim 3, wherein the plurality of switching circuits have the same layout.

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