JP2011138858A - Manufacturing method for thin semiconductor device - Google Patents
Manufacturing method for thin semiconductor device Download PDFInfo
- Publication number
- JP2011138858A JP2011138858A JP2009296760A JP2009296760A JP2011138858A JP 2011138858 A JP2011138858 A JP 2011138858A JP 2009296760 A JP2009296760 A JP 2009296760A JP 2009296760 A JP2009296760 A JP 2009296760A JP 2011138858 A JP2011138858 A JP 2011138858A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- semiconductor substrate
- manufacturing
- substrate
- thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 179
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 132
- 238000000034 method Methods 0.000 claims abstract description 63
- 238000000926 separation method Methods 0.000 claims abstract description 61
- 239000000463 material Substances 0.000 claims abstract description 29
- 238000005468 ion implantation Methods 0.000 claims description 24
- 239000000853 adhesive Substances 0.000 claims description 13
- 230000001070 adhesive effect Effects 0.000 claims description 13
- 238000003754 machining Methods 0.000 abstract 1
- 239000004820 Pressure-sensitive adhesive Substances 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 8
- 150000002500 ions Chemical class 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000000227 grinding Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 125000004429 atom Chemical group 0.000 description 3
- 241001050985 Disco Species 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 239000001307 helium Substances 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000005865 ionizing radiation Effects 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- -1 Hydrogen ions Chemical class 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000005465 channeling Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 229910052743 krypton Inorganic materials 0.000 description 1
- DNNSSWSSYDEUBZ-UHFFFAOYSA-N krypton atom Chemical compound [Kr] DNNSSWSSYDEUBZ-UHFFFAOYSA-N 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052754 neon Inorganic materials 0.000 description 1
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000011435 rock Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Images
Landscapes
- Mechanical Treatment Of Semiconductor (AREA)
- Element Separation (AREA)
Abstract
Description
本発明は、基板材料の再利用及び薄型化加工時間の大幅な削減ができ、しかも、薄型化した半導体装置が破壊してしまう問題を解決できる薄型半導体装置の製造方法に関する。 The present invention relates to a method for manufacturing a thin semiconductor device that can significantly reduce the time required for reuse and thinning of a substrate material, and that can break down a thinned semiconductor device.
情報端末機器の薄型化、小型化、多機能化が急速に進む中、それらに搭載される半導体装置も同様に薄型化、高密度化が求められている。最近では、完成後の半導体装置は厚みが50μm以下にまで薄研削されてチップ状に個片化される場合も多い。
しかしながら、半導体装置の研削前の厚みが700μm以上であることを考えると、上記の方法では、薄研削工程において半導体装置の基板材料のほとんどを捨てることになり、コスト、加工時間、環境の点から効率的とはいえない。また、薄研削後の半導体装置は脆弱で外部からの衝撃に対して非常に弱いため、以後の工程において、薄型化された半導体装置が破壊してしまう場合があった。特に、半導体装置の大口径化に伴い、薄型半導体装置の脆弱性は重大な問題になっている。
As information terminal devices are rapidly becoming thinner, smaller, and multifunctional, semiconductor devices mounted on them are also required to be thinner and denser. Recently, a completed semiconductor device is often thinly ground to a thickness of 50 μm or less and separated into chips.
However, considering that the thickness of the semiconductor device before grinding is 700 μm or more, in the above method, most of the substrate material of the semiconductor device is discarded in the thin grinding process, and from the viewpoint of cost, processing time, and environment. It is not efficient. Further, since the semiconductor device after thin grinding is fragile and very weak against external impacts, the thinned semiconductor device may be destroyed in the subsequent processes. In particular, with the increase in diameter of semiconductor devices, the vulnerability of thin semiconductor devices has become a serious problem.
本発明に関連して、SOI(Silicon on Insulator)基板の製造において、イオン注入法により、半導体基板に水素原子を数ミクロンの深さに高濃度に導入し、さらに熱処理及び/又は外部衝撃を与えることで、半導体基板の水素イオン注入界面に沿って半導体基板を剥離する技術が知られている(特許文献1〜4)。
In connection with the present invention, in the manufacture of an SOI (Silicon on Insulator) substrate, hydrogen atoms are introduced to a semiconductor substrate at a high concentration to a depth of several microns by an ion implantation method, and further subjected to heat treatment and / or external impact. Thus, techniques for peeling the semiconductor substrate along the hydrogen ion implantation interface of the semiconductor substrate are known (
本発明は、上述した実情に鑑みてなされたものであって、基板材料の再利用及び薄型化加工時間の大幅な削減ができ、しかも、薄型化した半導体装置が破壊してしまう問題を解決できる薄型半導体装置の製造方法を提供することを目的とする。 The present invention has been made in view of the above-described circumstances, and can recycle the substrate material and greatly reduce the processing time for thinning, and can solve the problem that the thinned semiconductor device is destroyed. It is an object of the present invention to provide a method for manufacturing a thin semiconductor device.
本発明者らは、上記課題を解決すべく鋭意検討した結果、薄型半導体装置の製造方法において、回路パターン形成後に半導体基板裏面を薄研削する方法に代えて、予め基板内部に分離層を形成した半導体基板の回路面に表面保護シートを貼付して、回路面の保護及び基板の固定を行い、衝撃を与えることで、前記半導体基板を分離層界面に沿って分離することで薄型半導体装置を効率よく製造できることを見出した。そして、この方法によれば、表面保護シートが貼付された基板をそのままの状態でダイシングできるため、その後の工程において、半導体基板が破損してしまうことが防止でき、しかも、剥離した基板を半導体装置用基板として再利用できることを見出し、本発明を完成するに至った。 As a result of intensive studies to solve the above-mentioned problems, the present inventors have formed a separation layer in advance in the substrate instead of a method of thinly grinding the back surface of the semiconductor substrate after forming the circuit pattern in the manufacturing method of the thin semiconductor device. A surface protection sheet is affixed to the circuit surface of the semiconductor substrate, the circuit surface is protected and the substrate is fixed, and the semiconductor substrate is separated along the separation layer interface by applying an impact. We found that it can be manufactured well. According to this method, since the substrate with the surface protective sheet attached can be diced as it is, the semiconductor substrate can be prevented from being damaged in the subsequent process, and the peeled substrate can be removed from the semiconductor device. As a result, the present invention has been completed.
かくして本発明によれば、(1)〜(9)の薄型半導体装置の製造方法が提供される。
(1)半導体基板上に回路素子が形成された薄型半導体装置の製造方法であって、前記半導体基板の不要部分を、該半導体基板から半導体基板の所定深さの水平面に沿って分離する分離工程を有する薄型半導体装置の製造方法。
(2)前記分離工程を、半導体基板上に回路素子を形成した後に行うことを特徴とする(1)に記載の薄型半導体装置の製造方法。
(3)前記分離工程前の半導体基板が、該半導体基板の不要部分を、半導体基板から半導体基板の所定深さの水平面に沿って分離する界面となる分離層を少なくとも一層有するものであることを特徴とする(1)または(2)に記載の薄型半導体装置の製造方法。
Thus, according to the present invention, the method for manufacturing a thin semiconductor device of (1) to (9) is provided.
(1) A method for manufacturing a thin semiconductor device in which circuit elements are formed on a semiconductor substrate, wherein an unnecessary portion of the semiconductor substrate is separated from the semiconductor substrate along a horizontal plane of a predetermined depth of the semiconductor substrate. A method for manufacturing a thin semiconductor device.
(2) The method for manufacturing a thin semiconductor device according to (1), wherein the separation step is performed after circuit elements are formed on a semiconductor substrate.
(3) The semiconductor substrate before the separation step has at least one separation layer serving as an interface for separating unnecessary portions of the semiconductor substrate from the semiconductor substrate along a horizontal plane of a predetermined depth of the semiconductor substrate. A method for manufacturing a thin semiconductor device according to (1) or (2).
(4)前記分離層が、半導体基板材料と異なる少なくとも一種の材料によって構成されることを特徴とする(3)に記載の薄型半導体装置の製造方法。
(5)前記分離層が、イオン注入法によって形成されることを特徴とする(3)または(4)に記載の薄型半導体装置の製造方法。
(6)半導体装置が、粘着シートに固定された状態で分離されることを特徴とする(1)〜(5)のいずれかに記載の薄型半導体装置の製造方法。
(4) The method for manufacturing a thin semiconductor device according to (3), wherein the separation layer is made of at least one material different from a semiconductor substrate material.
(5) The method for manufacturing a thin semiconductor device according to (3) or (4), wherein the separation layer is formed by an ion implantation method.
(6) The method for manufacturing a thin semiconductor device according to any one of (1) to (5), wherein the semiconductor device is separated in a state of being fixed to an adhesive sheet.
(7)前記分離工程後に、該半導体装置をチップ状に個片化する工程を有する(1)〜(6)のいずれかに記載の薄型半導体装置の製造方法。
(8)半導体装置が粘着シートに固定された状態でチップ状に個片化する工程を有する(7)に記載の薄型半導体装置の製造方法。
(9)前記分離された半導体基板の不要部分を、半導体装置の製造用材料として再利用することを特徴とする(1)〜(8)のいずれかに記載の薄型半導体装置の製造方法。
(7) The method for manufacturing a thin semiconductor device according to any one of (1) to (6), including a step of separating the semiconductor device into chips after the separation step.
(8) The method for manufacturing a thin semiconductor device according to (7), including a step of dividing the semiconductor device into chips in a state of being fixed to the adhesive sheet.
(9) The method for manufacturing a thin semiconductor device according to any one of (1) to (8), wherein an unnecessary portion of the separated semiconductor substrate is reused as a material for manufacturing a semiconductor device.
本発明によれば、薄型の半導体基板や大口径の半導体基板を加工する場合であっても、基板の損壊を軽減でき、しかも、半導体基板を薄型化する際に発生する剥離基板を、再度半導体基板として利用することができる薄型半導体装置の製造方法が提供される。 According to the present invention, even when a thin semiconductor substrate or a large-diameter semiconductor substrate is processed, damage to the substrate can be reduced, and the separation substrate generated when the semiconductor substrate is thinned can be removed again from the semiconductor. A method of manufacturing a thin semiconductor device that can be used as a substrate is provided.
以下、本発明の薄型半導体装置の製造方法について詳細に説明する。
薄型半導体装置は、半導体基板と該半導体基板上に形成された回路素子とを有する。その厚みは、通常、0.5μm〜200μmの範囲である。
本発明は、このような薄型半導体装置を製造する方法に関する。
Hereinafter, the manufacturing method of the thin semiconductor device of this invention is demonstrated in detail.
A thin semiconductor device has a semiconductor substrate and a circuit element formed on the semiconductor substrate. The thickness is usually in the range of 0.5 μm to 200 μm.
The present invention relates to a method of manufacturing such a thin semiconductor device.
本発明の製造方法に用いる半導体基板は特に限定されない。例えば、単結晶シリコン基板、単結晶SiC基板、単結晶GaAs基板等が挙げられ、単結晶シリコン基板が好ましい。単結晶シリコン基板としては、未処理のシリコン基板であっても酸化処理が施されたシリコン基板であってもよい。また、SOI(Silicon on Insulator)構造を有する基板であってもよい。 The semiconductor substrate used for the manufacturing method of the present invention is not particularly limited. For example, a single crystal silicon substrate, a single crystal SiC substrate, a single crystal GaAs substrate, etc. are mentioned, and a single crystal silicon substrate is preferable. The single crystal silicon substrate may be an untreated silicon substrate or an oxidized silicon substrate. Further, it may be a substrate having an SOI (Silicon on Insulator) structure.
本発明の製造方法は、半導体基板の不要部分を、該半導体基板から半導体基板の所定深さの水平面に沿って分離する分離工程を有することを特徴とする。 The manufacturing method of the present invention includes a separation step of separating an unnecessary portion of the semiconductor substrate from the semiconductor substrate along a horizontal plane of a predetermined depth of the semiconductor substrate.
本発明においては、作業効率の観点から、前記分離工程を半導体基板上に回路素子を形成した後に行うことが好ましい。 In the present invention, from the viewpoint of work efficiency, it is preferable to perform the separation step after forming circuit elements on the semiconductor substrate.
本発明においては、分離工程前の半導体基板が、該半導体基板の不要部分を、半導体基板から半導体基板の所定深さの水平面に沿って分離する界面となる分離層を少なくとも一層有するものであることが好ましい。ここで、「半導体基板の不要部分」とは、半導体基板の回路素子が形成されていない面側であって、半導体装置を薄型化するために分離する(剥離する)部分をいう。 In the present invention, the semiconductor substrate before the separation step has at least one separation layer serving as an interface that separates unnecessary portions of the semiconductor substrate from the semiconductor substrate along a horizontal plane of a predetermined depth of the semiconductor substrate. Is preferred. Here, the “unnecessary part of the semiconductor substrate” refers to a part of the surface of the semiconductor substrate where the circuit elements are not formed and separated (separated) in order to reduce the thickness of the semiconductor device.
分離層の形成は、半導体基板上に回路素子を形成する前であっても、回路素子を形成した後であってもよいが、回路素子に与えるダメージを少なくする観点から、分離層は、回路素子を形成する前に形成するのが好ましい。 The separation layer may be formed before or after the circuit element is formed on the semiconductor substrate. From the viewpoint of reducing damage to the circuit element, the separation layer is formed from a circuit. It is preferable to form the device before forming the device.
前記分離層を構成する材料は基板材料と異種であればよいが、熱膨張係数が基板材料と異なる材料が好ましい。また熱を与えたときに、運動エネルギーが大きくなるような材料、すなわち質量数が比較的小さい材料であってもよい。 The material constituting the separation layer may be different from the substrate material, but a material having a thermal expansion coefficient different from that of the substrate material is preferable. Further, a material that increases kinetic energy when heat is applied, that is, a material having a relatively small mass number may be used.
分離層を形成する方法としては、イオン注入法、熱拡散法等が挙げられる。
イオン注入法としては、(i)Paul K.Chu、Chung Chan、Nathan W.Cheung、名称“Recent Applications of Plasma Immersion Ion Implantation”、SEMICONDUCTOR INTERNATIONAL、165〜172頁、1996年6月、(ii)P.K.Chu、S.Qin、C.Chan、N.W.Cheung、L.A.Larson、名称“Plasma Immersion Ion Implantation”、(iii)MATERIAL SCIENCE AND ENGINEERING REPORTS、A Review Journal、207〜280頁、R17巻、No.6−7(1996年11月30日)等に記載されたプラズマイオン注入(“PIII”)法;イオンシャワーを使用する方法;水素イオンビーム(原子力eye、Vol.46(9)(2000)p61−65)を使用する方法;プラズマイオン注入法(特開2006−70238号公報等);等が挙げられる。
いずれの方法も、所望の材料をイオン化し、外部電界により加速させて、半導体基板に注入することで目的の深さに所望の量を導入することができる点で好適である。
Examples of the method for forming the separation layer include an ion implantation method and a thermal diffusion method.
As an ion implantation method, (i) Paul K. et al. Chu, Chung Chan, Nathan W. Cheung, name “Recent Applications of Plasma Immersion Ion Implantation”, SEMICONDUCTOR INTERNATIONAL, pages 165-172, June 1996, (ii) P.A. K. Chu, S .; Qin, C.I. Chan, N.A. W. Cheung, L.C. A. Larson, name “Plasma Immersion Ion Implantation”, (iii) MATERIAL SCIENCE AND ENGINEERING REPORTS, A Review Journal, pp. 207-280, Vol. 6-7 (November 30, 1996) etc. Plasma ion implantation ("PIII") method; Method using ion shower; Hydrogen ion beam (Atomic energy eye, Vol. 46 (9) (2000) p61 -65); a plasma ion implantation method (Japanese Patent Laid-Open No. 2006-70238, etc.); and the like.
Any of these methods is preferable in that a desired material can be introduced into a target depth by ionizing a desired material, accelerating it with an external electric field, and injecting the material into a semiconductor substrate.
また、熱拡散法は予め半導体基板表面に所望の材料を製膜した後、基板を加熱することにより所望の材料を基板の内部へ拡散させて分離層を形成する方法である。例えば、半導体基板表面に、有機溶媒に溶かした半導体基板と熱拡散係数が異なる拡散源をスピンコート法などにより塗布する。その後、拡散源を塗布した半導体基板を約1000℃の電気炉に投入することで、熱拡散法により半導体基板とは熱膨張係数が異なる材料を半導体装置内部に形成することができる。熱拡散法によれば、高価なイオン注入装置を必要とせず、コスト面で好適である。また、イオン注入法により所望の材料を半導体基板の極表面に導入後、熱拡散法により所望の材料を基板内部へ導入してもよい。 The thermal diffusion method is a method of forming a separation layer by forming a desired material on the surface of a semiconductor substrate in advance and then diffusing the desired material into the substrate by heating the substrate. For example, a diffusion source having a thermal diffusion coefficient different from that of a semiconductor substrate dissolved in an organic solvent is applied to the surface of the semiconductor substrate by a spin coating method or the like. Thereafter, a semiconductor substrate coated with a diffusion source is put into an electric furnace at about 1000 ° C., whereby a material having a thermal expansion coefficient different from that of the semiconductor substrate can be formed in the semiconductor device by a thermal diffusion method. According to the thermal diffusion method, an expensive ion implantation apparatus is not required, which is preferable in terms of cost. Alternatively, a desired material may be introduced into the substrate by a thermal diffusion method after a desired material is introduced into the extreme surface of the semiconductor substrate by ion implantation.
これらの中でも、分離層を半導体基板の所定位置(深さ)に所定量のイオンを簡便に導入できることから、イオン注入法が好ましい。 Among these, the ion implantation method is preferable because a predetermined amount of ions can be easily introduced into a predetermined position (depth) of the semiconductor substrate.
イオン注入法により注入されるイオンとしては、イオンであれば、特に制約はないが、粒子が横切る材料領域に実質上ダメージを与えることなく、基板材料を通って選択された深さまで容易に侵入することができることから、質量が小さいものが好ましい。例えば、ガスバリア性と透明性の点から、水素、酸素、窒素、アルゴン、ヘリウム、ネオン、クリプトン、及びキセノンからなる群から選ばれる少なくとも一種のイオンが好ましく、窒素、酸素、アルゴン又はヘリウムのイオンが特に好ましい。 The ion implanted by the ion implantation method is not particularly limited as long as it is an ion, but easily penetrates to a selected depth through the substrate material without substantially damaging the material region traversed by the particle. In view of the possibility, a material having a small mass is preferable. For example, from the viewpoint of gas barrier properties and transparency, at least one ion selected from the group consisting of hydrogen, oxygen, nitrogen, argon, helium, neon, krypton, and xenon is preferable, and ions of nitrogen, oxygen, argon, or helium are preferable. Particularly preferred.
イオン注入時のドーズ量は、通常、1×1015〜1×1018atoms/cm2、好ましくは1×1016〜1×1018atoms/cm2である。
注入エネルギーは、通常、1keV〜1MeV、好ましくは10〜200keVである。
The dose during ion implantation is usually 1 × 10 15 to 1 × 10 18 atoms / cm 2 , preferably 1 × 10 16 to 1 × 10 18 atoms / cm 2 .
The implantation energy is usually 1 keV to 1 MeV, preferably 10 to 200 keV.
分離層の基板表面からの深さ(イオン注入深さL)は、イオン注入時の加速電圧により制御することができ、どの程度の厚さの半導体装置を分離させるかに依存して決定することができる。例えば、イオン注入深さ(基板表面からの深さ)Lを0.5μm〜200μm、電圧50〜100keV等とすることができる。 The depth of the separation layer from the substrate surface (ion implantation depth L) can be controlled by the acceleration voltage at the time of ion implantation, and is determined depending on the thickness of the semiconductor device to be separated. Can do. For example, the ion implantation depth (depth from the substrate surface) L can be 0.5 μm to 200 μm, the voltage 50 to 100 keV, and the like.
また、半導体基板中へのイオン注入プロセスにおいて注入イオンのチャネリング抑制のために、通常行われているように、半導体基板のイオン注入面に予め酸化膜等の絶縁膜を形成させておき、この絶縁膜を通してイオン注入を施すようにしてもよい。 In addition, in order to suppress channeling of implanted ions in the ion implantation process into the semiconductor substrate, an insulating film such as an oxide film is formed in advance on the ion implantation surface of the semiconductor substrate, as is normally done, and this insulation is performed. Ion implantation may be performed through the film.
半導体基板の不要部分は、半導体基板から半導体基板の所定深さの水平面に沿って分離することができる。半導体基板に分離層を形成した場合には、分離層を形成後、該半導体基板の不要部分を機械的、または熱的応力により分離層を界面として分離することができる。 The unnecessary portion of the semiconductor substrate can be separated from the semiconductor substrate along a horizontal plane of a predetermined depth of the semiconductor substrate. When the separation layer is formed on the semiconductor substrate, after the separation layer is formed, an unnecessary portion of the semiconductor substrate can be separated using the separation layer as an interface by mechanical or thermal stress.
分離する方法としては、特許文献1〜4等に記載された方法が挙げられる。
より具体的には、噴射ノズルを用いて、圧縮流体を半導体基板側面の分離層が形成された箇所に吹きつけながら、半導体基板の不要部分を剥離する方法等のごとく、機械的に半導体基板の不要部分を分離層から分離する方法;半導体基板に熱を加えることにより、半導体基板の不要部分を分離層から分離する方法;半導体基板の下面側から振動を加えることにより、半導体基板の不要部分を分離層から分離する方法;等が挙げられる。なかでも、機械的に半導体基板の不要部分を分離層から分離する方法、半導体基板に熱を加えることにより、半導体基板の不要部分を分離層から分離する方法が好ましい。
Examples of the separation method include methods described in
More specifically, using a spray nozzle, while spraying a compressed fluid to the portion where the separation layer is formed on the side surface of the semiconductor substrate, mechanically the semiconductor substrate is peeled off as in a method of peeling off unnecessary portions of the semiconductor substrate. A method for separating an unnecessary portion from a separation layer; a method for separating an unnecessary portion of the semiconductor substrate from the separation layer by applying heat to the semiconductor substrate; The method of isolate | separating from a separated layer; etc. are mentioned. Among these, a method of mechanically separating an unnecessary portion of the semiconductor substrate from the separation layer and a method of separating the unnecessary portion of the semiconductor substrate from the separation layer by applying heat to the semiconductor substrate are preferable.
機械的に半導体基板の不要部分を分離層から分離する方法は、加熱の必要がなく、後述する粘着シートを使用する場合に好適である。
また、後者の熱を加える方法において、加熱温度は、分離層の熱膨張係数や質量数にもよるが、200℃〜500℃の範囲が好ましい。分離時の温度が500℃よりも大きいと、分離後の分離面状態が粗くなり、200℃よりも小さいと分離が不完全になる場合がある。
The method of mechanically separating the unnecessary portion of the semiconductor substrate from the separation layer does not require heating, and is suitable when using an adhesive sheet described later.
In the latter method of applying heat, the heating temperature is preferably in the range of 200 ° C. to 500 ° C., although it depends on the thermal expansion coefficient and mass number of the separation layer. When the temperature at the time of separation is higher than 500 ° C., the separation surface state after the separation becomes rough, and when it is lower than 200 ° C., the separation may be incomplete.
半導体基板の不要部分を分離した後の半導体基板の厚みは、通常、0.5μm〜200μm、好ましくは1μm〜100μm、特に好ましくは2μm〜50μmの範囲である。半導体基板の不要部分を分離した後の半導体基板の厚みは、イオン注入深さLにより調整することができる。半導体基板の分離後の厚みが200μmよりも厚いと、分離層の形成に時間がかかり、また、0.5μmよりも薄いと、半導体装置が脆弱になり壊れやすいため適当ではない。
また、半導体基板の不要部分を分離した後の半導体基板の厚みは、分離前の半導体基板の厚みにも依存する。すなわち、分離前の半導体基板の厚みから分離する半導体基板の厚みを引いたものになる。
The thickness of the semiconductor substrate after separating unnecessary portions of the semiconductor substrate is usually in the range of 0.5 μm to 200 μm, preferably 1 μm to 100 μm, particularly preferably 2 μm to 50 μm. The thickness of the semiconductor substrate after separating unnecessary portions of the semiconductor substrate can be adjusted by the ion implantation depth L. If the thickness after separation of the semiconductor substrate is more than 200 μm, it takes time to form the separation layer, and if it is less than 0.5 μm, the semiconductor device becomes fragile and easily broken.
In addition, the thickness of the semiconductor substrate after separating unnecessary portions of the semiconductor substrate also depends on the thickness of the semiconductor substrate before separation. That is, the thickness of the semiconductor substrate to be separated is subtracted from the thickness of the semiconductor substrate before separation.
半導体基板の不要部分を分離した後の半導体装置は薄く脆弱なため、単体で搬送するのは極めて困難である。そのため、半導体基板の不要部分を分離する前に予め粘着シートに固定してから分離するのが望ましい。
この方法によれば、後工程において、裏面側の基板を分離した後、そのままダイシング工程を実施することができる。
Since the semiconductor device after separating unnecessary portions of the semiconductor substrate is thin and fragile, it is extremely difficult to carry it alone. For this reason, it is desirable that the unnecessary portion of the semiconductor substrate is previously fixed to the adhesive sheet and then separated before separation.
According to this method, the dicing process can be performed as it is after the substrate on the back surface side is separated in the post process.
用いる粘着シートは特に制限されず、従来公知のものが使用できるが、後の工程で回路面から剥離する必要があるため、剥離可能な粘着シートの使用が好ましい。このような粘着シートとしては、弱粘着性シートやエネルギー線の照射により粘着力を低減または消失できるエネルギー線硬化型粘着シートが挙げられる。 The pressure-sensitive adhesive sheet to be used is not particularly limited, and conventionally known pressure-sensitive adhesive sheets can be used. However, since it is necessary to peel from the circuit surface in a later step, it is preferable to use a peelable pressure-sensitive adhesive sheet. Examples of such a pressure-sensitive adhesive sheet include a weak pressure-sensitive adhesive sheet and an energy ray-curable pressure-sensitive adhesive sheet that can reduce or eliminate the adhesive force by irradiation with energy rays.
また、本発明においては、分離前に予め真空吸着テーブルに半導体装置を固定してから半導体基板の不要部分を分離し、その後に粘着シートを半導体装置に貼付するようにしてもよい。
真空吸着テーブルに半導体装置を固定して分離する工程によれば、分離時に粘着シートを用いないため、加熱による分離を行なうことが可能である。
In the present invention, an unnecessary portion of the semiconductor substrate may be separated after fixing the semiconductor device to the vacuum suction table in advance before separation, and then an adhesive sheet may be attached to the semiconductor device.
According to the process of fixing the semiconductor device to the vacuum suction table and separating it, the pressure-sensitive adhesive sheet is not used at the time of separation, so that separation by heating can be performed.
半導体基板の不要部分を分離した後に残った基板は、半導体装置用基板として再度利用することができる。一方、分離後の半導体装置は、分離面を機械的に研磨したり、プラズマや薬液によるエッチング処理、または金属等の所望の材料を物理的気相法や化学気相法により製膜したりしてもよい。 The substrate remaining after the unnecessary portion of the semiconductor substrate is separated can be used again as a semiconductor device substrate. On the other hand, the separated semiconductor device has a separation surface mechanically polished, an etching process using plasma or a chemical solution, or a desired material such as a metal is formed by a physical vapor phase method or a chemical vapor phase method. May be.
粘着シートに固定した薄型半導体装置は、ダイシング工程でチップ状に個片化される。
個片化の方法は特に限定されず、例えば、通常のブレードを用いて個片化する方法、レーザーや電離放射線により個片化する方法等が挙げられる。
The thin semiconductor device fixed to the adhesive sheet is separated into chips in a dicing process.
The method of singulation is not particularly limited, and examples thereof include a method of singulation using a normal blade, a method of singulation using a laser or ionizing radiation, and the like.
また、本発明においては、半導体基板の不要部分を分離する前に、予め回路面にブレードやレーザー、又は電離放射線により切込みを入れた後に分離層から分離してもよい。その場合の切込み量(厚み)は、回路素子形成面表面から分離層が存在する深さまでの厚みか、またはそれ以上の厚みであることが望ましい。分離前に予め回路面に切込みを入れる方法では、分離と同時に半導体装置がチップ状に個片化され、飛散してしまうおそれがあるため、回路面に切り込みを入れた後、粘着シートを回路面に貼付してから分離することが好ましい。分離後に個片化された薄型半導体装置は粘着シートに固定されるため、薄型半導体装置の飛散を防止することができるからである。 In the present invention, before the unnecessary portion of the semiconductor substrate is separated, the circuit surface may be cut in advance with a blade, laser, or ionizing radiation and then separated from the separation layer. In this case, it is desirable that the depth of cut (thickness) is a thickness from the surface of the circuit element formation surface to a depth where the separation layer exists, or a thickness greater than that. In the method of cutting in the circuit surface in advance before the separation, the semiconductor device may be separated into chips at the same time as the separation, and may be scattered. It is preferable to separate it after sticking it to. This is because the thin semiconductor device separated into pieces after being separated is fixed to the adhesive sheet, so that the thin semiconductor device can be prevented from scattering.
次に、実施例により、本発明を更に詳細に説明する。ただし、本発明は以下の実施例に何ら限定されるものではない。 Next, the present invention will be described in more detail by way of examples. However, the present invention is not limited to the following examples.
(実施例1)
まず、図1(a)に示すように、半導体基板として厚さ725μmの8インチの単結晶シリコン基板(1)に、イオン注入装置(ロック技研社製)を用いて、該基板の表面(回路素子形成予定面)から水素イオンをドーズ量が1×1016〜1×1017atoms/cm2、イオン注入深さLが、基板表面から5μmになるように注入し、分離層(2)を形成した。
次いで、基板表面に回路素子(3)を形成後、図1(b)に示すように、マウンター装置(リンテック社製、RAD−2700F/8)を用いて、半導体装置の側面から回路面側に粘着シート(リンテック社製、Adwill D−678)(4a)を貼付し、リングフレーム(5a)で固定した。
(Example 1)
First, as shown in FIG. 1A, an 8-inch single crystal silicon substrate (1) having a thickness of 725 μm is used as a semiconductor substrate by using an ion implantation apparatus (manufactured by Rock Giken Co., Ltd.). Hydrogen ions are implanted from the element formation planned surface) so that the dose is 1 × 10 16 to 1 × 10 17 atoms / cm 2 and the ion implantation depth L is 5 μm from the substrate surface, and the separation layer (2) is formed. Formed.
Next, after forming the circuit element (3) on the substrate surface, as shown in FIG. 1 (b), using a mounter device (RAD-2700F / 8, manufactured by Lintec Corporation) from the side surface of the semiconductor device to the circuit surface side. An adhesive sheet (Adwill D-678, manufactured by Lintec Corporation) (4a) was attached and fixed with a ring frame (5a).
その後、図1(c)に示すように、該基板(1)の側面の分離層(2)が形成されている部分に、噴射ノズルを用いて高圧縮空気を噴射し、図1(d)に示すように、半導体装置基板を、分離層(2)界面に沿って機械的に分離し、粘着シートに固定された薄型の半導体装置(1a)を作製した。このとき、分離した半導体基板(1b)は、半導体装置用基板として再利用に供することができる。 Thereafter, as shown in FIG. 1 (c), high compressed air is jetted onto the portion of the side surface of the substrate (1) where the separation layer (2) is formed using an jet nozzle. As shown in FIG. 2, the semiconductor device substrate was mechanically separated along the interface of the separation layer (2) to produce a thin semiconductor device (1a) fixed to the adhesive sheet. At this time, the separated semiconductor substrate (1b) can be reused as a substrate for a semiconductor device.
その後、図2(e)に示すように、上記で得た薄型の半導体装置(1a)の裏面側から、IRカメラを搭載したダイシング装置(ディスコ社製、DFD6340)を用いて、IR(赤外線)によりストリートラインを検出しながらダイシングし、1mm×1mmのチップ状に個片化した薄型の半導体装置(1a’)を得た。 Thereafter, as shown in FIG. 2 (e), IR (infrared ray) is applied from the back surface side of the thin semiconductor device (1a) obtained above using a dicing device (DFD 6340, manufactured by Disco Corporation) equipped with an IR camera. Then, dicing was performed while detecting the street line to obtain a thin semiconductor device (1a ′) separated into 1 mm × 1 mm chips.
(実施例2)
実施例1と同様にして、図1(a)に示す製造中間体を得た。次に、基板表面に回路素子(3)を形成後、図3(f)に示すように、半導体装置の回路素子(3)面側を真空吸着テーブル(6)に吸着させ、固定した。
次いで、図3(g)、(h)に示すように、実施例1と同様にして、半導体装置を、分離層(2)界面に沿って分離し、薄型の半導体装置(1a)を作製した。次に、図4(i)に示すように、半導体装置(1a)の分離面に粘着シート(リンテック社製、Adwill D−678)(4b)を貼付し、リングフレーム(5b)で固定し、真空吸着テーブル(6)を脱着させた。
その後、図4(j)に示すように、薄型の半導体装置(1a)の表面側から、ダイシング装置(ディスコ社製、DFD6340)を用いて、1mm×1mmのチップ状に個片化して、薄型の半導体装置(1a’)を得た。
(Example 2)
In the same manner as in Example 1, the production intermediate shown in FIG. Next, after the circuit element (3) was formed on the substrate surface, the circuit element (3) surface side of the semiconductor device was adsorbed and fixed to the vacuum adsorption table (6) as shown in FIG. 3 (f).
Next, as shown in FIGS. 3G and 3H, in the same manner as in Example 1, the semiconductor device was separated along the interface of the separation layer (2) to produce a thin semiconductor device (1a). . Next, as shown in FIG. 4 (i), a pressure-sensitive adhesive sheet (manufactured by Lintec, Adwill D-678) (4b) is attached to the separation surface of the semiconductor device (1a), and fixed with a ring frame (5b). The vacuum suction table (6) was detached.
Thereafter, as shown in FIG. 4 (j), from the surface side of the thin semiconductor device (1a), a dicing device (manufactured by Disco Corporation, DFD6340) is used to divide the chip into 1 mm × 1 mm chips, which are thin. The semiconductor device (1a ′) was obtained.
1・・・単結晶シリコン基板(半導体基板)、1a・・・半導体装置、1a’・・・個片化した半導体装置、1b・・・分離した半導体基板、2・・・分離層、3・・・回路素子、4a、4b・・・粘着シート、5a、5b・・・リングフレーム、6・・・真空吸着テーブル
DESCRIPTION OF
Claims (9)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009296760A JP5605790B2 (en) | 2009-12-28 | 2009-12-28 | Manufacturing method of thin semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009296760A JP5605790B2 (en) | 2009-12-28 | 2009-12-28 | Manufacturing method of thin semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011138858A true JP2011138858A (en) | 2011-07-14 |
JP5605790B2 JP5605790B2 (en) | 2014-10-15 |
Family
ID=44350018
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009296760A Active JP5605790B2 (en) | 2009-12-28 | 2009-12-28 | Manufacturing method of thin semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5605790B2 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002324831A (en) * | 2001-04-26 | 2002-11-08 | Takatori Corp | Vacuum suction table |
JP2004134672A (en) * | 2002-10-11 | 2004-04-30 | Sony Corp | Method and apparatus for manufacturing super-thin semiconductor device and super-thin backlighting type solid-state imaging device |
JP2004179649A (en) * | 2002-11-12 | 2004-06-24 | Sony Corp | Method and apparatus for producing ultra-thin semiconductor device |
-
2009
- 2009-12-28 JP JP2009296760A patent/JP5605790B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002324831A (en) * | 2001-04-26 | 2002-11-08 | Takatori Corp | Vacuum suction table |
JP2004134672A (en) * | 2002-10-11 | 2004-04-30 | Sony Corp | Method and apparatus for manufacturing super-thin semiconductor device and super-thin backlighting type solid-state imaging device |
JP2004179649A (en) * | 2002-11-12 | 2004-06-24 | Sony Corp | Method and apparatus for producing ultra-thin semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JP5605790B2 (en) | 2014-10-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8969177B2 (en) | Laser and plasma etch wafer dicing with a double sided UV-curable adhesive film | |
EP2343729B1 (en) | Method for manufacturing silicon thin film transfer insulating wafer | |
JP6371761B2 (en) | Techniques for forming optoelectronic devices | |
US10497622B2 (en) | Element chip manufacturing method | |
US8912078B1 (en) | Dicing wafers having solder bumps on wafer backside | |
JP5756334B2 (en) | Laminated body and method for separating the laminated body | |
JP2016511934A (en) | Technology for forming optoelectronic devices | |
JP6519759B2 (en) | Method of manufacturing element chip | |
JP6730891B2 (en) | Wafer processing method | |
US8927393B1 (en) | Water soluble mask formation by dry film vacuum lamination for laser and plasma dicing | |
US20120040510A1 (en) | Dicing Before Grinding Process for Preparation of Semiconductor | |
JP2018041765A (en) | Wafer processing method | |
JP2009054965A (en) | Method of manufacturing semiconductor device | |
MY181934A (en) | Mask-integrated surface protective tape | |
JP5704602B2 (en) | Thin semiconductor device manufacturing method and support for brittle member | |
JP6314047B2 (en) | Wafer processing method | |
WO2018149906A1 (en) | Masking a zone at the edge of a donor substrate during an ion implantation step | |
CN107154369A (en) | Method of plasma processing | |
US20070155183A1 (en) | Process for manufacturing wafers usable in the semiconductor industry | |
JP6684183B2 (en) | Device wafer processing method | |
JP5605790B2 (en) | Manufacturing method of thin semiconductor device | |
JP5839538B2 (en) | Manufacturing method of thin semiconductor device | |
US20040087054A1 (en) | Disposable barrier technique for through wafer etching in MEMS | |
JP2018133496A (en) | Method for manufacturing device chip | |
CN106560916B (en) | Method for manufacturing component chip |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20120808 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20131205 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20131210 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140210 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140401 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140602 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20140819 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20140819 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5605790 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |