JP2011135673A - Method for controlling power conversion apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for controlling a power conversion apparatus in which the problem is solved that when characteristics for preventing switching vary, increase in temperature of each switching element is uneven in conventional methods of controlling power conversion apparatus. <P>SOLUTION: In the method for controlling the power conversion apparatus, even when multiple switching elements with different characteristics are used in controlling pressure rising, the temperature increase in switching element can be made by shifting timing for switching on and off the switching elements 14 and 15, and swapping the order of the switching. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for controlling a power converter.

  FIG. 3 shows the configuration of a conventional embodiment. In the figure, 10 (101, 102) is an IGBT with a chip-like current sense emitter, 6 is the main emitter of this IGBT, and 7 is a current sense emitter. The collectors and main emitters of the two IGBTs 101 and 102 are commonly connected to each other, and the gates are also commonly connected to each other via a gate resistor 2.

  The current sense emitters 7 of the IGBTs 101 and 102 are connected to the main emitter 6 via sense resistors 8 (81 and 82), respectively. Here, the sense resistors 81 and 82 have the same value.

  The sense resistor 8 is configured such that a current proportional to the current of the main emitter 6 of the IGBT flows, and the main current of the IGBT can be detected from the voltage across the sense resistor 8. it can.

  For convenience, the output points of the current sense emitters 7 of the IGBTs 101 and 102 (that is, the connection points of the current sense emitters 7 and the sense resistors 81 and 82) are A and B, respectively.

  Next, 4 (41, 42) is an FET connected in parallel between the gate and main emitter of each IGBT 101, 102, and 5 (51, 52) is an operational amplifier for controlling the gates of the FETs 41, 42, respectively.

  The (+) and (−) input terminals of the operational amplifier 51 are connected to points A and B, respectively, and the (+) and (−) input terminals of the operational amplifier 52 are connected to points B and A, respectively. .

  In the circuit of FIG. 3, if the on-resistance of the IGBT 101 is lower than the on-resistance of the IGBT 102 and the main current (main emitter current) of the IGBT 101 is larger than the main current of the IGBT 102, the voltage across the sense resistor 81 of the IGBT 101 is The voltage at both ends of the sense resistor 82 is larger, that is, the potential at the point A becomes higher than the potential at the point B.

  As a result, the operational amplifier 51 controls the FET 41 to turn on to lower the gate voltage of the IGBT 101 and reduce its main current.

  On the other hand, the operational amplifier 52 controls the FET 42 to the off side to increase the gate voltage of the IGBT 102 and increase its main current. In this way, the main currents of the two IGBTs 101 and 102 are balanced (see, for example, Patent Document 1).

Japanese Patent Laid-Open No. 9-289442

The conventional method for controlling the power conversion apparatus has a problem that a complicated circuit is required and the cost is increased.

  In order to solve the above-described conventional problems, a method for controlling a power conversion device according to the present invention shifts the on-timing and off-timing of switching elements and switches the switching order.

  As a result, even when a plurality of switching elements having variations in characteristics are used, the temperature rise can be made uniform.

  The present invention can solve the above-described problems and can easily suppress the heat generation of the switching element.

Circuit block diagram in Embodiment 1 of the present invention Sequence diagram of operation of switching element in embodiment 1 of the present invention Circuit block diagram for conventional implementation

(Embodiment 1)
Embodiments of the invention described in claims 1 and 2 will be described with reference to FIGS.

  FIG. 1 shows an AC power supply 11, a reactor 12 connected in series to one phase of the AC power supply 11, and a full-wave rectification in which the output of the reactor 12 and the other phase of the AC power supply 11 are connected to the AC input side. The diode bridge 13 (hereinafter referred to as DB13), the first switching element 14 connected in parallel to the DC output of DB13, the second switching element 15, and the DC output after the switching elements 14, 15 are connected in series on the + side. A fast recovery diode 16 (hereinafter referred to as FRD 16) having an anode connected thereto, an electrolytic capacitor 17 connected in parallel to the cathode of the FRD 16 and the negative side of the DC output, and a voltage detection circuit 18 for measuring a voltage across the electrolytic capacitor 17; , The load 19 connected in parallel with the electrolytic capacitor, the output of the voltage detection circuit 18, etc. A control unit 20 for controlling the timing and on-time of the etching, the phase detection circuit 21 outputs to the control unit detects the phase of the AC power source 11, in a circuit block diagram of the constructed power converter.

  The operation of this circuit will be described. The voltage of the AC power supply 11 is full-wave rectified by the DB 13, smoothed by the electrolytic capacitor 17, and applied to the load 19. The voltage detection circuit 18 detects a DC voltage and outputs it to the control unit 20, and the phase detection circuit 21 detects the phase of the AC power supply 11 and outputs it to the control unit 20. In addition to controlling the switching elements 14 and 15 based on this output, the DC voltage can be boosted, and by controlling so that the current of the AC power supply 11 becomes the sine wave, the power factor can be improved, and the power supply harmonics. The improvement effect can also be obtained.

  When the switching elements 14 and 15 are turned on, the AC power supply 11 is short-circuited through the DB 13 and the reactor 12. The short-circuit current flowing through the reactor 12 is held by the physical properties of the reactor 12 and tends to flow even after the switching elements 14 and 15 are turned off. By storing this holding current in the electrolytic capacitor 17 through the FRD 16, the voltage at both ends of the electrolytic capacitor 17 is increased, and a higher voltage can be obtained. Even if the voltage of the electrolytic capacitor 17 is higher than the output voltage of the DB 13, the current does not flow in reverse because of the FRD 16.

At this time, it is ideal that a short-circuit current flows through the switching elements 14 and 15 and the voltage at both ends becomes 0 V. However, generally used switching elements such as FETs and IGBTs have a turn-on time and a turn-off time. At turn-on, a loss occurs due to the product of the rising current and the voltage falling voltage.

  Usually, when a plurality of switching elements are simultaneously switched, one of the operations is instantaneously delayed due to component variations, so that a loss is always borne.

  However, according to the present invention, as shown in FIG. 2, the on-time of the switching elements 14, 15 is shifted by a certain time, so that, for example, the switching element 14 is turned on first when on, and the loss at on is borne. When the switching element 15 is turned on with a delay, the voltage applied to the switching element 15 is 0 V, so that no loss due to the transient state of switching occurs.

  When the switching element 15 is turned off, the switching element 14 is turned off first. However, the applied voltage is 0 V, and no loss is caused by the switching transient state. When the switching element 15 is turned off, the loss at the time of turning off is borne. Since the voltage applied to the switching element varies depending on the phase of the AC voltage, the loss at the time of off becomes larger.

  Even during the on-time, loss occurs due to the on-resistance and voltage drop of the element. For this reason, it suffices if the heat generation can be equalized by adjusting the on-time, but the heat generation due to loss can be easily made constant in the long term by changing the switching order at a constant cycle.

(Embodiment 2)
In the power conversion device described in the first embodiment, the power factor can be 100% and the harmonic can be zero by PWM control of the switching element at a high frequency. Even in this case, since the same loss as in the first embodiment occurs, the same effect can be obtained, for example, by switching the switching order every predetermined cycle of the AC power supply 11 or every switching pulse. Is.

  The present invention can be widely applied to drive circuits for power converters.

2 Gate Resistance 6 Main Emitter 7 Current Sense Emitter 11 AC Power Supply 12 Reactor 13 Diode Bridge 14 First Switching Element 15 Second Switching Element 16 Fast Recovery Diode 17 Electrolytic Capacitor 18 Voltage Detection Circuit 19 Load 20 Control Unit 21 Phase Detection Circuit 41 FET
42 FET
51 operational amplifier 52 operational amplifier 81 sense resistor 82 sense resistor 101 IGBT with current sense emitter
102 IGBT with current sense emitter

Claims (3)

A reactor having one end connected to an AC or DC power supply; a plurality of power supply short-circuit means connected to the other end of the reactor; a rectifier circuit connected in parallel to an output terminal of the power-supply short-circuit means; and an output terminal of the rectifier circuit In a power conversion device configured with smoothing capacitors connected in parallel, the on-timing of each of the switching elements of each of the plurality of power supply short-circuit means is shifted, and the on-time of the switching elements is controlled differently. A control method of a power converter characterized by the above. The method of controlling a power conversion device according to claim 1, wherein patterns of on-timing and on-time of each switching element are exchanged at a predetermined cycle. The method for controlling the power conversion device according to claim 1, wherein the on-time of each switching element is PWM-controlled.