JP2011129020A - Operation synthesizing device and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an operation synthesizing device and method for synthesizing operations from published operation descriptions without publishing concealed descriptions. <P>SOLUTION: The operation synthesizing device includes an operation description dividing means and a concealed part consideration scheduling/binding means. The operation description dividing means divides an operation description into a concealed part being a description block to which concealing is designated and a published part being a description other than the concealed part, functionalizes the description of the concealed part and also replaces the description with a description for accessing the function. The concealed part consideration scheduling/binding means allocates a hardware module corresponding to the concealed part to replaced processing instead of the functionalized concealed part. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a behavioral synthesis apparatus and method for generating an RTL (Register Transfer Level) description indicating a specific function (circuit) from an operation description indicating the operation of a semiconductor integrated circuit.

  In recent years, a design technique for designing an RTL circuit by behavioral synthesis and designing with a behavioral description with a high degree of abstraction has begun to be adopted for system LSI design. In this type of design method, first, a behavioral description that realizes a desired behavior of the system LSI is designed, and the behavioral description is converted into an RTL description by behavioral synthesis. Then, the RTL description is converted into a gate level description by logic synthesis, and finally a circuit layout is created from the gate level description. By designing the hardware based on the behavioral description in this way, the design information can be abstracted, thereby improving the design efficiency.

  However, the hardware description language used in the behavioral description is generally at the same level of abstraction as the software description language. Therefore, when the behavioral description is seen by a third party, the third party may decrypt the algorithm or the like in the behavioral description and leak technical information indicated by the algorithm. In particular, if the creator of the behavioral description (hereinafter referred to as the behavioral description creator) is different from the performer (hereinafter referred to as the behavioral synthesis performer) who performs behavioral synthesis from the behavioral description using the behavioral synthesis tool, the behavioral description creator The algorithm created by is easily deciphered by the behavioral synthesis performer.

  As a method of partially concealing the behavior description, for example, a method in which the behavior description creator divides the created behavior description into a concealed description and a public description and converts the concealed description into a function or the like is known. ing. However, if the behavioral description is divided for concealment in the behavioral description creation stage, the reusability of the behavioral description is lowered, and there is a problem that the design efficiency is lowered. In addition, if a part of the behavior description already designed for concealment is changed, a new bug may be mixed.

  As another method of partially concealing the behavioral description, there are techniques described in Patent Document 1 (Japanese Patent Laid-Open No. 2002-163712) and Patent Document 2 (Japanese Patent Laid-Open No. 2005-235848). In Patent Document 1 (Japanese Patent Laid-Open No. 2002-163812) and Patent Document 2 (Japanese Patent Laid-Open No. 2005-235848), other character strings that cannot be estimated from character strings such as variable names in action descriptions. A method is described in which it is difficult to decipher the design information shown in the behavioral description by converting into the above.

JP 2002-163312 A JP 2005-235848 A

  As described above, in the behavioral synthesis device of the background art, the behavioral description creator divides the designed behavioral description into a confidential description and a public description and converts the confidential description into a function or the like individually. There is a problem that the reusability of the description is lowered and the design efficiency is lowered. In addition, if a part of the behavior description already designed for concealment is changed, a new bug may be mixed.

  On the other hand, Patent Document 1 and Patent Document 2 described above show a technique for improving confidentiality by changing a character string such as a variable name in an operation description, but what about changing an algorithm description? There is still a risk that the algorithm will be deciphered.

  The present invention has been made to solve the problems of the background art as described above, and provides a behavioral synthesis apparatus and method capable of behavioral synthesis from published behavioral descriptions without disclosing secret descriptions. The purpose is to provide.

In order to achieve the above object, the behavioral synthesis device of the present invention divides the behavior description into a concealment unit that is a description block in which concealment is specified and a public unit that is a description excluding the concealment unit. A behavior description dividing means for converting the description into a function and replacing it with a description of a process for calling the function;
A concealment unit considering scheduling / binding means for allocating a hardware module corresponding to the concealment unit to the processing replaced in place of the functionalized concealment unit;
Have

Or, the operation description is divided into a concealment unit which is a description block in which concealment is designated and a public unit which is a description excluding the concealment unit, and the description of the concealment unit is converted into a function and the function is called. A behavior description dividing means for replacing with a description;
Public part-considered scheduling / binding that generates an RTL description that is a result of behavioral synthesis of the hardware module corresponding to the secret part, including definitions of input / output ports used for data transmission / reception with the hardware module corresponding to the public part Means,
Have

On the other hand, the behavioral synthesis method of the present invention divides the behavioral description into a secret part that is a description block in which concealment is specified and a public part that is a description excluding the secret part,
Converting the description of the concealment part into a function and replacing it with a description of a process for calling the function;
In this method, a hardware module corresponding to the concealment unit is assigned to a process replaced in place of the functionalized concealment unit.

Alternatively, the behavioral description is divided into a secret part that is a description block for which concealment is designated and a public part that is a description excluding the secret part,
Converting the description of the concealment part into a function and replacing it with a description of a process for calling the function;
This is a method for generating an RTL description, which is a behavioral synthesis result of the hardware module corresponding to the concealment unit, including definitions of input / output ports used for data transmission / reception with the hardware module corresponding to the disclosure unit.

  According to the present invention, it is possible to perform behavioral synthesis from published behavioral descriptions without disclosing secret descriptions.

It is a block diagram which shows the example of 1 structure of the behavioral synthesis apparatus of 1st Embodiment. It is a flowchart which shows an example of the process sequence of the behavioral synthesis apparatus of 1st Embodiment. It is a flowchart which shows an example of the process sequence for determining whether a concealment block can be divided | segmented. It is a block diagram which shows the example of 1 structure of the behavioral synthesis apparatus of 2nd Embodiment. It is a flowchart which shows an example of the process sequence of the behavioral synthesis apparatus of 2nd Embodiment. It is a schematic diagram which shows an example of action description. FIG. 7 is a schematic diagram illustrating an example of a behavior description division instruction corresponding to the behavior description illustrated in FIG. 6. FIG. 8 is a schematic diagram illustrating an example of a secret part behavior description generated from the behavior description illustrated in FIG. 6 and the behavior description division instruction illustrated in FIG. 7. FIG. 8 is a schematic diagram illustrating an example of a public section behavior description generated from the behavior description illustrated in FIG. 6 and the behavior description division instruction illustrated in FIG. 7. FIG. 8 is a schematic diagram illustrating an example of concealment unit hardware module information generated from the behavior description illustrated in FIG. 6 and the behavior description division instruction illustrated in FIG. 7. FIG. 8 is a schematic diagram illustrating an example of a concealment unit hardware module RTL description that is a template generated from the behavior description illustrated in FIG. 6 and the behavior description division instruction illustrated in FIG. 7. FIG. 8 is a schematic diagram illustrating an example of a public section hardware module RTL description generated from the behavior description illustrated in FIG. 6 and the behavior description division instruction illustrated in FIG. 7. FIG. 8 is a schematic diagram illustrating an example of a control flow graph generated from the behavior description illustrated in FIG. 6 and the behavior description division instruction illustrated in FIG. 7. FIG. 8 is a schematic diagram showing an example of a call graph generated from the behavior description shown in FIG. 6 and the behavior description division instruction shown in FIG. 7. It is a schematic diagram which shows an example of the secrecy part hardware module RTL description produced | generated with the behavioral synthesis apparatus of 2nd Example.

Next, the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a block diagram illustrating a configuration example of the behavioral synthesis device according to the first embodiment.

  As shown in FIG. 1, the behavioral synthesis device according to the first embodiment includes a processing device 100 that converts a behavior description into an RTL description, a behavior description to be converted, an RTL description after conversion, and an RTL description from the behavior description. The storage device 110 stores various data used in the conversion process. The behavioral synthesis device shown in FIG. 1 can be realized by a computer including a CPU that executes required processing according to a program, a storage device, various logic circuits, and the like.

  The processing apparatus 100 includes a behavior description dividing unit 101, a template generating unit 102, and a confidential part considering scheduling / binding unit 103.

  Further, the storage device 110 includes a behavior description storage unit 111, a behavior description division instruction storage unit 112, a concealment unit operation description storage unit 113, a public unit operation description storage unit 114, a concealment unit hardware module information storage unit 115, and a concealment unit hardware. A hardware module RTL description template storage unit 116, a public unit behavioral synthesis instruction storage unit 117, and a public unit hardware module RTL description storage unit 118.

  The behavior description to be converted into the RTL description is stored in the behavior description storage unit 111 in advance. The operation description is expressed in a hardware description language such as Verilog-HDL, VHDL, or SystemVerilog, or in a programming language such as C language, C ++ language, C # language, SystemC, SpecC, Java (registered trademark), Perl, Scheme, or Lisp. Is done. The behavioral description may use C language, C ++ language, or a language extended from Java (registered trademark) for circuit design. The behavioral description is prepared by the behavioral description creator.

  Among the created behavior descriptions, a description block to be concealed (hereinafter referred to as a concealment block) is designated by an operation description division instruction. The behavior description division instruction includes information for specifying the range of the concealment block, and is stored in the behavior description division instruction storage unit 112 in advance. The action description division instruction is prepared by, for example, the action description creator.

  The behavior description dividing unit 101 reads the behavior description from the behavior description storage unit 111, reads the behavior description division instruction corresponding to the behavior description from the behavior description division instruction storage unit 112, and reads the behavior description read from the behavior description storage unit 111. Among these, the concealment block designated by the action description division instruction is converted into a function. Further, the definition of the function used for functionalizing the concealment block is stored in the concealment unit operation description storage unit 113 as the concealment unit operation description. Also, the behavior description dividing unit 101 replaces the functionalized concealment block in the behavior description read from the behavior description storage unit 111 with a description for calling the function, and discloses the entire behavior description including the description. It is stored in the public part operation description storage unit 114 as a part operation description. Furthermore, the behavioral description dividing unit 101 accesses variables within the function of the concealment block based on the characteristics of the concealment block analyzed when the concealment block is functionalized, a variable defined outside the function, an array, Information on the function is added to the operation description division instruction, and is stored in the concealment unit hardware module information storage unit 115 as concealment unit hardware module information.

  The template generation unit 102 reads the secret part hardware module information from the secret part hardware module information storage unit 115, and according to the interface generation rule specified by the secret part hardware module information, the secret part hardware module and the public part hardware Interface between hardware modules. Further, the template generation unit 102 generates the RTL description of the secret part hardware module indicating the input / output port used as an interface as a template, and stores it in the secret part hardware module RTL description template storage unit 116.

  The public part hardware module indicates a hardware module indicated by the RTL description generated by behavioral synthesis from the public part behavior description. The concealment unit hardware module refers to a hardware module indicated by RTL description generated by behavioral synthesis from the concealment unit hardware module information.

  The interface refers to an input / output port and protocol used for transmitting and receiving control signals and data signals between the public unit hardware module and the secret unit hardware module. The interface generation rule is specified by the behavior description division instruction and is defined according to the device configuration of the behavioral synthesis device.

  As an interface generation rule, an interface generation rule for performing execution control of the secret part hardware module from the public part hardware module, and a function of the function realized in the public part hardware module from the secret part hardware module are controlled. Interface generation rules, and interface generation rules for data transfer between the public hardware module and the secret hardware module. For example, when the execution control is transferred from the public unit hardware module to the concealment unit hardware module, a protocol indicating that the public unit hardware module notifies by starting the start control signal (1 bit), and the start control signal Define input / output ports used for sending and receiving.

  The secret part considering scheduling / binding means 103 reads the public part behavior description from the public part behavior description storage part 114, reads the secret part hardware module information from the secret part hardware module information storage part 115, and stores the public part behavior synthesis instruction storage. The secret part hardware module is read as a black boxed external hardware module in which the internal logic is not defined for the description for reading the public part behavior synthesis instruction from the part 117 and calling the function included in the public part behavior description. Schedule and bind to assign. Further, the concealment unit considering scheduling / binding means 103 generates a public unit hardware module RTL description including connection information with the input / output port of the concealment unit hardware module RTL description template, which is a behavioral synthesis result, and discloses the public unit hardware. Stored in the hardware module RTL description storage unit 118.

  The public part behavioral synthesis instruction is information that should be taken into account during behavioral synthesis from the public part behavior description, and is stored in advance in the public part behavioral synthesis instruction storage unit 117. The public part behavior synthesis instruction is prepared, for example, by the behavior description creator.

  Next, processing of the behavioral synthesis device according to the first embodiment will be described with reference to FIGS.

  First, the processing apparatus 100 reads the behavior description to be converted from the behavior description storage unit 111 by the behavior description division instruction unit 101 and reads the behavior description division instruction corresponding to the behavior description from the behavior description division instruction storage unit 112. Then, it is determined whether or not the concealment block in the behavior description designated by the behavior description division instruction can be divided (step S1 in FIG. 2).

  As shown in FIG. 3, whether or not the concealment block can be divided is determined by performing the following three-stage analysis for each concealment block defined by the action description division instruction.

  In the first stage, the behavior description division instruction unit 101 performs a control flow analysis of the behavior description, and whether or not there is an execution path that passes outside the concealment block between the start point and the end point of the concealment block. Is confirmed (step S11 in FIG. 3). If there is an execution path that passes through the outside of the concealment block, the designated concealment block cannot be expressed by a function, and it is determined that the division is impossible.

  In the second stage, the behavior description division instruction unit 101 performs pointer analysis and data flow analysis of the behavior description, and variables, arrays, external ports outside the concealment block to be referred to / assigned in the concealment block, and the The functions called in the concealment block are listed (step S12 in FIG. 3). If there is a pointer in the concealment block that cannot uniquely identify the pointing destination, the interface inside or outside the concealment block cannot be determined.

  In the third stage, the behavioral description division instruction unit 101 regards the concealment block as a function, performs interprocedural analysis, and checks whether there is a recursive call to the function (step S13 in FIG. 3). If there is a recursive function call, the hardware module cannot be realized, so it is determined that the function cannot be divided.

  When none of the above three-stage analysis results determines that the division is impossible, the behavioral description division instruction unit 101 determines that the analyzed concealment block can be divided. The control flow analysis, pointer analysis, data flow analysis, and interprocedural analysis may be executed using an algorithm used by a general software compiler.

  When the behavioral description division instruction unit 101 determines that the concealment block can be divided, the variable, the array, the external port, and the reference / substitution within the concealment block using the analysis result of each stage for the concealment block, and Information of the function called in the concealment block is added to the operation description division instruction corresponding to the concealment block, and is stored in the concealment unit hardware module information storage unit 115 as concealment unit hardware module information (FIG. 2). Step S2).

  Next, the behavioral description division instructing means 101 uses the description of the concealment block as the argument, the definition of a function that uses a variable, an array, an external port as an argument, or the pointer thereof as an argument. It is converted into a function definition and stored in the secret part behavior description storage unit 113 as a secret part behavior description. Further, the description of the concealment block in the original behavior description is converted into a description for calling a newly defined corresponding function, and is stored in the public portion behavior description storage unit 114 as a public portion behavior description (FIG. 2). Step S3).

  In addition, when there is a function defined outside the concealment block that is called within the concealment block, the function outside the concealment block is described in the concealment block, or a function outside the concealment block It is specified by the action description division instruction whether to copy the definition and include it in the operation description of the concealment block, or which division method is adopted. When the definition of the function outside the concealment block is duplicated and included in the operation description of the concealment block, the function to be duplicated can be realized in the concealment unit hardware module.

  Next, the processing apparatus 100 reads the concealment unit hardware module information from the concealment unit hardware module information storage unit 115 by the template generation unit 102, and the concealment unit hardware module and the disclosure unit hardware module corresponding to the concealment block. Determine the interface between.

  Further, the template generation unit 102 generates a secret part hardware module including an RTL description that defines the input / output ports of the secret part hardware module based on the determined interface, and uses the RTL description as a template for the secret part hardware module. The data is stored in the RTL description template storage unit 116 (step S4 in FIG. 2).

  Finally, the processing device 100 reads the public part behavior description from the public part behavior description storage unit 114 by the secret part consideration scheduling / binding means 103 and stores the secret part hardware module information from the secret part hardware module information storage unit 115. Read, public part behavioral synthesis instruction storage unit 117 reads the public part behavioral synthesis instruction, and performs scheduling and binding using the information. Information related to the performance, area, and power consumption of the concealment unit hardware module is specified by the action description division instruction. Scheduling is executed so that the corresponding secret part hardware module is assigned to the description included in the public part behavior description and replaced with the function call processing corresponding to the secret block. As the delay of the secret part hardware module to be considered at the time of scheduling, the value defined by the public part behavioral synthesis instruction is used.

  The concealment unit considering scheduling / binding means 103 performs scheduling according to an interface generation rule defined according to the device configuration of the behavioral synthesis device and an interface protocol determined from the concealment unit hardware module information. For example, when the execution latency of the concealment unit hardware module is defined by a fixed number of clock cycles in the public unit behavioral synthesis instruction, scheduling is performed with the same assumption as that of an arithmetic unit operating at a fixed number of clock cycles. Also, for example, if the execution latency of the concealment hardware module is not defined with a fixed number of clock cycles and is indefinite, scheduling is performed assuming that it is an external hardware module that operates with an indefinite number of clock cycles.

  Further, the concealment unit considering scheduling / binding unit 103 performs binding for assigning a corresponding concealment unit hardware module to a description for calling a black box function.

  The concealment unit considering scheduling / binding means 103 conceals concealment from the behavioral synthesis result based on the interface generation rule defined according to the device configuration of the behavioral synthesis device and the input / output port used as the interface determined from the concealment unit hardware module information. The public part hardware module RTL description having a structure connectable to the input / output port of the part hardware module RTL circuit description template is generated and stored in the public part hardware module RTL description storage unit 118.

  Next, the effect of the behavioral synthesis device of this embodiment will be described.

  The behavioral synthesis device according to the present embodiment uses the processing block (the concealment block) in the behavior description for which concealment is designated by the behavior description division instruction unit 101 as the concealment unit behavior description, and discloses the behavior description excluding the concealment block. A secret part hardware module information indicating an interface of the secret part hardware module corresponding to the secret part behavior description, and generating a template of the RTL description of the secret part hardware module by the template generation unit 102; The public part hardware module RTL description connectable with the secret part hardware module RTL description template by performing behavioral synthesis considering the secret part hardware module using the secret part hardware module information by the secret part consideration scheduling / binding means 103 Generate a That.

  Therefore, the behavioral description creator can separate a part of the behavioral description from the original behavioral description and conceal it, and the behavioral synthesis executor can consider the confidential part behavioral description as an external hardware module. The behavioral description of the public part can be synthesized.

In addition, simply by specifying the range of the description to be concealed, the processing block (the concealment block) in the specified operation description is converted into a function, and the concealment block is converted into a calling process of the corresponding function. Since an external hardware module (confidential part hardware module) that is called in the process is generated, the behavior description creator can easily conceal the desired description, and the behavioral description is concealed manually. There is no need to change the description for secrecy by dividing it into a description and a public description. Therefore, there is no possibility that a new bug or the like is mixed into the created behavioral description.
(Second Embodiment)
Next, a second embodiment of the present invention will be described.

  FIG. 4 is a block diagram illustrating a configuration example of the behavioral synthesis device according to the second embodiment. FIG. 5 is a flowchart illustrating an example of a processing procedure of the behavioral synthesis device according to the second embodiment.

  In the behavioral synthesis device of the second embodiment, the public part hardware module behaviorally synthesized from the public part behavior description is regarded as an external hardware module, and the secret part behavior description is behaviorally synthesized, and then the first embodiment. In the same manner as described above, the secret part hardware module that is behaviorally synthesized from the secret part behavior description is regarded as an external hardware module, and the public part behavior description is behaviorally synthesized.

  As shown in FIG. 4, in the behavioral synthesis device according to the second embodiment, the processing device 100 includes a public part considering scheduling / binding unit 104 in place of the template generation unit 102 shown in FIG. Further, the storage device 110 includes a concealment unit behavioral synthesis instruction storage unit 119 and a concealment unit hardware module RTL description storage unit 120 in place of the concealment unit hardware module RTL description template storage unit 116.

  The secret part behavioral synthesis instruction is information that should be taken into account during behavioral synthesis from the secret part behavioral description, and is stored in the secret part behavioral synthesis instruction storage unit 117 in advance. The secret part behavior synthesis instruction is prepared, for example, by the behavior description creator.

  Further, as shown in FIG. 5, the behavioral synthesis device according to the second embodiment executes the process of step S6 instead of the process of step S4 shown in FIG.

  That is, in step S6, the public part consideration scheduling / binding means 104 reads the secret part operation description from the secret part operation description storage unit 113, reads the secret part hardware module information from the secret part hardware module information storage part 115, and The secret part behavior synthesis instruction is read from the secret part behavior synthesis instruction storage unit 119. The public part considering scheduling / binding unit 104 handles the public part hardware module as an external module, and performs scheduling and binding so as to satisfy the interface and the secret part operation synthesis instruction indicated by the secret part hardware module information. Further, the public part considering scheduling / binding means 104 stores the secret part hardware module RTL description, which is the result of behavioral synthesis from the secret part behavior description, in the secret part hardware module RTL description storage unit 120. Other configurations and processes are the same as those of the behavioral synthesis apparatus according to the first embodiment, and thus description thereof is omitted.

  In the behavioral synthesis device of the second embodiment, the public part consideration scheduling / binding means 104 uses the definition of the input / output ports included in the template of the secret part hardware module RTL description shown in the first embodiment, An RTL description of the behaviorally synthesized secret part hardware module is also generated.

  Similarly to the first embodiment, the concealment unit considering scheduling / binding unit 103 performs behavioral synthesis considering the concealment unit hardware module using the concealment unit hardware module information, and defines the input / output ports. A public part hardware module RTL description that can be connected to the included secret part hardware module RTL description is generated.

  Therefore, the behavioral synthesis device according to the second embodiment can achieve the same effects as those of the behavioral synthesis device according to the first embodiment.

Embodiments of the behavioral synthesis apparatus of the present invention will be described below with reference to the drawings.
(First embodiment)
First, a first embodiment of the behavioral synthesis device of the present invention will be described with reference to the drawings. The first example corresponds to the behavioral synthesis device of the first embodiment described above.

  FIG. 6 is a schematic diagram showing an example of behavioral description.

  The behavioral description shown in FIG. 6 is expressed in C language and stored in advance in the behavioral description storage unit 111 of the storage device 110. The function func () shown in FIG. 6 corresponds to the top module of the hardware module to be designed, the global variable a shown in FIG. 6 corresponds to the external input port, and the global variable x shown in FIG. 6 corresponds to the external output port. Correspond. In FIG. 6, an array r and variables s and t are declared in the local scope of the function func ().

  Also, in FIG. 6, using an external port defined according to the device configuration of the behavioral synthesis device, data is input from the outside by an input function input, data processing is executed according to the behavior description, and an output function output is used. It describes that the processed data is output to the outside.

  FIG. 7 is a schematic diagram showing an example of a behavior description division instruction.

  In the behavioral description division instruction shown in FIG. 7, a processing block to be concealed is defined in the behavioral description shown in FIG. Specifically, it is described in the third line of FIG. 7 that the processes from the seventh line to the thirteenth line of the behavior description shown in FIG. 6 are concealed.

  Further, the descriptions in the 4th to 10th lines in FIG. 7 define the characteristics of the hardware module corresponding to the concealment block. Specifically, the fourth line in FIG. 7 indicates that the corresponding hardware module is a sequential circuit, and the fifth line in FIG. 7 indicates two clock cycles in which the corresponding hardware module fixes the processing of the concealment block. It shows that it is executed with.

  The sixth line in FIG. 7 indicates that there is no path that does not pass through the internal register from the input port to the output port of the corresponding hardware module, and the delay time is not defined. The seventh line in FIG. The maximum delay time from the input port of the corresponding hardware module to the internal register is 5 ns.

  The eighth line in FIG. 7 indicates that the maximum delay time from the internal register of the corresponding hardware module to the output port is 7 ns, and the ninth line in FIG. 7 indicates that the area of the corresponding hardware module is It shows that it is 2,000 square micrometers. Furthermore, the 10th line in FIG. 7 indicates that the power consumption of the corresponding hardware module is 50 μW.

  The 11th to 22nd lines in FIG. 7 define interface rules for variables, arrays, external ports, and functions that require data transmission and reception inside and outside the concealment block.

  The 11th to 14th lines in FIG. 7 specify that the external input port and the variable are directly connected, and indicate that the latency required for data transfer is 0 clock cycle.

  The 15th to 18th lines in FIG. 7 indicate that the array has one system for both reading and writing, and the latency required for data transfer is 0 clock cycle.

  Lines 19 to 22 in FIG. 7 correspond to functions implemented by the public part hardware module, and from the hardware module of the concealment part, a 1-bit start request signal start and a 1-bit end notification signal end. The data transfer corresponding to the argument and the return value of the function sub indicates that the latency is executed in 0 clock cycles by direct connection.

  The behavioral description division instruction unit 101 reads out the behavioral synthesis description shown in FIG. 6 from the behavioral description storage unit 111, reads out the behavioral synthesis division instruction shown in FIG. 7 from the behavioral description division instruction storage unit 112, and displays the confidentiality as shown in FIG. A part operation description, a public part operation description shown in FIG. 9, and a secret part hardware module information shown in FIG. 10 are created.

  The template generation means 102 generates a template of the secret part hardware module RTL description shown in FIG. 11 and stores it in the secret part hardware module RTL circuit description template storage unit 116.

  The secret part considering scheduling / binding means 103 generates the public part hardware module RTL description shown in FIG. 12 and stores it in the public part hardware module RTL circuit description storage part 118.

  The behavioral description division instruction unit 101 determines whether or not the concealment block for which concealment is designated by the behavioral description division instruction can be divided (step S1 in FIG. 2).

  In the first stage, the behavior description division instruction unit 101 creates the control flow graph shown in FIG. 13 from the behavior description shown in FIG. 7 and performs control flow analysis (step S11 in FIG. 3). In the control flow graph shown in FIG. 13, the process surrounded by a broken line corresponds to a concealment block. In the example shown in FIG. 13, there is no execution path from the concealment block (black box 1) surrounded by a broken line to the concealment block through the concealment block. Determines that the concealment block can be divided in the first stage.

  The behavior description division instruction unit 101 performs pointer analysis and data flow analysis in the second stage (step S12 in FIG. 3). Since there is no pointer in the behavioral description shown in FIG. 7, the behavioral description division instruction unit 101 determines that the concealment block can be divided in the second stage.

  In the third stage, the behavioral description division instruction unit 101 creates a call graph shown in FIG. 14 and performs interprocedural analysis (step S13 in FIG. 3). Since the concealment block can be regarded as an independent function, the example shown in FIG. 14 indicates that the function func1 calls the block black_box1, and the function sub is called from the block black_box1. Since there is no cycle in the call graph shown in FIG. 14, the behavioral description division instruction unit 101 determines that the concealment block can be divided in the third stage.

  Next, the behavior description division instruction unit 101 is used in the concealment block based on the analysis results of the first stage to the third stage, and is defined outside the concealment block, variable, array, external port, The function information is added to the behavior description division instruction, and is stored in the concealment unit hardware module information storage unit 115 as concealment unit hardware module information (step S2 in FIG. 2).

  FIG. 10 shows an example of the secret part hardware module information generated from the behavior description shown in FIG. 7 and the behavior description division instruction shown in FIG.

  In FIG. 10, the external port a is shown as a target to be read in the concealment block, a variable t is shown as a target to be written in the concealment block, and an array r is shown as a target to be read and written in the concealment block. The function sub is shown as a target to be called in the concealment block. The variable s is a variable that is read and written in the concealment block. However, since it is understood from the data flow analysis that the lifetime of the variable falls within the range of the concealment block, the variable s is not regarded as a variable in the concealment block.

  Next, the behavior description division instruction unit 101 converts the description of the concealment block into the definition of a function that uses variables, arrays, and external ports as arguments in the concealment block. Is stored in the concealment unit operation description storage unit 113. Also, in the original behavioral description, the concealment block is converted into a newly defined call description of the corresponding function, and is stored in the public part behavior description storage unit 114 as a public part behavior description (step S3 in FIG. 2). .

  FIG. 8 is a schematic diagram illustrating an example of the secret part operation description.

  The behavior description division instruction unit 101 generates a description that defines a function black_box1 that uses the concealment block as an internal process. Further, in order to access the external port a, the array r, and the variable t of the public part in the concealment block, corresponding function arguments are defined.

  FIG. 9 is a schematic diagram illustrating an example of the public part operation description.

  In the public part behavior description shown in FIG. 9, the concealment block is converted into the call description of the function black_box 1 in the original behavior description.

  Next, the processing apparatus 100 uses the template generation unit 102 to generate an RTL description template that defines input / output ports used by the concealment unit hardware module (step S5 in FIG. 2).

  FIG. 11 shows an example of a template of RTL description by Verilog-HDL generated from the secret part hardware module information shown in FIG.

  In the RTL description template, necessary input / output ports are defined based on the interface generation rules defined depending on the device configuration of the behavioral synthesis device.

  The clock shown in FIG. 11 corresponds to a port for inputting a clock, and reset corresponds to a port for inputting a reset signal. Further, start shown in FIG. 11 corresponds to a control signal for requesting execution from the public unit hardware module to the secret unit hardware module, and ready is a status of the secret unit hardware module to the public unit hardware module. Corresponds to the control signal to be notified.

  Further, a shown in FIG. 11 corresponds to data transfer of the external port a connected to the public unit hardware module, and r_rd and r_wd correspond to the resource corresponding to the array r held in the secret unit hardware module. To support read and write data transfers.

  Also, r_addr shown in FIG. 11 corresponds to data transfer of an index for accessing a resource corresponding to the array r, and r_oe and r_we are read requests and write requests in the same way for accessing the resource corresponding to the array r. It corresponds to the control signal to notify.

  Further, t shown in FIG. 11 corresponds to data transfer for outputting data corresponding to the variable t held in the public unit hardware module, and sub_start and sub_end are functions realized in the public unit hardware module. This corresponds to a sub execution control signal.

  Further, sub_n and sub_reg shown in FIG. 11 correspond to data transfer corresponding to an argument and a return value at the time of executing the function sub.

  The behavior description creator designs the concealment unit hardware module in accordance with the protocol defined according to the generated template and the device configuration of the behavioral synthesis device.

Finally, the confidential part considering scheduling / binding means 103 generates the behavioral synthesis result of the public part as the RTL circuit description (step S5 in FIG. 2). FIG. 12 exemplifies a part of the public part hardware module RTL description by the generated Verilog-HDL. The public part hardware module RTL description has a structure connectable to the secret part hardware module RTL description. In the example shown in FIG. 12, the secret part hardware module RTL description is instantiated as a submodule of a lower layer. Being connected.
(Second embodiment)
Next, a second embodiment will be described with reference to the drawings.

  The second example corresponds to the behavioral synthesis device of the second embodiment. In the behavioral synthesis device of the second embodiment, the behavioral description division instruction means 101 reads the behavioral synthesis description shown in FIG. 6 from the behavioral description storage unit 111 and the behavioral description division instruction shown in FIG. 8 is created, based on the behavior description division instruction, the secret part behavior description shown in FIG. 8, the public part behavior description shown in FIG. 9, and the secret part hardware module information shown in FIG. 10 are created.

  The public part consideration scheduling / binding means 104 generates the concealment part hardware module RTL description shown in FIG. 15 based on the concealment part operation description, the concealment part hardware module information, and the concealment part operation synthesis instruction, and the concealment part hardware The data is stored in the module RTL description storage unit 120 (step S6 in FIG. 5).

  As shown in FIG. 15, the secret part hardware module RTL description generated by the public part consideration scheduling / binding means 104 includes an input / output port in the same manner as the template of the secret part hardware module RTL description shown in the first embodiment. (See FIG. 11), and further includes an RTL description of the concealed hardware module that has been behaviorally synthesized.

DESCRIPTION OF SYMBOLS 100 Processing apparatus 101 Behavior description division means 102 Template generation means 103 Secret part consideration scheduling / binding means 104 Public part consideration scheduling / binding means 110 Storage device 111 Action description storage part 112 Action description division instruction storage part 113 Secret part action description storage part 114 public part operation description storage unit 115 secret part hardware module information storage part 116 secret part hardware module RTL description template storage part 117 public part behavior synthesis instruction storage part 118 public part hardware module RTL description storage part 119 secret part behavior synthesis Instruction storage unit 120 Secret unit Hardware module RTL description storage unit

Claims (8)

The behavioral description is divided into a concealment part that is a description block for which concealment is specified and a public part that is a description excluding the concealment part, and the description of the concealment part is converted into a function and a description of a process that calls the function A behavior description dividing means to be replaced;
A concealment unit considering scheduling / binding means for allocating a hardware module corresponding to the concealment unit to the processing replaced in place of the functionalized concealment unit;
A behavioral synthesis device.   The behavioral synthesis device according to claim 1, further comprising a template generation unit configured to generate, as a template of the concealment unit, an RTL description that defines an input / output port used in a hardware module corresponding to the concealment unit. The behavioral description is divided into a concealment part that is a description block for which concealment is specified and a public part that is a description excluding the concealment part, and the description of the concealment part is converted into a function and a description of a process that calls the function A behavior description dividing means to be replaced;
Public part-considered scheduling / binding that generates an RTL description that is a result of behavioral synthesis of the hardware module corresponding to the secret part, including definitions of input / output ports used for data transmission / reception with the hardware module corresponding to the public part Means,
A behavioral synthesis device.   The behavioral synthesis device according to claim 3, further comprising a concealment unit considering scheduling / binding unit that assigns a hardware module corresponding to the concealment unit to a process replaced in place of the functionalized concealment unit. The behavioral description is divided into a secret part that is a description block for which concealment is designated and a public part that is a description excluding the secret part,
Converting the description of the concealment part into a function and replacing it with a description of a process for calling the function;
A behavioral synthesis method for assigning a hardware module corresponding to the concealment unit to a process replaced in place of the functionalized concealment unit.   6. The behavioral synthesis method according to claim 5, wherein an RTL description defining an input / output port used in a hardware module corresponding to the secret part is generated as a template of the secret part. The behavioral description is divided into a secret part that is a description block in which concealment is designated and a public part that is a description excluding the secret part,
Converting the description of the concealment part into a function and replacing it with a description of a process for calling the function;
A behavioral synthesis method for generating an RTL description that is a behavioral synthesis result of a hardware module corresponding to the concealment unit, including a definition of an input / output port used for data transmission / reception with the hardware module corresponding to the disclosure unit.   The behavioral synthesis method according to claim 7, wherein a hardware module corresponding to the concealment unit is assigned to a process replaced in place of the functionalized concealment unit.

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