JP2011103026A - Method for measuring number of dynamic steps, method for measuring number of clocks, and computer system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To accurately measure the number of dynamic steps of machine instruction level of a program without extremely increasing an execution load or being affected by optimization. <P>SOLUTION: When an executable program 114 is generated by compiling a source code 113, an instruction to add the number of instructions included in a basic block as the minimum unit of optimization to a dynamic step counter is generated with a pseudo object code as an internal expression of an object code, and then executable program 114 generated by the compiler 104 is executed by using the compiler 104 equipped with a function of embedding the generated instruction in the basic block, and the number of dynamic steps corresponding to conditions during execution is measured, and the measured value is output to an auxiliary storage device as dynamic step information, and displayed on an output device 116 by a dynamic step display part 111. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a technique for measuring the number of dynamic steps representing how many machine instructions are executed when a program is executed in a computer system.

  There is a dynamic step number as an index for evaluating the performance of a program in a computer system. The number of dynamic steps is a value indicating how much processing (the number of machine instructions) has been executed when the program is executed. In contrast to the number of dynamic steps, there is a value called a static number of steps as the index.

  Since the static step number indicating the total number of steps of the program is a value determined before the execution of the program, it can be easily obtained by statically analyzing the source code or the compiled program. On the other hand, since the number of dynamic steps needs to measure the number of steps in the execution path that changes depending on the conditions during program execution, it is more difficult than obtaining a static number of steps.

Conventionally, when measuring the number of dynamic steps, there are mainly a method of measuring at the source code level and a method of measuring at the machine instruction level.
For example, in order to measure the number of dynamic steps at the source code level of a high-level language, there is a method of examining whether each line has been executed using a debugger or a test tool. In this method, a counter indicating how many times the line has been executed is assigned to each line of the read source code, and the number of dynamic steps can be measured by executing the program in that state.

  Further, as a method of measuring the number of dynamic steps at the machine instruction level, there is a method of adding a counter each time each machine instruction of an object program is executed using an interrupt function of an OS (Operating System). . In this method, each time a generated instruction is executed, an interrupt is generated by the OS, and a dynamic step number counter is added by an interrupt handler that processes the generated interrupt. As a result, the number of dynamic steps is obtained at the end of program execution.

  Patent Document 1 discloses a technique for measuring the number of execution steps of a processor corresponding to an input source code by holding a source code pair execution step correspondence database.

JP 2001-273174 A

For example, even if the number of dynamic steps at the source code level of a high-level language is measured by a method using a debugger or a test tool, how many instructions are actually executed by the CPU (Central Processing Unit) depends on the architecture. Therefore, an accurate performance value cannot be obtained. Although the method of Patent Document 1 can also measure the machine instruction level, there is a problem that there is an error due to a predicted value and there is a possibility of being influenced by optimization.
In the measurement corresponding to the source code, there is a possibility that the order of the machine instructions is changed when the compiler performs optimization. For example, when an instruction in the iterative process is moved out of the iterative process due to optimization There is a problem that the wrong number of steps is measured.

On the other hand, when measuring the number of dynamic steps at the machine instruction level, the method using the interrupt function of the OS measures the number of dynamic steps for each machine instruction. Measurement values at the machine instruction level can be obtained without receiving them.
However, in this method, addition processing occurs for each machine instruction, and the execution load at the time of measuring the number of dynamic steps increases. Therefore, this method is not suitable for measurement in an actual operation environment.

  In view of the above circumstances, an object of the present invention is to accurately measure the number of dynamic steps at the machine instruction level of a program while suppressing the execution load of the program.

In order to achieve the above object, the computer system of the present invention provides:
As a means of compiling source code and generating an executable program,
It has a function to input source code and perform lexical analysis, syntax analysis, and semantic analysis.
From the analysis result of source code, it has a function to generate pseudo object code that is the internal representation of object code in the compiler,
Generates instructions that add the number of instructions included in the pseudo object code for each basic block to the counter for measuring the number of dynamic steps after performing optimization processing to improve the execution efficiency of the program by analyzing the pseudo object code And the function to embed the generated instruction in the pseudo object code of the basic block,
A function of generating an executable program from the pseudo object code is provided.

In addition, using the compiler, by measuring the number of dynamic steps of the program by executing the executable program generated by compiling the source code,
The measured number of dynamic steps is output to the auxiliary storage device as dynamic step information by, for example, a dynamic step information output function provided in a runtime library used by the executable program.
The dynamic step information output to the auxiliary storage device is displayed on the output device by the dynamic step information display device.
Details will be described later.

  According to the present invention, the number of dynamic steps at the machine instruction level of a program can be accurately measured while suppressing the execution load of the program.

It is a figure which shows the hardware constitutions in this embodiment. It is a schematic diagram of the composition of the system showing the whole data flow in this embodiment. It is a system configuration figure showing the flow of data at the time of compilation in this embodiment. It is a system configuration figure showing the flow of data at the time of execution in this embodiment. It is a flowchart of a basic block extraction process. It is a flowchart of the embedding process of the instruction | indication which counts the number of dynamic steps. It is an estimation flow figure of the number of clocks required in order for a CPU to execute the command in a basic block. It is an example of the source code used as the input data of the compiler. It is an example of pseudo object code generated internally by a compiler. It is an example of a basic block management table generated internally by a compiler. It is an example of the pseudo object code after the count instruction of the number of dynamic steps is embedded. It is a table showing the number of clocks required for execution of each instruction. It is a figure showing the example of the command sequence in a certain basic block before scheduling. It is a figure showing the example of the command sequence in the basic block after scheduling. It is a figure showing the example of a display which output the dynamic step information of the function unit on the screen of the output device by the dynamic step display device. It is a figure showing the example of a display which output the dynamic step information of the basic block unit on the screen of the output device by the dynamic step display device. It is the figure showing the example of a display which output the dynamic step information linked | related with the source code on the screen of the output device by the dynamic step display device.

Hereinafter, embodiments of the present invention (hereinafter referred to as “embodiments”) will be described with reference to the drawings.
FIG. 1 is a diagram illustrating a hardware configuration according to the present embodiment.
The hardware configuration of this embodiment includes a computer system 101 mainly including a CPU (control unit) 102 and a main storage device (storage unit) 103, and data (source code 113, executable program 114, and dynamic step information 115). .) Is stored, and an output device (display unit) 116 that displays the execution result of the CPU 102 on a screen, for example.

  As shown in FIG. 1, the main storage device 103 includes a compiler 104, a dynamic step display unit 111, a pseudo object code 109 that is referred to and written while the compiler 104 performs compilation processing, and a basic block management table 110. The software is loaded. The CPU 102 reads the software described above or described later, and executes predetermined arithmetic processing on a storage area (not shown) provided in the computer system 102, thereby realizing a cooperative relationship between the software and hardware. The compiler 104 includes software (processing unit) such as a lexical / syntax / semantic analysis unit 105, a pseudo object generation unit 106, an instruction level optimization unit 107, and an object program generation unit 108.

  The auxiliary storage device 112 also includes source code 113 input to the compiler 104, an executable program 114 generated as a result of compilation by the compiler 104, and dynamic step information 115 output by executing the executable program 114. Is remembered.

FIG. 2 is a schematic diagram of a system configuration representing the overall data flow in the present embodiment.
First, the compiler 104 compiles the source code 113. By compiling, an executable generation program 114 is generated.

The executable program 114 generated by the compilation includes a user program processing unit 201 that executes processing described in the source code 113, and a dynamic step that measures the number of dynamic steps at the machine instruction level (the number of execution instructions at the machine instruction level). A measurement unit 202 is provided.
The executable program 114 is read into the main storage device 103, and resources necessary for execution are allocated from the OS, whereby the execution process 203, which is a program execution unit, is executed, and the program is executed.

  In the execution process 203, since the user program processing unit 201 and the dynamic step measurement unit 202 are in an execution state, in addition to the processing written in the source code 113, dynamic steps corresponding to conditions at the time of execution The number measurement process can be appropriately executed. The measured number of dynamic steps is output as dynamic step information 115 to the auxiliary storage device 112.

The dynamic step information 115 is displayed on the output device 116 by the dynamic step display unit 111 which is a program for screen display, for example. The dynamic step information 115 includes the measured number of dynamic steps, but additionally includes a value corresponding to the display mode of the output device 116. For example, referring to FIG. 2, the output device 116 displays the number of dynamic steps in units of basic blocks to be described later. In this case, the dynamic step information 115 is an identification value of a basic block (eg, BB0001). Is included. The display mode of such display will also be described later.
Hereinafter, the details of the data flow will be described separately for compilation and execution.

  FIG. 3 is a system configuration diagram showing the flow of data at the time of compilation in the present embodiment. The compiler 104 receives the source code 113 and outputs an executable program 114 by compiling. The inside of the compiler 104 is divided into several processing units, and each processing unit performs compilation processing step by step. The compiler 104 includes a lexical / syntax / semantic analysis unit 105, a pseudo object generation unit 106, an instruction level optimization unit 107, and an object program generation unit 108.

  The lexical / syntax / semantic analysis unit 105 cuts out a lexical phrase from the input source code 113 (lexical analysis), analyzes the grammatical validity (syntax analysis) of the extracted lexical set, and analyzes the semantic validity ( Semantic analysis).

  The pseudo object generation unit 106 generates a pseudo object code 109 that is an internal representation of the object code in the compiler 104 from the analysis result of the source code 113 by the lexical / syntax / semantic analysis unit 105.

  The instruction level optimizing unit 107 performs an optimization process for improving the execution efficiency of the program by analyzing the pseudo object code 109. The instruction level optimization unit 107 includes a basic block extraction unit 301, a flow analysis unit 302, an optimization processing unit 303, and a dynamic step count instruction embedding unit 304.

  The basic block extraction unit 301 extracts a basic block which is a minimum unit for optimization in the pseudo object code 109 and stores information on the basic block in the basic block management table 110.

  Based on the pseudo object code 109 and the basic block management table 110, the flow analysis unit 302 determines what route the program can take (control flow analysis), how the data propagates (data flow analysis), Analysis is performed.

  The optimization processing unit 303 uses constant propagation, register remapping, and unnecessary instructions to improve program execution efficiency based on information collected by the flow analysis unit 302, that is, analysis results of control flow analysis and data flow analysis. Perform optimization such as deletion.

  The dynamic step count instruction embedding unit 304 generates and generates an instruction for counting the number of dynamic steps based on the information analyzed in the optimization process (instruction sequence of instructions included in the pseudo object code after optimization). The count instruction embedding process for embedding the executed instruction in a predetermined portion of the pseudo object code 109 is performed.

  The object program generation unit 108 generates an executable program 114 from the pseudo object code 109 that has been subjected to the optimization process and the count instruction embedding process of the number of dynamic steps.

  The executable program 114 includes a user program processing unit 306 (corresponding to the user program processing unit 201 (see FIG. 2) when the basic block is determined) and a dynamic step measurement unit 307 (when the basic block is determined). A dynamic step measurement unit 202 (corresponding to FIG. 2) is present in each of the basic block groups 305.

  The compiler 104 is not limited to the above-described configuration. For example, the dynamic step count instruction embedding unit 304 may be an independent processing unit instead of the instruction level optimization unit 107. good.

  3, the pseudo object code 109, the basic block extraction unit 301, the basic block management table 110, and the dynamic step count instruction embedding unit 304 will be described in detail.

  As described above, the source code 113 input to the compiler 104 is analyzed by the lexical / syntax / semantic analysis unit 105 and expressed as the pseudo object code 109 generated by the pseudo object generation unit 106. For example, FIG. 9 shows an example of pseudo object code generated when the source code 801 in FIG. 8 is input and compiled.

Each instruction of the pseudo object code includes an instruction 902 in which a value indicating the content of the instruction is stored and an instruction ID 901 in which a value for identifying each instruction is stored. It is connected by linking. At the pseudo object code stage, labels indicating branch destinations (eg, THEN label, ELSE label) are also expressed as one instruction for convenience.
Note that FIG. 9 is merely an illustrative example, and the content and expression method of the pseudo object code are not limited to the form of FIG. For example, the pseudo object code may be configured to include a field for storing a value indicating a link connecting the instructions (for example, the contents of the instruction at the link destination and the contents of the instruction at the link source).

  The processing of the dynamic step count instruction embedding unit 304 is performed in units of basic blocks. A basic block is a sequential instruction sequence (including a case where there is only one instruction) that does not include branching or merging. In object code, when the first line of a certain basic block is executed, the basic block is executed. A processing unit in which all instructions in a block are executed. In the case of a control flow graph (CFG), it corresponds to a node or a vertex. In general, in the optimization performed by analyzing the control flow of a program, processing is performed in units of basic blocks. The basic block is extracted from the pseudo object code 109 by the basic block extraction unit 301.

FIG. 5 is a flowchart showing basic block extraction processing by the basic block extraction unit 301. The extracted result is stored in the main storage device 103 as the basic block management table 110 shown in FIG. Here, the extraction of the basic block is a process of extracting (extracting) all the basic blocks from the pseudo object code 109, and can be said to be a process of dividing the pseudo object code 109 into basic blocks.
Hereinafter, a basic block extraction method according to the present embodiment will be described with reference to FIG.

First, the first instruction is extracted from the pseudo object code 109 (step 501).
Next, an entry of the basic block management table 110 that manages basic block information is created, and the instruction ID of the extracted instruction is entered at the start position of the entry (step 502). Specifically, the value stored in the instruction ID 901 of the extracted instruction is stored in the start position field 1002 included in the entry.

  Next, it is determined whether or not the fetched instruction is other than a label (step 503). If it is not a label (Yes in step 503), the fetched instruction is truly some instruction, so that instruction is counted. Therefore, 1 is added to the value (instruction number) in the instruction number field 1003 included in the entry of the basic block management table 110 (step 504). On the other hand, if it is a label (No in step 503), the value in the instruction number field 1003 is not added and step 504 is skipped.

  Next, it is determined whether or not there is a next instruction in the pseudo object code 109 (step 505). If there is a next instruction (Yes in step 505), the instruction is taken out (step 506). In step 505, No) the extraction flow process is terminated.

  If the next instruction exists (Yes in step 505), it is determined whether the next instruction is the start of a new basic block (step 507). If the fetched instruction is a label, there is a possibility of joining from any of the branch instructions, so that a new basic block starts from this label. If the previous instruction is a branch instruction (conditional branch instruction or unconditional branch instruction), there is a possibility of branching from the previous instruction to another instruction. It ends with the previous instruction and can be determined as the start of a new basic block.

  If the determination in step 507 is true (Yes in step 507), the instruction taken out in step 506 and subsequent instructions become new basic blocks, so the process returns to step 502 to create a new basic block management table 110 entry. The above process is repeated in the same manner. If the determination in step 507 is false (No in step 507), the basic block continues, so the process returns to step 504 and the subsequent processing is repeated.

  The basic block information extracted by the above flow includes a block ID field 1001 of the basic block management table shown in FIG. 10, a start position field 1002 in which a value indicating the start position of the basic block among the values of the instruction ID 901 is stored, The number of instructions included in the basic block is stored in an instruction number field 1003. The value stored in the block ID 1001 is a value for identifying each basic block, and is uniquely assigned every time a new entry in the basic block management table 110 is created. The estimated clock number field 1004 will be described in another embodiment to be described later.

  Returning to FIG. 3, the dynamic step count instruction embedding unit 304 generates an instruction for counting the number of dynamic steps from the pseudo object code 109 and the basic block management table 110, and embeds the generated instruction in the pseudo object code 109. Execute.

FIG. 6 is a flowchart of an instruction embedding process for counting the number of dynamic steps by the dynamic step count instruction embedding unit 304.
First, an entry storing information on the first basic block is extracted from the basic block management table 110 (step 601).

  Next, information (start position, number of instructions) in the start position field 1002 and instruction number field 1003 is acquired from the extracted entry of the basic management table 110 (step 602), and the number of instructions in the basic block is obtained from the acquired information. An instruction to be added to the dynamic step counter is generated (step 603).

  The instruction generated in step 603 determines whether the instruction at the start position of the basic block is a label (step 604) and is embedded in the basic block as shown below. That is, if the start position of the basic block is a label (Yes in step 604), there is a possibility that another branch instruction may join the label, so the generated instruction is embedded at the next position of the label. (Step 605). If the start position of the basic block is not a label (No in step 604), the generated instruction is embedded before the instruction of the basic block start position so as to be the head of the process (step 606). After step 605 and step 606, the process proceeds to step 607.

Thereafter, it is determined whether or not there is a next entry in the basic block management table (step 607). If not (No in step 607), the instruction embedding process for counting the number of dynamic steps is terminated. If there is (Yes in Step 607), the next entry in the basic block management table is extracted (Step 608), the process returns to Step 602, and the subsequent processes are repeated in the same manner.
With the above flow, the count instruction embedding process for the number of dynamic steps can be performed in units of basic blocks.

  FIG. 11 is a diagram illustrating an example of the pseudo object code after the count instruction of the number of dynamic steps is embedded from the pseudo object code of FIG. 9 and the basic block management table of FIG. The instruction ID 1101 and the instruction 1102 are equivalent to the instruction ID 901 and the instruction 902 in FIG. 9, respectively.

A process of counting the number of instructions of the first basic block is embedded as an add instruction (addition instruction) 1104 behind the FUNC label 1103 arranged at the start position of the first basic block (step 605 in FIG. 6). See processing).
Further, an add instruction 1105 for counting the number of instructions in the next basic block is embedded in front of the unconditional branch instruction 1106 which is the start of the next basic block (see the process in step 606 in FIG. 6). .
Similarly, add instructions 1107, 1108, and 1109 are embedded as processing for counting the number of instructions in each basic block in accordance with the determination in step 604 of FIG. In this way, pseudo object code is generated such that one add instruction is embedded in one basic block.

  The detailed description of the pseudo object code 109, the basic block extraction unit 301, the basic block management table 110, and the dynamic step count instruction embedding unit 304 is finished.

Based on the above, the flow of FIG. 3 will be described again.
In this embodiment, in the process in which the compiler 104 compiles the source code 113, the lexical / syntax / semantic analysis unit 105 and the pseudo object generation unit 106 first generate the pseudo object code 109 that is an internal representation of the object code. Based on the pseudo object code 109, the instruction level optimization unit 107 performs an optimization process for increasing the execution efficiency of the program.

In the optimization process, analysis is performed with a basic block that does not include branching and merging as a processing unit. A basic block is extracted from the pseudo object code 109 by the basic block extraction unit 301, and information on the extracted basic block is stored in the basic block management table 110.
Further, after the flow analysis unit 302 analyzes the control flow and the data flow based on the pseudo object code 109 and the basic block management table 110, the optimization processing unit 303 performs optimization processing for improving execution efficiency. Is given.

  After the optimization process, the dynamic step count instruction embedding unit 304 performs a count instruction embedding process for the number of dynamic steps. The dynamic step count instruction embedding unit 304 embeds a count instruction in units of basic blocks using the pseudo object code 109 extracted and analyzed at the time of optimization and information in the basic block management table 110. For each basic block in the pseudo object code 109, an instruction for adding the number of instructions included in the counter to the counter is generated and embedded in the basic block.

  Through the above processing, the executable program 114 generated by the object program generation unit 108 includes a user program processing unit 306 that executes the processing described in the source code 113, and a dynamic that counts the number of instructions in the basic block. A step measurement unit 307 is provided in each of the basic block groups 305.

In the present embodiment, information on basic blocks in a program, for example, instructions for measuring the number of instructions as described above are generated in the process of compilation, and the generated instructions are embedded in the basic blocks, so that It is possible to generate an executable program having a function of measuring basic block information corresponding to various conditions.
Further, since the basic block information to be measured is machine instruction level information, the performance value in the machine environment in which the program is actually operated can be obtained accurately.
In addition, since the addition instruction is embedded in units of basic blocks, measurement can be performed without being affected by optimization processing at the time of compilation.
In the above, the feature at the time of compilation in this embodiment was explained. Next, features at the time of execution will be described with reference to FIG.

FIG. 4 is a system configuration diagram illustrating a data flow at the time of execution in the present embodiment.
The executable program 114 generated by compiling the source code 113 is read into the main storage device 103, and is put into an execution state as an execution process 203 when necessary resources are allocated from the OS.

  In the execution process 203, the processing of the basic block group 401 (corresponding to the basic block group 305 when determined as the execution process 203) and the dynamic step information output unit 402 are read. The dynamic step information output unit 402 is provided by, for example, a runtime library (runtime library) used by a program at the time of execution.

  Information measured by the dynamic step measurement unit 307 in the basic block group 401 is output as dynamic step information 115 by the dynamic step information output unit 402 to the auxiliary storage device 112 (see FIG. 1). The dynamic step information 115 is displayed on the output device 116 by the dynamic step display unit 111.

The path through which processing is executed during program execution differs depending on user requests, linked programs, environmental conditions, and the like, and cannot be understood until it is executed. For this reason, it is impossible to know which basic block in the program is executed at the time of execution.
In this embodiment, since the function of measuring the number of dynamic steps in units of basic blocks as described above is provided, the number of dynamic steps can be set without omission regardless of the conditions under which control by branching or repetition is performed. Can be counted.

Information measured in units of basic blocks can be used for program performance analysis by calculating the total number of dynamic steps in the entire pseudo object code 109 or by summing up in units of functions or procedures in a high-level language. it can.
In addition, since the number of dynamic steps is collectively measured for each basic block, it is possible to measure without greatly increasing the execution load.

  An example of dynamic step information displayed on the output device 116 will be described with reference to FIGS. 15, 16, and 17. FIG. 15 is a diagram illustrating a display example in which dynamic step information in units of functions is output to the screen of the output device by the dynamic step display device. FIG. 16 is a diagram showing a display example in which dynamic step information in units of basic blocks is output to the screen of the output device by the dynamic step display device. FIG. 17 is a diagram illustrating a display example in which the dynamic step information associated with the source code is output to the screen of the output device by the dynamic step display device.

  Referring to FIG. 15, items [function name] and [number of steps] are provided, and the number of dynamic steps for each function used in the source code is displayed. Further, as the dynamic step information to be displayed, the number of dynamic steps in the entire source code, that is, the total number of dynamic steps corresponding to the function is also displayed. When displaying in such a display mode, the dynamic step information 115 includes the function name of the function used in the source code and the number of dynamic steps when the function is executed. In this way, it is possible to display in units of functions, and it is also possible to display in units of procedures.

  Referring to FIG. 16, items [block ID], [function name], [line information], and [number of steps] are provided, and the number of dynamic steps for each basic block set for the pseudo object code is displayed. . In the [Function Name] field, a function including each basic block is displayed. In the [Line Information] field, the line number of the source code indicating the start position of the basic block is displayed. When displaying in such a display mode, the dynamic step information 115 includes the identification value of the basic block, the function name of the function used in the source code, the line information of the source code, and the function in the basic block. Includes the number of dynamic steps.

  Referring to FIG. 17, the source code with line numbers and the number of dynamic steps in which the basic block range is associated with the source code are displayed. When displaying in such a display mode, the dynamic step information 115 includes source code line information, source code itself, and the number of dynamic steps when a function or procedure in each line of the source code is executed. . Note that the number of dynamic steps is not displayed for lines that do not contain functions or procedures. If the number of dynamic steps is displayed for each line of the source code as shown in FIG. 17, it is possible to easily grasp which instruction has been executed.

<< Summary of this embodiment >>
According to the present embodiment, the executable program generated by the compiler has a function of measuring the number of dynamic steps in units of basic blocks and a function of outputting the measured number of dynamic steps. Therefore, by executing this program, It becomes possible to accurately measure the number of dynamic steps at the machine instruction level according to the conditions at the time of execution.
In addition, the instruction embedding process that counts the number of dynamic steps targets the basic block, which is the smallest unit in optimization, so that the performance value is correct without being affected by the change of instruction order by the optimization process. It becomes possible to measure.
In addition, since the dynamic step count measurement processing is performed in units of basic blocks, the execution load does not become extremely large as in the prior art in which addition processing is performed for each machine instruction, and measurement can be performed efficiently. It becomes.

  As mentioned above, although the example of the suitable embodiment of the present invention was explained, the embodiment of the present invention is not restricted to the above-mentioned explanation. Hereinafter, another embodiment will be described.

<< Another Embodiment >>
The flow in FIG. 6 shows a method of embedding processing for counting the number of instructions in the basic block. However, the instruction embedded in the basic block is not limited to this, and the estimated number of clocks of the basic block (the number of execution clocks at the machine instruction level) It is possible to embed an instruction for counting (addition instruction). Here, the estimated number of clocks of the basic block is a value obtained by estimating how many clocks the CPU can process the basic block. Since this value is estimated in the process of optimizing instruction scheduling, that value is used. Hereinafter, processing for estimating the number of clocks necessary for processing a certain basic block will be described.

FIG. 7 is an estimation flowchart of the number of clocks required for the CPU to execute the instructions in the basic block.
First, the first instruction in the basic block is extracted from the entry in the basic block management table 110 (step 701).

Next, the dependency relationship between the used register of the fetched instruction (used register) and the used register between the preceding and subsequent instructions is checked (step 702). The register dependency includes at least the meaning of a relationship in which two or more instructions using the same register exist, and these instructions wait for execution of another instruction until a certain instruction is executed.
Next, instructions are scheduled so as to reduce the waiting time from the dependency of the registers (step 703). Details of the scheduling will be described later with reference to FIGS. 12, 13, and 14.

After step 703, it is determined whether there is a next instruction (step 704). If there is (Yes in step 704), the next instruction is taken out (step 705), and the process returns to step 702 to perform the subsequent processing. Repeat in the same way. If there is no next instruction (No in step 704), all instructions in the basic block have been scheduled, and the estimated number of clocks for each basic block is obtained from the scheduling result by scheduling (step 706). Note that the obtained estimated number of clocks may be one after optimization or one before optimization.
This is the end of the description of the flow for estimating the number of clocks.

An example of estimating the number of clocks according to the flow will be described with reference to FIG. 12, FIG. 13, and FIG.
FIG. 13 is a diagram illustrating an example of an instruction sequence included in a certain basic block before scheduling. In this figure, the type of instruction and the identification value of a register (indicated by “r2” or the like) used when executing the instruction are stored for each instruction. In the process of estimating the number of clocks (see FIG. 7), the register dependency is examined from this instruction sequence and scheduling is performed.

  In the case of the instruction sequence of FIG. 13, for example, there is a dependency relationship between the first LD instruction 1303 and the next MOV instruction 1304 in the use of the register r2. Therefore, in order to start the execution of the MOV instruction 1304, it is necessary to wait until the execution of the first LD instruction 1303 is completed.

The waiting time due to the dependence on register use is obtained by referring to the table of the number of clocks necessary for executing each instruction shown in FIG. The values in the table show an example of the number of clocks 1202 necessary for the CPU to execute each instruction 1201. When there is a dependency relationship between registers used in a series of instruction sequences, as described above, there is a waiting time for processing until the registers can be used. The waiting time varies depending on the dependent instruction, and is indicated by the clock number 1202 of each instruction indicated by the value in the table of FIG.
In the case of the LD instruction 1303 in FIG. 13, two clocks are required until the execution is completed. Therefore, scheduling is performed in consideration of a waiting time of two clocks between the first LD instruction 1303 and the next MOV instruction 1304.

FIG. 14 ((a) before optimization, (b) after optimization) shows an example in which the instruction sequence of FIG. 13 is scheduled by the above-described procedure, that is, an example of the instruction sequence in the basic block after scheduling. Note that the tables shown in FIGS. 12, 13, and 14 are stored in the main storage device 103, for example.
As described above, there is a waiting time of 2 clocks between the first LD instruction 1404 (corresponding to reference numeral 1303 in FIG. 13) and the next MOV instruction 1405 (corresponding to reference numeral 1304 in FIG. 13). Similarly, a waiting time of one clock is generated between the ADD instruction 1406 (corresponding to reference numeral 1306 in FIG. 13) and the MOV instruction 1407 (corresponding to reference numeral 1303 in FIG. 13) due to the dependency of registers.

In order to reduce this waiting time, optimization is performed by changing the order of instructions in scheduling. For example, in the scheduling example of FIG. 14, there is no register dependency between the MOV instruction 1407 and the ST instruction 1408 (corresponding to reference numeral 1307 in FIG. 13). The order can be changed so that
Since the ST instruction 1408 has no register dependency with the ADD instruction 1406, the ST instruction 1408 can be executed during the waiting clock between the ADD instruction 1406 and the MOV instruction 1407. Later, as shown in (b) Example 1409 after optimization, the estimated number of clocks decreases by one clock.

  Since scheduling is performed in this manner, an estimated value of 7 clocks can be obtained as the number of clocks until the last instruction in the basic block starts execution. Therefore, by generating an instruction for counting the estimated number of clocks of the estimated basic block and embedding the generated instruction in the basic block, the estimated number of clocks at the time of execution can be measured. Note that the processing related to embedding an instruction for counting the estimated number of clocks is based on the processing shown in FIG. 6, for example. In the basic block management table (see FIG. 10), this estimated clock number is stored in the estimated clock number field 1004 for each basic block. The measured number of clocks can be displayed in accordance with the display mode shown in FIGS. 15, 16, and 17, for example.

The processing for estimating the number of clocks in this embodiment is not limited to the above-described embodiment. For example, estimation can be performed separately from instruction scheduling.
In the present embodiment, it is possible to embed an instruction for counting an optimization effect as an instruction to be embedded in a basic block.

  In the example of FIG. 14, it can be seen that the estimated number of clocks is reduced by one clock before and after optimization. Therefore, it generates an instruction (clock number difference addition instruction) that adds the difference of the estimated clock number before and after optimization including the instruction scheduling (execution clock number of machine instruction level) to the counter, and put the generated instruction in the basic block Embed. Thereby, it is possible to measure the effect of improving the execution efficiency by the optimization. Note that the processing related to the embedding of the instruction for counting the difference in the estimated number of clocks is based on the processing shown in FIG. 6, for example.

  Further, the process for obtaining the difference in the estimated number of clocks is based on the process shown in FIG. 7, for example. In this case, in Step 706, the difference is obtained by comparing the scheduling results (see FIGS. 14A and 14B) showing before and after optimization. Also, in the basic block management table (see FIG. 10), the difference in the estimated clock number is stored in a predetermined field for each basic block (for example, as a substitute for the estimated clock number field 1004). The measured difference in the number of clocks can be displayed in accordance with the display modes shown in FIGS. 15, 16, and 17, for example.

  In this embodiment, as shown in FIGS. 2 and 4, as a method for displaying the number of dynamic steps, the dynamic step information 115 is output to the auxiliary storage device 112, and the output device 116 is output by the dynamic step display unit 111. However, the display form is not limited to this. For example, by providing the function of the dynamic step display unit 111 in the executable program 114 or the runtime library, the dynamic step information 115 can be directly displayed on the output device 116 without being output to the auxiliary storage device 112. It is. In consideration of the convenience of program development, it is preferable to change the design so that one of these display forms is adopted.

≪Others≫
For example, when an execution process of a basic block in which an add instruction is embedded is executed, the add instruction itself may not be counted, and the number of instructions in the basic block may not be counted. When it is designed to count, it is preferable to subtract the number of embedded add instructions from the number of dynamic steps.

In the entry constituting the basic block management table (see FIG. 10), instead of using the instruction ID of the instruction at the start position of the basic block using the start position field 1002, the instruction ID of the instruction at the end position of the basic block is used. It may be used. Alternatively, the command IDs at both the start position and the end position may be used.
Instructions at the start position of the basic block include, for example, procedure and function entry points, jump and branch targets, code after a conditional branch instruction, code after an instruction that causes an exception, There are exception handlers, and these instruction IDs may be used.
The instruction at the end position of the basic block includes, for example, an unconditional or conditional branch instruction (including a direct branch and an indirect branch), a return to the calling procedure, an instruction that can cause exception processing, and a function that does not return ( Example: exit function), and these instruction IDs may be used. However, since the control flow does not basically pass through the end of the basic block, the boundary of the basic block may have to be corrected after finding the basic block. Therefore, it is preferable to change the design of the pseudo object code or the like.

Of course, it is possible to realize an invention in which some or all of the technical matters described in the above embodiments are combined.
In addition, specific configurations of hardware, software, flowcharts, tables, and the like can be appropriately changed without departing from the spirit of the present invention.

101 computer system 102 CPU (control unit)
103 Main storage device (storage unit)
104 Compiler 105 Lexical / Syntax / Semantic Analysis Unit 106 Pseudo Object Co Generation Unit 107 Instruction Level Optimization Unit 108 Object Program Generation Unit 109 Pseudo Object Code 110 Basic Block Management Table 111 Dynamic Step Display Unit 112 Auxiliary Storage Device (Storage Unit)
113 Source code 114 Executable program 115 Dynamic step information 116 Output device (display unit)
201 User Program Processing Unit 202 Dynamic Step Measurement Unit 203 Execution Process 301 Basic Block Extraction Unit 302 Flow Analysis Unit 303 Optimization Processing Unit 304 Dynamic Step Count Instruction Embedding Unit 402 Dynamic Step Information Output Unit

Claims (6)

In a method for measuring the number of execution instructions in a computer system that measures the number of execution instructions at the machine instruction level when executing a program generated by compiling source code,
The storage unit of the computer system stores the source code and a compiler that performs the compilation,
The control unit of the computer system is
Compiling the source code with the compiler to generate pseudo object code that is an internal representation of the object code;
Dividing the pseudo object code into basic blocks that are sequential instruction sequences that refer to instructions included in the pseudo object code and do not include branching or merging;
Embedding in the basic block an addition instruction for adding to the counter the number of instructions when the instruction included in the basic block is executed when executing the program;
Displaying the number of instructions to be executed on a display unit based on the number of instructions in the basic block when the program is executed and the addition instruction is executed. Method. The controller is
The number of dynamic steps as the number of execution instructions is indicated by either (1) a function or procedure unit used in the source code, (2) the basic block unit or (3) a line unit of the source code. The method according to claim 1, wherein the number of executed instructions is displayed. In a method for measuring the number of execution clocks in a computer system that measures the number of execution clocks at the machine instruction level when executing a program generated by compiling source code,
The storage unit of the computer system stores the source code and a compiler that performs the compilation,
The control unit of the computer system is
Compiling the source code with the compiler to generate pseudo object code that is an internal representation of the object code;
Dividing the pseudo object code into basic blocks that are sequential instruction sequences that refer to instructions included in the pseudo object code and do not include branching or merging;
Estimating the number of clocks required to execute an instruction included in the basic block when executing a program based on the dependency of a register;
Embedding in the basic block an addition instruction for adding the estimated number of estimated clocks to a counter;
Displaying the execution clock number on a display unit based on the estimated clock number of the basic block by executing the program and executing the addition instruction;
The execution clock number measuring method characterized by performing this. The controller is
Embedding in the basic block a clock number difference addition instruction for adding the difference between the estimated clock number before optimization by the compiler and the estimated clock number after the optimization to the counter When,
The step of displaying the number of execution clocks on the display unit based on the difference of the basic block by executing a program and executing the clock number difference addition instruction is executed. Item 4. The method of measuring the number of execution clocks according to Item 3. In a computer system that measures the number of execution instructions at the machine instruction level when executing a program generated by compiling source code,
A storage unit that stores the source code and a compiler that performs the compilation;
Control to compile the source code by the compiler to generate pseudo object code that is an internal representation of the object code;
Control for referring to the instructions included in the pseudo object code and dividing the pseudo object code into basic blocks that are sequential instruction sequences including neither branch nor merge;
A control for embedding in the basic block an addition instruction for adding to the counter the number of instructions when the instruction included in the basic block is executed when executing the program;
And a control unit that executes a control to display the number of execution instructions on a display unit based on the number of instructions in the basic block when the addition instruction is executed by executing a program. Computer system. In a computer system that measures the number of execution clocks at the machine instruction level when executing a program generated by compiling source code,
A storage unit that stores the source code and a compiler that performs the compilation;
The control unit of the computer system is
Control to compile the source code by the compiler to generate pseudo object code that is an internal representation of the object code;
Control to divide the pseudo object code into basic blocks that are sequential instruction sequences that do not include branching or merging with reference to instructions included in the pseudo object code;
Control for estimating the number of clocks required to execute the instructions included in the basic block based on the dependency of the register when executing the program;
A control for embedding an addition instruction for adding the estimated number of clocks to the counter in the basic block;
A control unit for executing a program and executing a control to display the execution clock number on a display unit based on the estimated clock number of the basic block when the addition instruction is executed. Computer system to do.

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