JP2011090642A - Controller, control system and starting method for the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a controller, control system and starting method for the same, allowing consecutive resumption of execution of a program during execution before a power failure immediately after power restoration when power restoration is performed in a period wherein data of a volatile memory are guaranteed. <P>SOLUTION: The starting method includes the steps of: starting memory transfer processing of storing the data of the volatile memory 2 immediately before the power failure into a nonvolatile memory 1 during the "power failure" of supply power; setting the period wherein power supply from a battery is guaranteed after the "power failure" as a masking period wherein a reset of the control system is stopped, stopping the memory transfer processing when it is in the middle of the memory transfer processing when the supply power is subjected to the "power restoration" within the masking period, and consecutively resuming processing from the program immediately after the "power failure"; and storing storage contents of the nonvolatile memory into the volatile memory when the "power restoration" occurs after the masking period, and executing initialization processing of the controller. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a control device such as a programmable controller that controls an object to be controlled such as a petrochemical plant, and a control system using the control device, and more particularly, to a method for starting a system associated with a power failure / recovery of a power supply.

  Conventionally, programmable controllers have been widely used in control systems for controlling plants. In general, in order to increase the execution speed of the programmable controller, a working memory for storing an application program and its processing data is not a nonvolatile memory but a volatile memory having a fast write / read time.

  Since this volatile memory cannot be stored for a long time if a power failure occurs, the program and data in the volatile memory are restored to the state before the power failure when the power supply is restored (referred to as power recovery here). After that, the system is restarted.

  At this time, the data in the volatile memory immediately before the occurrence of the power failure is temporarily stored in the nonvolatile memory. Generally, since a program does not always change, it is stored over time when a change is requested. However, since data (also referred to as a variable) of a running program is constantly updated, a fixed control cycle is required. Or, when a power failure occurs, the data is stored in the nonvolatile memory from the volatile memory.

  In the former case, if data for each cycle of the application program controlled at a constant control cycle is stored, it takes time for this storage processing, and the control cycle is delayed accordingly.

  In particular, since the amount of data is large, and the write / read response (access) to the nonvolatile memory is slow, there is a problem that the processing time for this delays the control cycle.

  In the latter case, since data for each control cycle is stored at the same time when a power failure occurs, the processing time for storage does not affect the control cycle.

  However, in any case, when a power failure occurs, the volatile memory data is stored in the nonvolatile memory and then the CPU is stopped. When the power is turned on after the power recovery, the CPU stores the nonvolatile memory stored in advance. Since the initialization process for copying the program and data in the memory to the volatile memory and restarting the execution of the program is performed, there is a problem that this initialization process takes a long time.

  By the way, a control processing device is disclosed in which data storage at the time of a power failure and data reading at the time of restarting are executed at high speed (for example, refer to Patent Document 1).

  According to this method, the first and second storage elements in the array variable area in which data is stored in parallel and the stored data is read out in parallel, and the first storage element is subjected to a power failure. The uninterruptible power supply that supplies power so that the operation of the second memory element continues, and the data stored and held in the second memory element are initialized when the first memory element starts the memory operation. And an initialization control means.

Japanese Patent Laid-Open No. 4-29302 (FIG. 1, page 1)

  According to the method disclosed in Patent Document 1, since the data is transferred between the first and second volatile memories, the data at the time of power failure is stored and the initial value at the time of restart is stored. Processing is performed at high speed.

  However, even when power is restored in a short time after a power failure, the system is restarted and the execution of the program is started. Therefore, there is a problem that the running system must be stopped.

  In other words, the program being executed has a problem that the control is interrupted because the system is temporarily stopped and restarted even though it has a battery capable of storing volatile memory data in the event of a power failure. is there.

  The present invention has been made to solve the above-described problems. When the power failure from power failure to power recovery is short, that is, within the period when the volatile memory data is guaranteed within the battery warranty time. It is an object of the present invention to provide a control device, a control system, and a startup method thereof that can resume the execution of a program that is being executed before a power failure immediately after a power failure when power is restored.

  In order to achieve the above object, a control system according to the present invention is a control system having a function of detecting a power failure and storing data to be stored in a volatile memory in a nonvolatile memory, wherein the control device executes A volatile memory that stores the program and data therein, a CPU that executes processing based on the program stored in the volatile memory, and the program that is the same as the volatile memory. A nonvolatile memory that updates programs and data; an interrupt controller that generates an interrupt signal for the CPU; an input / output interface unit that exchanges input / output data; and a battery that supplies power to each unit of the control device, A power supply unit that detects that the power supply is “power failure” and switches to the battery; A power supply monitoring circuit that monitors and controls the state of the power supply supplied to the power supply circuit, the power supply monitoring circuit is a “power failure” state in which the power reception state of the power supply unit is equal to or lower than a preset voltage, or in advance A power failure / recovery detection circuit that detects a "power recovery" state that has recovered beyond a set voltage, and a masking signal that masks a reset signal that resets the control device for a predetermined period after the "power failure" state is generated. A `` power recovery '' interrupt signal when the occurrence of the `` power recovery '' state occurs within the masking period, and a power recovery determination circuit that generates a power recovery reset signal otherwise, the interrupt controller, Receiving a power failure signal and a power recovery signal from the power monitoring circuit and notifying the CPU of a power failure interrupt signal and a power recovery interrupt signal, and the masking period is a power failure The battery has a capacity longer than the maximum time for transferring the data in the volatile memory to the nonvolatile memory, and the battery has a capacity capable of guaranteeing the power supply during the masking period, and the CPU sends a power failure interrupt signal from the interrupt controller. When notified, the memory transfer process for storing the data in the volatile memory immediately before the power failure is stored in the nonvolatile memory. When the CPU is notified of the power recovery interrupt signal, the memory transfer process is in progress. The memory transfer process is stopped and the process is resumed from the program immediately after receiving the power failure interrupt signal, and when the CPU is notified of the power reset signal, the stored contents of the nonvolatile memory are stored. Store in the volatile memory, execute the initialization process of the control device, Processing is resumed from the program immediately after receiving the power failure interrupt signal.

  In order to achieve the above object, a control device according to the present invention is a control device having a function of detecting a power failure and storing data to be stored in a volatile memory in a non-volatile memory. A volatile memory that stores the program and data therein, a CPU that executes processing based on the program stored in the volatile memory, and the program that is the same as the volatile memory. A nonvolatile memory that updates programs and data; an interrupt controller that generates an interrupt signal for the CPU; an input / output interface unit that exchanges input / output data; and a battery that supplies power to each unit of the control device, Detects that the power supply is “power failure” and supplies power to the power supply unit that switches to the battery. A power supply monitoring circuit that monitors and controls the state of the supplied power, and the power supply monitoring circuit is in a “power failure” state in which the power receiving state of the power supply unit is equal to or lower than a preset voltage, or a preset voltage A power failure / recovery detection circuit for detecting the “recovery” state recovered as described above, and a masking signal for masking a reset signal for resetting the control device for a predetermined period after the “power failure” state, A power recovery monitoring circuit that generates a power recovery interrupt signal when a power recovery occurs within the masking period; otherwise, a power recovery determination circuit that generates a power recovery reset signal. The power failure signal and the power recovery signal are received from the circuit, the power failure interrupt signal and the power recovery interrupt signal are notified to the CPU, and the masking period is Longer than the maximum time for transferring the data in the nonvolatile memory to the nonvolatile memory, and the battery has a capacity that can guarantee the power supply during the masking period, and the CPU is notified of a power failure interrupt signal from the interrupt controller. When the CPU is notified of the power recovery interrupt signal, the CPU starts the memory transfer process of storing the data of the volatile memory immediately before the power failure in the nonvolatile memory. The memory transfer process is stopped, and the process is resumed from the program immediately after receiving the power failure interrupt signal. When the CPU is notified of the power reset signal, the stored contents of the nonvolatile memory are volatile. Stored in the volatile memory, the initialization process of the control device is executed, and the “power failure” for the “power recovery” during the masking period. Processing is resumed from the program immediately after receiving the insertion signal.

  In order to achieve the above object, a method for starting a control system according to the present invention is a method for starting a control system having a function of detecting a power failure and storing data stored in a volatile memory in a nonvolatile memory, The control device includes a battery having a capacity that can be supplied for longer than a maximum time for transferring data of the volatile memory to the nonvolatile memory when the power supply is stopped, and the power supply is “power failure”. A step of starting a memory transfer process for storing the data of the volatile memory immediately before the power failure in the non-volatile memory at a power failure of the supply power source, comprising a power supply unit that detects the occurrence of the failure and switching to the battery And after the “power failure”, the period during which power supply from the battery is guaranteed is defined as a masking period during which the reset of the control system is stopped, If the power supply is “recovered” within the king period, and if the memory transfer process is being executed, the memory transfer process is stopped, and the process continues from the program immediately after the “power failure”. , When the occurrence of the “recovery” occurs after the masking period, the storage content of the nonvolatile memory is stored in the volatile memory, and the initialization process of the control device is executed, In response to “power recovery” during the masking period, the processing is resumed from the program immediately after receiving the power interruption interrupt signal.

  According to the present invention, when power is restored during a period when the data of the volatile memory is guaranteed within the guaranteed time of the battery, the execution of the program being executed before the power failure can be resumed immediately after the power is restored. The control device, the control system, and the starting method thereof can be provided.

The block diagram of the control system of this invention. The time chart explaining the structure of the control apparatus of this invention, and its operation | movement.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a configuration diagram of a control system of the present invention. This control system normally stores data stored in the volatile memory in the interruption of power failure in the nonvolatile memory, stops the operation of the CPU itself, and stores the program and data stored in advance in the nonvolatile memory when power is restored. Is controlled in the volatile memory, and the controlled object 20 is controlled using the control device 10 that resumes the execution of the program.

  In FIG. 1, the control device 10 includes a volatile memory 2 that stores a program and data being executed, a CPU 3 that executes processing based on a program stored in the volatile memory 2, and the same volatile memory 2 A nonvolatile memory 1 that stores a program and updates the program and data according to a command from the CPU 3, an interrupt controller 6 that generates an interrupt signal for the CPU 3, an input / output interface unit 7 that transmits and receives input / output data, and a control device 10 It includes a power monitoring circuit 5 that monitors and controls the state of the power supply supplied from the outside, and a battery 4b that supplies power to each unit. And a power supply unit 4 for switching.

  Further, the nonvolatile memory 1, the volatile memory 2, the interrupt controller 6, and the input / output interface unit 7 in the control device 10 are each connected to the CPU bus 9, and each unit in the control device 10 is connected to the power supply bus 8. The power supply unit 4 distributes power.

  The control system is connected to the control device 10 via an interface (not shown in FIG. 1) and monitors the control state of the control target 20, and the control target via the input / output interface unit 7. Also included are sensors that detect the state of the process being 20, and control actuators.

  Further, the input / output interface unit 7 may have a communication function connected to a network or the like.

  The control system includes a configuration controlled by a plurality of control devices 10 depending on the scale.

  Furthermore, the power supply unit 4 includes a power supply circuit 4a that supplies power to each unit in the control device 10, a battery 4b that supplies power for a predetermined period when the power supply to the power supply circuit 4a is stopped, And a switch 4c for switching from the power supply circuit 4a to the battery 4b in the stopped state.

  Next, a detailed configuration of the power supply monitoring circuit 5 that monitors the state of the power supply and controls the start of the program being executed according to the power recovery timing will be described with reference to FIG.

  The power supply monitoring circuit 5 detects a “power failure” state in which the power receiving state of the power supply unit 4 is equal to or lower than a preset voltage, or a “power recovery” state in which the power supply unit 4 recovers to a preset voltage or higher. When the detection circuit 5a generates a masking signal for masking the reset signal for resetting the control device 10 for a predetermined period after the “power failure” state, and the occurrence of the “recovery” state occurs within the masking period “ A power recovery determination circuit 5b that generates a power recovery interrupt signal; otherwise, it generates a power recovery reset signal.

As shown in FIG. 2 (b), the power recovery discrimination circuit 5b is masked with a pulse width T of a certain period triggered by the power failure signal _SPOFF of the “power failure state” of the power supply by the power failure / recovery detection circuit 5a. a timer 5b1 for generating a signal S _M, the power recovery signal S _PON of "power recovery" state it is detected that occurs within the period T there is a pulse width of the masking signal S _M, the masking signal S _M and the power failure signal aND gate circuit 5b2 of the S _PON, masking signal _S masking signal _{S M} of the inverter circuit 5b3 whose pulse width detecting that occurred after a period T in the presence of _M, and the masking signal _{S M} and the output of the inverter circuit 5b3 And an AND gate circuit 5b4.

  The output signal of the AND gate 5b4 is notified to each component of the control device 10 as a reset signal, that is, a power recovery reset signal, which occurs after power recovery is masking period T, and the CPU 3 performs initialization processing (restart processing). Execute.

Then, the interrupt controller 6 receives the power failure signal S _POFF and the power recovery signal S _PON from the power supply monitoring circuit 5a, and _sends the power failure interrupt signal and the power recovery interrupt signal to the corresponding CPU 3 via the CPU bus 9. To be notified.

  The masking period T is set longer than the maximum time for transferring the data in the volatile memory 2 at the time of a power failure to the nonvolatile memory 1, and the battery 4b has a capacity that ensures the power supply during the masking period T.

  Therefore, after the masking period T, the CPU 3 waits for a power reset signal.

  Next, an operation when the power supply of the control device 10 configured as described above is stopped will be described with reference to FIG.

  When the power monitoring circuit 5 detects a power failure by the power failure / recovery detection circuit 5 a, it notifies the CPU 3 of a power failure interrupt signal via the interrupt controller 6 and the CPU bus 9.

  When the CPU 3 receives the power failure interrupt signal, it starts a memory transfer process for storing the data in the volatile memory 2 immediately before the power failure in the nonvolatile memory 1. When this transfer is completed, the CPU 3 sends a stop signal to the power supply unit 4. Then, the control device 10 stops its operation and enters a power recovery interrupt waiting state.

  Thereafter, when the power monitoring circuit 5 detects power recovery, the power recovery determination circuit 5b determines whether or not the power recovery has occurred within the period T of the masking signal. The power interruption interrupt signal is notified to the CPU 3.

  If the CPU 3 is in memory transfer processing for storing the data of the volatile memory 2 in the nonvolatile memory 1 within this period T, the CPU 3 stops the processing (CASE 1).

  In the case of a power recovery interrupt signal within this period T, the CPU 3 continuously resumes the operation of the program stored in the volatile memory 1 when the power failure interrupt signal is generated from the program immediately after the power failure interrupt signal is received.

  Further, when the power recovery occurs in the power recovery determination circuit 5b after the period T of the masking signal, the power monitoring circuit 5b generates a power recovery reset signal and notifies each part of the control device 10 of this signal.

  When the power reset signal is notified (CASE 3), the CPU 3 stores the program and data in the nonvolatile memory 1 in the volatile memory 2 and executes the initialization process of the control device 10.

  That is, the initialization process is executed for “recovery” after a time exceeding the masking period T or the power is turned on, and the memory for the recovery that occurs within the masking period T is executed. Interrupts the transfer process and resumes execution from the program immediately after the power failure interrupt signal.

  Therefore, the control system provided with such a control device 10 has a faster resumption of operation in seconds as compared with the conventional system in which the memory transfer process and the restart process are executed every power failure. There is an effect that the control can be continuously executed without interruption for a short-time power failure.

  The present invention is not limited to the above-described embodiment. The processing function of the power recovery determination circuit 5b is such that the CPU 3 receives the power recovery signal from the power failure / recovery detection circuit 5a, and the CPU 3 Therefore, the same processing function as that of the power failure / recovery detection circuit 5a can be executed, and can be appropriately changed without departing from the gist of the present invention.

1 Nonvolatile Memory 2 Volatile Memory 3 CPU
4 power supply unit 4a power supply circuit 4b switch 4c battery 5 power supply monitoring circuit 5a power failure / recovery detection circuit 5b power recovery discrimination circuit 6 interrupt controller 7 input / output interface unit 8 power supply bus 9 CPU bus 10 controller 20 controlled object

Claims (3)

A control system having a function of detecting a power failure and storing data stored in a volatile memory in a nonvolatile memory,
The control device stores a program and data that are being executed, a CPU that executes processing based on the program stored in the volatile memory, and the program that is the same as the volatile memory, Power is supplied to each part of the control device, a non-volatile memory that updates the program and data in response to a command from the CPU, an interrupt controller that generates an interrupt signal for the CPU, an input / output interface unit that sends and receives input / output data A power supply unit that detects that the power supply is “power failure” and switches to the battery, and a power supply monitoring circuit that monitors and controls the state of the power supply supplied to the power supply unit. Prepared,
The power supply monitoring circuit detects a power outage / recovery detection that detects a “power outage” state in which the power receiving state of the power supply unit is equal to or lower than a preset voltage, or a “power recovery” state in which the power supply unit recovers to a preset voltage or higher. A masking signal for masking a reset signal for resetting the control device is generated for a predetermined period after the circuit and the “power failure” state. When the occurrence of the “recovery” state occurs within the masking period, A power recovery interrupt signal, and if not, a power recovery determination circuit that generates a power recovery reset signal,
The interrupt controller receives a power failure signal and a power recovery signal from the power monitoring circuit, and notifies the CPU of a power failure interrupt signal and a power recovery interrupt signal,
The masking period is longer than a maximum time for transferring data of the volatile memory at the time of a power failure to the nonvolatile memory, and the battery has a capacity that can guarantee the power supply of the masking period,
When the CPU is notified of a power failure interrupt signal from the interrupt controller, the CPU starts memory transfer processing for storing the data in the volatile memory immediately before the power failure in the nonvolatile memory,
When the CPU is notified of the power recovery interrupt signal, if the memory transfer process is in progress, the CPU stops the memory transfer process and resumes the process from the program immediately after receiving the power failure interrupt signal,
When the CPU is notified of the power reset signal, the storage content of the nonvolatile memory is stored in the volatile memory, and an initialization process of the control device is executed.
A control system characterized in that, for “power recovery” during the masking period, processing is resumed from the program immediately after receiving the power failure interrupt signal. A control device having a function of detecting a power failure and storing data stored in a volatile memory in a nonvolatile memory,
The control device stores a program and data that are being executed, a CPU that executes processing based on the program stored in the volatile memory, and the program that is the same as the volatile memory, Power is supplied to each part of the control device, a non-volatile memory that updates the program and data in response to a command from the CPU, an interrupt controller that generates an interrupt signal for the CPU, an input / output interface unit that sends and receives input / output data A power supply unit that detects that the power supply is “power failure” and switches to the battery, and a power supply monitoring circuit that monitors and controls the state of the power supply supplied to the power supply unit. Prepared,
The power supply monitoring circuit detects a power outage / recovery detection that detects a “power outage” state in which the power receiving state of the power supply unit is equal to or lower than a preset voltage, or a “power recovery” state in which the power supply unit recovers to a preset voltage or higher. A masking signal for masking a reset signal for resetting the control device is generated for a predetermined period after the circuit and the “power failure” state. When the occurrence of the “recovery” state occurs within the masking period, A power recovery interrupt signal, and if not, a power recovery determination circuit that generates a power recovery reset signal,
The interrupt controller receives a power failure signal and a power recovery signal from the power monitoring circuit, and notifies the CPU of a power failure interrupt signal and a power recovery interrupt signal,
The masking period is longer than a maximum time for transferring data of the volatile memory at the time of a power failure to the nonvolatile memory, and the battery has a capacity that can guarantee the power supply of the masking period,
When the CPU is notified of a power failure interrupt signal from the interrupt controller, the CPU starts memory transfer processing for storing the data in the volatile memory immediately before the power failure in the nonvolatile memory,
When the CPU is notified of the power recovery interrupt signal, if the memory transfer process is in progress, the CPU stops the memory transfer process and resumes the process from the program immediately after receiving the power failure interrupt signal.
When the CPU is notified of the power reset signal, the storage content of the nonvolatile memory is stored in the volatile memory, and an initialization process of the control device is executed.
The control apparatus, wherein the process is resumed from the program immediately after receiving the power failure interrupt signal for the “power recovery” during the masking period. A method for starting a control system having a function of detecting a power failure and storing data stored in a volatile memory in a nonvolatile memory,
The control device includes a battery having a capacity that can be supplied for longer than a maximum time for transferring data of the volatile memory to the nonvolatile memory when the power supply is stopped, and the power supply is “power failure”. A power supply unit that detects that the battery has been switched to the battery,
Starting a memory transfer process of storing data in the volatile memory immediately before the power failure in the nonvolatile memory at the power failure of the power supply;
When the power supply from the battery is guaranteed after the “power failure” is set as a masking period during which the reset of the control system is stopped, and the power supply is “recovered” within the masking period, the memory transfer process If the process is being executed, the step of stopping the memory transfer process and continuing the process from the program immediately after the “power failure”,
When the occurrence of the “power recovery” occurs after the masking period, the storage content of the nonvolatile memory is stored in the volatile memory, and the initialization process of the control device is executed.
A method for starting a control system, characterized in that the processing is resumed from the program immediately after receiving the power failure interrupt signal for “recovery” during the masking period.

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