JP2011086109A - Mobile device using phase change memory and power saving control system for volatile memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mobile device with little power consumption, capable of setting a power saving mode and recovering from the power saving mode in a short time. <P>SOLUTION: The mobile device includes a volatile memory and a non-volatile random access memory as the memory of a control unit, and the volatile memory and the non-volatile random access memory are connected to a common bus. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a portable device and its power saving control method, and more particularly to a power saving control method of a portable device and a volatile memory using a phase change memory.

  A portable device such as a cellular phone is battery-driven, so power saving operation is important, and various power saving modes are provided. For example, in the operation of a mobile phone, when the user stops the operation or the communication with the base station is terminated, the power saving mode is set to prevent the battery from being consumed. In this power saving mode, a central processing unit (hereinafter abbreviated as CPU) is set to a Deep Sleep mode to reduce power consumption, and each unit is set to a standby mode so that power is reduced as much as possible.

  At this time, in a synchronous DRAM (hereinafter abbreviated as “RAM”) widely used in mobile phones, a method of setting a self-refresh mode that reduces power consumption while retaining data is generally used. However, the RAM is a volatile memory, and a refresh operation is necessary to hold data. Accordingly, the RAM consumes the power of the refresh operation to hold data even in the power saving state. Therefore, in order to further save power, it is necessary to set the Deep-Powerdown mode in which the RAM refresh operation is stopped.

  In the deep-power down mode, power consumption is very small, but there is a problem that RAM data cannot be held because the refresh operation is not performed. Therefore, when starting the power saving mode, it is necessary to save the RAM data to the nonvolatile memory. Further, in order to end the power saving mode and enter the next operation mode, it is necessary to write back the data saved in the nonvolatile memory to the RAM. Thus, it is necessary to save the volatile RAM data in the nonvolatile memory and to write it back.

  Data saving and writing back operations in this conventional power saving mode will be described with reference to FIGS. FIG. 1 and FIG. 2 are explanatory diagrams of RAM data saving and writing back operations. FIG. 3 shows a flowchart of the power saving mode. A control unit 103 of a conventional portable device is mainly composed of a CPU 201, a RAM 203, and a flash memory (nonvolatile memory) 204. The power saving mode is started, and before setting Deep-Powerdown, the data in the RAM 203 is saved to the flash memory (nonvolatile memory) 204 via the bus 301 in FIG. When the power saving mode ends, the data in the flash memory (nonvolatile memory) 204 is written back to the RAM 203 via the bus 401 in FIG. 2 before the power saving mode ends.

  The operation of the conventional RAM in the power saving mode will be described with reference to the flowchart shown in FIG. As the first step S101, the CPU 201 starts a power saving operation. Power saving processing is started from the CPU 201 (step S102), and then the RAM data is saved in the flash memory (step S103). In step S104, the end of data saving is monitored and the end of data saving is awaited. When the data saving is completed, the RAM is set to the power saving mode (step S105). The power saving mode here is Deep-Powerdown, and no refresh operation is performed on the RAM, which is a volatile memory. In step S106, the end of the power saving mode is monitored, and the end of the power saving mode is awaited. When the power saving mode ends, the RAM power saving mode ends (step S107), and the CPU 201 returns the data in the flash memory to the RAM (step S108). In step S109, data write-back is monitored and the end of data write-back is awaited. When the data write-back is finished, the power saving process is finished (step S110), and all the power saving operations are finished (step S111).

  In the Deep-Powerdown mode of the RAM, since the refresh operation is not performed, the RAM data saving operation and the data writing back operation are required. As described above, since the portable device cannot operate during the time until the data transfer is completed, there arises a problem that the operability such as a slow start-up is deteriorated.

  As a power saving method in a portable device, there is the following patent document. Patent Document 1 discloses that, in a mobile phone, the RAM is set to a Self-Refresh mode and the CPU is set to a deep sleep mode. Further, Patent Document 2 discloses a method of shortening the time at the next start-up using the parameters before the last power-off in the portable terrestrial digital broadcast receiver.

  Recently, a phase change memory, which is a non-volatile memory and can be randomly accessed, has been commercialized and installed in portable devices as a new memory. As described in Patent Document 3 and Patent Document 4, the phase change memory is based on the principle that a certain material exhibits different resistance values due to a phase change caused by a temperature change. Although it is non-volatile like a flash memory, it does not require an erasing operation before writing, and can be used for overwriting control or random access as seen from a CPU like a RAM. Moreover, it is suitable for large capacity and can be used for storing data and programs.

  As a portable device equipped with this phase change memory, Patent Document 5 discloses that a memory connected to a bus can be constituted by a RAM, a flash memory, and a phase change memory. Patent Document 6 discloses a configuration in which a flash memory and a phase change memory are connected in parallel. However, in the conventional configuration shown in FIGS. 1 and 2, when the flash memory is simply replaced with the phase change memory and the deep-power down mode is set, the data is saved and written back between the RAM and the phase change memory. The same problem that the operability is lowered remains.

  As described above, when a storage device of a portable device such as a mobile phone is configured with a RAM and a nonvolatile memory, a power saving operation becomes important, and a power saving mode such as a self-refresh operation of the RAM can be set. It has become. However, if these power saving modes are not sufficient, it is necessary to set the RAM to the deep-power down mode to further save power. However, when the RAM is set to the Deep-Powerdown mode, it is necessary to save the RAM data to the nonvolatile memory. Further, when the Deep-Powerdown mode is terminated, it is necessary to write back the saved data from the nonvolatile memory to the RAM. In this way, when the Deep-Powerdown mode is set, a problem arises in that the usability of the operation is deteriorated because it takes time to save data and write back.

JP 2009-159628 A JP 2006-157595 A JP 2003-100084 A JP 2003-100085 A JP 2006-79609 A JP 2009-170056 A

  As described above, power saving is desired for portable devices. However, when the power saving mode is set, the data in the RAM, which is a volatile memory, cannot be held, so that data saving and writing back operations between the RAM and the nonvolatile memory are necessary, and the operability is reduced. There's a problem.

  In view of the above problems, the present invention provides a power-saving portable device that operates in a short time and consumes less power.

  According to one aspect of the present invention, the memory of the control unit includes a volatile memory and a nonvolatile random access memory, and the volatile memory and the nonvolatile random access memory are connected to a common bus. Portable device is obtained.

  According to another aspect of the present invention, a volatile memory connected to a common bus and a nonvolatile random access memory are provided, and before the volatile memory is set to the power saving mode, the data of the volatile memory is A power saving control method for a volatile memory can be obtained, which saves data in a nonvolatile random access memory using a common bus.

  In the present invention, the phase change memory and the RAM are connected by a common bus, and the RAM data save destination in the power saving mode is the phase change memory. By connecting the phase change memory and the RAM through a common bus in this way, data movement between the phase change memory and the RAM can be performed at high speed. Further, since the save destination memory is a phase change memory that does not require data erasure (overwriteable), the processing time for saving can be shortened. Further, when shifting from the power saving mode to the operation mode, the power saving mode is ended before data is written back to the RAM, and the CPU can shift to the operation mode in a short time using the data of the phase change memory. . The RAM data saved in the phase change memory is written back at an arbitrary time during the operation mode. As described above, an effect of returning from the power saving mode to the operation mode in a short time can be obtained.

  According to the present invention, it is possible to obtain a power-saving portable device that has a large power-saving effect by using the Deep-Power-down mode in which the RAM current is minimized, and can return to the operation mode in a short time.

It is a figure explaining the evacuation of the data in the control part of the conventional mobile phone. It is a figure explaining the write-back of the data in the control part of the conventional mobile telephone. It is a flowchart figure at the time of the conventional memory power saving mode. It is a main block diagram of a mobile phone to which the present invention is applied. It is a block diagram of the control part of the mobile telephone in FIG. FIG. 6 is a diagram for explaining saving and writing back of data in the control unit of the mobile phone of FIG. 5. It is a flowchart figure at the time of the memory power saving mode of this invention. It is a comparison figure with a prior art example and this invention in the operation | movement procedure at the time of a power saving mode.

  Embodiments of the present invention will be described in detail with reference to the drawings. FIG. 4 is a main block diagram of a mobile phone to which the present invention is applied. FIG. 5 is a block diagram of the control unit of the mobile phone in FIG. 4, and FIG. 6 is a diagram for explaining data saving and writing back. FIG. 7 is a flowchart in the power saving mode of the memory of the present invention. FIG. 8 is an operation procedure in the power saving mode, and is a comparison diagram between the conventional example and the present invention.

  Referring to FIG. 4, a mobile phone to which the present invention is applied is shown as an example. In FIG. 4, the incoming call operation of the mobile phone will be described. The radio wave received by the antenna 101 is sent to the transmission / reception unit 102, demodulated, and analyzed by the control unit 103. When the control unit 103 recognizes that it is an incoming call, the control unit 103 sends the transmission data to the transmission / reception unit 102 and displays the incoming call on the display unit 106. Also, a ring tone is generated from the speaker 104 to notify the user of the incoming call. When the user notices an incoming call and operates the operation unit 107, the control unit 103 detects it and activates the voice using the microphone 105. The transmitted / received audio signal is transmitted to the transmitting / receiving unit 102 and communicates with a base station (not shown) through the antenna 101. The power supply unit 108 supplies power to each unit.

  The control unit 103 illustrated in FIG. 5 is the control unit 103 illustrated in FIG. 4, and includes a CPU (central processing unit) 201, a phase change memory 202 and a RAM 203 connected via a common bus, and a flash memory (nonvolatile memory) 204. Has been. The phase change memory 202 of the control unit 103 is a randomly accessible non-volatile memory, and is connected to the RAM 203 via a common bus and further connected to the CPU 201. The RAM 203 is a volatile memory that can be accessed at random, and is connected to the phase change memory 202 via a common bus, and is further connected to the CPU 201. In the present invention, the RAM 203 may be described as a volatile memory. The flash memory 204 is a nonvolatile memory and is connected to the CPU 201. The flash memory 204 is generally a memory that cannot be randomly accessed.

  The CPU 201 performs writing / reading of the memory and controls the operation of the mobile phone according to the program stored in the memory. The CPU 201 executes the program stored in the phase change memory 202 or the flash memory 204, or executes the program copied from the flash memory 204 or the phase change memory 202 to the RAM 203 to thereby change the mobile phone of FIG. Make it work. When the phase change memory 202 or the flash memory 204 can be randomly accessed, the CPU 201 can directly access and execute the stored program.

  As shown in FIG. 6, when the RAM of the mobile device is set to the power saving mode, the data in the RAM 203 is saved to the phase change memory 202 via the bus 501 in order to retain the data. Since the phase change memory 202 is connected to the same bus as that of the RAM 203, data transfer can be performed at a higher speed in the case of saving as compared to the case where it is connected to a different bus. When the RAM power saving mode ends, the CPU 201 reads data necessary for operation from the phase change memory 202 directly using the bus 502 and starts operation. Since the operation can be started before data is written back to the RAM 203, the time required to return to the state before power saving can be shortened. Data to be written back to the RAM is written to the RAM 203 after the CPU 201 operates.

  Next, the operation of the CPU 201 in FIG. 5 will be described using the flowchart shown in FIG. The following operations are all performed based on the control of the CPU 201. As the power saving operation of the RAM of the present invention, the CPU 201 starts the power saving operation (step S201). Power saving processing is started from the CPU 201 (step S202), and then RAM data is saved in the phase change memory (step S203). The CPU 201 monitors the end of data saving (step S204) and waits for the end of data saving. Here, compared with the conventional system, in the present invention, the phase change memory 202 and the RAM 203 are connected by a common bus. Therefore, for example, if data transfer is performed by DMA (Direct Memory Access) like the bus 501, the data transfer time can be shortened because it does not go through the CPU.

  When the data saving is completed, the CPU 201 sets the RAM to the power saving mode (step S205). The power saving mode is Deep-Powerdown, and no refresh operation is performed on the RAM. The CPU 201 monitors the end of the power saving operation (step S206) and waits for the end of the power saving operation. When the power saving operation ends, the CPU 201 ends the RAM power saving mode (step S207). From here, the data is written back to the RAM in the prior art, whereas the CPU 201 of the present invention starts the operation with the data saved in the phase change memory (step S208). The CPU 201 ends the power saving process (step S209). The phase change memory according to the present invention can be randomly accessed, and is connected to the RAM via a common bus, and can start operation with data saved in the phase change memory by direct access from the CPU. Accordingly, the data in the phase change memory is written back to the RAM at an arbitrary timing after the normal operation of the CPU 201 is started (step S210). The CPU 201 monitors data write-back (step S211) and waits for the end of data write-back. When the data writing back is finished, all the power saving operations are finished (step S212).

  FIG. 8 shows an image of the operation time in the power saving mode in which the present invention is compared with the conventional example. FIG. 8 shows each step of the flowchart in the power saving mode with respect to the time axis. The operation time from the start of the power saving process of the RAM (steps S102 and S202) to the end of the power saving mode (steps S107 and S207) is slightly longer in the present invention using the phase change memory because the common bus is used. Becomes faster. After finishing the RAM power saving mode (S107, S207), the present invention immediately starts operation with the data of the phase change memory (step S208). On the other hand, in the prior art, after the data data is written back in step S108 and the power saving process is completed (step S110), the operation mode is started. Therefore, the time for starting the operation mode is after step S111 in which all the power saving processes are completed in the conventional technique (not shown), and is step S208 in the present invention. In this way, the time until the start of activation, which becomes the operation mode of the mobile device, can be greatly shortened.

  In FIG. 6, the flash memory (nonvolatile memory) 204 is described. However, if the program or data stored in the flash memory (nonvolatile memory) is likely to enter the phase change memory 202 in capacity, Even if only the change memory 202 and the RAM 203 are configured, the same effect as the present invention can be obtained.

  The portable device of the present invention includes a memory unit that includes a phase change memory and a RAM. The phase change memory and RAM mounted are connected by a common bus, and the RAM data save destination in the power saving mode that saves RAM power consumption is the phase change memory. By connecting the phase change memory and the RAM with a common bus in this way, data can be moved at high speed. Further, since the save destination memory is a phase change memory that can be overwritten without erasing data, the processing time for saving can be shortened.

  Further, when shifting from the power saving mode to the operation mode, the CPU starts the operation mode by using the data saved in the phase change memory after ending the power saving mode before data is written back to the RAM. Since the phase change memory can be randomly accessed and connected to the same common bus as the RAM in this way, it can be directly accessed from the CPU, and the operation mode can be shifted to using the data of the phase change memory. By starting the operation with the data saved in the phase change memory in this manner, the data start is not immediately written back to the RAM, so that the operation start time after the RAM power saving can be shortened. The data of the phase change memory is written back to the RAM at an arbitrary timing after the operation is resumed.

  As described above, an effect of returning from the power saving mode to the operation mode in a short time can be obtained. According to the present invention, it is possible to obtain a power-saving portable device that has a large power-saving effect by using the Deep-Power-down mode in which the RAM current is minimized, and can return to the operation mode in a short time.

  Although the present invention has been described above as an embodiment, the present invention is not limited to the above embodiment. Various changes can be made to the configuration and details of the present invention within the scope of the present invention.

DESCRIPTION OF SYMBOLS 101 Antenna 102 Transmission / reception part 103 Control part 104 Speaker 105 Microphone 106 Display part 107 Operation part 108 Power supply part 201 CPU
202 Phase change memory 203 RAM
204 Flash memory (nonvolatile memory)
301, 401, 501, 502 Bus

Claims (7)

  A portable device comprising a volatile memory and a nonvolatile random access memory as a memory of the control unit, wherein the volatile memory and the nonvolatile random access memory are connected to a common bus.   The data in the volatile memory is saved in the nonvolatile random access memory using the common bus and is held in the nonvolatile random access memory in the power saving mode of the volatile memory. 1. A portable device according to 1.   When the power saving mode of the volatile memory is terminated, the central processing unit directly accesses the nonvolatile random access memory and returns to the operation mode using the data saved in the nonvolatile random access memory. The portable device according to claim 2.   The data in the nonvolatile random access memory is written back to the volatile memory after returning to the operation mode using the data saved in the nonvolatile random access memory. Mobile devices.   A volatile memory connected to a common bus and a non-volatile random access memory, and before the volatile memory is set to a power saving mode, the data of the volatile memory is transferred to the non-volatile memory using the common bus. Power-saving control method for volatile memory, characterized by saving to a random access memory.   When the power saving mode of the volatile memory is terminated, the central processing unit directly accesses the nonvolatile random access memory and returns to the operation mode using the data saved in the nonvolatile random access memory. The volatile memory power saving control method according to claim 5.   The data of the non-volatile random access memory is written back to the volatile memory after returning to the operation mode using the data saved in the non-volatile random access memory. The volatile memory power saving control method described.

Images