JP2011078204A - Power converter and method of controlling the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power converter having a compact inductor to solve the problems in terms of volume and cost. <P>SOLUTION: The power converter includes a DC power circuit 2 and a power conversion circuit 3 that is connected between a positive- and negative-electrode-side lines of the DC power circuit, and includes at least one of a conversion function for converting DC power to AC power and a conversion function for converting AC power to DC power. The power conversion circuit 3 is configured by connecting switching arms SA1 to SA3 in parallel corresponding in number to the number of AC phases, the switching arms being configured by connecting arms in series, in which a diode and a capacitor for resonance are connected to switching elements corresponding in number to the number of AC phases in antiparallel and in parallel, respectively, to the positive-electrode-side line and the negative-electrode-side line. One end of an inductor L1 is connected to an intermediate potential point of the DC power circuit, and the other end is connected to the AC connection point between the arms of each switching arm via bidirectional switching elements SWu to SWw switchable independently and bidirectionally. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a power conversion device including a DC power supply circuit, and a power conversion circuit having at least one of a function of converting DC to AC and a function of converting AC to DC, and a control method thereof.

  As this type of power conversion device, for example, a switching circuit in which snubber capacitors are connected in parallel is connected in series, and a main circuit in which an AC output terminal is drawn from the connection midpoint of the switching elements, and a capacitor on the DC power supply side A series connection of a smoothing capacitor and a series circuit of a reverse conducting switching element connected so that current can flow in both directions between a connection point of the series connection of the smoothing capacitor and a connection middle point of the switching element of the main circuit In the resonance type power converter comprising an auxiliary resonance circuit connected in series with each other, the operation time of the resonance circuit is set to the current value of the load so that the current flowing through the switching element becomes a constant value when the switching element is turned off. There is known a control method for a resonance type power converter that is changed in accordance with (see, for example, Patent Document 1).

  Similarly, a plurality of switching circuits in which a first switch means in which a resonance capacitor is connected in parallel to a DC power source and a second switch means in which a resonance capacitor is connected in parallel, a first switch means and a second switch An auxiliary resonance commutation circuit is connected between the connection point of the switch means and the neutral point of the DC voltage of the DC power supply, and the switching of the plurality of switching circuits and the auxiliary resonance commutation circuit is controlled based on the PWM signal. Is done. The drive circuit that performs zero voltage switching according to the first and second switch means sets a time point delayed by a predetermined time from the zero voltage timing detected based on the voltage across the main switch according to the polarity of the load current as the switch timing. An auxiliary resonance PWM power conversion device is known (see, for example, Patent Document 2).

The hardware of these conventional examples is represented as shown in FIG. That is, a DC power supply circuit 100 in which DC power supplies B1 and B2 such as two batteries are connected in series, and a positive electrode side line Lp is derived from the positive electrode side of the battery B1 of the DC power supply circuit 100, and a negative electrode is connected from the negative electrode side of the battery B2. A side line Ln is derived.
An inverter 101 having a configuration in which three switching arms SA31 to SA33 are connected in parallel is connected between the positive electrode side line Lp and the negative electrode side line Ln.

  Here, the switching arm SA31 has switching elements Q31a and Q31b connected in series between the positive electrode side line Lp and the negative electrode side line Ln, and the connection point of the switching elements Q31a and Q31b is an AC output point Pou. . Similarly, the switching arm SA32 has switching elements Q32a and Q32b connected in series between the positive electrode side line Lp and the negative electrode side line Ln, and the connection point of the switching elements Q32a and Q32b is an AC output point Pov. . Further, the switching arm SA33 includes switching elements Q33a and Q33b connected in series between the positive electrode side line Lp and the negative electrode side line Ln, and the connection point of the switching elements Q33a and Q33b is an AC output point Pow. The AC motor 102 is connected to the AC output points Pou to Pow.

Further, diodes D31a to D33b are connected in antiparallel to each of the switching elements Q31a to Q33b, and resonance capacitors C31a to C33b are connected in parallel to the diodes D31a to D33b.
In addition, a bidirectional switch using resonance inductors L34a to L34c and auxiliary switches between an intermediate potential point that is a connection point of the batteries B1 and B2 of the DC power supply 100 and the AC output points Pou to Pow of the switching arms SA31 to SA33. Series circuits with the circuits SWa to SWc are individually connected.

Then, switching of the bidirectional switch circuits SWa to SWb of the switching elements Q31a to Q33b of the inverter 101 is controlled by the control device 103.
In this control device 103, each of the switching arms SA31 to SA33 is driven by a gate drive signal. From the on state of the switching elements Q31a to Q33a serving as the upper arm to the on state of the switching elements Q31b to Q33b serving as the lower arm, Conversely, when the commutation is performed, the auxiliary switches SWa to SWc are turned on before the operations of the main switching elements Q31a to Q33b.

  As a result, a resonance phenomenon occurs between the resonance capacitors C31a to C33b and the resonance inductors L34a to L34c, so that a period in which the voltage applied to the main switching elements Q31a to Q33b is zero occurs. Thus, zero voltage switching can be realized, and in principle, the switching loss of each of the switching elements Q31a to Q33b can be made substantially zero.

Japanese Patent No. 3313538 JP 2005-130612 A

However, the conventional example shown in FIG. 7 enables a zero voltage switch and has a merit that a low loss can be realized. On the other hand, a hard switching operation is performed. However, for example, an insulated gate bipolar transistor (IGBT) shown in FIG. The number of parts is larger than that of an inverter composed of six switching elements Q31a to Q33b composed of ()) and diodes D31a to D33b connected in antiparallel to these switching elements Q31a to Q33b. In particular, the resonance inductors L34a to L34c are on the order of several μH to several tens of μH, and the peak value of the flowing current is larger than the peak current value flowing to the load side. It still has an unsolved problem of becoming high.
Therefore, the present invention has been made paying attention to the above-mentioned unsolved problems of the conventional example, and by reducing the size of the inductor portion, it is possible to simultaneously solve the volume problem and the cost problem. An object of the present invention is to provide a power conversion device and a control method thereof.

  In order to achieve the above object, a power conversion device according to an embodiment of the present invention includes a DC power supply circuit connected in series between a positive electrode side line and a negative electrode side line, and between the positive electrode side line and the negative electrode side line. A power conversion device including at least one of a DC-AC conversion function for converting DC power to AC power and an AC-DC conversion function for converting AC power to DC power, The power conversion circuit includes a switching element for the number of AC phases, a diode connected in antiparallel with each switching element, and an arm having a resonance capacitor connected in parallel with the diode, the positive line and the arm A switching arm connected in series to the negative electrode side line is connected in parallel for the number of AC phases, and an inductor is connected to an intermediate potential point of the DC power supply circuit. With connecting ends, it is characterized by connecting through a switching bidirectional switching element bidirectionally individually to the AC output point between the arms of the other end each of the switching arm.

  Moreover, the power converter device which concerns on the other form of this invention is equipped with the power conversion control part which drive-controls each switching element which comprises each said switching arm of the said power conversion circuit, This power conversion control part is at least 1 It is characterized by having switching prohibiting means for prohibiting the switching operation for the switching elements of other phases for a predetermined period after the switching command is output to the switching elements constituting one switching arm.

  Furthermore, the control method of the power conversion device according to another aspect of the present invention includes a DC power supply circuit, and a power conversion circuit having at least one of a function of converting DC to AC and a function of converting AC to DC, The power conversion circuit includes a switching element for the number of AC phases, a diode connected in antiparallel with each switching element, and an arm having a resonance capacitor connected in parallel with the diode, the positive line and the arm A switching arm connected in series to the negative electrode side line is connected in parallel for the number of AC phases, one end of the inductor is connected to an intermediate potential point of the DC power supply circuit, and the other end of the inductor is connected to each of the above Electric power having a configuration in which switching arms are connected to an AC output point between the arms via bidirectional switching elements that can be switched bidirectionally individually. A method for controlling a switching device, wherein after a switching command is output from a power conversion control unit to a switching element constituting the at least one switching arm, a switching operation for a switching element of another phase is prohibited for a predetermined period. It is characterized by.

  According to the present invention, a switching arm in which an arm having a switching element, a diode connected in reverse parallel to the switching element, and a resonance capacitor connected in parallel is connected in series to the positive line and the negative line is provided for the number of AC phases. Connect one end to the AC output point for the number of AC phases of the power conversion circuit to the other end of the power conversion circuit that is the main switch connected in parallel and one resonance inductor that has one end connected to the intermediate potential point of the DC power supply circuit Since the auxiliary resonance circuit is connected to the other ends of the bidirectional switching elements corresponding to the number of AC phases, the size of the power conversion device can be reduced because only one resonance inductor is required to form the auxiliary resonance circuit. The effect that cost reduction becomes possible is acquired.

It is a block diagram of the power converter device which shows the 1st Embodiment of this invention. It is a circuit diagram which shows the structure of the bidirectional | two-way switch circuit applicable to 1st Embodiment. It is a circuit diagram which shows the specific structure of the control apparatus which can be applied to 1st Embodiment. It is a time chart which shows the signal of each part of the circuit diagram of FIG. It is a circuit diagram in the 2nd Embodiment of this invention. It is a flowchart which shows an example of the commutation control processing procedure performed with a control apparatus. It is a circuit diagram which shows a prior art example. It is a circuit diagram which shows a normal power converter device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram illustrating a power conversion apparatus according to a first embodiment of the present invention, in which 1 is a power conversion apparatus that drives an AC load. This power conversion device 1 is connected between a DC power supply circuit 2 in which, for example, batteries B1 and B2 having the same battery voltage Vb are connected in series, and a positive electrode side line Lp and a negative electrode side line Ln derived from the DC power supply circuit 2 And a DC-AC power conversion circuit 3 as a main switch composed of the auxiliary resonance commutation pole type inverter.

  The DC-AC power conversion circuit 3 includes three switching arms SA11 to SA13 corresponding to the number of AC phases connected in parallel between the positive electrode side line Lp and the negative electrode side line Ln. Each of these switching arms SA11 to 13 includes, for example, a switching element Qia (i is 11 to 13) configured by an insulated gate bipolar transistor (IGBT), a diode Dia connected in reverse parallel to each switching element Qia, and these Similarly, an upper arm having a resonance capacitor Cia connected in parallel with the diode Dia, a switching element Qib composed of, for example, an insulated gate bipolar transistor (IGBT), and a diode connected in antiparallel to each switching element Qib The Dib and the lower arm having the resonance capacitor Cib connected in parallel with the diodes Dib are connected in series.

  And the connection point of each switching element Qia and Qib is made into the alternating current output points Pou, Pov, and Pow as an alternating current connection point, and is connected to the alternating current motor 4 as a load. Here, as the AC motor 4, for example, when applied for driving a wheel of an electric vehicle, the rotary shaft may be connected to a differential gear via a speed reduction mechanism as necessary, and any other rotary drive mechanism. It can be applied as a rotational drive source.

On the other hand, one end of one inductor L1 is connected to an intermediate potential point between the batteries B1 and B2 of the DC power supply circuit 2. In addition, one end of the bidirectional switch circuits SWu, SWv, and SWw is connected to the AC output points Pou, Pov, and Pow of the DC-AC power conversion circuit 3.
The other ends of the bidirectional switch circuits SWu, SWv and SWw are connected to each other and connected to the other end of the inductor L1. The inductor L1 and the bidirectional switch circuits SWu to SWw constitute an auxiliary resonance circuit.

  Here, as the bidirectional switch circuits SWu to SWw, as shown in FIG. 2A, IGBTTa and IGBTb having no reverse breakdown voltage are connected in series in the reverse direction, and each IGBTTa and IGBTb is reversed. It is preferable to apply a configuration in which diodes Da and Db are connected in parallel, or a configuration in which IGBTc and IGBTd having reverse breakdown voltages are connected in antiparallel as shown in FIG. .

The gates of the switching elements Q11a to Q13a and Q11b to Q13b of the AC-DC conversion circuit 3 and the bidirectional switch circuits SWu to SWw of the auxiliary resonance circuit are driven and controlled by the control device 5.
As shown in FIG. 3, the control device 5 outputs a pulse signal forming circuit 6 for forming a U-phase pulse signal PSu, a V-phase pulse signal PSv, and a W-phase pulse signal PSw, and the pulse signal forming circuit 6. It has D-type flip-flop circuits 7u, 7v and 7w to which the U-phase pulse signal PSu, the V-phase pulse signal PSv and the W-phase pulse signal PSw are input to the D input terminal.

  Further, the control device 5 performs switching as a main switch based on switching signals PFu, PFv, and PFw that are output from the Q output terminals of the D-type flip-flop circuits 7u, 7v, and 7w and are prohibited from switching for a predetermined time as will be described later. Gate signal formation for forming gate signals supplied to the switching elements Q11a, Q11b, Q12a, Q12b and Q13a, Q13b of the arms SA1, SA2 and SA3 and switch signals for controlling on / off of the bidirectional switch circuits SWu, SWv and SWw Circuits 8u, 8v and 8w are provided.

Further, the control device 5 receives the U-phase pulse signal PSu, the V-phase pulse signal PSv, and the W-phase pulse signal PSw individually, and each of the pulse signals PSu, PSv, and PSw has a predetermined time t ₀ at the rise and fall. Monostable circuits 9u, 9v and 9w for outputting pulse signals PMu, PMv and PMw which are turned on only.
The pulse signals PMu and PMv output from the monostable circuits 9u and 9v are input to the OR circuit 10w, and the pulse signal POu output from the OR circuit 10w is input to the inverting input terminal of the AND circuit 11w. The pulse signal PMw output from the monostable circuit 9w is input to the non-inverting input terminal of the AND circuit 11w. The pulse signal PAw output from the AND circuit 11w is supplied to the clock terminal C of the D-type flip-flop circuit 7w.

  The pulse signals PMv and PMw output from the monostable circuits 9v and 9w are input to the OR circuit 10u, and the pulse signal POu output from the OR circuit 10u is input to the inverting input terminal of the AND circuit 11u. The pulse signal PMu output from the monostable circuit 9u is input to the non-inverting input terminal of the AND circuit 11u. The pulse signal PAu output from the AND circuit 11u is supplied to the clock terminal C of the D-type flip-flop circuit 7u that constitutes the switching inhibition circuit.

Further, the pulse signals PMw and PMu output from the monostable circuits 9w and 9u are input to the OR circuit 10v, and the pulse signal POv output from the OR circuit 10v is input to the inverting input terminal of the AND circuit 11v. The pulse signal PMv output from the monostable circuit 9v is input to the non-inverting input terminal of the AND circuit 11v. The pulse signal PAv output from the AND circuit 11v is supplied to the clock terminal C of the D-type flip-flop circuit 7v.
Here, the D-type flip-flop circuits 7u to 7w, the monostable circuits 9u to 9w, the OR circuits 10u to 10w, and the AND circuits 11u to 11w constitute a switching prohibiting circuit as a switching prohibiting means.

Next, the operation of the first embodiment will be described.
Each of the switching arms SA11 to SA13 is driven by, for example, a gate drive signal having a predetermined phase difference. From the on state of the switching elements Q11a to Q13a serving as the upper arm to the on state of the switching elements Q11b to Q13b serving as the lower arm, On the contrary, when the commutation is performed, the bidirectional switches SWu to SWw serving as auxiliary switches are controlled to be turned on before the switching elements Q11a to Q13b serving as main switches are operated.
As a result, since a resonance phenomenon occurs between the resonance capacitors C11a to C13b and the resonance inductor L1, a period in which the voltage applied to the main switching elements Q11a to Q13b is zero occurs. Thus, zero voltage switching can be realized, and in principle, the switching loss of each of the switching elements Q11a to Q13b can be made substantially zero.

At this time, there is one resonance inductor L1, and the current for three phases flows through this resonance inductor L1, but compared to the above-described conventional inductors L34a to L34c in FIG. Since the effective current value is √3 times and the peak current value is the same as that of the conventional example, the size can be reduced as compared with the three conventional examples. For this reason, the entire power conversion device can be reduced in size and the cost can be reduced.
However, since the resonance inductor L1 is shared by three phases, if another phase tries to perform a commutation operation during a period when a certain phase is trying to perform commutation (resonance phenomenon), both Problems such as a phenomenon in which the resonance capacitors of other phases are short-circuited via the direction switches SWu to SWw occur. Therefore, during the commutation operation of a certain phase, it is necessary to prohibit the commutation operation of another phase.

For this reason, in the control device 5, as shown in FIG. 3 described above, the phase pulse signals PSu to PSw shown in FIGS. 4B, 4G, and 1 output from the pulse signal forming circuit 6 are delayed. The D-type flip-flop circuits 7u to 7w operating as circuits are input to the D input terminals. Since these phase pulse signals PSu to PSw are input to the monostable circuits 9u to 9w, the predetermined time t at both the rising and falling times of the phase pulse signals PSu to PSw from the monostable circuits 9u to 9w. Pulse signals PMu to PMw that are in the ON state during ₀ are formed as shown in FIGS. 4 (c), (h), and (m).

  The pulse signals PMu and PMv output from the monostable circuits 9u and 9v are supplied to the OR circuit 10w, and the pulse signal POw shown in FIG. 4 (k) output from the OR circuit 10w is output to the AND circuit 11w. The pulse signal PMw output from the monostable circuit 9w is input to the non-inverting input terminal of the AND circuit 11w. For this reason, the pulse signal PAw shown in FIG. 4 (n) is input from the AND circuit 11w to the inverted clock input terminal C of the D-type flip-flop circuit 7w as a clock signal.

  Similarly, the pulse signals PMv and PMw output from the monostable circuits 9v and 9w are supplied to the OR circuit 10u, and the pulse signal POu output from the OR circuit 10u is input to the inverting input terminal of the AND circuit 11u. The pulse signal PMu output from the monostable circuit 9u is input to the non-inverting input terminal of the AND circuit 11u. Therefore, the pulse signal PAu shown in FIG. 4D is input from the AND circuit 11u to the clock input terminal C of the D-type flip-flop circuit 7u as a clock signal.

Further, the pulse signals PMw and PMu output from the monostable circuits 9w and 9u are supplied to the OR circuit 10v, and the pulse signal POv output from the OR circuit 10v is input to the inverting input terminal of the AND circuit 11v. The pulse signal PMv output from the monostable circuit 9vu is input to the non-inverting input terminal of the AND circuit 11v. Therefore, the pulse signal PAv shown in FIG. 4I is input from the AND circuit 11v to the clock input terminal C of the D-type flip-flop circuit 7v as a clock signal.
Therefore, as shown in FIG. 4, when the V-phase pulse signal PSv is commutated from the on state to the off state at the time point t1, the monostable circuit 9v responds accordingly to the predetermined time t ₀ shown in FIG. A pulse signal PMv that is in an ON state is output.

  The pulse signal PMv is supplied to the OR circuits 10u and 10w, and the pulse signals POu and POw output from the OR circuits 10u and 10w are turned on as shown in FIGS. 4 (a) and 4 (k). Further, the pulse signals PMu and PMw output from the monostable circuits 9u and 9w input to the OR circuit 10v continue to be in the off state as shown in FIGS. 4 (c) and (m). For this reason, the pulse signal POv output from the OR circuit 11v continues to be in the OFF state as shown in FIG. 4F, and the pulse signal POv is supplied to the inverting input terminal of the AND circuit 11v. The pulse signal PAv output from the AND circuit 11V is turned on as shown in FIG. 4b (i). When this pulse signal PAv is supplied to the clock input terminal C of the D-type flip-flop circuit 7v, the D-type flip-flop circuit 7b is input to the D input terminal from the on state shown in FIG. 4 (g). The V-phase pulse signal PSv inverted to the state is held. Therefore, the pulse signal PFv inverted from the on state to the off state shown in FIG. 4 (j) is output from the output terminal Q of the D-type flip-flop circuit 7b.

  Therefore, first, a switch signal for turning on the bidirectional switching element SWv is output from the gate signal forming circuit 8v to the bidirectional switching element SWv, and the bidirectional switching element SWv is turned on. As a result, a resonance phenomenon occurs in which the resonance inductor L1 and the resonance capacitor Cu resonate. In this resonance state, a gate signal for turning off the switching element Q12a of the switching arm SA12 is output, and a predetermined dead time is output. A gate signal for turning on the switching element Q12b is output with a delay of time. As a result, a period in which the voltage applied to the switching element Q12a serving as the main switch is zero occurs. Zero voltage switching can be realized by commutating the switching element Q12a from the on state to the off state and the switching element Q22b from the off state to the on state in this voltage zero period. In principle, each switching element Q12a and Q12b The switching loss can be made zero.

Thus, in middle of performing a commutation switching arm SA12, at time t2 before the elapse from the time t1 a predetermined time t ₀ is the U-phase pulse signal PSu is turned on, the monostable 9v Since the output pulse signal PMv is kept on as shown in FIG. 4 (h), the pulse signal POu outputted from the OR circuit 10u is turned on as shown in FIG. 4 (a). continuing. Since this pulse signal POu is input to the AND circuit 11u, the AND circuit 11u outputs even if the pulse signal PMu input from the monostable circuit 9u is in an ON state as shown in FIG. The pulse signal PAu to be turned on continues as shown in FIG. For this reason, the D-type flip-flop circuit 7u holds the U-phase pulse signal PSu in the previous OFF state, and the pulse signal PFu output from the D-type flip-flop circuit 7U is turned off as shown in FIG. The state is continuing.

Thereafter, when a predetermined time t ₀ elapses from time t1 at time t3, the pulse signal PMv output from the monostable circuit 9v returns from the on state to the off state as shown in FIG. Then, the pulse signal POu output from the OR circuit 7u returns from the on state to the off state as shown in FIG. Therefore, as shown in FIG. 4D, the pulse signal PAu output from the AND circuit 11u is inverted from the off state to the on state, and this pulse signal PAu is the clock signal input terminal of the D-type flip-flop circuit 7u. C is supplied as a clock signal.

  Accordingly, the D-type flip-flop circuit 7u holds the ON-phase U-phase pulse signal PSu input to the input terminal D, and the pulse signal PFu output from the output terminal Q is shown in FIG. Thus, the state is inverted from the off state to the on state. Therefore, first, a switch signal for turning on the bidirectional switching element SWu is output from the gate signal forming circuit 8u, and a resonance phenomenon occurs between the resonance inductor L1 and the resonance capacitor Cu. Then, a gate signal for turning off the switching element Q11a of the switching arm SA1 is output, and a gate signal for turning on the switching element Q11b after a predetermined dead time is output. As a result, a period in which the voltage applied to the switching element Q11a serving as the main switch is zero occurs. Zero voltage switching can be realized by commutating the switching element Q11a from the on state to the off state and the switching element Q11b from the off state to the on state in this voltage zero period. In principle, each switching element Q11a and Q11b The switching loss can be made zero.

  Thus, according to the first embodiment, in the commutation state in which any one phase switching arm, for example, the switching element of SA1, is commutated, the switching of the other phase is performed until the commutation is completed. Since the commutation of the switching elements of the arms SA12 and SA13 is prohibited, the resonance capacitors of other phases are connected to each other via the bidirectional switches SWu to SWw generated by sharing the resonance inductor L1 for three phases. Occurrence of a short circuit phenomenon can be reliably prevented.

Next, a second embodiment of the present invention will be described with reference to FIG.
In the second embodiment, an AC-DC power conversion circuit that charges a large-capacity capacitor with AC power generated by the AC generator is added to the configuration of the first embodiment.
That is, in the second embodiment, as shown in FIG. 5, in the configuration of FIG. 1 in the first embodiment described above, the batteries B1 and B2 of the DC power supply circuit 2 are replaced with large capacitors C1 and C2 for charging. 1 except that the AC-DC power conversion circuit 21 and the bidirectional switching elements SWu1 to SWw1 are provided in parallel with the DC-AC power conversion circuit 3 and the bidirectional switching elements SWu to SWw. The components corresponding to those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted.

  Here, the AC-DC power conversion circuit 21 has the same configuration as the DC-AC power conversion circuit 3 described above, and has six switching elements Q21a configured by, for example, insulated gate bipolar transistors (IGBT). Three switching arms SA21 to SA23 are formed by -Q23a and Q21b-Q23b. The AC generator 22 is connected to AC input points Piu, Piv, and Piw as AC connection points between the switching elements Q21a and Q21b, between the switching elements Q22a and Q22b, and between the switching elements Q23a and 23b of each switching arm S21 to S23. It is connected. Furthermore, diodes D21a to D23b are connected in antiparallel to the switching elements Q21a to Q23b, and resonance capacitors C21a to C23b are connected in parallel to the switching elements Q21a to Q23b.

The AC-DC power conversion circuit 21 and the bidirectional switching elements SWu1 to SWw1 are driven and controlled by the control device 5.
According to the second embodiment, when the charge amount of the large-capacity capacitors C1 and C2 falls below a predetermined value, the AC generator 22 is rotationally driven. The three-phase AC power generated by the AC generator 22 is full-wave rectified by controlling the switching elements Q21a to Q23b of the switching arms SA21 to SA23 of the AC-DC power conversion circuit 21 by the control device 5. Is converted into DC power, and the large-capacity capacitors C1 and C2 are charged by the DC power.

  When charging the large-capacity capacitors C1 and C2, like the DC-AC power conversion circuit 3 described above, any one of the switching elements Q21a and Q21b, Q22a and Q22b, and Q23a and Q23b of each switching arm SA21 to SA23 is switched. When the current is caused to flow, any one of the bidirectional switching elements SWu, SWv and SWw corresponding to the switching arms SA21 to SA23 is turned on first, and the resonance inductor L1 and the resonance capacitors C21a or C21b, C22a or C22b and C23a and A resonance phenomenon is generated with Q23b. In this resonance state, any one of the switching elements Q21a and Q21b, Q22a and Q22b, and Q23a and Q23b can be switched to realize a zero voltage switching state. In principle, the switching elements Q21a and Q21b are switched. Loss can be zero.

In this case, not only charging the large-capacity capacitors C1 and C2 with the alternating-current power generated by the alternating-current generator 22, but also continuously charging the alternating-current motor 4 with the large-capacity capacitors C1 and C2 being charged. The AC motor 4 can also be rotationally driven by the AC power generated by the AC generator 22 by being rotationally driven.
Further, the DC-AC power conversion circuit 3 can be rotationally driven by the drive control of the controller 5 as in the first embodiment described above.

According to the second embodiment, the AC generator 22 is rotationally driven by an internal combustion engine such as an engine mounted on a vehicle, and the AC electric motor 4 is connected to the differential gear via a speed reduction mechanism as required. By driving the wheel, it can be used as a hybrid electric vehicle.
In the first and second embodiments, the case where the switching prohibiting means included in the control device 5 is configured by hardware has been described. However, the present invention is not limited to this, and as shown in FIG. The switching prohibiting means can be configured by software.

That is, the control device 5 includes a microcomputer, and the microcomputer performs the commutation control process shown in FIG.
This commutation control process is executed as a timer interrupt process for each predetermined time (for example, 10 msec) with respect to a predetermined main program. First, in step S1, pulse signals PSu to Psw are read, and then the process proceeds to step S2. Then, it is determined whether there is a phase to be commutated from the on state to the off state or vice versa. If there is a phase to be commutated, the process proceeds to step S3.

In step S3, it is determined whether or not the count value N is “0”. When N = 0, the process proceeds to step S4, and the x-th phase switching command to be commutated is transferred to each phase. Is output to the commutation control unit (not shown) to be controlled, and then the process proceeds to step S5, the count value N is set to a predetermined value Ns corresponding to the predetermined time t ₀ , and the timer interrupt process is terminated. To return to the predetermined main program.
Further, when the determination result in step S3 is N> 0, it is determined that the commutation process is being performed, the process proceeds to step S6, and the x-th phase to be commutated is stored in the commutation reserved phase storage area. From step S7 to step S7, and if a reservation has been made, the flow proceeds directly to step S8. In step S7, the count value N is decremented by "1", and then the timer interrupt process is terminated and the process returns to a predetermined main program.

  On the other hand, if the determination result of step S2 described above does not include a commutating phase, the process proceeds to step S8, and the commutation reserved phase y is stored in the commutation reserved phase storage area formed in the storage device. If the commutation reservation phase y is not stored, the process proceeds to step S9, where it is determined whether the count value N is greater than 0, and when N = 0, the timer interrupt process is performed as it is. To return to the predetermined main program. When N> 0, the process proceeds to step S7.

Further, when the determination result in step S8 indicates that the commutation reserved phase is stored in the commutation reserved phase storage area, the process proceeds to step S10.
In this step S10, it is determined whether or not the count value N is “0”. When N> 0, the process proceeds to step S7, where the count value N is decremented, and when N = 0, step S10 is performed. The process proceeds to S11, and a switching command for the commutation reserved phase k is output to a commutation control unit (not shown) that controls the commutation of each phase, and then the process proceeds to Step S12.

In this step S12, the commutation reserved phase k stored in the above-mentioned commutation reserved phase storage area formed in the storage device is deleted, then the process proceeds to step S13, and the count value N is set to the predetermined value Ns. After that, the timer interrupt process is terminated and the program returns to the predetermined main program.
In the commutation control process of FIG. 6, as shown in FIG. 4 described above, the U phase is commutated from the off state to the on state while the V phase is being turned off. explain. Assume that the count value N is cleared to “0” and no V-phase reservation is stored in the reserved storage area of the storage device.

In this state, first, when the V-phase pulse signal PSv is inverted from the on state to the off state at time t1, the V-phase pulse signal PSv is in the on state when each of the phase pulse signals PSu to PSw is read in step S1. Since the count value N is “0”, the process shifts to step S4. In this step S4, a switching command is output to a commutation processing unit (not shown) for performing commutation processing on the V phase to be commutated, and then a count value corresponding to a predetermined time t ₀ as a count value N. Ns is set. As a result, the V-phase commutation process is started.

After that, there is no commutation phase until time t2, so the process proceeds from step S2 to step S9, and there is no commutation reservation phase, so the process proceeds to step S10, and the count value N has just been set to the predetermined value Ns. Therefore, the process proceeds to step S8, the count value N is decremented, the timer interrupt process is terminated, and the process returns to the predetermined main program.
After that, since the U-phase pulse signal PSu is inverted from the OFF state to the ON state at time t2, the process proceeds from step S2 to step S3, and N> 0. Therefore, the process proceeds to step S6 and the U phase is changed to the commutation reserved phase. Is stored in the commutation reserved phase storage area, the process proceeds to step S7, the count value N is decremented, the timer interrupt process is terminated, and the process returns to the predetermined main program.

Thereafter, since commutation reservation has been made for the U phase, the process proceeds from step S2 to step S8. Since there is a commutation reservation phase, the process proceeds to step S10, and since N> 0, the process proceeds to step S7. Then, the decrement of the count value N is continued.
When the count value N becomes “0” at time t3, the process proceeds from step S10 to step S11 to output a commutation command for the U phase that is the commutation reserved phase, and then the process proceeds to step S12. After deleting the U phase stored in the reserved phase storage area, the timer interrupt process is terminated and the process returns to the predetermined main program.

Therefore, even in the commutation process of FIG. 6, when a phase is in the commutation operation as in FIG. 5 described above, the other phase is prohibited from performing the commutation operation, and the resonance inductor L1 is It is possible to reliably prevent the occurrence of a phenomenon in which the resonance capacitors of the other phases are short-circuited via the bidirectional switches SWu to SWw generated by sharing the three phases.
In the first and second embodiments, the case where the DC power supply circuit 2 is configured by the batteries B1 and B2 or the large-capacity capacitor C1PC2 has been described. However, the present invention is not limited to this. A power generator that can directly generate DC power can be applied, and a battery voltage can be boosted by applying a DC boost chopper circuit.

  In the first and second embodiments, the case where an insulated gate bipolar transistor (IGBT) is applied as a switching element has been described. However, the present invention is not limited to this, and a power MOSFET, Switching elements such as a gate turn-off thyristor (GTO) and a static induction transistor (SIT) can be applied.

  DESCRIPTION OF SYMBOLS 1 ... Power converter device, 2 ... DC power supply circuit, B1, B2 ... Battery, 3 ... DC-AC power converter circuit, Q11a-Q13a, Q11b-Q13b ... Switching element, D11a-D13a, D11b-D13b ... Diode, C11a C13a, C11b to C13b ... resonance capacitor, 4 ... AC motor, L1 ... resonance inductor, 5 ... control device, 6 ... pulse formation circuit, 7u-7w ... D-type flip-flop circuit, 8u-8w ... gate signal formation Circuits: 9u-9w: monostable circuit, 10u-10w: logical sum circuit, 11u-11w: logical product circuit, 21: AC-DC power conversion circuit, Q21a-Q23a, Q21b-Q23b ... switching elements, D21a-D23a , D21b to D23b ... diode, C21a to C23a, C21b to C23b ... resonance Capacitor, 22 ... AC generator

Claims (3)

A DC power supply circuit connected in series between the positive electrode side line and the negative electrode side line;
A power conversion circuit connected between the positive electrode side line and the negative electrode side line and having at least one of a DC-AC conversion function for converting DC power into AC power and an AC-DC conversion function for converting AC power into DC power; A power conversion device comprising:
The power conversion circuit includes a switching element for the number of AC phases, a diode connected in antiparallel with each switching element, and an arm having a resonance capacitor connected in parallel with the diode, the positive line and the arm A switching arm connected in series to the negative electrode side line has a configuration in which the number of AC phases is connected in parallel,
One end of an inductor is connected to an intermediate potential point of the DC power supply circuit, and the other end is connected to an AC connection point between the arms of each switching arm via a bidirectional switching element that can be switched bidirectionally. A power converter characterized by that.   A power conversion control unit that drives and controls each switching element that constitutes each switching arm of the power conversion circuit, and the power conversion control unit finishes outputting a switching command to the switching element that constitutes at least one switching arm; 2. The power conversion device according to claim 1, further comprising a switching prohibiting unit that prohibits a switching operation for the switching element of another phase for a predetermined period of time. A DC power supply circuit, and a power conversion circuit having at least one of a function of converting direct current to alternating current and a function of converting alternating current to direct current,
The power conversion circuit includes a switching element for the number of AC phases, a diode connected in antiparallel with each switching element, and an arm having a resonance capacitor connected in parallel with the diode, the positive line and the arm A switching arm connected in series to the negative electrode side line has a configuration in which the number of AC phases is connected in parallel,
One end of an inductor is connected to an intermediate potential point of the DC power supply circuit, and the other end of the inductor is connected to an AC output point between the arms of each switching arm via a bidirectional switching element that can be switched bi-directionally. A method for controlling a power converter having a connected configuration,
Control of a power converter characterized by prohibiting a switching operation for a switching element of another phase for a predetermined period after outputting a switching command from the power conversion controller to the switching elements constituting the at least one switching arm. Method.

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