JP2011078193A - Video display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a video display device that adjusts suppression of either of the occurrence of EMI in a power supply or the rise in the temperature of a switching element, according to power that the power supply supplies to a video display panel. <P>SOLUTION: A television receiver X includes a liquid crystal panel 18 which displays a video, and a DC-DC converter 10 which includes FETs 11a and 11b that control power to be supplied to the liquid crystal panel 18 by performing switching action by an inputted switching signal. The DC-DC converter 10 switches the existence and absence of short-circuit between both ends of resistances 12a and 12b for gates by switches 13a and 13b according to power to be supplied to the liquid crystal panel 18, thereby setting the resistance value of an input path for switching signals to the FETs 11a and 11b. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a video display device including a DC power source that changes a voltage applied to a video display panel by a DC-DC converter including a switching element that operates at a high frequency, and more particularly, to suppress the amount of EMI generated in the DC power source. It is related to the technology to plan.

Generally, in a liquid crystal display device (an example of a video display device) that includes a liquid crystal panel that displays an image, the transmittance of each liquid crystal element is changed according to the gradation of the image when the image is displayed on the liquid crystal panel. Therefore, it is necessary to apply a voltage corresponding to the transmittance of each liquid crystal element from the power supply device to the liquid crystal panel. In such a power supply device used for a liquid crystal display device, since energy conversion efficiency when converting an input DC voltage into another DC voltage is important, switching is not a linear DC-DC converter. A DC-DC converter provided with an element (MHz order) is employed. In order to operate the switching element of the DC-DC converter, a high-frequency switching signal (pulse signal) is sent to the control terminal (gate) of the switching element.
In such a power supply device, electromagnetic noise (hereinafter abbreviated as EMI (Electro-Magnetic Interference)) is generated due to high-speed current fluctuation due to high frequency (several MHz). At this time, the amount of EMI generated increases the amplitude of the overshoot / undershoot (or spike-like spike noise) of the switching signal input to the switching element, and the overshoot / undershoot of the output current of the switching element. Increases with increasing amplitude.
As a countermeasure against the occurrence of EMI, there is a method of increasing the resistance value on the input path of the switching signal to the switching element. By increasing the resistance value on the input path, the amplitude of the overshoot / undershoot of the switching signal input to the switching element is reduced, and the overshoot / undershoot of the output current of the switching element is also reduced. Generation of EMI by the switching element can be suppressed.
However, as the switching signal resistance to the switching element increases, the switching element loss (drain loss) increases and the switching element temperature rises as the switching signal rise and fall times increase. Resulting in.
Therefore, in Patent Document 1, for example, the resistance value of the control terminal of the switching element is changed in accordance with each state of the printer when it is activated and when it is not activated, thereby suppressing either the generation of EMI or the temperature rise of the switching element It has been proposed to adjust.

JP 2006-158077 A

However, the method described in Patent Document 1 is different from the method of an image display device having a liquid crystal panel in that the power supplied by the power supply device varies from moment to moment even after the power is turned on, depending on the display content of the liquid crystal panel. It is not considered whether to suppress generation of EMI or temperature rise of the switching element in consideration of the above.
Accordingly, the present invention has been made in view of the above circumstances, and an object of the present invention is to determine whether the power supply device suppresses generation of EMI or temperature rise of the switching element in the power supply device. An object of the present invention is to provide a video display device that can be adjusted according to the power supplied to the camera.

To achieve the above object, the present invention provides a power supply apparatus including a video display panel for displaying video and a switching element for controlling power supplied to the video display panel by performing a switching operation according to an input switching signal. And a resistance value setting means for setting a resistance value of an input path of the switching signal to the switching element according to the power supplied from the power supply device to the video display panel. Is done.
The video display device according to the present invention may be configured to increase the resistance value of the input path with emphasis on EMI countermeasures according to the power supplied to the video display panel by the power supply device that varies from moment to moment, The resistance value of the input path can be set to be lowered with emphasis on measures for increasing the temperature of the element. As a specific example, when a DC-DC converter is used as the power supply device and a field effect transistor (FET) is used as the switching element, the power consumption of the video display panel connected to the power supply device varies. By changing the resistance value of the input path of the gate terminal of the FET according to the above, an operation state that emphasizes suppression of EMI caused by high-speed operation of the FET and emphasis on suppression of temperature rise caused by FET drain loss The operating state can be changed as appropriate. However, if the resistance value connected to the input path of the gate terminal is increased too much for EMI countermeasures, the FET temperature may increase too much due to drain loss.
Therefore, the video display device according to the present invention further includes temperature detection means for detecting the temperature of the video display panel and / or the power supply device, and the resistance value setting means is detected by the temperature detection means. It is desirable that the resistance value of the input path is set so that the temperature is lower than a predetermined temperature threshold value set in advance. Thereby, EMI can be suppressed as much as possible while preventing the temperature of the video display panel, the power supply device, and the like from exceeding the predetermined temperature threshold.
More preferably, it is conceivable that the video display device according to the present invention further comprises temperature threshold setting means for setting the predetermined temperature threshold. In this case, since the predetermined temperature threshold can be changed by the temperature threshold setting means according to the place where the video display device is installed, the balance between the EMI countermeasure and the temperature rising countermeasure can be changed. it can. For example, when the video display device is mounted in an automobile, the EMI due to other devices is large and the influence of EMI due to the video display device is low. On the other hand, the temperature rise in the vehicle tends to be a problem. By setting the temperature threshold value to be relatively low, it is possible to perform an operation with an emphasis on temperature rise rather than EMI countermeasures. In addition, when the video display device is installed in a hospital, the temperature rise is suppressed by an air conditioner or the like, but the influence of EMI on other devices is large, so the predetermined temperature threshold is set relatively high. As a result, it is possible to operate with an emphasis on measures against EMI rather than temperature rise.

Specifically, the resistance value setting means of the present invention includes one or more resistors connected on the input path and a plurality of the resistors connected in parallel, and the presence or absence of a short circuit at both ends of the resistors. And switching the presence or absence of short-circuits at both ends of each of the resistors by the plurality of resistor switching switches according to the power supplied to the video display panel by the power supply device. And a resistance control means for setting the resistance value of the video display device. In this case, the resistance control means changes the number of the resistors through which a switching signal (pulse signal) input to the switching element passes by the plurality of resistance changeover switches, whereby the resistance value of the input path is changed. Will be changed.
Incidentally, the current value flowing from the power supply device to the video display panel corresponds to the power consumption of the video display panel. Therefore, the video display device according to the present invention further includes current detection means for detecting a current value supplied to the video display panel, and the resistance value setting means is detected by the current detection means. It can be considered that the higher the current value, the larger the resistance value of the input path. Accordingly, the resistance value of the input path can be set according to the power supplied from the power supply device to the video display panel. Therefore, the EMI according to the fluctuation of the power supplied from the power supply device to the video display panel. A balance between countermeasures and temperature rise countermeasures can be achieved.

The resistance value setting means may set the resistance value of the input path according to the display content of the video display panel. That is, since the power consumption of the video display panel varies depending on the display content (for example, the brightness of the video, the presence or absence of video information), by setting the resistance value of the input path according to the display content, It is possible to achieve a balance between EMI countermeasures and temperature rise countermeasures according to the power supplied from the power supply device to the video display panel.
Specifically, the resistance value setting means sets a resistance value of the input path when an image is not displayed on the image display panel to be smaller than a resistance value of the input path when an image is displayed on the image display panel. It is thought that it is what to do. Also, during the blanking period, it is conceivable to set the resistance value lower than during video display. In this case, the power consumption of the video display panel is greater when displaying the video than when displaying no video, so the resistance value of the input path when displaying no video is displayed. By making it lower than the resistance value of the input path, it is possible to balance EMI countermeasures and temperature rise countermeasures.
In addition, the video display device according to the present invention further includes an average gray level calculating unit that calculates an average gray level of video to be displayed on the video display panel within a predetermined period for each predetermined period. It is conceivable that the resistance value setting means sets the resistance value of the input path according to the average value calculated by the average gradation calculation means. For example, by setting the resistance value of the input path according to the video content for each horizontal line to be displayed, the EMI countermeasure and the temperature rise countermeasure are appropriately set according to the power supplied to the video display panel by the power supply device. Can be balanced. In general, when the image display panel is a normally black liquid crystal display panel, the power consumption increases as the average value of gradation is closer to white. When the image display panel is normally white, the average of gradation is higher. The closer the value is to white, the lower the power consumption.

  According to the present invention, it is possible to adjust whether the generation of EMI in the power supply device or the temperature rise of the switching element is suppressed according to the power supplied to the video display panel by the power supply device. .

1 is a block diagram illustrating a schematic configuration of a television receiver X that is an example of a video display device according to an embodiment of the present invention. The sequence diagram of the timing of EMI generation in the television receiver X, and the timing which changes resistance value. The principal part enlarged view of the sequence of the timing of EMI generation of FIG. 2, and the timing which changes resistance value.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings so that the present invention can be understood. The following embodiment is an example embodying the present invention, and does not limit the technical scope of the present invention.

First, the configuration of the television receiver X according to the embodiment of the present invention will be described with reference to the schematic configuration diagram shown in FIG.
As shown in FIG. 1, the television receiver X includes a DC-DC converter 10, a liquid crystal panel 18, a liquid crystal drive unit 19, a current detector 21, a thermometer 22, a mode switching setting unit 24, a load determination unit 25, A T-CON 40, a video memory 41, and the like are provided.
The DC-DC converter 10 includes an FET 11a, an FET 11b, gate resistors 12a and 12b, switches 13a and 13b, a pulse signal generator 14, a gate resistance control unit 15, an input capacitor 16a, an output capacitor 16b, a coil 17, and a DC power supply 31. I have. The DC-DC converter 10 is an example of a power supply device.
The liquid crystal panel 18 is provided corresponding to each pixel, and includes a large number of liquid crystal elements whose light transmission amount varies according to the applied voltage. The liquid crystal panel 18 corresponds to the voltage applied to the liquid crystal element of each pixel. It is an example of the image | video display panel which displays an image | video. The video display device according to the present invention is not limited to a liquid crystal display device having a liquid crystal panel, and a video display device having a plasma display, a cathode ray tube, an organic EL (Electro-Luminescence) display, etc. It is an example of an apparatus.
The liquid crystal drive unit 19 turns on and off the transistors arranged corresponding to the respective pixels of the liquid crystal panel 18 to apply voltages to the liquid crystal elements (voltages applied to each horizontal line (scan line) of the liquid crystal panel 18). A certain scanning signal voltage and a display signal voltage that is a voltage applied to each pixel of the liquid crystal panel 18 are controlled to display an image. The liquid crystal driving unit 19 converts the level of the DC voltage of the DC-DC converter 10 by using a shift register having more registers than the number of scanning lines of the liquid crystal panel 18 and the gate of each liquid crystal element of the liquid crystal panel 18. And a level converter for applying. Note that all the registers other than the first number register and the last number register of the shift register of the liquid crystal driving unit 19 correspond to the scanning lines of the liquid crystal panel 18, and the values of the registers (0 or 1). ) To the level converter of the liquid crystal drive unit 19. Further, the level converter of the liquid crystal driving unit 19 converts a DC voltage according to the value (0 or 1) of each register, and applies the gate of each liquid crystal element of the liquid crystal panel 18.
The DC power source 31 converts, for example, a commercial AC voltage (AC 100 V) into a predetermined DC voltage and outputs it.
The input capacitor 16 a removes a noise component of the current supplied from the DC power supply 31.
When the FET 11a is turned on, the coil 17 stores the current flowing from the DC power source 31 as magnetic field energy. When the FET 11a is turned off, the coil 17 discharges the stored magnetic field energy and causes the current to flow to the output capacitor 16b and the liquid crystal drive unit 19 side. Thereby, in the DC-DC converter 10, the output voltage from the DC power supply 31 is boosted by the superposition of the magnetic field energy by the coil 17. The output capacitor 16b converts the output voltage from the coil 17 into a smoothed DC voltage.

The FETs 11a and 11b are examples of switching elements that control the power supplied to the liquid crystal panel 18 by performing a switching operation for switching the presence / absence of energization between the source and the drain in accordance with a switching signal input to the gate.
Specifically, the FET 11a energizes between the source and drain when the voltage value applied to the gate is higher than a predetermined value (for example, 0.7V). On the other hand, when the voltage value applied to the gate is lower than a predetermined value (for example, 0.7 V), the FET 11b energizes between the source and the drain. Accordingly, the switching operations of the FET 11a and the FET 11b based on the switching signal input from the pulse signal generator 14 described later are in conflict with each other.
When the source and drain of the FET 11a are energized, the current flowing from the DC power source 31 to the coil 17 is accumulated as magnetic field energy in the coil 17, and when the source and drain are not energized, the magnetic field energy accumulated in the coil 17 is accumulated. Is released. When the source and drain of the FET 11a are not energized, the voltage applied to the gate of the FET 11b is lower than a predetermined value, and the source and drain of the FET 11b is energized, so that it is discharged from the coil 17. The magnetic field energy becomes a current and flows to the output capacitor 16b and the liquid crystal drive unit 19 via the source and drain of the FET 11b. As described above, the energization / non-energization between the source and drain of the FET 11a and FET 11b is repeated, so that the DC voltage applied by the DC power source 31 is once accumulated as magnetic field energy in the coil 17, and then is output in the output capacitor 16b. Smoothed and converted to a converted DC voltage, which is applied to the liquid crystal drive unit 19.

  The pulse signal generator 14 generates a pulse signal having a duty ratio (ON ratio with respect to OFF) corresponding to the voltage according to the voltage applied to each liquid crystal element of the liquid crystal panel 18 by the liquid crystal driving unit 19, and the FET 11 a, 11b is input as a switching signal. As a result, the time during which the current flows between the source and drain of the FET 11a changes, so that the amount of magnetic field energy accumulated in the coil 17 changes and the voltage applied to the liquid crystal panel 18 can be controlled. Specifically, when the voltage applied to the liquid crystal panel 18 is increased, the duty ratio is increased, and when the applied voltage is decreased, the duty ratio is decreased. For convenience of explanation, two pulse signal generators 14 are shown in FIG. 1, but one may be used.

Each of the gate resistors 12a and 12b is a resistance element connected in series on the input path of the switching signal from the pulse signal generator 14 to the gates of the FETs 11a and 11b. As the resistance value on the input path of the switching signal to the gates of the FETs 11a and 11b increases, the rise time and fall time of the pulse sent from the pulse signal generator 14 to the gates of the FET 11a and FET 11b become longer. On the other hand, the smaller the resistance value on the input path of the switching signal to the gates of the FETs 11a and 11b, the overshooting and undershooting of the switching signals from the pulse signal generator 14 to the gates of the FETs 11a and 11b and the output currents of the FETs 11a and 11b. The shoot gets bigger. Hereinafter, the resistance value of the input path of the switching signal to the gates of the FETs 11a and 11b is referred to as a gate resistance.
For example, the gate resistors 12a and 12b may have the same resistance value or different resistance values such as 10KΩ, 20KΩ, 30KΩ, and 50KΩ. Each of the gate resistors 12a and 12b may be connected not only in series but also in parallel or in a combination of series and parallel. The gate resistors 12a and 12b are an example of one or a plurality of resistors connected on the input path.
Each of the switches 13a and 13b is an example of a resistance changeover switch that is connected in parallel to each of the gate resistors 12a and 12b and switches between the presence and absence of a short circuit at both ends of each of the gate resistors 12a and 12b. The gate resistance of the FET 11a and FET 11b is changed by the switching operation of the switches 13a and 13b.

The video memory 41 temporarily stores video information for each line to be displayed on the liquid crystal panel 18.
A T-CON (Timing-CONtroller) 40 generates and outputs a pulse signal such as a clock for driving each element of the liquid crystal panel 18 by the liquid crystal driving unit 19. At that time, the T-CON 40 also generates and outputs an inverted pulse signal obtained by inverting the voltage applied to the liquid crystal panel 18 for each frame or line in order to prevent deterioration of the liquid crystal molecules. Further, the T-CON 40 rearranges the received video signal and the signal of the video memory 41 into a format in which each element of the liquid crystal panel 18 can correctly represent an image and a color, and sends a signal to the liquid crystal drive unit 19. Send. Further, in the T-CON 40, the rising and falling timings of the pulses input to the gates of the FETs 11a and 11b overlap with the timings for switching the switches 13a and 13b, and noise that causes EMI is superimposed on the switching signal. In order to prevent this, a clock signal for switching on / off of the switches 13a and 13b is output to the gate resistance control unit 15 at a timing different from the rising and falling timings of the pulses input to the gates of the FETs 11a and 11b. To do. Further, the T-CON 40 outputs information stored in the video memory 41 to the liquid crystal drive unit 19 and the load determination unit 25.
The current detector 21 detects a current value that flows when the DC voltage converted by the DC-DC converter 10 is applied to the liquid crystal drive unit 19, and outputs the detected current value to the load determination unit 25. The fluctuation of the current value detected by the current detector 21 is proportional to the fluctuation of the voltage applied when the liquid crystal panel 18 changes the transmittance of each liquid crystal element according to the gradation of the display image. The current detector 21 is an example of current detection means.
The thermometer 22 measures the temperature of the liquid crystal panel 18, the DC-DC converter 10, and the television receiver X, and receives the temperature value output from another temperature detection unit (overheat prevention circuit, not shown). The temperature value is output to the load determination unit 25. The thermometer 22 is an example of temperature detection means.

The load determination unit 25 outputs a gate resistance control signal for controlling on / off of the switches 13 a and 13 b to the gate resistance control unit 15 according to the power supplied from the DC-DC converter 10 to the liquid crystal panel 18. Specifically, the load determination unit 25 responds to the current value output from the current detector 21, the temperature value output from the thermometer 22, and a preset upper limit temperature (an example of a predetermined temperature threshold). The gate resistance control signal for controlling on / off of the switches 13a and 13b is output to the gate resistance control unit 15.
The gate resistance control unit 15 sets the gate resistance by switching the switches 13a and 13b on and off in accordance with the gate resistance control signal from the load determination unit 25 and the clock signal from the T-CON 40. Specific operations of the load determination unit 25 and the gate resistance control unit 15 will be described in detail later.
The mode switching setting unit 24 presets the upper limit temperature used as a determination index in the load determination unit 25 and inputs the preset upper limit temperature to the load determination unit 25. Here, the mode switching setting unit 24 for setting the upper limit temperature corresponds to a temperature threshold setting means. Specifically, the mode switching setting unit 24 sets an upper limit temperature in advance according to a setting content related to a user operation to an operation input unit such as a remote controller (not shown) or an operation of the television receiver X. Of course, the upper limit temperature may be set initially when the television receiver X is manufactured.

Hereinafter, an example of the operation of the DC-DC converter 10 in the television receiver X will be described with reference to FIGS. 2 and 3.
Here, the load determination unit 25 outputs a gate resistance control signal to the gate resistance control unit 15 based on the current value output from the current detector 21 and the temperature value output from the thermometer 22, and the FET 11a. The case where the gate resistance of the FET 11b is changed by the gate resistance control unit 15 will be described as an example. Since the effects of the overshoot and undershoot of the switching signals input to the gates of the FETs 11a and 11b on the amount of EMI generated are the same, here, only the case of overshoot is taken as an example and illustrated. Give an explanation.
2A shows GCK (gate clock signal), FIG. 2B shows GSP (gate start pulse), FIG. 2C shows source driver analog voltage AVDD (Vout), and FIG. 2D shows FET 11a gate signal. , (E1) is the drain voltage of the FET 11a (voltage before smoothing for applying the liquid crystal panel 18), (e2) is the drain voltage of the FET 11b, and (f) is the gate resistance control signal output by the gate resistance control unit 15. , (G) are temperature information signals output from the thermometer 22.
GCK and GSP are control signals for driving the liquid crystal drive unit 19 when displaying an image on the liquid crystal panel 18. The gate resistance control signal indicates information related to the number of switches 13a and 13b that the gate resistance control unit 15 is turned off. The larger the value, the more the gate resistance control signal is connected in series on the input path of the switching signal to the FETs 11a and 11b. The number of resistors 12a and 12b increases, and the gate resistance of the FETs 11a and 11b increases.

First, as shown in FIGS. 2A and 2B, GSP and GCK are input from the T-CON 40 to the liquid crystal drive unit 19, and the shift register of the liquid crystal drive unit 19 sets the signal level of GSP at the rising edge of GCK. The 1-bit signal of the fetch start register is used, and the 1-bit signal is shifted to the subsequent register at the timing when GCK falls. Thereafter, when the value of the register corresponding to the scanning line of the liquid crystal panel 18 of the shift register becomes 1, the level converter of the liquid crystal driving unit 19 applies the gate of each liquid crystal element of the scanning line by a DC voltage. The line is turned on and writing of one line image is started. At this time, near the timing when GCK falls, the power to be supplied to the liquid crystal panel 18 by the liquid crystal panel 18 to fluctuate the transmittance of each liquid crystal element becomes large, and the analog voltage AVDD for the source driver is insufficient (see FIG. 2 (c)).
Therefore, in the portion where the value of the source driver analog voltage AVDD is low, the liquid crystal driving unit 19 uses the switching signal generated by the pulse signal generator 14 in order to secure the applied voltage (load) necessary for the liquid crystal panel 18. The duty ratio is increased to increase the drain currents of the FET 11a and FET 11b. At this time, in the DC-DC converter 10, the voltage applied to the liquid crystal panel 18 from the liquid crystal drive unit 19 in order to display an image on the liquid crystal panel 18 is generated by the switching operation of the FETs 11a and 11b based on the high-frequency switching signal. (See FIG. 2 (d)). Here, as described above, the amount of EMI generated in the FETs 11a and 11b increases as the drain voltage overshoot and undershoot of the FETs 11a and 11b increase, that is, the power supplied from the DC-DC converter 10 to the liquid crystal panel 18 increases. It will increase. In particular, as the power supplied from the DC-DC converter 10 to the liquid crystal panel 18 increases, the overshoot and undershoot of the drain voltages of the FETs 11a and 11b due to the overshoot and undershoot of the switching signals input to the gates of the FETs 11a and 11b. The effect of.

Therefore, in the DC-DC converter 10, the load discriminating unit 25 and the gate resistance control unit 15 provide power (load) that the DC-DC converter 10 supplies to the liquid crystal panel 18 so as to suppress the amplitude of overshoot of the FETs 11a and 11b. ) To set the gate resistances of the FETs 11a and 11b. Specifically, the load determination unit 25 and the gate resistance control unit 15 increase the gate resistance of the FETs 11a and 11b and decrease the power supplied to the liquid crystal panel 18 as the power supplied from the DC-DC converter 10 to the liquid crystal panel 18 increases. The gate resistances of the FETs 11a and 11b are set lower.
More specifically, the load determination unit 25 controls the gate resistance according to the current value detected by the current detector 21 serving as a determination index of the magnitude of power supplied from the DC-DC converter 10 to the liquid crystal panel 18. The value of the gate resistance control signal output to the unit 15 is controlled in the range of “0” to “3”. The gate resistance control unit 15 switches whether the gate resistors 12a and 12b are short-circuited by the switches 13a and 13b according to the gate resistance control signal, thereby switching the gate resistors 12a and 12b connected to the FETs 11a and 11b. The gate resistance of each of the FETs 11a and 11b is set by switching the number.
Here, the gate resistance control unit 15 and the load determination unit 25 when performing such an operation are examples of resistance control means, and the gate resistors 12a and 12b, the switches 13a and 13b, the gate resistance control unit 15 and the load determination unit 25. Is an example of resistance value setting means.

Thereby, when the electric power supplied from the DC-DC converter 10 to the liquid crystal panel 18 is large, the overshoot in the FETs 11a and 11b can be suppressed, and the amount of EMI generated can be suppressed.
Specifically, when the image is written by the liquid crystal driving unit 19 and the source driver analog voltage AVDD is lowered, that is, at the timing when the power supplied to the liquid crystal panel 18 is increased, the gate resistance control unit 15 and the load determination unit. 25, the higher the current value detected by the current detector 21, the higher the gate resistance of the FETs 11a and 11b. For example, in the example shown in FIG. 2, after the first GCK is input, the gate resistance control signal is changed from “0” to “3” (FIG. 2 (f)).
FIG. 3 is an enlarged view of the broken line part of FIGS. 2 (c) to (e2). As shown in FIG. 3, when the gate resistances of the FETs 11a and 11b are set high in response to an increase in the current value detected by the current detector 21, the rise of the gate signals of the FETs 11a and 11b is reduced (slowly). (See the broken line portion in FIG. 3D). Therefore, the overshoot of the gate signals of the FETs 11a and 11b in the meantime is reduced, and the overshoot in the drain voltage is reduced (see the broken lines in FIGS. 3 (e1) and (e2)), and the generation of EMI in the FETs 11a and 11b. The amount is suppressed.

By the way, when the gate resistance of the FETs 11a and 11b is increased and the rise time of the FETs 11a and 11b is stopped and the transition time becomes longer, the temperature of the FETs 11a and 11b increases due to drain loss.
Therefore, the load discriminating unit 25 and the gate resistance control unit 15 have not only the current value detected by the current detector 21 but also the liquid crystal panel 18, the DC-DC converter 10, and the television receiver X detected by the thermometer 22. Based on this temperature, the gate resistances of the FETs 11a and 11b are set so that the temperature detected by the thermometer 22 is lower than the preset upper limit temperature. Here, the case where the upper limit temperature is set in advance to 50 ° C. by the mode switching setting unit 24 will be described as an example.

In this case, as shown in FIG. 2G, when the temperature information signal from the thermometer 22 indicates that the temperature is “30” ° C. lower than the upper limit temperature, the load determination unit 25 A gate resistance control signal that determines the gate resistance of the FETs 11 a and 11 b is set in a range of “0” to “3” according to the current value detected by the current detector 21.
For example, after the first GCK signal in FIG. 2 is input, since the source driver analog voltage AVDD is greatly reduced and the power supplied to the liquid crystal panel 18 is increased, the gate resistance control signal is set to the maximum “3”. Is set. As a result, all the gate resistors 12a and 12b are connected to the gates of the FETs 11a and 11b, and the gate resistance becomes the maximum value. As a result, the amount of EMI generated in the FETs 11a and 11b is most suppressed.

On the other hand, as shown in FIG. 2G, when the temperature information signal from the thermometer 22 indicates that the temperature is “50” ° C. which is equal to or higher than the upper limit temperature, the load determination unit 25 The resistance control signal is set in a range having an upper limit set in advance as an upper limit. This upper limit value is set in advance as a value that can maintain the temperature detected by the thermometer 22 in a state lower than the upper limit temperature. For example, the upper limit value may be set according to the results of experiments and simulations performed in advance. Here, it is assumed that the upper limit value of the gate resistance control signal is “2”.
In this case, after the third GCK signal in FIG. 2 is input, the source driver analog voltage AVDD is greatly reduced and the power supplied to the liquid crystal panel 18 is large as in the case of the input of the first GCK signal. Thus, although the gate resistance control signal should be set to the maximum “3”, the load determination unit 25 sets the upper limit value of the gate resistance control signal to “2” according to the temperature detected by the thermometer 22. Limit to. Thereby, in FET11a, 11b, drain loss is reduced and the emitted-heat amount is suppressed, The temperature state that the detection temperature by the thermometer 22 becomes lower than the said upper limit temperature can be maintained.
Therefore, in the DC-DC converter 10, the amount of EMI generated in the FETs 11a and 11b can be suppressed as much as possible while maintaining a state lower than the upper limit temperature “50” ° C.

As described above, according to the television receiver X which is an example of the video display device of the present invention, the power supplied to the liquid crystal panel 18 by the DC-DC converter 10 (here, the current value flowing through the liquid crystal panel 18) is determined. Thus, by increasing or decreasing the resistance value of the input path of the switching signal to the FETs 11a and 11b, the generation of EMI can be suppressed or the temperature rise can be suppressed.
In particular, by limiting the setting range of the resistance value of the input path of the switching signal to the FETs 11a and 11b so that the temperature detected by the thermometer 22 is lower than a preset upper limit temperature, a temperature lower than the upper limit temperature is set. The amount of EMI generated by the FETs 11a and 11b can be suppressed as much as possible while maintaining the state.

In the embodiment, the current value detected by the current detector 21 is used as a judgment index for the magnitude of the power supplied from the DC-DC converter 10 to the liquid crystal panel 18, and the FETs 11a, 11a, The case where the gate resistance of 11b is set has been described as an example.
On the other hand, instead of the current value detected by the current detector 21, the display content of the liquid crystal panel 18 is used as an indicator for determining the amount of power supplied from the DC-DC converter 10 to the liquid crystal panel 18. The gate resistances of the FETs 11a and 11b may be set according to the display content. Of course, it is conceivable to set the gate resistances of the FETs 11a and 11b in accordance with both the current value detected by the current detector 21 and the display content of the liquid crystal panel 18.

For example, the load discriminating unit 25 further includes an average gradation calculation function for calculating an average value of gradations of images displayed on the liquid crystal panel 18 within each period for each horizontal line (an example of a predetermined period). It is conceivable that the gate resistance control signal to be input to the gate resistance control unit 15 is set in accordance with the gradation average of one horizontal line. Note that the load determination unit 25 calculates the average of the gray levels of one horizontal line based on the video data stored in the video memory 41. Here, the load discriminating unit 25 when implementing the average gradation calculation function corresponds to the means.
For example, when the liquid crystal panel 18 is normally black and the gradation of the image is shown in a range of 0 to 255 (corresponding to black to white), the load determination unit 25 has a calculated gradation average of 0 to In the case of 127, the gate resistance control signal is set in the range of “0” to “3”, and in the case where the calculated gradation average is 128 to 255, the gate resistance control signal is set to “0” to “2”. It is conceivable to set within the range.
The line average gradation calculation function provided in the load determination unit 25 is not limited to calculating the average value of the gradation for each horizontal line, and calculates the average value for each frame, every several lines, or every several frames. You may do.

As another example of the display contents of the liquid crystal panel 18, it depends on whether or not the television receiver X operates in a double speed mode for displaying frames that are multiples of frames displayed in a normal use state within a predetermined time. It is also conceivable to set the gate resistance of the FETs 11a and 11b.
Specifically, the load determination unit 25 sets the value of the gate resistance control signal to “0” when operating in the normal mode, and sets the value of the gate resistance control signal to “0” when operating in the double speed mode. It can be considered that the gate resistance of the FETs 11a and 11b is adjusted by setting to “3”. As a result, the amount of EMI generated in the double speed mode in which the power supplied from the DC-DC converter 10 to the liquid crystal panel 18 increases can be suppressed. It is also conceivable to change the settable range of the gate resistance control signal depending on whether the mode is the normal mode or the double speed mode.
In this case, for example, the mode switching setting unit 24 acquires a mode signal indicating an operation mode from a main control unit (not shown) of the television receiver X, and inputs the mode signal to the load determination unit 25. It is possible to do. Thereby, the load determination unit 25 can determine whether the normal mode or the double speed mode is set based on the mode signal.

Furthermore, as another example of the display content of the liquid crystal panel 18, when the television broadcast channel received by the television receiver X and displayed on the liquid crystal panel 18 changes, the video display of the original channel is finished. It is also conceivable to set the gate resistance of the FETs 11a and 11b depending on whether or not it is a period (blank period) from the start of video display to the next channel.
Specifically, the load determination unit 25 sets the gate resistance control signal to “2” when displaying an image on the liquid crystal panel 18, and sets the gate resistance control signal when not displaying the image on the liquid crystal panel 18. It is conceivable to set “0”, which is smaller than when displaying an image on the liquid crystal panel 18. That is, the gate resistances of the FETs 11a and 11b when the image is not displayed on the liquid crystal panel 18 are set smaller than the gate resistances of the FETs 11a and 11b when the image is displayed on the liquid crystal panel 18. Thereby, when an image is displayed on the liquid crystal panel 18, generation of EMI can be suppressed, and when no image is displayed on the liquid crystal panel 18, an unnecessary temperature rise of the FETs 11 a and 11 b can be suppressed. Similarly, it is conceivable to set the gate resistances of the FETs 11a and 11b low in the blanking period in the horizontal synchronizing signal and the vertical synchronizing signal.
In this case, for example, the mode switching setting unit 24 acquires a channel switching signal from the main control unit (not shown) of the television receiver X and inputs the channel switching signal to the load determination unit 25. It is possible to do. Thereby, the load determination unit 25 can determine whether or not an image is displayed on the liquid crystal panel 18 based on the switching signal of the channel.

Here, a configuration will be described in which the user can arbitrarily select a mode for giving priority to the temperature rise of the DC-DC converter 10 or the amount of EMI generation.
First, the mode switching setting unit 24 “a temperature rise suppression mode” that suppresses a temperature rise of the DC-DC converter 10 and an “EMI suppression mode” that suppresses the amount of EMI generated according to the operation of the remote controller or the like by the user. And the contents of the mode are input to the load discriminating unit 25. Note that the “temperature increase suppression mode” is used when importance is placed on suppression of temperature rise rather than EMI suppression, for example, when the television receiver X is used in an automobile. The “EMI suppression mode” is used when emphasis is placed on EMI suppression, for example, when the television receiver X is used in a hospital.
Then, when notified from the mode switching setting unit 24 that the “temperature increase suppression mode” is received, the load determination unit 25 sets the upper limit value of the gate resistance control signal to “2” and sets the mode switching setting. When the fact that the “EMI suppression mode” is notified from the unit 24, the upper limit value of the gate resistance control signal is set to “3”.
Thereby, when the “temperature increase suppression mode” is selected by the user, the load determination unit 25 sets the gate resistance control signal in the range of “0” to “2” with the upper limit value “2”. As a result, the temperature rise of the FETs 11a and 11b is intensively suppressed. On the other hand, when the “EMI suppression mode” is selected by the user, the load determination unit 25 sets the gate resistance control signal in the range of “0” to “3” with the upper limit value “3”. Therefore, the suppression of the generation of EMI in the FETs 11a and 11b is focused on.
It is also conceivable to change the starting point of restriction of the upper limit value of the gate resistance control signal so that the temperature rise of the FETs 11a and 11b is suppressed or the generation amount of EMI is suppressed. For example, when the load determination unit 25 selects the “temperature increase suppression mode” by the user, the upper limit temperature is set to “50” ° C., and when the “EMI suppression mode” is selected, By setting the upper limit temperature to “60” ° C., it is possible to change the start point of limiting the upper limit value of the gate resistance control signal.

By the way, in the above embodiment, when the temperature detected by the thermometer 22 exceeds the upper limit temperature, the upper limit value of the gate resistance control signal is limited, and the liquid crystal panel from the DC-DC converter 10 is within the limit range. The case where the gate resistances of the FETs 11a and 11b are set according to the power supplied to the power supply 18 (the current value detected by the current detector 21) has been described.
On the other hand, the load determination unit 25 stores correspondence information that predetermines the correspondence between the power supplied to the liquid crystal panel 18 and the temperature detected by the thermometer 22 and the gate resistance values of the FETs 11a and 11b. Setting the gate resistances of the FETs 11a and 11b based on the information can be considered as another embodiment.
It is also conceivable to limit the upper limit value of the gate resistance control signal, that is, the upper limit value of the gate resistance of the FETs 11a and 11b, in a plurality of stages depending on the temperature detected by the thermometer 22. For example, the range of the gate resistance control signal is “0-3” until the detected temperature of the thermometer 22 becomes “50” ° C., and the gate resistance control signal is changed until the detected temperature of the thermometer 22 becomes “60” ° C. It is conceivable that the gate resistance control signal is set in the range of “0 to 1” until the temperature detected by the thermometer 22 reaches “70” ° C.

X: Television receiver (an example of a video display device)
10: DC-DC converter (an example of a power supply device)
11a: FET (an example of a switching element)
11b: FET (an example of a switching element)
12a: Gate resistor 12b: Gate resistor 13a: Switch 13b: Switch 14: Pulse signal generator 15: Gate resistance control unit 16a: Input capacitor 16b: Output capacitor 17: Coil 18: Liquid crystal panel (an example of a video display panel)
19: Liquid crystal drive unit 21: Current detector 22: Thermometer 24: Mode switching setting unit 25: Load determination unit 31: DC power supply 40: T-CON
41: Image memory

Claims (8)

A video display panel for displaying video;
A power supply device including a switching element that controls power supplied to the video display panel by performing a switching operation according to an input switching signal;
Resistance value setting means for setting a resistance value of an input path of the switching signal to the switching element in accordance with power supplied from the power supply device to the video display panel;
A video display device comprising: Temperature detecting means for detecting the temperature of the video display panel and / or the power supply device;
The video display according to claim 1, wherein the resistance value setting means sets the resistance value of the input path so that the temperature detected by the temperature detection means is lower than a predetermined temperature threshold value set in advance. apparatus.   The video display device according to claim 2, further comprising temperature threshold setting means for setting the predetermined temperature threshold. The resistance value setting means is
One or more resistors connected on the input path;
A plurality of resistance changeover switches connected in parallel to each of the plurality of resistors, and for switching the presence or absence of a short circuit at both ends of each of the resistors;
Resistor control means for setting the resistance value of the input path by switching presence / absence of a short circuit at both ends of the resistors by a plurality of the resistance changeover switches according to the power supplied to the video display panel by the power supply device. When,
The video display device according to claim 1, comprising: A current detection means for detecting a current value supplied to the video display panel;
5. The video display device according to claim 1, wherein the resistance value setting unit sets the resistance value of the input path to be larger as the current value detected by the current detection unit is higher.   The video display device according to claim 1, wherein the resistance value setting unit sets a resistance value of the input path in accordance with display contents of the video display panel.   The resistance value setting means is configured to set a resistance value of the input path when an image is not displayed on the video display panel to be smaller than a resistance value of the input path when an image is displayed on the video display panel. The video display device according to claim 6. An average gradation calculating means for calculating an average value of gradations of images to be displayed on the image display panel during the predetermined period;
The video display device according to claim 6, wherein the resistance value setting unit sets a resistance value of the input path according to the average value calculated by the average gradation calculation unit.

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