JP2011044836A - Distortion compensation device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a distortion compensation device which can compensate distortion in a wide band by low consumption power. <P>SOLUTION: A distortion compensation circuit includes a digital circuit 10 and an analog circuit 20. The digital circuit 10 is provided with: a digital pre-distortion unit 11 which carries out distortion compensation processing for an input digital signal Sin which is input; a filter 12 which carries out band limitation for output from the digital pre-distortion unit 11; and a DA conversion unit 14 which carries out digital analog conversion for output of the filter 12. The analog circuit 20 is provided with: a main amplifier 21 which amplifies the output of the DA conversion unit 14 of the digital circuit 10; an error amplifier 25 which amplifies signal error between a reference analog signal Sref which is obtained by directly converting the input digital signal Sin to analog one, and the output Sp of the main amplifier; and a subtractor 26 which subtracts an output Se of the error amplifier 25 from the output Sp of the main amplifier 21. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a distortion compensation apparatus that combines a digital predistortion amplifier and a feedforward.

  Digital predistortion (DPD) is a distortion compensation method that generates a distortion compensation signal based on the reverse input / output characteristics of the main amplifier and processes the input signal before being input to the main amplifier to compensate for the distortion of the main amplifier. Suitable for efficiency. However, in general, the compensation signal has a frequency band that extends at least five times the bandwidth of the input signal. For this reason, the signal bandwidth that the DPD can compensate for is limited by the band of the digital-analog converter (DA converter) or the analog-digital converter (AD converter).

  On the other hand, since feed-forward (FF) is processing with an analog high-frequency signal, distortion compensation of a wide band signal is also possible. Therefore, there is known a distortion compensation apparatus capable of performing distortion compensation on a wide band that is not limited to the band of the DA converter or AD converter by combining the two distortion compensation methods of DPD and FF (see, for example, Patent Document 1). .

Patent 3502087

  When a compensation signal whose band is limited by the performance of the DA converter or AD converter is input to the main amplifier, the output is incompletely compensated, and therefore, an error is larger than when the compensation signal is not limited. This error is called a linearization error. The generated linearization error is compensated by the FF. When the linearization error increases, the power consumption of the error amplifier increases. Conversely, in order to reduce the linearization error, it is necessary to increase the processing speed of the digital part. That is, the conventional distortion compensation device has a problem that it is impossible to achieve both low power consumption of the digital unit including the DA converter and the analog unit including the error amplifier.

  In order to solve the above-described problems, an object of the present invention is to provide a distortion compensation apparatus capable of compensating a wide band with low power consumption.

  In order to achieve the above object, the distortion compensator according to the present invention employs a band-limited DPD.

A distortion compensation apparatus according to the present invention includes a first distortion compensation unit that converts an estimated input signal to be input to an amplifier based on a predistortion method in a digital domain in accordance with an input signal into an analog signal and gives the analog signal In the analog domain, the difference between the output signal output by the amplifier with respect to the analog signal and the input signal is obtained, and the amplifier is compensated for distortion by subtracting the difference from the output signal by a feedforward method. Second distortion compensation means, wherein the first distortion compensation means limits the band of the estimated input signal and then converts it to the analog signal.

In the distortion compensation apparatus according to the present invention, the first distortion compensation means limits the band of the estimated input signal to be equal to or less than twice the frequency band of the input signal.

  In the distortion compensation apparatus according to the present invention, the first distortion compensation means limits the band of the estimated input signal by downsampling.

  In the distortion compensating apparatus according to the present invention, the first distortion compensating means performs decimation filtering on the estimated input signal prior to the downsampling.

In the distortion compensation apparatus according to the present invention, the first distortion compensation unit includes a compensation polynomial to which a coefficient that minimizes the leading value of the difference is applied, and performs the decimation filtering.

  The present invention can provide a distortion compensation apparatus capable of compensating a wide band with low power consumption.

1 is a block diagram of a distortion compensation apparatus according to the present invention. It is a figure explaining the effect of the distortion compensation apparatus concerning the present invention. It is the result of having simulated the peak value of the signal error inputted into the error amplifier of the distortion compensator concerning the present invention.

  Embodiments of the present invention will be described with reference to the accompanying drawings. The embodiments described below are examples of the present invention, and the present invention is not limited to the following embodiments. In the present specification and drawings, the same reference numerals denote the same components.

  The distortion compensation apparatus according to the present embodiment includes a digital circuit 10 having a digital predistortion unit 11, a filter 12, and a DA conversion unit 14, and an analog circuit 20 having a main amplifier 21, an error amplifier 25, and a differentiator 26. Prepare.

  In the distortion compensation apparatus of this embodiment, the digital circuit 10 is responsible for DPD and the analog circuit 20 is responsible for FF. The digital predistortion unit 11 has a distortion compensation polynomial that is a reverse characteristic of distortion generated in the main amplifier 21. The digital predistortion unit 11 generates a distortion compensation signal from the input digital signal Sin using a distortion compensation polynomial, and multiplies the input digital signal Sin by the distortion compensation signal to perform distortion compensation processing.

  The filter 12 performs band limitation on the output of the digital predistortion unit 11. For example, the filter 12 is a decimator that lowers the sampling rate. Specifically, the filter 12 lowers the sampling rate for the output of the digital predistortion unit 11. FIG. 2 is a diagram for explaining the band limitation performed by the filter 12 in more detail. (A) is the spectrum of the input digital signal Sin, (b) is the spectrum of the output of the digital predistortion unit 11, and (c) is the spectrum of the output of the filter 12.

  By performing DPD, the spectrum of the output of the digital predistortion unit 11 is expanded by about 5 times the spectrum of the input digital signal Sin. The filter 12 that is a decimator limits the output of the digital predistortion unit 11 and then lowers the sampling rate by thinning out sampling points. As a result, the spectrum of the compensation signal is, for example, not more than twice the spectrum of the input digital signal Sin. The sampling points are called decimation factors such as 1/2, 1/3, 1/4,. The band limited by the decimation factor can be determined.

  Further, the filter 12 may input the output from the digital predistortion unit 11 to the decimator after passing through the decimation filter. The aliasing noise 31 (FIG. 2C) generated when the band is limited, that is, when the sampling rate is lowered, can be reduced.

  The DA converter 14 converts the output of the filter 12 from digital to analog and outputs an analog signal. Since the sampling rate is lowered by the filter 12, the sampling frequency of the DA converter 14 does not need to cover the entire spectrum of the output of the digital predistortion unit 11.

  The DA converter 15 directly converts the input digital signal Sin from digital to analog and outputs a reference analog signal Sref.

  The main amplifier 21 amplifies the output of the DA converter 14 and outputs an analog signal Sp. The differentiator 22 calculates a signal error which is a difference between the analog signal Sp and the reference analog signal Sref time-adjusted by the delay circuit 23, and outputs this signal error. Since the band of the signal input to the DA converter 14 is limited to the sampling frequency of the DA converter 14 or less, the linearization error of the main amplifier 21 is smaller than that without the filter 12. Further, when the filter 12 is a decimator and has a decimation filter, the aliasing noise 31 can be reduced, so that the linearization error of the main amplifier 21 can be further reduced.

  The error amplifier 25 amplifies the signal error between the analog signal Sp and the reference analog signal Sref, and outputs an output Se. Since the linearization error of the main amplifier 21 is reduced, the signal error is small and the power consumption of the error amplifier 25 can be suppressed. The differencer 26 calculates the difference between the output Se and the analog signal Sp time-adjusted by the delay circuit 24, and performs FF.

When the filter 12 includes a decimator and a decimation filter, and the digital predistortion unit 11 performs distortion compensation processing using a distortion compensation polynomial, the peak value of the signal error input to the error amplifier 25 is monitored, and the peak of the signal error is detected. Reset the coefficient of the distortion compensation polynomial to minimize the value. The distortion compensation polynomial possessed by the digital predistortion unit 11 can be expressed by the following equation.

Here, x is an input digital signal, y is an output, and a _i is a coefficient (i is a natural number).

FIG. 3 shows the result of simulating the transition of the peak value of the signal error due to the decimation process performed by the filter 12. There are the following two types of decimation processing.
(1) The output from the digital predistortion unit 11 is directly input to the downsampler.
(2) The output from the digital predistortion unit 11 is input to the downsampler after passing through the decimation filter, and the coefficient of the distortion compensation polynomial is adjusted so that the signal error is minimized.

  The input digital signal used for the simulation is an OFDM signal with a bandwidth of 20 MHz. The horizontal axis of FIG. 3 is the decimation factor, the vertical axis is the peak value of the signal error, and is a relative value based on the peak value of the signal error when only FF is performed. In FIG. 3, the result of the decimation process (1) is indicated by a white circle, and the result of the decimation process (2) is indicated by a white triangle.

  In the decimation process (1), the peak value of the signal error increases as the decimation factor increases. However, the peak value of the signal error can be reduced by resetting the coefficient of the distortion compensation polynomial as in the decimation process (2). In particular, when the decimation factor is other than 1/2, the peak value of the signal error can be made smaller than that of the decimation process (1).

Therefore, according to the present embodiment, a DA converter having a narrow pass signal band is used by band limiting the filter 12 disposed at the subsequent stage of the digital predistortion unit 11 so that the frequency band width is twice or less. However, the output of the main amplifier can reduce the linearization error near the peak, and as a result, the peak value of the signal error input to the error amplifier can be reduced. In particular, since the linearization error near the peak is reduced, it is possible to save power in the error amplifier.

Further, by optimizing the coefficient of the distortion compensation polynomial based on the peak value of the signal error input to the error amplifier 25 in the digital predistortion unit 11, the peak value of the signal error is reduced and the power consumption of the error amplifier is reduced. Can be lowered. Therefore, it is possible to provide a distortion compensation apparatus that can compensate a wide band with low power consumption.

In addition, since the filter 12 arranged at the subsequent stage of the digital predistortion unit 11 has a down-sampling function, a DA converter or AD converter having a low sampling frequency can be used, so that the selectivity of the DA converter or AD converter is widened. Therefore, it is possible to provide a distortion compensation device that can compensate for a wide band with low power consumption more easily than in the past.

  The distortion compensation apparatus according to the present invention can be applied to a power amplifier of a radio transmitter used in a mobile communication base station or the like.

10: digital circuit 11: digital predistortion unit 12: filter 14, 15: DA converter 20: analog circuit 21: main amplifier 22, 26: difference circuit 23, 24: delay circuit 25: error amplifier 31: aliasing noise Sin: Input digital signal Sp: analog signal Sref: reference analog signal Se: output

Claims (5)

A first distortion compensation means for converting an estimated input signal to be input to the amplifier based on a predistortion method in the digital domain according to the input signal into an analog signal, and supplying the analog signal to the amplifier;
In the analog domain, a difference between an output signal output from the amplifier with respect to the analog signal and the input signal is obtained, and distortion of the amplifier is compensated by subtracting the difference from the output signal by a feedforward method. Second distortion compensation means,
The first distortion compensation means includes
A distortion compensator characterized by converting the analog signal after limiting the band of the estimated input signal. The distortion compensation apparatus according to claim 1,
The first distortion compensation means includes
The distortion compensation apparatus, wherein the band of the estimated input signal is limited to not more than twice the frequency band of the input signal. The distortion compensation apparatus according to claim 1 or 2,
The first distortion compensation means includes
A distortion compensation apparatus that limits a band of the estimated input signal by downsampling. The distortion compensation apparatus according to claim 3,
The first distortion compensation means includes
Prior to the downsampling, the estimated input signal is subjected to decimation filtering. The distortion compensation apparatus according to claim 4, wherein
The first distortion compensation means includes
A distortion compensation apparatus comprising: a compensation polynomial to which a coefficient having a minimum starting value of the difference is applied, and performing the decimation filtering.