JP2011038780A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device including a movable part and a method of manufacturing the same capable of precisely positioning a substrate and a lid. <P>SOLUTION: The semiconductor device includes: the substrate 10 having on a surface thereof a first movable part 21 and a second movable part 22 made of semiconductor at least on whose upper surface and side surface an insulating film deformed by external force is formed; and the lid 80 made of an insulating film having a sealed through-hole 81 and disposed above the substrate 10 so that a space 300 is formed between the first movable part 21 and the second movable part 22. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device having a movable part and a method for manufacturing the semiconductor device.

  A semiconductor device such as a MEMS (Micro Electro Mechanical System) element having a movable portion that is displaced according to an externally applied force (hereinafter referred to as “external force”) is used for an acceleration sensor, a gyro sensor, or the like. . Generally, in order to protect a movable part such as a vibrator, the MEMS element is sealed with a lid arranged so as to cover the movable part. For example, a method of sealing a MEMS element by wafer bonding has been proposed (see, for example, Patent Document 1).

US Pat. No. 5,531,002

  However, in the method of manufacturing a MEMS element by bonding a substrate on which a movable part is formed and a lid, it is difficult to align the substrate and the lid. For this reason, there existed a problem that the distance and position alignment of a movable part and the electrode arrange | positioned at a lid | cover could not be implement | achieved with high precision, for example.

  In view of the above problems, an object of the present invention is to provide a semiconductor device having a movable portion and a method for manufacturing the semiconductor device, which can perform alignment between a substrate and a lid with high accuracy.

  According to one aspect of the present invention, (b) a substrate having a movable part formed of a semiconductor having an insulating film formed on at least an upper surface and a side surface that is displaced by an external force, and (b) a sealed penetration. There is provided a semiconductor device having a hole and a lid made of an insulating film disposed on a substrate so as to form a space between the movable part.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device having a movable part formed on a substrate, wherein (a) a part of an upper part of the substrate is etched to form a side groove, and the movable part (B) forming a side surface insulating film and an upper surface insulating film on the side surface and upper surface of the movable portion; and (c) forming a sacrificial film on the movable portion while embedding the side surface groove. (D) forming a cover made of an insulating film on the surface of the sacrificial film; (e) forming a through hole that penetrates the cover to reach the sacrificial layer; and (f) introducing an etchant from the through hole. Etching the sacrificial layer and a part of the upper portion of the substrate using the side surface insulating film and the upper surface insulating film as an etching mask, and forming a space between the lid and the movable portion and a space between the movable portion and the substrate. A method for manufacturing a semiconductor device is provided. .

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device which has a movable part which can perform position alignment with a board | substrate and a lid | cover with high precision, and the manufacturing method of a semiconductor device can be provided.

It is a typical sectional view showing the composition of the semiconductor device concerning the embodiment of the present invention. It is a typical top view showing the composition of the semiconductor device concerning the embodiment of the present invention. It is sectional drawing along the III-III direction of FIG. It is sectional drawing along the IV-IV direction of FIG. It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 1). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 2). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 3). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 4). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 5). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 6). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 7). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 8). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 9). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 10). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 11). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 12). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 13). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 14). It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 15). It is typical sectional drawing which shows the other structure of the semiconductor device which concerns on embodiment of this invention. It is typical sectional drawing which shows the other structure of the semiconductor device which concerns on embodiment of this invention.

  Next, an embodiment of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  Further, the embodiments described below exemplify apparatuses and methods for embodying the technical idea of the present invention, and the embodiments of the present invention include the material, shape, structure, arrangement, etc. of the component parts. Is not specified as follows. The embodiment of the present invention can be variously modified within the scope of the claims.

  As shown in FIG. 1, a semiconductor device 1 according to an embodiment of the present invention includes a first movable portion 21 and a second movable portion that are made of a semiconductor having an insulating film formed on at least an upper surface and a side surface that are displaced by an external force. 22 has a substrate 10 formed on the surface and a sealed through hole 81, and is formed on the substrate 10 so as to form a space 300 between the first movable portion 21 and the second movable portion 22. And a lid 80 made of an insulating film. A sealing film 85 made of an insulating material is formed on the upper surface of the lid 80, and the through hole 81 that penetrates the lid 80 is embedded and sealed with the sealing film 85. Note that the left-right direction is the x direction and the up-down direction is the z direction toward the paper surface of FIG.

  The semiconductor device 1 shown in FIG. 1 has a first movable part 21 and a second movable part 22 arranged in a recess 100 formed on the upper surface of the substrate 10.

  As shown in FIG. 2, the first movable portion 21 is a cantilever type vibrator that is fixed to the peripheral portion of the recess 100 and has a free end extending into the recess 100. More specifically, the first movable portion 21 includes a movable electrode 211 that is a free end located near the center of the recess 100, and a connection portion 212 that is fixed to the substrate 10 at a position separated from the movable electrode 211. Prepare. FIG. 2 shows the upper surface of the semiconductor device 1 through the lid 80 and the sealing film 85. In FIG. 2, the position of the through hole 81 is indicated by a broken line. FIG. 1 is a cross-sectional view taken along the II direction of FIG.

  The movable electrode 211 of the first movable portion 21 faces the beam-shaped fixed electrode 30 in the recess 100. The fixed electrode 30 is disposed adjacent to the first movable portion 21 along the x direction, and is fixed to the substrate 10 at the periphery of the recess 100.

  The position of the first movable portion 21 changes according to the external force applied to the semiconductor device 1 from the outside, and the distance between the movable electrode 211 and the fixed electrode 30 changes. For this reason, when an external force is applied to the semiconductor device 1 with a voltage applied between the movable electrode 211 and the fixed electrode 30, a change in the distance between the movable electrode 211 and the fixed electrode 30 is detected as a change in capacitance. . That is, an external force applied to the semiconductor device 1 is detected by detecting a change in capacitance between the first movable portion 21 and the fixed electrode 30.

  As shown in FIG. 2, the first movable portion 21 and the substrate 10 are connected by two spring-shaped connecting portions 212 meandering in the vertical direction toward the paper surface. By connecting the first movable portion 21 and the substrate 10 by the flexible connecting portion 212, the first movable portion 21 is likely to vibrate in the x direction. Therefore, the external force in the left-right direction in FIG. 1 applied to the semiconductor device 1 is mainly detected by the change in capacitance between the movable electrode 211 and the fixed electrode 30.

  In the semiconductor device 1, the movable electrode 211 and the fixed electrode 30 are arranged in a crossed finger shape. Thereby, the area where the movable electrode 211 and the fixed electrode 30 face each other increases, and the capacitance between the movable electrode 211 and the fixed electrode 30 increases. Therefore, acceleration can be detected with high sensitivity. The width of the movable electrode 211 and the fixed electrode 30 in the facing region where the movable electrode 211 and the fixed electrode 30 face each other is, for example, about 3 μm to 10 μm, and the distance between the movable electrode 211 and the fixed electrode 30 is, for example, about 1 μm to 2 μm. It is.

  As shown in FIG. 2, the second movable portion 22 includes a movable electrode 221 located near the center of the recess 100 and a connecting portion 222 that connects the movable electrode 221 and the substrate 10. It is. A counter electrode 90 supported by the lid 80 is disposed at a position facing the second movable portion 22 above the substrate 10. Specifically, the counter electrode 90 is formed at a position facing the movable electrode 221 on the upper surface of the lid 80.

  One end of the beam-like connecting portion 222 is fixed to the peripheral portion of the recess 100, and the second movable portion 22 is likely to vibrate in the vertical direction, that is, in the z direction toward the plane of FIG. Therefore, when an external force in the z direction is applied to the semiconductor device 1, the second movable portion 22 vibrates in the z direction, and the distance between the second movable portion 22 and the counter electrode 90 changes. When an external force in the z direction is applied to the semiconductor device 1 with a voltage applied to the movable electrode 221 and the counter electrode 90, a change in the distance between the movable electrode 221 and the counter electrode 90 causes a static change between the movable electrode 221 and the counter electrode 90. It is detected as a change in capacitance. That is, an external force in the z direction applied to the semiconductor device 1 is detected by detecting a change in capacitance between the second movable portion 22 and the counter electrode 90.

  The semiconductor device 1 detects a change in capacitance between the first movable portion 21 and the fixed electrode 30 and a change in capacitance between the second movable portion 22 and the counter electrode 90 with a signal processing circuit ( (Not shown). The signal processing circuit processes the detection signal to detect acceleration generated in the semiconductor device 1. That is, the semiconductor device 1 is a part of a capacitance type acceleration detection device that detects acceleration based on a change in capacitance. The signal processing circuit may be arranged on the same chip as the semiconductor device 1 or may be arranged on a chip different from the chip on which the semiconductor device 1 is arranged. As described above, according to the semiconductor device 1 shown in FIG. 1, it is possible to detect an external force applied in the x direction and the z direction. The first movable portion 21 and the second movable portion 22 made of a semiconductor may be used as electrodes, or the first movable portion 21 and the second movable portion 22 may be moved by arranging a metal film or the like, respectively. The electrode 211 and the movable electrode 221 may be formed.

  As shown in FIG. 3, the first movable portion 21 and the second movable portion 22 are fixed to the substrate 10 via an insulating isolation region 40. Furthermore, as shown in FIG. 4, an insulating isolation region 40 is formed between the fixed end and the free end of the fixed electrode 30. The insulating separation region 40 is a region that electrically separates the first movable portion 21, the second movable portion 22, the fixed electrode 30 and the substrate 10.

  Since the movable electrode 211 and the fixed electrode 30 are electrically separated by the insulating separation region 40, the movable electrode 211 and the fixed electrode 30 function as a capacitor plate. Moreover, since the movable electrode 221 and the counter electrode 90 are electrically separated, the movable electrode 221 and the counter electrode 90 function as a capacitor plate.

A substrate 10 shown in FIG. 1 is a stacked body of a lower semiconductor layer 11, an interlayer insulating layer 12, and an upper semiconductor layer 13. A silicon (Si) film can be used for the lower semiconductor layer 11. The interlayer insulating layer 12 can employ a silicon oxide (SiO ₂ ) film or a laminate of a SiO ₂ film and a silicon nitride (SiN) film. A silicon film or a polysilicon film can be used for the upper semiconductor layer 13.

  As will be described later, the recess 100 is formed by etching a part of the upper portion of the upper semiconductor layer 13, the interlayer insulating layer 12, and the lower semiconductor layer 11. A part of the upper semiconductor layer 13 is used as the first movable part 21, the second movable part 22, and the fixed electrode 30.

  As shown in FIG. 1, the upper surface insulating film 54 is disposed on the upper surfaces of the first movable portion 21, the second movable portion 22, and the fixed electrode 30 of the semiconductor device 1, and the side surface insulating film 52 is disposed on the side surface. The lower surface insulating film 50 is disposed on the lower surface. However, for example, the insulating film may be disposed on the upper surface and the side surface of the first movable portion 21, the second movable portion 22, and the fixed electrode 30, and the insulating film may not be disposed on the lower surface. In FIG. 2, illustration of the upper surface insulating film 54 and the side surface insulating film 52 is omitted.

  In the semiconductor device 1 shown in FIG. 1, the electrode wiring 61 for transmitting the voltage values of the movable electrode 211 and the movable electrode 221 to the signal processing circuit, and the electrode wiring for transmitting the voltage value of the fixed electrode 30 to the signal processing circuit. 62 and the electrode wiring 63 for transmitting the voltage value of the counter electrode 90 to the signal processing circuit are disposed on the lid 80. For this reason, the electrode wiring 61 comes into contact with the first movable portion 21 and the second movable portion 22 through the contact portion 610 formed by removing a part of the lid 80 and the upper surface insulating film 54. Similarly, the electrode wiring 62 is in contact with the fixed electrode 30 through a contact portion 620 formed by removing a part of the lid 80 and the upper surface insulating film 54.

The material of the lid 80 is an insulator such as SiO ₂ , SiN, aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ) or the like. The substrate 10 and the lid 80 are made of materials having different etching rates for the same etchant.

The plurality of through holes 81 that penetrate the lid 80 are sealed with an insulator. In the embodiment shown in FIG. 1, the through hole 81 is sealed by a sealing film 85 formed on the upper surface of the lid 80. For the sealing film 85, for example, a resin such as polyimide or epoxy, an insulating film such as a SiO ₂ film, a SiN film, or an Al ₂ O ₃ film, or a low-melting glass can be employed.

  Below, with reference to FIGS. 5-19, the manufacturing method of the semiconductor device 1 which concerns on embodiment of this invention is demonstrated. 5 to 19 are cross-sectional views at the same position as in FIG. Note that the manufacturing method of the semiconductor device 1 described below is an example, and it is needless to say that the present invention can be realized by various other manufacturing methods including this modification.

(A) A substrate 10 having a structure in which a lower semiconductor layer 11, an interlayer insulating layer 12, and an upper semiconductor layer 13 are stacked as shown in FIG. 5 is prepared. In the substrate 10, for example, an interlayer insulating layer 12 having a thickness of about 0.1 μm to 2.0 μm is formed on a lower semiconductor layer 11 having a thickness of about 300 μm, and an upper semiconductor having a thickness of about 5 μm to 100 μm is formed on the interlayer insulating layer 12. This is a structure in which the layer 13 is laminated. For example, the lower semiconductor layer 11 is a silicon film, the interlayer insulating layer 12 is a laminate of a SiO ₂ film and a SiN film, and the upper semiconductor layer 13 is a silicon film.

(B) As shown in FIG. 6, a step insulating film 104 is formed on the substrate 10 by using a thermal oxidation method or a chemical vapor deposition (CVD) method. An SiO ₂ film or the like can be used for the step insulating film 104.

  (C) A part of the step insulating film 104 is removed by etching using a photolithography technique and an etching technique to expose the substrate 10 in a region where the recess 100 is formed. Next, using the step insulating film 104 as a mask, a part of the upper part of the upper semiconductor layer 13 is etched as shown in FIG. For example, the upper part of the upper semiconductor layer 13 is etched by about 1 to 10 μm.

(D) As shown in FIG. 8, the upper insulating film 14 having a film thickness of about 0.5 μm to 4.0 μm is formed on the upper semiconductor layer 13 by using a thermal oxidation method or a CVD method. As the upper insulating film 14, a SiO ₂ film or a laminate of a SiO ₂ film and a SiN film can be employed.

  (E) A photoresist film 500 is formed on the upper insulating film 14, and the photoresist film 500 is formed in a desired pattern by using a photolithography technique. Specifically, the photoresist film 500 on the region where the concave portion 100 and the insulating isolation region 40 are formed is removed, and the first movable portion 21, the second movable portion 22 and the fixed electrode 30 are formed on the region. The photoresist film 500 is left. Then, a part of the upper insulating film 14 is removed by selective etching using the photoresist film 500 as a mask, and a plurality of upper surface insulating films 54 are formed on the substrate 10 as shown in FIG. Thereafter, the photoresist film 500 is removed.

  (F) A part of the upper semiconductor layer 13 is removed by selective etching using the upper surface insulating film 54 as an etching mask to form a side groove 200 as shown in FIG. The side surfaces of the movable part 22 and the fixed electrode 30 are exposed. The depth of the side groove 200 is the thickness of the upper semiconductor layer 13 and is, for example, about 5 μm to 100 μm. Simultaneously with the formation of the side surface groove 200, the insulating isolation groove 400 is formed in the region where the insulating isolation region 40 is disposed. A Bosch method using a deep reactive ion etching (D-RIE) method or the like can be used for the etching for forming the side surface groove 200 and the insulating separation groove 400.

  (G) As shown in FIG. 11, a side insulating film 52 is formed on the surface of the side groove 200. The side insulating film 52 is an insulating film such as a thermal oxide film, a tetraethoxysilane (TEOS) CVD film, or a SiN film having a film thickness of, for example, about 0.1 μm to 1 μm. For the formation of the side insulating film 52, a thermal oxidation method or a CVD method can be used. Simultaneously with the formation of the side insulating film 52, the insulating isolation trench 400 is filled with the insulating film to form the insulating isolation region 40.

  (H) As shown in FIG. 12, the interlayer insulating layer 12 exposed at the bottom of the side groove 200 is removed by anisotropic etching. Thereby, the surface of the lower semiconductor layer 11 is exposed. At this time, the interlayer insulating layer 12 located on the lower surfaces of the first movable portion 21, the second movable portion 22, and the fixed electrode 30 remains, and the remaining interlayer insulating layer 12 is the lower surface insulating film 50. When the interlayer insulating layer 12 is removed by etching, the surface of the upper insulating film 54 is simultaneously etched. For this reason, the upper surface insulating film 54 needs to be formed thicker than the interlayer insulating layer 12.

  (I) A sacrificial layer 70 is formed on the substrate 10 while embedding the periphery of the first movable portion 21, the second movable portion 22, and the fixed electrode 30. A semiconductor material or the like can be used for the sacrificial layer 70. For example, a sacrificial layer 70 is formed by depositing a polysilicon film having a thickness of about 5 μm to 100 μm on the substrate 10 by an epitaxial growth method or the like. After that, as shown in FIG. 13, the upper portion of the sacrificial layer 70 is etched until the surface of the step insulating film 104 is exposed by a chemical mechanical polishing (CMP) method or the like. As will be described later, a region occupied by the sacrificial layer 70 left above the first movable portion 21, the second movable portion 22, and the fixed electrode 30 corresponds to a space 300 between the substrate 10 and the lid 80.

(N) As shown in FIG. 14, a lid 80 made of an insulating film is formed on the surface of the sacrificial layer 70 and the step insulating film 104. For example, a SiO ₂ film having a film thickness of about 3 μm to 50 μm is formed as the lid 80 by CVD or thermal oxidation. Alternatively, the lid 80 may be formed of a laminated body of insulating films made of SiO ₂ film, SiN film, and SiO ₂ film.

(L) Next, contact portions 610 and 620 are formed. For example, as shown in FIG. 14, a part of the lid 80 is removed to form the opening 800. Then, the sacrificial layer 70 exposed at the bottom of the opening 800 is removed until reaching the surface of the upper surface insulating film 54 to form a contact hole 600. After the sidewall insulating film 700 is formed on the surface of the sacrificial layer 70 exposed in the contact hole 600 by CVD or thermal oxidation, the upper surface insulating film 54 exposed at the bottom of the contact hole 600 is anisotropic as shown in FIG. Removed by reactive etching. At this time, since the upper part of the lid 80 is etched, the thickness of the lid 80 at the time of formation is set in consideration of the thickness removed by anisotropic etching. Thereafter, as shown in FIG. 16, the contact hole 600 is filled with a conductive contact film made of a polysilicon film or the like to form a contact portion 610. If the opening shape of the opening portion 800 is rectangular, the contact portion 610 is columnar. In order to form the contact portion 610 using a polysilicon film, for example, a polysilicon film is deposited on the substrate 10 by an epitaxial growth method or the like, and the contact hole 600 is filled with the polysilicon film. Then, the upper portion of the polysilicon film is etched until the surface of the lid 80 is exposed by CMP or the like. 14 to 16 show an example in which the contact portion 610 connected to the second movable portion 22 is formed. However, the contact portion 610 connected to the first movable portion 21 and the contact connected to the fixed electrode 30 are shown. The portion 620 is also formed at the same time. (E) As shown in FIG. 17, the electrode wiring 61 and the contact portion 620 that are electrically connected to the first movable portion 21 and the second movable portion 22 through the contact portion 610. An electrode wiring 62 that is electrically connected to the fixed electrode 30 via the electrode is formed on the upper surface 801 of the lid 80. At the same time, the counter electrode 90 and the electrode wiring 63 are formed on the upper surface 801 of the lid 80. For example, after a metal film such as an aluminum (Al) film is formed on the entire surface by sputtering or the like, a photoresist film is applied on the metal film. Then, after patterning the photoresist film so as to leave only the photoresist film in the region where the electrode wirings 61, 62, 63 and the counter electrode 90 are disposed, the metal film is etched away using the photoresist film as a mask. Thereafter, the photoresist film is removed, and electrode wirings 61, 62, 63 and a counter electrode 90 having a desired pattern are formed.

  (W) As shown in FIG. 18, a plurality of through holes 81 that reach the sacrificial layer 70 through the lid 80 are formed by using a photolithography technique, an etching technique, or the like. For example, through holes 81 having a diameter of about 0.5 μm to 20 μm are formed at intervals of several μm to several tens of μm.

(F) An etchant is introduced into the lid 80 from the through hole 81, and the sacrificial layer 70 is etched away as shown in FIG. An etchant that does not etch the lid 80 is selected for etching the sacrificial layer 70. At this time, the upper surface insulating film 54 and the side surface insulating film 52 function as an etching mask that protects the first movable portion 21, the second movable portion 22, and the fixed electrode 30 from being etched. Thereby, the space 300 is formed. Further, a part of the upper part of the lower semiconductor layer 11 is etched by isotropic etching using the upper surface insulating film 54, the side surface insulating film 52 and the lower surface insulating film 50 as an etching mask. By etching a part of the upper portion of the lower semiconductor layer 11, a recess 100 is formed on the upper surface of the substrate 10, and the lower surfaces of the first movable portion 21, the second movable portion 22 and the fixed electrode 30, the substrate 10, Are separated, and the lower surfaces of the first movable portion 21, the second movable portion 22, and the fixed electrode 30 are exposed. As a result, the beam-shaped first movable portion 21, second movable portion 22, and fixed electrode 30 are formed in the recess 100. For example, when the sacrificial layer 70 is a polysilicon film and the lower semiconductor layer 11 is a silicon film, isotropicity using sulfur hexafluoride (SF ₆ ) gas, xenon difluoride (XeF ₂ ) gas, or the like. By using an etcher or the like, the sacrificial layer 70 and the lower semiconductor layer 11 can be continuously etched. Thereby, the formation process of the space 300 between the substrate 10 and the lid 80 and the separation process of the first movable part 21, the second movable part 22, the fixed electrode 30 and the substrate 10 are continuously performed in one manufacturing process. Can be done.

(E) A sealing film 85 made of an insulating material is formed on the lid 80 while embedding the through holes 81. Thereby, the through-hole 81 is sealed. For example, an insulating film such as a SiO ₂ film or a SiN film is formed on the lid 80 as the sealing film 85 by a CVD method or the like. Alternatively, the through-hole 81 is sealed by forming a resin such as polyimide or epoxy, or low-melting glass as a sealing film 85 on the lid 80 by screen printing. Thus, the semiconductor device 1 shown in FIG. 1 is completed.

Incidentally, and when sealing the through-hole 81 at a low air-tightness of the resin material, if desired to increase the strength of the lid 80, as shown in FIG. 20, SiO ₂ film or SiN film by a low temperature CVD method or the like A protective film 87 made of an insulating film or the like may be formed on the sealing film 85.

  In order to continuously etch the sacrificial layer 70 and the substrate 10, it is necessary that the substrate 10 and the lid 80 be made of materials having different etching rates for the etchant used for etching the sacrificial layer 70 and the substrate 10. is there. That is, an etchant whose etching rate for the lid 80 is sufficiently smaller than the etching rates for the sacrificial layer 70 and the substrate 10 is used. For the sacrificial layer 70, a material having the same etching rate as that of the substrate 10 is selected.

However, it is possible to use a material other than a semiconductor for the sacrificial layer 70. For example, a polymer can be used for the sacrificial layer 70. In this case, the sacrificial layer 70 which is a polymer is removed by, for example, ozone ashing, and then a part of the upper portion of the lower semiconductor layer 11 is etched using SF ₆ gas as an etchant. However, in order to shorten the manufacturing process, by using a semiconductor material such as a polysilicon film for the sacrificial layer 70, the sacrificial layer 70 and a part of the upper portion of the substrate 10 are continuously formed using the same etchant. It is preferable to perform etching.

  The arrangement of the through holes 81 and the shape of the openings of the through holes 81 are arbitrary. For example, the plurality of through holes 81 are formed in the lid 80 in an irregular or regular array. If the diameter of the opening of the through hole 81 is small, the etching rate is lowered, but if the diameter is large, sealing becomes difficult. For this reason, the arrangement and diameter of the through holes 81 are set according to the desired etching rate and sealing method.

  Note that the distance between the upper surface of the first movable portion 21 and the second movable portion 22 and the lower surface of the lid 80 is a step of etching a part of the upper portion of the upper semiconductor layer 13 using the step insulating film 104 as a mask (FIG. 7)) depending on the etching amount of the upper semiconductor layer 13. The etching amount of the upper semiconductor layer 13 is set so as not to contact the lid 80 even if the second movable part 22 vibrates, for example.

  Although the example of the manufacturing method which forms the side surface groove 200 and the insulation separation groove 400 simultaneously was demonstrated above, you may form the side surface groove 200 and the insulation separation groove 400 in a different process. Moreover, although the example which forms the side surface insulating film 52 and the insulation isolation region 40 simultaneously was demonstrated, you may form the side surface insulating film 52 and the insulation isolation region 40 in a different process.

  The counter electrode 90 disposed on the lid 80 may be a movable electrode. For example, the lid 80 is thinned so that the position of the counter electrode 90 in the z direction changes when an external force is applied to the semiconductor device 1. Then, by arranging a fixed electrode facing the counter electrode 90 in the recess 100 of the substrate 10, an external force in the z direction applied to the semiconductor device 1 can be detected.

  The semiconductor device 1 described above has an SOI structure in which the lower semiconductor layer 11, the interlayer insulating layer 12, and the upper semiconductor layer 13 are stacked in order to dispose the lower surface insulating film 50 on the lower surfaces of the movable electrode 211 and the fixed electrode 30. The example using the board | substrate 10 was shown. However, for example, an inexpensive single layer silicon substrate may be used for the substrate 10 to manufacture the semiconductor device 1 without forming the lower surface insulating film 50.

  When a single-layer silicon substrate is used as the substrate 10, for example, the surface groove 200 is formed by etching away the surface of the silicon substrate using the upper surface insulating film 54 as a mask. Next, the side surface insulating film 52 is formed by oxidizing the surface of the side surface groove 200. Thereby, a protective insulating film is formed on the side surfaces of the movable electrode 211 and the fixed electrode 30. The thickness of the first movable portion 21 is defined by the depth of the side groove 200. Thereafter, the semiconductor device 1 is manufactured in the same manner as described above. That is, the sacrificial layer 70 is formed so as to fill the side groove 200, and the lid 80 is further formed. Then, the sacrificial layer 70 and a part of the upper portion of the silicon substrate are removed by etching using the upper surface insulating film 54 and the side surface insulating film 52 as an etching mask, thereby forming the space 300 and the recess 100.

  FIG. 21 shows an example in which the semiconductor device 1 is manufactured using the single layer silicon substrate as the substrate 10 as described above. The semiconductor device shown in FIG. 21 is different from the semiconductor device 1 shown in FIG. 1 in that an insulating film is not formed on the lower surfaces of the first movable portion 21, the second movable portion 22, and the fixed electrode 30. It is. Other configurations are the same as those of the semiconductor device 1 shown in FIG.

  As described above, in the method for manufacturing the semiconductor device 1 according to the embodiment of the present invention, the alignment accuracy between the substrate 10 and the lid 80 depends on the accuracy of the semiconductor process technology. For this reason, alignment between the substrate 10 and the lid 80 can be performed with high accuracy. Therefore, according to the manufacturing method of the semiconductor device 1 described above, compared to the method of manufacturing the semiconductor device by bonding the substrate 10 on which the second movable portion 22 is formed and the lid 80 on which the counter electrode 90 is formed, The second movable portion 22 and the counter electrode 90 can be aligned with high accuracy, and the positional deviation can be reduced. Furthermore, the distance between the second movable portion 22 and the counter electrode 90 can be realized with a desired value with high accuracy.

Unlike the semiconductor device 1 shown in FIG. 1, when the lid 80 is formed of a silicon material, the sacrificial layer 70 must be formed of a material such as a SiO ₂ film. Therefore, the side insulating film 52 and the upper insulating film 54 made of an insulating film such as an SiO ₂ film cannot be left around the first movable part 21, the second movable part 22, and the fixed electrode 30. When the side surface insulating film 52 and the upper surface insulating film 54 cannot be formed, there is a risk of short circuit or welding between the electrodes of the first movable part 21, the second movable part 22 and the fixed electrode 30, or between these electrodes and the substrate 10. There is. In addition, the capacitance between the movable electrode 211 and the fixed electrode 30 is reduced, and the detection sensitivity is reduced.

  However, in the manufacturing method of the semiconductor device 1 described above, the lid 80 which is an insulating film is formed, and the periphery of the first movable portion 21 and the second movable portion 22 made of semiconductor is protected from etching by the insulating film. Thus, the sacrificial layer 70 and the upper portion of the substrate 10 can be continuously etched by the etchant introduced from the through hole 81 of the lid 80. For this reason, the space 300 between the board | substrate 10 and the lid | cover 80 and the recessed part 100 in which the 1st movable part 21 and the 2nd movable part 22 are arrange | positioned can be formed in one manufacturing process. Therefore, according to the manufacturing method of the semiconductor device 1 described above, it is possible to provide the semiconductor device 1 having a movable portion in which an increase in manufacturing steps is suppressed.

  Furthermore, according to the manufacturing method described above, the insulating film can be left around the first movable portion 21, the second movable portion 22, and the fixed electrode 30. For this reason, the short circuit and welding between electrodes or between an electrode and the board | substrate 10 are prevented, and the fall of a detection sensitivity does not arise.

(Other embodiments)
As mentioned above, although this invention was described by embodiment, it should not be understood that the description and drawing which form a part of this indication limit this invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  In the semiconductor device 1, the counter electrode 90 is disposed on the upper surface 801 of the lid 80. However, the counter electrode 90 may be disposed on the lower surface of the lid 80 facing the substrate 10. The counter electrode 90 may be embedded in the surface of the lid 80.

  The semiconductor device 1 is an acceleration sensor that detects an acceleration in the x direction and an acceleration in the z direction, but an acceleration sensor that detects only an acceleration in the x direction, an acceleration sensor that detects only an acceleration in the y direction, or a z direction acceleration sensor. Of course, the present invention can be applied to an acceleration sensation that detects only acceleration.

  In the description of the embodiment already described, an example in which the semiconductor device 1 is an acceleration sensor has been described. However, the present invention is not limited to an acceleration sensor, and may be various sensors that detect a physical quantity using a structure that is displaced according to an external force. The present invention is applicable. For example, the present invention can be applied to an angular velocity sensor, a pressure sensor, a force sensor, and the like.

  As described above, the present invention naturally includes various embodiments not described herein. Accordingly, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

  The semiconductor device of the present invention can be used in the electronic equipment industry including the manufacturing industry that manufactures semiconductor sensors having movable parts.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor device 10 ... Board | substrate 11 ... Lower semiconductor layer 12 ... Interlayer insulating layer 13 ... Upper semiconductor layer 14 ... Upper insulating film 21 ... 1st movable part 22 ... 2nd movable part 30 ... Fixed electrode 40 ... Insulation isolation region DESCRIPTION OF SYMBOLS 50 ... Lower surface insulating film 52 ... Side surface insulating film 54 ... Upper surface insulating film 61, 62, 63 ... Electrode wiring 70 ... Sacrificial layer 80 ... Cover 81 ... Through-hole 85 ... Sealing film 87 ... Protective film 90 ... Counter electrode 100 ... Recessed 104 ... Step insulating film 200 ... Side groove 211 ... Movable electrode 212 ... Connection part 221 ... Movable electrode 222 ... Connection part 300 ... Space 400 ... Insulation separation groove 500 ... Photoresist film 600 ... Contact hole 610, 620 ... Contact part 700 ... Side wall insulating film 800 ... opening 801 ... upper surface

Claims (13)

A substrate on which a movable part made of a semiconductor having an insulating film formed on at least an upper surface and a side surface that is displaced by an external force is formed;
A semiconductor device comprising: a sealed through-hole, and a lid made of an insulating film disposed on the substrate so as to form a space between the movable portion.   The semiconductor device according to claim 1, wherein the movable portion is disposed in a recess formed in an upper surface of the substrate.   3. The semiconductor device according to claim 2, wherein the movable portion is a cantilever type vibrator fixed to a peripheral portion of the recess and having a free end extending into the recess.   3. The semiconductor according to claim 2, wherein the movable part is a doubly-supported beam type vibrator including a movable electrode located in the recess and a connection part that connects the movable electrode and the substrate. apparatus.   The semiconductor device according to claim 1, wherein the through hole is sealed with an insulator.   The semiconductor device according to claim 1, wherein the substrate and the lid are made of materials having different etching rates for the same etchant.   7. The semiconductor device according to claim 1, wherein a counter electrode supported by the lid is disposed at a position facing the movable portion above the substrate. 8. A method of manufacturing a semiconductor device having a movable part formed on a substrate,
Etching a part of the upper part of the substrate to form a side groove, exposing the side surface of the movable part;
Forming a side surface insulating film and an upper surface insulating film on a side surface and an upper surface of the movable part;
Forming a sacrificial film on the movable part while embedding the side groove;
Forming a lid made of an insulating film on the surface of the sacrificial film;
Forming a through hole penetrating the lid and reaching the sacrificial layer;
An etchant is introduced from the through hole, the sacrificial layer and a part of the upper part of the substrate are etched using the side surface insulating film and the upper surface insulating film as an etching mask, and a space between the lid and the movable part, Forming a space between the movable part and the substrate. A method of manufacturing a semiconductor device, comprising:   9. The method of manufacturing a semiconductor device according to claim 8, wherein the sacrificial layer and a part of the upper portion of the substrate are continuously etched using the same etchant.   The method for manufacturing a semiconductor device according to claim 8, further comprising a step of sealing the through hole with an insulator.   The method for manufacturing a semiconductor device according to claim 8, further comprising a step of forming a counter electrode at a position on the surface of the lid that faces the movable portion. Forming the side groove comprises:
Forming the upper surface insulating film on the substrate;
Patterning the top insulating layer;
The semiconductor device according to claim 8, further comprising: etching the part of the upper portion of the substrate by using the upper surface insulating film as a mask to form the side surface groove. Production method.   A part of the upper semiconductor layer of the substrate having a structure in which a lower semiconductor layer, an interlayer insulating layer and an upper semiconductor layer are stacked is etched to form the side groove, and the interlayer insulating layer exposed at a bottom of the side groove 13. The method of manufacturing a semiconductor device according to claim 8, wherein the surface of the lower semiconductor layer is exposed to remove the interlayer insulating layer on a lower surface of the movable portion. .

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