JP2011035951A - Unit for controlling reactive power compensating device, method of controlling the reactive power compensating device, and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To compensate not only the reactive power variations of a load, but also the active power variations of a load. <P>SOLUTION: A control unit of a reactive power compensating device includes a load P detection section 101 for detecting an active power of a load; a load P variation amount extraction section 102 for detecting an amount of variation in the active power of a load detected by the load P detection section 101; a compensation amount decision section 103 for multiplying the amount of variation in the active power of a load detected by the load P variation amount extraction section 102 by a gain to decide an amount for changing a DC-voltage command value; and a subtractor 104 for subtracting an amount decided by the compensation amount decision section 103 from the DC-voltage command value. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a control device for a reactive power compensator, a method for controlling a reactive power compensator, and a program that compensates for reactive power fluctuations of a load and also compensates for active power fluctuations of a load.

  There is a static reactive power compensator (hereinafter referred to as “SVC”) as an apparatus installed to suppress flicker generated by a sudden load fluctuation such as an arc furnace or a rolling mill.

  The SVC is a device that compensates for reactive power at high speed by detecting a change in reactive power of a load. By the way, the voltage fluctuation that causes flicker occurs due to the reactive power fluctuation of the load, but the voltage of the bus fluctuates even when the active power of the load suddenly changes. If voltage fluctuation due to load active power fluctuation can also be compensated, voltage fluctuation (voltage flicker) can be suppressed more than before, but the conventional SVC does not have a function to compensate voltage fluctuation due to load active power fluctuation.

  The devices proposed in Patent Document 1, Patent Document 2, and the like are devices having only a function for compensating for the reactive power fluctuation of the load. Further, Patent Document 3 detects the effective current of the load and controls the SVC active power output command, but attempts to suppress only the harmonic component included in the load effective current.

Japanese Patent Laid-Open No. 05-011870 JP 07-336891 A Japanese Patent Laid-Open No. 08-076866

  As described above, the conventional SVC has only a function for compensating for the reactive power fluctuation of the load, and does not have a function for compensating for the active power fluctuation of the load. That is, the conventional SVC does not directly compensate for voltage fluctuation (voltage flicker) that occurs due to fluctuations in the active power of the load. If both the reactive power fluctuation and the active power fluctuation of the load can be compensated, it is expected that the effect of suppressing the voltage fluctuation (voltage flicker) can be improved more than before.

  The present invention has been made in view of the above circumstances, and a reactive power compensator control device capable of compensating not only a reactive power variation of a load but also a reactive power variation of a load, a control method of the reactive power compensation device, And to provide a program.

  A reactive power compensator control device according to an aspect of the present invention includes a load active power detection unit that detects active power of a load, and a load effective power that detects a variation in active power detected by the active power detection unit. A power fluctuation amount extracting means; a compensation amount determining means for determining a quantity for changing a DC voltage command value by applying a gain to the load active power fluctuation detected by the load active power fluctuation extracting means; Subtracting means for subtracting the amount determined by the compensation amount determining means from a DC voltage command value.

  According to the present invention, not only the reactive power fluctuation of the load but also the active power fluctuation of the load can be compensated.

The figure which shows an example of schematic structure of the electric power system to which the control system of self-excited SVC which concerns on each embodiment of this invention is applied. The figure which shows an example of the general structure of the control system used for the self-excited SVC in FIG. The figure which shows an example of a structure of the load active power fluctuation compensation function which concerns on the 1st Embodiment of this invention. The figure which shows the signal waveform of each part in the embodiment. The figure which shows an example of a structure of the load active power fluctuation compensation function which concerns on the 2nd Embodiment of this invention. The figure which shows the signal waveform of each part in the embodiment. The figure which shows an example of a structure of the load active power fluctuation compensation function which concerns on the 3rd Embodiment of this invention.

  Embodiments of the present invention will be described below with reference to the drawings.

(Common to each embodiment)
First, matters common to the embodiments of the present invention will be described with reference to FIG.

  FIG. 1 is a diagram illustrating an example of a schematic configuration of a power system to which a self-excited SVC control system according to each embodiment of the present invention is applied.

  As shown in FIG. 1, a bus A exists in the power system of the AC power supply. A load L and a self-excited SVC 1 are connected to the bus A. The load L consumes power supplied from the bus A, while the self-excited SVC 1 suppresses power fluctuation (voltage flicker) generated on the bus A by the load L.

  The self-excited SVC 1 includes a control system 2 and an inverter 3. The control system 2 is a control device that generates a control signal for driving the inverter 3 based on the reactive power fluctuation and the active power fluctuation of the load L so that the voltage flicker of the bus A is suppressed. The inverter 3 is a device that suppresses voltage flicker on the bus A by turning on and off the gate of the semiconductor switch according to a signal supplied from the control system 2 and consuming or supplying reactive power and active power.

  FIG. 2 is a diagram showing an example of a general configuration of the control system 2 used in the self-excited SVC 1 in FIG.

  The control system 2 includes a subtracter 10, a DC voltage constant control system (DC-AVR) 11, a flicker suppression control system 12, an SVC output current command value calculation unit 13, subtractors 14a, 14b, and 14c, an AC current control system (AC -ACR) 15, subtractors 16a, 16b, 16c, and a pulse generation circuit (PWM) 17.

  In addition to the above element group, although not shown in FIG. 2, a load active power fluctuation compensation function described in each embodiment to be described later is provided at a position before or after the DC voltage constant control system (DC-AVR) 11. Are provided.

  The subtracter 10 performs a subtraction process on the DC voltage command value Edc_ref. In the example of FIG. 2, the current DC voltage value Edc is subtracted from the DC voltage command value Edc_ref. However, the configuration of this portion is different in the first embodiment described later.

  The DC voltage constant control system (DC-AVR) 11 adjusts the SVC output current command value so as to keep the DC voltage command value after the subtraction process in the subtractor 10 constant.

  The flicker suppression control system 12 extracts an invalid current component that causes flicker from the load currents iL_a, iL_b, and iL_c of the load L, and calculates an SVC output current that cancels it out.

  The SVC output current command value calculation unit 13 synthesizes the output of the DC voltage constant control system (DC-AVR) 11 and the output of the flicker suppression control system 12 to generate a final SVC output current command value. It is.

  The subtractors 14a, 14b, and 14c subtract the SVC output current values isvc_a, isvc_b, and isvc_c from the output current command values isvc_a_ref, isvc_b_ref, and isvc_c_ref output from the SVC output current command value calculation unit 13, respectively.

  The AC current control system (AC-ACR) 15 performs constant current control such that the SVC output current becomes the output current command value generated by the SVC output current command value calculation unit 13.

  The subtractors 16a, 16b, and 16c subtract the SVC output current value output from the AC current control system (AC-ACR) 15 from the SVC terminal voltages vcvc_c, vcvc_b, and vcvc_a.

  The pulse generation circuit (PWM) 17 generates a gate drive signal for the semiconductor switch of the inverter 2 based on the output signal of the alternating current control system (AC-ACR) 15.

  In each embodiment described below, FIGS. 1 and 2 will be referred to as appropriate.

(First embodiment)
First, a first embodiment of the present invention will be described with reference to FIG. 3 and FIG.

  FIG. 3 is a diagram illustrating an example of the configuration of the load active power fluctuation compensation function according to the first embodiment of the present invention.

  The load active power fluctuation compensation function 21 in FIG. 3 is provided in the preceding stage of the constant DC voltage control system (DC-AVR) 11 in the control system 2 in FIG. The load active power fluctuation compensation function 21 includes a load active power extraction unit 101 (hereinafter referred to as “load P detection unit 101”) and a load active power fluctuation extraction unit 102 (hereinafter referred to as “load P fluctuation extraction unit 102”). The compensation amount determining unit 103, the subtractor 104, the DC voltage target value limiting unit 105, and the subtractor 106 are included. Any of these elements can be realized as a function of a program to be realized by a computer.

  The load P detection unit 101 detects active power of the load L (hereinafter referred to as “load P”).

  The load P fluctuation extraction unit 102 extracts the fluctuation of the load P detected by the load P detection unit 101. For example, the variation is obtained by “Ts / (1 + Ts)” (Ts: time constant).

  The compensation amount determination unit 103 multiplies the variation of the load P detected by the load P variation extraction unit 102 by a gain K to determine an amount to change the DC voltage command value Edc_ref. That is, it is a function for adjusting the DC voltage command value Edc_ref so as to obtain a signal necessary for suppressing the flicker of the bus A.

  The subtracter 104 subtracts the amount determined by the compensation amount determination unit 103 from the DC voltage command value Edc_ref.

  The DC voltage target value limiting unit 105 limits the output value of the subtractor 104 within a predetermined range (between the upper limit value and the lower limit value).

  The subtractor 106 subtracts the current DC voltage value Edc from the output value of the DC voltage target value limiting unit 105. The output of the subtracter 106 is transmitted to the DC voltage constant control system (DC-AVR) 11.

  In the load active power fluctuation compensation function 21 configured as described above, when the current load P is captured by the load P detection unit 101, the load P is transmitted to the load P fluctuation extraction unit 102. The load P fluctuation extractor 102 extracts the fluctuation from the signal transmitted from the load P detector 101. In this case, for example, the variation is extracted by processing the signal using a signal reset circuit. The extracted variation is transmitted to the compensation amount determination unit 103. In the compensation amount determination unit 103, a gain K is applied to the extracted variation, and the signal is adjusted and output as a signal for reducing the voltage variation with respect to the magnitude of the load P variation, for example. The output of the compensation amount determination unit 103 is transmitted to the subtracter 104. The subtracter 104 subtracts the output of the compensation amount determining unit 103 from the DC voltage command value and transmits the subtraction to the DC voltage target value limiting unit 105. In the DC voltage target value limiting unit 105, the signal subtracted by the subtractor 104 is limited within a predetermined range (between the upper limit value and the lower limit value). For example, as the upper limit value and the lower limit value of the DC voltage target value limiting unit 105, the upper limit value and the lower limit value of the DC voltage that can be accepted by the system are set. The output of the DC voltage target value limiting unit 105 becomes a DC voltage command value for suppressing voltage fluctuation due to load P fluctuation. In the subtractor 106, the difference between the output of the DC voltage target value limiting unit 105 and the current DC voltage is obtained and transmitted to the DC voltage constant control system (DC-AVR) 11.

  FIG. 4 is a diagram showing signal waveforms at various parts in the embodiment.

  4A is a load P that is the active power of the load L, FIG. 4B is a voltage of the bus A, FIG. 4C is an output signal of the load P fluctuation extraction unit 102, and FIG. 4D is a compensation amount determination unit 103. (E) is the output signal of the DC voltage target value limiter 105, (f) is the DC voltage Edc, (g) is the output signal of the subtractor 106 (SVC active power), and (h) is the load P. And the active power of the SVC. Note that a broken line indicated by a symbol X in FIG. 4 indicates a waveform according to the prior art, while a solid line indicated by a symbol Y indicates a waveform according to the present embodiment.

  When the load P fluctuates greatly as shown in FIG. 4A, the bus voltage has fluctuated greatly as indicated by the broken line X in FIG. 4B. However, in this embodiment, the bus line changes as indicated by the solid line Y as shown in FIG. Voltage fluctuation is suppressed to a small level. In the present embodiment, as shown by the solid line Y, the fluctuation amount of the load P is captured and a control signal as shown in FIGS. 4C and 4D is generated, and the DC voltage command value is changed as shown in FIG. The Then, in response to the change in the DC voltage command value and the change in the DC voltage as shown in FIG. 4F, the active power of the SVC is formed as shown in FIG. For example, when the load P sharply decreases as shown in FIG. 4A, the DC voltage is increased as shown in FIG. When the DC voltage increases, the inverter 3 consumes active power from the system side, and as a result, the SVC operates so that the active power corresponding to the decrease in the load P is consumed, as shown in FIG. In addition, the bus voltage fluctuation accompanying the load P fluctuation is compensated.

  According to the first embodiment, since the fluctuation of the rapid active power of the load can be compensated by the active power output (consumption or supply) of the SVC, the voltage fluctuation in the vicinity of the load caused by the active power fluctuation of the load is suppressed. The SVC can be operated as follows.

(Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIGS.

  In the second embodiment, the same reference numerals are given to the portions common to the configuration of the first embodiment described above, and a duplicate description is omitted. Below, it demonstrates centering on a different part from 1st Embodiment.

  FIG. 5 is a diagram illustrating an example of the configuration of the load active power fluctuation compensation function according to the second embodiment of the present invention.

  The load active power fluctuation compensation function 22 in FIG. 5 is obtained by adding a dead band processing unit 107 to the elements 101 to 106 constituting the load active power fluctuation compensation function 21 in FIG. 3 described above. This added element can be realized as a function of a program to be realized by a computer.

  The dead zone processing unit 107 is provided between the load P fluctuation extraction unit 102 and the compensation amount determination unit 103, and has a certain size among the fluctuations of the load P detected by the load active power fluctuation extraction unit 102. Only the amount of fluctuation above or below a certain magnitude is supplied to the compensation amount determination unit 103.

  In the load active power fluctuation compensation function 22 configured as described above, when the fluctuation component is extracted from the signal transmitted from the load P detection unit 101 by the load P fluctuation component extraction unit 102, the load P fluctuation component extraction unit 102. The fluctuation extracted in step S is input to the dead zone processing unit 107. The dead zone processing unit 107 outputs only an input that is greater than a certain size or less than a certain size with respect to the input fluctuation. The output of the dead zone processing unit 107 is transmitted to the compensation amount determination unit 103.

  FIG. 6 is a diagram illustrating signal waveforms of respective units in the same embodiment.

  6A is a load P that is the active power of the load L, FIG. 6B is a voltage of the bus A, FIG. 6C is an output signal of the load P fluctuation extraction unit 102, and FIG. 6D is a compensation amount determination unit 103. (E) is the output signal of the DC voltage target value limiter 105, (f) is the DC voltage Edc, (g) is the output signal of the subtractor 106 (SVC active power), and (h) is the load P. And the active power of the SVC. Note that a broken line indicated by a symbol X in FIG. 4 indicates a waveform according to the prior art, while a solid line indicated by a symbol Y indicates a waveform according to the present embodiment.

  In the portion where the amount of decrease in the load P is small as shown in FIG. 6A, the fluctuation of the bus voltage is small as shown in FIG. 6B and is within an allowable range. In such a portion where the decrease amount of the load P is small, a signal as shown in FIG. 6C is generated from the load P fluctuation extraction unit 102, but the dead zone processing unit 107 does not react and the output value becomes zero. Therefore, the output value of the compensation amount determining unit 103 is 0 as shown in FIG. 6D, and the output signal and the DC voltage Edc of the DC voltage target value limiting unit 105 are not changed as shown in FIGS. As shown in FIG. 6 (g), the active power of the SVC is not formed, and the bus voltage fluctuation due to the fluctuation of the load P appears as shown in FIG. 4 (h), but there is no problem because it is a small fluctuation. .

  On the other hand, when the reduction amount of the load active power is large, the dead zone processing unit 107 passes the output of the load P fluctuation extraction unit 102, so that a control signal as shown in FIGS. 6C and 6D is generated. The DC voltage command value is changed as shown in FIG. 6 (e), and the SVC is effective as shown in FIG. 6 (g) in accordance with the change in the DC voltage command value and the change in the DC voltage as shown in FIG. 6 (f). When power is formed and the DC voltage increases, the inverter 3 consumes active power from the system side. As a result, the SVC operates so that the SVC consumes active power corresponding to the decrease in the load P. FIG. As shown in (h), the bus voltage fluctuation due to the load P fluctuation is compensated.

  According to the second embodiment, since the SVC outputs (consumes or supplies) active power only when the active power fluctuation of the load becomes greater than a certain value, the load that causes a large voltage fluctuation It is possible to operate effectively only with respect to the active power fluctuation.

(Third embodiment)
Next, a third embodiment of the present invention will be described with reference to FIG.

  In the third embodiment, the same reference numerals are given to the portions common to the configuration of the first embodiment described above, and a duplicate description is omitted. Below, it demonstrates centering on a different part from 1st Embodiment.

  FIG. 7 is a diagram illustrating an example of the configuration of the load active power fluctuation compensation function according to the third embodiment of the present invention.

  The load active power fluctuation compensation function 21 of FIG. 3 described above is provided in the preceding stage of the DC voltage constant control system (DC-AVR) 11, whereas the load active power fluctuation compensation function 23 of FIG. It is provided in the subsequent stage of the constant control system (DC-AVR) 11.

  The load active power fluctuation compensation function 23 includes the load P detection unit 101, the load P fluctuation extraction unit 102, the compensation amount determination unit 103, the subtractor 104, and the DC voltage target value limiting unit 105 described above. The subtractor 104 in this case is determined by the compensation amount determination unit 103 from the output value of the DC voltage constant control system (DC-AVR) 11, unlike the subtractor 104 in the load active power fluctuation compensation function 21 of FIG. 3. Subtract amount. In addition, since the signal waveform of each part in this embodiment becomes the same as that of the signal waveform shown in above-mentioned FIG. 4, the description is abbreviate | omitted.

  Further, in the load active power fluctuation compensation function 23 in FIG. 7, the dead zone processing unit 107 in FIG. 5 described above may be provided between the load P fluctuation extraction unit 102 and the compensation amount determination unit 103. The signal waveform in this case is the same as the signal waveform shown in FIG.

  According to the third embodiment, by providing the load active power fluctuation compensation function in the subsequent stage of the DC voltage constant control system (DC-AVR), the same effect as in the first embodiment can be obtained. . Further, by adding a dead zone processing unit, the same effect as in the second embodiment described above can be obtained.

  Various functions and processing procedures described in FIGS. 3 to 7 of each embodiment described above are stored in a computer-readable storage medium (for example, a magnetic disk, an optical disk, or a semiconductor memory) as a computer program, and are necessary. In response to this, it may be read and executed by the processor. Such a computer program can also be distributed by transmitting from one computer to another computer via a communication medium.

  The present invention is not limited to the above-described embodiments as they are, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. In addition, various inventions can be formed by appropriately combining a plurality of components disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined.

  DESCRIPTION OF SYMBOLS 1 ... Self-excited SVC, 2 ... Inverter, 10 ... Subtractor, 11 ... DC voltage constant control system (DC-AVR), 12 ... Flicker suppression control system, 13 ... SVC output current command value calculating part, 14a, 14b, 14c DESCRIPTION OF SYMBOLS ... Subtractor, 15 ... AC current control system (AC-ACR), 16a, 16b, 16c ... Subtractor, 17 ... Pulse generation circuit (PWM), 21, 22, 23 ... Load active power fluctuation compensation function, 101 ... Load P detecting unit 102... Load P fluctuation extracting unit 103 103 compensation amount determining unit 104 subtracting unit 105 DC voltage target value limiting unit 106 subtracting unit 107 dead zone processing unit

Claims (7)

Load active power detection means for detecting the active power of the load;
A load active power fluctuation extracting means for detecting a change in active power of the load detected by the active power detecting means;
A compensation amount determining means for multiplying a variation in the active power of the load detected by the load active power variation extracting means and determining an amount for changing the DC voltage command value;
A control device for a reactive power compensator, comprising: subtracting means for subtracting an amount determined by the compensation amount determining means from the DC voltage command value. In the control apparatus of the reactive power compensator according to claim 1,
A control apparatus for a reactive power compensator, further comprising DC voltage target value limiting means for limiting an output value of the subtractor within a predetermined range. In the control apparatus of the reactive power compensator according to claim 1 or 2,
A dead zone processing means for supplying only the fluctuation amount greater than a certain magnitude or less than a certain magnitude among fluctuations in the active power of the load detected by the load active power fluctuation extraction means to the compensation amount determination means. A control device for a reactive power compensator, further comprising: In the control apparatus of the reactive power compensator according to any one of claims 1 to 3,
A control device for a reactive power compensator, wherein each of the means is provided in a preceding stage of a DC voltage constant control means for maintaining a DC voltage command value constant. In the control apparatus of the reactive power compensator according to any one of claims 1 to 3,
A control device for a reactive power compensator, wherein each of the means is provided at a subsequent stage of a DC voltage constant control means for maintaining a DC voltage command value constant. Detecting active power supplied to the load by the load active power detection means;
Detecting a change in active power of the detected load by a load active power fluctuation extracting unit;
A step of determining the amount of change in the DC voltage command value by applying a gain to the detected change in active power of the load by the compensation amount determining means;
And subtracting the determined amount from the DC voltage command value by a subtracting means. A function to detect active power supplied to the load;
A function of detecting a change in the active power of the detected load;
A function of multiplying the detected change in active power of the load by gain and determining an amount to change the DC voltage command value;
A program for causing a computer to realize a function of subtracting the determined amount from the DC voltage command value.

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