JP2011035725A5 - - Google Patents

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Publication number
JP2011035725A5
JP2011035725A5 JP2009180802A JP2009180802A JP2011035725A5 JP 2011035725 A5 JP2011035725 A5 JP 2011035725A5 JP 2009180802 A JP2009180802 A JP 2009180802A JP 2009180802 A JP2009180802 A JP 2009180802A JP 2011035725 A5 JP2011035725 A5 JP 2011035725A5
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JP
Japan
Prior art keywords
delay
period
pulse data
logical value
multiplexers
Prior art date
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Application number
JP2009180802A
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English (en)
Japanese (ja)
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JP5461097B2 (ja
JP2011035725A (ja
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Priority to JP2009180802A priority Critical patent/JP5461097B2/ja
Priority claimed from JP2009180802A external-priority patent/JP5461097B2/ja
Publication of JP2011035725A publication Critical patent/JP2011035725A/ja
Publication of JP2011035725A5 publication Critical patent/JP2011035725A5/ja
Application granted granted Critical
Publication of JP5461097B2 publication Critical patent/JP5461097B2/ja
Active legal-status Critical Current
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JP2009180802A 2009-08-03 2009-08-03 パルス生成回路 Active JP5461097B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009180802A JP5461097B2 (ja) 2009-08-03 2009-08-03 パルス生成回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009180802A JP5461097B2 (ja) 2009-08-03 2009-08-03 パルス生成回路

Publications (3)

Publication Number Publication Date
JP2011035725A JP2011035725A (ja) 2011-02-17
JP2011035725A5 true JP2011035725A5 (https=) 2012-04-19
JP5461097B2 JP5461097B2 (ja) 2014-04-02

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ID=43764340

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009180802A Active JP5461097B2 (ja) 2009-08-03 2009-08-03 パルス生成回路

Country Status (1)

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JP (1) JP5461097B2 (https=)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004345280A (ja) * 2003-05-23 2004-12-09 Canon Inc デジタルｐｗｍ信号生成回路

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