JP2011034474A - Wiring layout method and wiring layout device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring layout method and wiring layout device, capable of efficiently using a wiring area. <P>SOLUTION: The wiring layout device for performing a wiring layout along grid lines provided on wiring layers includes: a group setting means for grouping grid lines for each of the wiring layers to set a plurality of groups so as to be set to a grid width to be determined on the basis of the length of a projection portion of a signal line end; and a wiring means for selecting the groups according to a selection order to perform layout of wiring of a signal line for each of the wiring layers. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a wiring layout apparatus and a wiring layout method for performing wiring layout in a semiconductor integrated circuit.

  In a conventional semiconductor integrated circuit having a plurality of wiring layers, the ends of signal lines wired to each wiring layer are connected to each other through vias. At the end of each signal line, a protrusion called EOL (End Of Line) necessary for connecting the signal lines is provided.

  In the manufacturing process of a semiconductor integrated circuit, generally, a photoresist corresponding to a mask pattern is used to transfer a mask pattern onto a substrate. Since the end portion contracts, the EOL is set in consideration of the contraction of the signal line end portion.

  In a semiconductor integrated circuit, as the miniaturization of an element progresses and the wiring pattern of a signal line becomes finer, the end of the signal line becomes larger and the EOL tends to be set longer.

JP 2001-284455 A

  In recent semiconductor integrated circuits, as the wiring pattern becomes finer, the degree of contraction of the end of the signal line becomes relatively large. Therefore, the EOL is becoming relatively long as the element becomes finer. For this reason, there is a problem that a dead space in which wiring cannot be performed in the wiring region occurs due to EOL.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a wiring layout method and a wiring layout apparatus that can use a wiring area without waste.

  A wiring layout apparatus that performs wiring layout along grid lines provided on a wiring layer, wherein each wiring layer has a grid width determined based on a length of a protruding portion of a signal line end. A wiring layout having group setting means for setting a plurality of groups by grouping grid lines, and wiring means for laying out signal line wiring by selecting the group in accordance with a selection order for each wiring layer An apparatus is provided.

  The disclosed wiring layout apparatus can reduce the dead space of the wiring region caused by the protruding portion (EOL) of the signal line end, and has an effect that the wiring region can be used without waste.

It is a figure which shows the hardware structural example of a wiring layout apparatus. It is a figure explaining the functional structure of a wiring layout apparatus. It is a figure explaining grouping of the grid line by a group setting part. It is a figure which shows an example in the state by which the signal line was wired on the grouped grid line. It is a flowchart explaining operation | movement of a wiring layout apparatus. It is a flowchart explaining the process of step S506 by the signal line wiring order determination part in detail. It is a 1st flowchart explaining the detail of the process of step S507 by a wiring part. It is a 2nd flowchart explaining the detail of the process of step S507 by a wiring part. It is a 3rd flowchart explaining the detail of the process of step S507 by a wiring part. It is a figure which shows an example of the wiring layout by a wiring layout apparatus. It is a figure which shows the other example of the wiring layout by a wiring layout apparatus. It is a figure which shows the example which the dead space produced. It is a figure explaining the example which grouped the grid line into four groups.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram illustrating a hardware configuration example of a wiring layout apparatus. In FIG. 1, a wiring layout device 100 is a computer device, and includes a CPU (Central Processing Unit) 11, a memory unit 12, a display unit 13, an output unit 14, an input unit 15, a communication unit 16, It has a storage device 17 and a driver 18 and is connected to the system bus B.

  The CPU 11 controls the wiring layout device 100 according to a program stored in the memory unit 12. The memory unit 12 includes a RAM (Random Access Memory), a ROM (Read Only Memory), and the like. A program executed by the CPU 11, data necessary for processing by the CPU 11, and data obtained by processing by the CPU 11. Etc. are stored. A part of the memory unit 12 is allocated as a work area used for processing by the CPU 11.

  The display unit 13 displays various information required under the control of the CPU 11. The output unit 14 has a printer or the like, and is used for outputting various types of information in accordance with instructions from the user. The input unit 15 includes a mouse, a keyboard, and the like, and is used for a user to input various information necessary for the wiring layout apparatus 100 to perform processing. The communication unit 16 is a device that is connected to, for example, the Internet, a LAN (Local Area Network), and the like and controls communication with an external device. For example, a hard disk unit is used as the storage device 17 and stores data such as programs for executing various processes.

  A program for realizing the processing performed by the wiring layout apparatus 100 is provided to the wiring layout apparatus 100 by a recording medium 19 such as a CD-ROM (Compact Disc Read Only Memory). That is, when the storage medium 19 storing the program is set in the driver 18, the driver 18 reads the program from the storage medium 19, and the read program is installed in the storage device 17 via the system bus B. . When the program is activated, the CPU 11 starts its processing according to the program installed in the storage device 17. The medium for storing the program is not limited to a CD-ROM, and any medium that can be read by a computer may be used. The program for realizing the processing according to the present invention may be downloaded via the network by the communication unit 16 and installed in the storage device 17. Further, if the wiring layout device 100 is compatible with USB (Universal Serial Bus), it may be installed from an external storage device capable of USB connection. Further, if the wiring layout device 100 is compatible with a flash memory such as an SD card, it may be installed from such a memory card.

  The wiring layout apparatus 100 of the present embodiment will be described below. The wiring layout device 100 according to the present embodiment divides grid lines provided in each wiring layer into a plurality of groups when performing wiring layout of a semiconductor integrated circuit having a plurality of wiring layers. In the plurality of groups, the order of the groups used in the wiring layout is set in advance. The layout of wiring is performed by selecting groups in the set order and using grid lines included in the selected group.

  The function of the wiring layout apparatus 100 of this embodiment will be described below with reference to FIG. FIG. 2 is a diagram illustrating a functional configuration of the wiring layout apparatus.

  The wiring layout device 100 includes a floor planner 110, a macro arrangement setting unit 120, a power supply wiring unit 130, a cell arrangement unit 140, a group setting unit 150, a use group order setting unit 160, and a signal line wiring order setting unit. 170, a wiring unit 180, and a database 200.

  The database 200 stores a library 210, a netlist 220, and a design rule 230. The library 210 includes cell information indicating cells laid out by the wiring layout apparatus 100, macro information indicating macros, and the like. The net list 220 is connection information of circuits mounted on the semiconductor integrated circuit. The design rule 230 is a design rule determined in advance when designing the layout of the semiconductor integrated circuit.

  In the wiring layout apparatus 100 according to the present embodiment, the floor planner 110 refers to the library 210, the netlist 220, and the design rule 230, and before executing layout design, which circuit block is located on the chip of the semiconductor integrated circuit. Decide the outline of the layout. The floor planner 110 outputs the determined result as floor plan information 240. The output floor plan information 240 is stored in the database 200.

  The macro arrangement determination unit 120 determines a macro arrangement layout among the arrangements determined by the floor planner 110. The power supply wiring unit 130 performs power supply line wiring for the arranged macro. The cell arrangement unit 140 performs cell arrangement layout in the macro.

  The group setting unit 150 groups grid lines provided in the wiring layer. In this embodiment, grid line groups are set in advance. The group setting unit 150 groups grid lines based on the setting.

  Hereinafter, the grouping of grid lines by the group setting unit 150 according to the present embodiment will be described with reference to FIG. FIG. 3 is a diagram illustrating grouping of grid lines by the group setting unit.

  For example, six grid lines G1, G2, G3, G4, G5, and G6 are provided on the wiring layer 31 illustrated in FIG. The group setting unit 150 of this embodiment divides the grid lines G1 to G6 provided in the wiring layer 31 into two groups, for example, and performs grouping. In the wiring layer 31, the grid lines G1, G3, and G5 are grouped as a group A, and the grid lines G2, G4, and G6 are grouped as a group B. When wiring signal lines or the like to the wiring layer 31, wiring is performed on the grid lines G1 to G6.

  In the embodiment, group information related to a group to which each grid line belongs is set in advance, and may be stored in the database 200, for example. The group setting unit 150 refers to this group information and groups the grid lines provided in the wiring layer 31.

  For example, six grid lines G11, G12, G13, G14, G15, and G16 are provided in the wiring layer 32 illustrated in FIG. The grid lines G11 to G16 are provided so as to intersect perpendicularly with the grid lines G1 to G6 provided in the wiring layer 31 when the wiring layer 31 and the wiring layer 32 are laminated.

  The group setting unit 150 of this embodiment divides the grid lines G11 to G16 provided in the wiring layer 32 into two groups, for example, and performs grouping. In the wiring layer 32, the grid lines G11, G13, and G15 are grouped as a group C, and the grid lines G12, G14, and G16 are grouped as a group D. When wiring signal lines or the like to the wiring layer 32, wiring is performed on the grid lines G11 to G16. The group setting unit 150 refers to the group information stored in the database 200 and groups the grid lines provided in the wiring layer 32.

  FIG. 4 is a diagram illustrating an example of a state in which signal lines are wired on the grouped grid lines. In the wiring layer 31 shown in FIG. 4A, signal lines are wired to the grid lines included in the group A and the grid lines included in the group B, respectively. In the wiring layer 32 shown in FIG. 4B, signal lines are wired to the grid lines included in the group C and the grid lines included in the group D, respectively.

  When the wiring layer 31 and the wiring layer 32 are stacked, for example, the signal line wired to the grid line of the group A and the signal line wired to the grid line of the group C are connected by vias. The signal line wired to the grid line of group B and the signal line wired to the grid line of group D are connected by vias.

  In this embodiment, the distance between grid lines included in the group A (hereinafter referred to as grid width) WA and the distance between grid lines included in the group B (hereinafter referred to as grid width) WB are defined as EOL ( End Of Line). The same applies to the distance between grid lines included in the group C (hereinafter referred to as grid width) WC and the distance between grid lines included in the group D (hereinafter referred to as grid width) WD. The EOL is a protrusion that is necessary for connecting the wirings at the end of each wiring.

  Returning to FIG. 2, the use group order setting unit 160 sets the order of groups used for wiring from the grouped groups. The use group order setting unit 160 according to the present embodiment determines the order so that a group having few unused portions in a grid line is used first. For example, in the wiring layer 31 shown in FIG. 4, since the unused portion is less in the group A, the order of use for the wiring is the group A and the group B.

  The signal line wiring order setting unit 170 sets the order of signal lines to be wired when wiring signal lines. The signal line wiring order setting unit 170 according to the present embodiment sets the order so that the clock signal line and the other signal lines are wired in this order. Further, when setting the wiring order in the clock signal line and other signal lines, the signal line wiring determining unit 170 sets the order so that the signal lines are sequentially routed from the signal line of the signal having the highest frequency, for example. In the case of signal lines having the same frequency, for example, the order is set so that the wirings are wired in the order of increasing length.

  The wiring unit 180 routes the signal lines in the order set by the signal line wiring order setting unit 170 on the grid lines included in the group in which the order used by the use group order setting unit 160 is set.

  Hereinafter, the operation of the wiring layout apparatus 100 of this embodiment will be described with reference to FIG. FIG. 5 is a flowchart for explaining the operation of the wiring layout apparatus. In the present embodiment, the grid lines provided in each wiring layer are grouped by the group setting unit 150 before the processing described below is started.

  In the wiring layout device 100, the floor planner 110 performs the floor plan and outputs the floor plan information 240 (step S501). The floor plan information 240 is stored in the data pace 200.

  Next, the macro arrangement setting unit 120 performs macro arrangement layout with reference to the floor plan information 240 and the library 210 (step S502). When the macro layout is completed, the power supply wiring unit 130 performs a power supply line layout for supplying power to the macro (step S503). When the wiring layout of the power supply lines is completed, the cell placement unit 140 refers to the library 210, the netlist 220, and the design rule 230 and performs the placement layout of the cells (step S504).

  Next, the use group order setting unit 160 sets the order of groups of grid lines used for wiring (step S505). The use group order setting unit 160 of this embodiment sets the order of selection as a group to be used in order from the group with few unused portions after the macro layout, power line layout, and cell layout are completed. Set.

  When the group of grid lines to be used is set, the signal line wiring order setting unit 170 sets the order of signal line wiring (step S506). When the order of signal line wiring is set, the wiring unit 180 performs wiring in the set order (step S507).

  Details of the processing in step S506 and the processing in step S507 will be described below. FIG. 6 is a flowchart for explaining in detail the processing of step S506 by the signal line wiring order determination unit.

  The signal line wiring order setting unit 170 refers to the floor plan information 240 and calculates the temporary net length of the clock signal line and the temporary net lengths of other signal lines (step S61). The temporary net length is a length from one end of the signal line to the other end determined in the floor plan information 240.

  Next, the signal line wiring order setting unit 170 sets the wiring order of the clock signal lines (step S62). The signal line wiring order setting unit 170 of this embodiment sets the wiring order in order from the clock signal line that supplies a clock signal having a high frequency among the clock signal lines. For clock signal lines that supply clock signals of the same frequency, the wiring order is set in order from the longer temporary net length calculated in step S61.

  Next, the signal line wiring order setting unit 170 sets the wiring order of other signal lines (step S63). The signal line wiring order setting unit 170 of this embodiment sets the wiring order in order from the signal line that supplies a signal having a high frequency. In the case of signal lines that supply signals of the same frequency, the wiring order is set in order from the signal line having the long temporary net length calculated in step S61. When the temporary net lengths are the same, the signal line wiring order setting unit 170 refers to the floor plan information 240, compares the wiring congestion levels, and sets the wiring order in descending order of the wiring congestion levels.

  Next, details of the processing in step S507 performed by the wiring unit 180 will be described with reference to FIGS. The wiring unit 180 of this embodiment first performs wiring layout of clock signal lines, and then performs wiring layout of other signal lines.

  FIG. 7 is a first flowchart illustrating details of the process in step S507 by the wiring unit.

  The wiring unit 180 first performs wiring along the clock signal line wiring order set by the signal line wiring order setting unit 170 (step S701). Note that the use order of the grid line groups used for the clock signal line wiring in step S701 is as set in the use group order setting unit 160 in step S505 of FIG.

  The wiring unit 180 selects a group of grid lines set to be used first (hereinafter referred to as the first group), and determines whether or not there is an unused part in which the clock signal line can be arranged in the first group ( Step S702). In step S702, when there is an unused portion, the wiring unit 180 performs layout of the wiring along the grid lines included in the first group of clock signal lines (step S703).

  Next, the wiring unit 180 determines whether the grid line group is switched from the first group to another grid line group (step S704). If it has not been switched to another grid line group in step S704, the process proceeds to the process shown in FIG.

  In step S702, when there is no unused portion in the first group, the wiring unit 180 selects and switches the group (second group) set as the second used group of the grid line to be used ( Step S705). Then, the wiring unit 180 returns to step S701 and performs the wiring of the clock signal line using the second group of grid lines.

  If the grid line group has been switched from the first group to another grid line group in step S704, the grid line group to be used next is returned to the first group (step S706), as shown in FIG. Proceed to processing.

  FIG. 8 is a second flowchart illustrating details of the process in step S507 by the wiring unit.

  The wiring unit 180 determines whether or not the layout of all the clock signal lines has been completed (step S801). When the layout of all the clock signal lines is completed, the wiring unit 180 performs the layout of the other signal lines (step S802). If the layout of all clock signal lines has not been completed, the wiring unit 180 repeats the processing from step S701 onward.

  The wiring unit 180 determines whether there is an unused portion in the first group, similarly to step S702 (step S803). In step S803, if there is an unused part in the first group, the wiring unit 180 lays out the wiring of the signal line (step S804), and proceeds to the process of FIG. In step S803, if there is no unused portion in the first group, the group of grid lines used for signal line wiring is switched to the second group (step S805), and the processes in and after step S802 are performed.

  FIG. 9 is a third flowchart illustrating details of the process in step S507 by the wiring unit.

  When the signal line wiring layout is completed in step S804, the wiring unit 180 determines whether the grid line group is switched from the first group to another grid line group (step S901). If the grid line group is switched to another grid line group in step S901, the wiring unit 180 returns the grid line group to be used next to the first group (step S902). If the group has not been switched to another grid line group in step S901, the wiring unit 180 determines whether or not the layout of all signal line wirings has been completed (step S903).

  If the layout of all signal lines is not completed in step S903, the wiring unit 180 repeats the processes in and after step S802.

  If the wiring layout of all signal lines has been completed in step S903, the wiring unit 180 ends the wiring layout process.

  FIG. 10 is a diagram illustrating an example of a wiring layout by the wiring layout apparatus. FIG. 10 shows a state in which the wiring layer 31 and the wiring layer 32 are stacked and the signal line wired to the wiring layer 31 and the signal line wired to the wiring layer 32 are connected.

  For the grid lines G1 to G6, the grid lines G1, G3, and G5 are group A, the grid lines G2, G4, and G6 are group B, and the grid lines G11 to G16 are group C. Grid lines G12, G14, and G16 are group D. The grid lines G1 to G6 and the grid lines G11 to G16 are orthogonal to each other, and the signal lines wired on the grid lines of the group A and the signal lines wired on the grid lines of the group C are connected by vias V. The signal lines wired on the group B grid lines and the signal lines wired on the group D grid lines are connected by vias V.

  In this embodiment, when the grid lines are grouped, the grid width of the grid lines in each group is determined based on the EOL length of the signal lines. That is, in this embodiment, the grid width of a group is determined so that EOLs of signal lines that are adjacently wired on the same grid line orthogonal to the grid lines included in the group do not collide with each other.

  For example, the grid width WA, which is the distance between the grid line G1 and the grid line G3 included in the group A, does not collide between EOLs of signal lines that are routed adjacent to the same grid line in the group C grid lines. Set to width. Also, for example, the grid width WD, which is the distance between the grid line G12 and the grid line G14, is equal to the EOLs of the signal lines H wired adjacently on the grid line G2 of the group B orthogonal to the grid line of the group D. The width is set so that it does not collide.

  Specifically, the grid width WD is the minimum interval between the grid width WD ≧ 2 × Le + EOL. Note that Le is the EOL length. The same applies to the grid width WA, the grid width WB, and the grid width WC. Therefore, in this embodiment, for example, when grid lines provided in the wiring layer are divided into N groups, N is N ≧ (minimum interval between 2 × Le + EOL) / unit grid width.

  Note that the minimum interval between EOLs is the minimum distance between the ends of the signal lines wired on the same grid line and the ends of the signal lines, and is the length Ls shown in FIG. The length Ls that is the minimum interval between EOLs is determined in advance by, for example, a design rule. The unit grid width is the minimum inter-grid distance determined based on the design rule, and is the grid width before grouping the grid lines provided in the wiring layer, and is indicated by the grid width WG shown in FIG. It is.

  As described above, in this embodiment, the grid width is set based on the EOL length, and the grid lines are grouped. Since the signal lines are wired using the grouped grid lines, the dead space of the wiring area caused by EOL can be reduced, and the wiring area can be used without waste. In this embodiment, the signal line can be wired without considering a wiring area for EOL.

  In this embodiment, for example, as shown in FIG. 11, even when a new signal line is wired, it is possible to avoid the failure caused by EOL.

  FIG. 11 is a diagram illustrating another example of the wiring layout by the wiring layout apparatus. FIG. 11 shows an example in which signal lines H1 to H4 are added to the wiring layout shown in FIG. In the example of FIG. 11, the signal line H1 is wired on the grid line G3 that is an unused part of the group A, and the signal line H2 is wired on the grid line G4 that is an unused part of the group B. Further, the signal line H3 is wired on the grid line G13 which is an unused part of the group C, and the signal line H4 is wired on the grid line G12 which is an unused part of the group D.

  In this embodiment, since the grid width in the group is set to be longer than twice the EOL length, the EOLs of the signal lines wired on the same grid line do not collide with each other, and an EOL failure is avoided. it can.

  In this embodiment, for example, when connecting a signal line to a cell terminal or connecting signal lines wired in wiring layers having different grid line pitches, the signal line is further extended from the grid line. Also good.

  When the grid lines are not grouped as in the present embodiment, an area where the EOL is wired cannot be secured and a dead space occurs. FIG. 12 is a diagram illustrating an example in which a dead space has occurred. As shown in FIG. 12, when signal lines are routed without grouping grid lines, dead space Ds that cannot be routed due to the presence of EOLs occurs. From the above, it can be seen that the wiring area is used without waste in this embodiment.

  Next, an example in which grid lines are grouped into four groups will be described with reference to FIG. FIG. 13 is a diagram for explaining an example in which grid lines are grouped into four groups.

  In the example of FIG. 13, the grid lines G1 to G6 are grouped into four groups. Grid lines G1 and G5 are group A, grid lines G2 and G6 are group B, grid line G3 is group C, and grid line G4 is group D. Similarly, the grid lines G11 to G16 are grouped into four groups. Grid lines G11 and G15 are group O, grid lines G12 and G16 are group P, grid line G13 is group Q, and grid line G114 is group R.

  In this embodiment, when N is an integer of 1 or more, the EOL length is the length Le, and the grid width before grouping is the width WG, if N ≧ (2 × Le + minimum interval between EOLs) / WG The grid lines can be divided into N groups.

  Thus, in this embodiment, the wiring area can be used without waste. Therefore, if the present embodiment is applied to a wiring layout that has conventionally been made of four layers due to the presence of dead space Ds, EOL failure can be avoided and dead space Ds can be eliminated, resulting in a two-layer wiring layout. be able to. Therefore, the cost can be reduced.

The present invention may have the following configurations as described below.
(Appendix 1)
A wiring layout device that performs wiring layout along grid lines provided on a wiring layer,
Group setting means for setting a plurality of groups by grouping the grid lines for each wiring layer, so that the grid width is determined based on the length of the protruding portion of the signal line end,
A wiring layout apparatus comprising: wiring means for laying out signal line wiring by selecting the group in accordance with a selection order for each wiring layer.
(Appendix 2)
The wiring layout apparatus according to claim 1, wherein the grid width is determined by a length of the protruding portion and a minimum interval between the protruding portions.
(Appendix 3)
The wiring layout device according to claim 1 or 2, further comprising: a group order setting unit that sets the selection order in order of decreasing number of portions wired on the grid lines included in the group.
(Appendix 4)
A signal line wiring order setting unit configured to set a wiring order of signal lines other than the clock signal line included in the signal line after the wiring order of the clock signal line included in the signal line is set; The wiring layout device according to any one of appendices 1 to 3.
(Appendix 5)
The wiring layout device according to appendix 4, wherein the wiring order of at least the clock signal line or the other signal lines is set in order from a signal line having a higher frequency.
(Appendix 6)
6. The wiring layout apparatus according to appendix 5, wherein the wiring order of at least the clock signal line or the other signal lines is set in the order of the length of the signal lines when the frequencies are the same.
(Appendix 7)
7. The wiring layout apparatus according to appendix 6, wherein the wiring order of the other signal lines having the same signal line length is set in the order of the signal lines wired at a position where the degree of congestion is high.
(Appendix 8)
The wiring means includes
The wiring layout device according to any one of appendices 4 to 7, wherein the other signal lines are laid out after the clock signal lines are laid out.
(Appendix 9)
A wiring layout method by a wiring layout device that performs wiring layout along grid lines provided on a wiring layer,
A group setting procedure for setting a plurality of groups by grouping grid lines for each wiring layer, so that the grid width is determined based on the length of the protruding portion of the signal line end,
And a wiring procedure for laying out signal line wiring by selecting the group in accordance with a selection order for each wiring layer.
(Appendix 10)
A wiring layout program executed in a wiring layout apparatus that performs wiring layout along grid lines provided on a wiring layer,
In the wiring layout device,
A group setting step of setting a plurality of groups by grouping grid lines for each wiring layer so as to be a grid width determined based on the length of the protruding portion of the signal line end;
A wiring layout program that executes a wiring step of laying out signal line wiring by selecting the group in accordance with a selection order for each wiring layer.

  The present invention is not limited to the specifically disclosed embodiments, and various modifications and changes can be made without departing from the scope of the claims.

DESCRIPTION OF SYMBOLS 100 Wiring layout apparatus 110 Floor planner 120 Macro arrangement | positioning part 130 Power supply wiring part 140 Cell arrangement part 150 Group setting part 160 Use group order setting part 170 Signal line wiring order setting part 180 Wiring part 200 Database 240 Floor plan information

Claims (5)

A wiring layout device that performs wiring layout along grid lines provided on a wiring layer,
Group setting means for setting a plurality of groups by grouping the grid lines for each wiring layer, so that the grid width is determined based on the length of the protruding portion of the signal line end,
A wiring layout apparatus comprising: wiring means for laying out signal line wiring by selecting the group in accordance with a selection order for each wiring layer.   2. The wiring layout apparatus according to claim 1, further comprising group order setting means for setting the selection order in order of decreasing number of portions wired on grid lines included in the group.   A signal line wiring order setting unit configured to set a wiring order of signal lines other than the clock signal line included in the signal line after the wiring order of the clock signal line included in the signal line is set; The wiring layout device according to claim 1 or 2. The wiring means includes
4. The wiring layout apparatus according to claim 3, wherein the other signal lines are laid out after the clock signal lines are laid out. A wiring layout method by a wiring layout device that performs wiring layout along grid lines provided on a wiring layer,
A group setting procedure for setting a plurality of groups by grouping grid lines for each wiring layer, so that the grid width is determined based on the length of the protruding portion of the signal line end,
And a wiring procedure for laying out signal line wiring by selecting the group in accordance with a selection order for each wiring layer.

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