JP2011029479A - Manufacturing method and manufacturing system of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device capable of suppressing a variation of a film thickness after polishing. <P>SOLUTION: In the method for manufacturing the semiconductor device, a change of a polishing rate caused by a change of the state of a polishing machine is estimated by using a model formula based on an equipment parameter during a polishing process to calculate a polishing time of a film to be polished. In this time, the thickness of each film to be polished before polishing is recognized for each wafer, and the polishing time is calculated by correcting the amount of the change of the polishing rate caused by a film thickness difference. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a manufacturing method and a manufacturing system of a semiconductor device, and relates to a manufacturing method and a manufacturing system for controlling a film thickness of an interlayer insulating film after chemical mechanical polishing (CMP) in a wiring formation process or the like.

  In recent years, with the miniaturization of semiconductor devices, variations in processing of manufacturing facilities affect electrical characteristics, and finally lead to a decrease in yield of semiconductor devices. In order to suppress processing variations due to fluctuations in manufacturing equipment against such problems, APC (Advanced Process Control) is performed so that the diffusion parameters such as finished dimensions and film thickness become target values in each processing step. Many techniques are used to eliminate the influence on electrical characteristics.

Particularly in the CMP process, the polishing rate changes greatly due to a change in the state of a consumable member such as a pad in the CMP apparatus. Therefore, in order to obtain a desired polishing film thickness, run-to-run control such as feedforward control and feedback control is used.
For example, in the technique described in Patent Document 1, the polishing film thickness at the time of product polishing is measured with a film thickness measuring instrument, and from the relational expression between the product polishing film thickness and the polishing film thickness of the blank wafer that are grasped in advance, Estimate the polishing rate of the blank wafer. As a result, the change in the apparatus state is grasped, and an appropriate polishing time is calculated at the time of the next lot processing using the polishing rate of the blank wafer, and run-to-run control for polishing is performed.

Japanese Patent No. 3859475

  In the technique disclosed in Patent Document 1, film thickness measurement is essential to grasp the polishing rate. In general, it takes about one hour to obtain an in-line film thickness measurement result from the polishing process. During this time, the state of the polishing apparatus changes and the polishing rate of the film to be polished changes. Therefore, since the real-time polishing rate of the film to be polished cannot be obtained, it is difficult to control the film thickness after polishing to a desired value.

  In the technique disclosed in Patent Document 1, the relational expression between the thickness of the film to be polished (polishing amount) removed by polishing in the product and the film thickness of the film to be polished removed by blank wafer removal. However, the relational expression differs for each type of semiconductor device. Therefore, in the case of multi-product production, desired polishing variation control performance cannot be obtained unless optimum values are prepared for all products. Actually, since it is difficult to prepare optimum characteristic values for all varieties, it is difficult to use the above-described conventional technology in a mass production factory for multi-variety production.

  In view of the above, an object of the present invention is to provide a method for manufacturing a semiconductor device capable of suppressing variations in film thickness after polishing.

  In order to achieve the above object, the present invention employs the following means.

First, an example of the present invention is a method for manufacturing a semiconductor device, comprising a step of depositing an insulating film as a film to be polished on a wafer made of a semiconductor substrate, and a step of polishing the film to be polished to a predetermined film thickness. It is. The step of polishing the film to be polished includes the step (a) of collecting the first equipment parameters when polishing the wafer of the nth lot when n is a positive integer, and the first equipment parameters (B) for calculating the polishing rate of the insulating film on the blank wafer of the nth lot and the film thickness of the film to be polished before polishing for each chamber in which the film to be polished of the (n + 1) th lot is formed (C) for each of the wafers, (d) for predicting the polishing rate of the insulating film for each of the n + 1 lot blank wafers, and for each chamber ascertained in the step (c), A step (e) of calculating a polishing time t _{(n + 1)} of the _{(n + 1) th} lot from the film thickness of the film to be polished of each wafer and the polishing rate of the _{(n + 1) th} lot obtained in the step (d); Polishing equipment (F) polishing the film to be polished on the wafer of the _{(n + 1) th} lot for the polishing time t _{(n + 1)} . In the step (a), “collecting the first equipment parameter” means “collecting the value of the first equipment parameter”.

  According to this method, the polishing rate of the insulating film on the blank wafer is predicted using the first equipment parameter, and the optimal polishing time for the wafer of the (n + 1) th lot is calculated. Compared with the conventional polishing method for measuring the film thickness of the film, the state of the polishing apparatus can be grasped in real time, and the polishing time in consideration of this can be calculated. Therefore, it becomes possible to control the film thickness to be polished with high accuracy. In addition, since film thickness measurement that requires a long time during polishing is not performed, the time required for manufacturing a semiconductor device can be shortened.

  In addition, when the polishing time is calculated using an equation having a correction term considering the film thickness of the film to be polished before polishing, the film thickness of the film to be polished can be controlled with higher accuracy, The film thickness variation can be further reduced.

  As the first parameter, for example, at least one selected from a platen rotational torque at the time of product polishing, the number of pad accumulated treatments, a slurry flow rate, a head pressure, and the like is used.

In addition, a semiconductor device manufacturing system according to an example of the present invention includes a film forming apparatus having a chamber for forming an insulating film, which is a film to be polished, on a wafer made of a semiconductor substrate, and polishing for polishing the film to be polished. An apparatus, a first monitoring apparatus that collects first equipment parameters when polishing the n-th wafer when n is a positive integer, and a blank of the n-th lot from the first equipment parameters The polishing rate of the insulating film on the wafer is calculated, and the film thickness of the film to be polished before being formed on each of the wafers ascertained for each chamber, and the insulating film on the blank wafer in the (n + 1) th lot The polishing time t _{(n + 1)} of the _{(n + 1) th} lot from the polishing rate of the _{(n + 1) th} lot, and the _{(n + 1) th} lot of the polishing calculated by the APC system. A production management device for instructing the polishing apparatus to time t _{(n + 1)} .

  With such a manufacturing system, equipment parameters (first equipment parameters) at the time of forming a film to be polished are collected, the polishing rate of the insulating film on the blank wafer of the nth lot is acquired, and the blank of the (n + 1) th lot is obtained. The polishing rate of the insulating film on the wafer can be acquired. In addition, since an appropriate polishing time can be calculated using the polishing rate of the insulating film and the film thickness before polishing of the film to be polished on the blank wafer of the (n + 1) th lot, the film thickness variation of the film to be polished is effective. Can be suppressed.

  The manufacturing system may be provided with a film thickness measuring device for measuring the film thickness of the film to be polished, or the APC system may use a model equation to determine the film thickness of the film to be polished from the equipment parameters during the film forming process. The thickness may be predicted.

  As described above, according to the method for manufacturing a semiconductor device which is an example of the present invention, the real-time polishing rate is predicted from the equipment parameters of the polishing apparatus, and the polishing formula on the product is polished after the prediction formula is used. The film thickness can be controlled to a desired value. Moreover, according to the manufacturing system which is an example of this invention, the above-mentioned manufacturing method is realizable.

(A), (b) is sectional drawing which shows roughly the semiconductor device by which the embedded wiring was provided in the recessed part formed in the insulating film on a semiconductor substrate. It is a figure which shows the structure of the manufacturing system which concerns on the 1st Embodiment of this invention. FIG. 6 is a diagram showing a manufacturing flow for controlling the thickness of an interlayer insulating film to be constant in the method for manufacturing a semiconductor device according to the first embodiment. It is a figure which shows the structure of the manufacturing system which concerns on the 2nd Embodiment of this invention. In the manufacturing method of the semiconductor device concerning a 2nd embodiment, it is a figure showing the manufacturing flow for controlling the film thickness of an interlayer insulation film uniformly.

  As described above, the inventors need to grasp the polishing rate of the film to be polished in real time in order to improve the controllability of the post-polishing film thickness of the insulating film (film to be polished) in the wiring formation process. I thought there was. However, since it takes a long time to measure the film thickness of the film to be polished, the present inventors can grasp the film thickness of the film to be polished without measuring the film thickness of the film to be polished during polishing. Various studies were conducted on the method.

  As a result, if the polishing rate is predicted based on the equipment parameters of the film forming apparatus and the CMP apparatus, the polishing rate can be grasped in a short time, and the controllability of the film thickness after polishing can be improved. . In addition, the present embodiment has found from an original experimental result that the polishing rate of the film to be polished tends to decrease as the film thickness before polishing of the film to be polished increases, and the polishing rate is predicted by the prediction formula of the polishing rate. It was conceived that by incorporating a correction term depending on the film thickness, the prediction accuracy of the polishing rate can be further improved. Embodiments of a method for manufacturing a semiconductor device according to the present invention will be described below.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. 1A and 1B show wirings (for example, embedded wirings) formed in an insulating film (first interlayer insulating film; film to be polished) on a wafer made of a semiconductor substrate (not shown). It is sectional drawing which shows the provided semiconductor device roughly. 1A shows the semiconductor device before polishing the interlayer insulating film, and FIG. 1B shows the semiconductor device after polishing the interlayer insulating film. FIG. 2 is a diagram showing the configuration of the manufacturing system according to the present embodiment, and FIG. 3 is a diagram for controlling the film thickness of the interlayer insulating film to be constant according to the semiconductor device manufacturing method of the present embodiment. It is a figure which shows a manufacture flow. In the semiconductor device shown in FIGS. 1A and 1B, a semiconductor element is already formed at a predetermined position on a semiconductor substrate (not shown), and the process will be described from the step of covering the element with an insulating film.

  First, as shown in FIG. 1A, after a first interlayer insulating film 1 is deposited on a semiconductor substrate, a wiring trench 2 having a predetermined pattern is formed by photolithography and etching. 1 to form. Next, a barrier metal film 3 made of tantalum nitride (TaN) or the like and a wiring material film 4 made of Cu or Cu alloy are sequentially deposited, and then the barrier metal film 3 and the wiring material film 4 are polished by CMP. The upper surface of the one-layer insulating film 1 is exposed. As a result, a lower layer wiring 10 composed of the barrier metal film 3 and the wiring material film 4 and embedded in the trench 2 is formed.

  Subsequently, a diffusion preventing film 5 made of, for example, a silicon nitride film and covering the lower layer wiring 10 and a second interlayer insulating film 6 are sequentially deposited. When the lower layer wiring 10 is formed by the CMP described above, the upper surface position of the wiring portion is generally lower than the upper surface position of the insulating film 1 due to the difference in polishing rate between the wiring material film 4 and the first interlayer insulating film 1. A step occurs. For this reason, a step remains even after the diffusion prevention film 5 and the second interlayer insulating film 6 covering the lower layer wiring 10 are formed. In order to eliminate this step and to adjust the film thickness of the second interlayer insulating film 6 to a desired thickness, the second interlayer insulating film 6 is polished by CMP.

  As shown in FIG. 1B, the level difference on the upper surface of the second interlayer insulating film 6 is relaxed after polishing. The film thickness of the second interlayer insulating film 6 after the polishing process of the second interlayer insulating film 6 affects the depth shape of vias and trenches of the upper wiring to be formed thereafter. If the film thickness of the second interlayer insulating film 6 varies, it causes fluctuations in inter-wiring capacitance and poor embedding at the time of embedding the wiring material. Therefore, it is necessary to control the desired film thickness to a constant value. .

  Next, a method for controlling the film thickness of the second interlayer insulating film after the insulating film CMP to a constant value will be described with reference to FIGS.

  First, as shown in FIG. 2, the semiconductor device manufacturing system according to the present embodiment includes a film forming apparatus 11 for forming an insulating film, a film thickness measuring instrument 17, a CMP apparatus (polishing apparatus) 19, and a CMP. A facility monitoring system (first monitoring device) 21 that collects facility parameters of the device 19, an APC system (information processing device; Automatic Program Control System) 13 that calculates a polishing time by the CMP device 19, and lot progression control are performed. A production management device (Manufacturing Execution System; MES) 15 for instructing the polishing time to the CMP device 19 is also provided. In general, in a mass production line, a wafer is processed in the order of a film forming apparatus 11 and a CMP apparatus 19 in units of a plurality of lots. As long as the film forming apparatus 11 has a plurality of chambers, the insulating film may be formed not only by the CVD method but also by other methods. In the following description, “collecting equipment parameters” means “collecting equipment parameter values”.

  The wafer processing flow and data processing for each lot will be described below.

  First, when a lot is processed by the film forming apparatus 11, information on the processing chamber of each wafer is stored in the APC system 13 in association with (associated with) a wafer ID that is wafer specific information. Thereafter, the film thickness measuring device 17 measures the film thickness of the insulating film formed by the film forming apparatus 11. Next, each film thickness data is associated with (associated with) the wafer ID and transmitted to the APC system 13 and stored in the APC system 13 as data associated with the wafer ID, the processing chamber, and the film thickness. Here, in order to minimize the film thickness measurement time by the film thickness measuring device 17, one wafer is selected for each film forming chamber (three in the case of three chamber processing), and the film thickness of the insulating film is measured. For unmeasured wafers, the chamber information may be referred to and the measured values may be stored for each chamber. In other words, the APC system 13 may store information in which the chamber in which the wafer is processed and the representative value of the film thickness of the insulating film in the wafer processed in the chamber are associated with each other. Note that the insulating film thickness of at least one wafer is measured for each film forming chamber because the state of the apparatus differs depending on the film forming chamber, and variation among the film forming chambers is large.

  Next, when the lot processing proceeds to the CMP apparatus 19, the MES 15 requests the APC system 13 for the polishing time, and the APC system 13 sets an appropriate polishing time for the wafer of the lot by the polishing time calculation method described below. The calculated polishing time is returned to the MES 15. The MES 15 instructs this polishing time to the CMP apparatus 19, and the CMP apparatus 19 performs polishing for the polishing time specified by the MES 15. Equipment parameter data at the time of polishing is collected by the equipment monitoring system 21 and transmitted from the equipment monitoring system 21 to the APC system 13.

  Here, the APC system 13 prepares in advance a model equation for predicting the polishing rate of the insulating film on the blank wafer (hereinafter simply referred to as “blank wafer polishing rate”) based on the equipment parameters, This is stored. At the same time as receiving the equipment parameter data, the APC system 13 substitutes the equipment parameters received in the model formula, and predicts the polishing rate in the lot (n-th lot). The polishing rate is used to calculate the polishing time for subsequent lot processing.

  Here, the blank wafer is a wafer in which an insulating film made of the same silicon oxide or the like as the film to be polished is formed on a semiconductor substrate. When a wafer having a trench pattern is used, noise generated by the trench pattern is included in the equipment parameters. Therefore, in the method of this embodiment, it is preferable to use a blank wafer for prediction of the polishing rate.

  As a formula for calculating the polishing rate of the blank wafer, for example, the following formula (1) can be used. Expression (1) is a composite expression that expresses the polishing rate R of the blank wafer by the equipment parameters p1 to pn of the CMP apparatus, the coefficients a1 to an, and the constant b.

R = a1 * p1 + a2 * p2 ... + an * pn + b (1)
In equation (1), the CMP equipment parameters p1 to pn may be measured values acquired at specific timings or statistical values. The statistical value refers to, for example, an average value, median value, standard deviation, variance, range (maximum value−minimum value), etc. of equipment parameters acquired a plurality of times during one processing. In this case, the coefficients a1 to an and the constant b are, for example, each statistical value of the equipment parameter acquired over a plurality of times of processing and polishing of the blank wafer in the processing processing in which the statistical value of each equipment parameter is acquired. It can be obtained by multiple regression analysis with the actual measured value of the rate as a target.

  The equipment parameters used as variables p1 to pn in equation (1) may be appropriately selected equipment parameters having a high correlation with the polishing rate R by variable determination methods such as multivariate analysis and variable increase / decrease method. . The calculation formula for the polishing rate R is not limited to a linear polynomial, and a quadratic function, an exponential function, a logarithmic function, or the like of equipment parameters may be used. The equipment parameters acquired from the CMP apparatus 19 are, for example, a platen rotational torque, a conditioner rotational torque, the number of pad accumulated treatments, a slurry flow rate, a head pressure, and the like.

  Next, the polishing method of this embodiment will be described with reference to FIG.

  First, in step S1 of FIG. 3, the APC system 13 collects, for each wafer, equipment parameters at the time of CMP polishing for the n-th wafer processed in the CMP process. Here, n is a positive integer (the same applies to the following description).

Next, in step S2, the APC system 13 calculates the polishing rate R _(n) of the _n-th blank wafer during the CMP polishing process. Here, when calculating the polishing rate, in the case of a polishing apparatus that performs polishing with a plurality of heads, it is desirable to calculate the polishing rate for each head and store the polishing rate data for each head in a memory or the like in the APC system 13. . In addition, an average value of polishing rates of a plurality of wafers in a lot, or a weighted average value obtained by applying a different weighting factor to the polishing rate of each wafer can be used as the polishing rate R _(n) .

Next, in step S3, after an insulating film (second interlayer insulating film 6 in FIG. 1A) is formed on the (n + 1) th wafer processed in the CMP process, the film thickness Tch for each film forming chamber. _The film thickness measuring device 17 measures _{(n + 1)} for each wafer, and sends the measured value to the APC system 13. The APC system 13 stores film thickness measurement value data.

Next, in step S4, a blank wafer polishing rate R _{(n + 1)} at the time of polishing of the _{(n + 1) th} lot is predicted. In this step, it is predicted that the polishing rate R _{(n + 1)} is substantially equal to the polishing rate R _(n) of the _n-th blank wafer, that is, R _{(n + 1)} = R _(n) . This is because the state of the CMP apparatus 19 does not change greatly between the n-th lot and the n + 1-th lot, so that it can be approximated that the polishing rate at the n-th lot processing is almost the same as the polishing rate at the n + 1-th lot processing. .

When the polishing rate change for each lot is so large that the polishing rate of the nth lot and the n + 1th lot cannot be approximated, or when it is desired to increase the prediction accuracy, the polishing rate R _{(n + 1) of the (n + 1) th} lot is performed by the following two methods. ₎ Can also be predicted.

  In the first prediction method, the equipment parameters when the wafer of the (n + 1) th lot is processed are estimated from the past time series trend, and the estimated value is substituted into the equation (1) for prediction. For example, when m is a positive integer, the time series change of each equipment parameter used in Equation (1) at the time of the most recent m lot processing before n + 1 lot processing is represented by a function using m as a variable. By substituting m + 1, the equipment parameters at the time of processing n + 1 lots are estimated. This function may be any function such as a linear function or a quadratic function.

  In the second prediction method, the polishing rate when the (n + 1) th lot is processed is predicted from the past polishing rate trend. When m is a positive integer, the time series change of the polishing rate at the time of the most recent m lot processing before n + 1 lot processing is expressed by a function having m as a variable, and m + 1 is substituted into the function formula at the time of n + 1 lot processing. Estimate the polishing rate.

The example in which the lot unit prediction is performed in step S4 has been described above, but R _{(n + 1)} may be predicted in wafer units. Note that even when the change in the polishing rate for each lot is small, it is possible to make a detailed prediction for R _{(n + 1)} as described above, but the approximation of R _{(n + 1)} = R _(n) shortens the computation time. This is more preferable. In this case, since the control method is simple, there is an advantage that it can be easily improved when a problem occurs.

Next, in step S5, the polishing time (for each film forming chamber) t _{(n + 1)} of the wafer of the _{(n + 1) th} lot is calculated for each wafer by the equation (2).

t _{(n + 1)} = (Tt−Tch _{(n + 1)} ) / R _{(n + 1)} + F _(Tch) (2)
Here, Tch _(n) is the film thickness of each film forming chamber of the nth lot, R _(n) is the predicted polishing rate of the insulating film in the blank wafer of the nth lot, and R _{(n + 1)} is the processing of the n + 1th lot. The predicted value of the polishing rate of the insulating film on the blank wafer at the time, Tt is the target remaining film thickness. F _(Tch) is a polishing time correction term and can be expressed as c * Tch + d as a function of Tch, for example, a linear function of Tch. “c” and “d” are coefficients, and the product polishing film thickness and the target polishing film thickness (Tt) when the lot subjected to the film thickness condition in the experiment is processed with the polishing time calculated by only the first item of Expression (2). It can be determined by estimating an appropriate polishing time from the difference from -Tch _{(n + 1)} ). Here, if c and d are prepared for each product type and each product layer, the accuracy of the polishing time can be further improved, and the film thickness of the film to be polished can be accurately set to a desired value. As R, it is desirable to use a polishing rate for each head.

Next, in step S6, the wafer of the _{(n + 1) th} lot is polished using t _{(n + 1)} calculated in step S5 as the polishing time.

  In step S7, n is replaced with n + 1, and the process returns to step 1 above. Thereafter, by repeating steps S2 to S7 (this step), CMP polishing is sequentially performed with a polishing time reflecting the latest polishing rate. Thereafter, steps S1 to S7 are repeated as many times as necessary.

In the method of manufacturing a semiconductor device according to this embodiment, equipment parameters are collected in step S1, the polishing rate of the blank wafer (upper insulating film) of the (n + 1) th lot in step S4, and the polishing time t in step S6. _Since the calculation of _{(n + 1)} requires an overwhelmingly short time compared to the measurement of the film thickness of the film to be polished, the polishing rate for the latest blank wafer can always be grasped by prediction. For this reason, it is possible to grasp the polishing rate in real time as compared with the conventional method in which the film thickness is measured during polishing, and high-precision polishing is possible. Therefore, according to the manufacturing method of the present embodiment, when a plurality of buried wirings are formed, the interlayer insulating film can be planarized while controlling the interlayer insulating film thickness to a desired value. Furthermore, the polishing rate can be predicted more accurately by increasing the types of equipment parameters collected in step S1.

  Further, as described above, in step S4, by approximating the polishing rate of the n-th wafer to be equal to the polishing rate of the (n + 1) -th wafer, it is possible to easily predict an appropriate polishing time. When the change in the polishing rate changes greatly for each lot or in time series, the polishing rate for the wafer of the (n + 1) th lot can be accurately predicted using a more detailed relational expression.

  In addition, when calculating the polishing time in step S5, the formula including the correction term based on the polishing film thickness of the film to be polished as described above is used, so that the accuracy of film thickness prediction can be further improved. It is possible.

  In addition, although it takes a certain amount of time to measure the film thickness of the interlayer insulating film before polishing in step S3, polishing another lot while measuring the film thickness in one lot is performed. Therefore, the substantial throughput when manufacturing the semiconductor device is not reduced by the film thickness measurement.

  Further, even when the types of semiconductor devices are different, the polishing rate and the polishing time can be calculated using the common formulas (1) and (2). Even in the case of production, it is preferably used.

  Further, according to the semiconductor device manufacturing system shown in FIG. 2, the above-described manufacturing method can be executed.

  In addition, the polishing method described in the present embodiment can also be applied when polishing an insulating film in STI (Shallow Trench Isolation) or polishing a wiring material when forming a buried wiring.

(Second Embodiment)
In the first embodiment, the interlayer insulating film thickness before polishing is measured by a film thickness measuring device, but in the second embodiment of the present invention, the interlayer insulating film thickness before polishing is calculated by equipment parameters during the film forming process. No measurement is performed with a film thickness measuring instrument. Therefore, it is possible to shorten the lot progress time by the film thickness measurement and reduce the manufacturing cost by eliminating the film thickness measurement cost. Hereinafter, the manufacturing method of the semiconductor device according to the present embodiment will be described in detail.

  FIG. 4 is a diagram showing the configuration of the manufacturing system according to the second embodiment, and FIG. 5 is a diagram for controlling the thickness of the interlayer insulating film to be constant according to the method for manufacturing the semiconductor device of the present embodiment. It is a figure which shows a manufacture flow.

  As shown in FIG. 4, the semiconductor device manufacturing system of this embodiment includes a film forming apparatus 11 that forms an insulating film, a CMP apparatus 19, and second equipment monitoring that collects equipment parameters of the film forming apparatus 11. A system (second monitoring device) 21a, a first facility monitoring system (first monitoring device) 21b for collecting facility parameters of the CMP device 19, an APC system 13 for calculating polishing time by the CMP device, and a lot A production management device (MES) 15 that controls the progress and instructs the CMP device 19 on the polishing time is provided.

  In general, when mass-producing semiconductor devices, a plurality of wafers are sequentially processed by the film forming apparatus 11 and the CMP apparatus 19 in lot units. The lot flow and data processing will be described below.

  In the manufacturing method of this embodiment, when a lot is processed by the film forming apparatus 11 having a plurality of chambers, the second equipment monitoring system 21a collects equipment parameters at the time of film forming processing for each wafer, and the collected equipment. The parameter is transmitted to the APC system 13. Here, the equipment parameters for each chamber may be transmitted. However, since the film thickness prediction is performed for each wafer, it is more preferable to collect and transmit the equipment parameters for each wafer. The APC system 13 stores in advance a model formula for predicting the film thickness from the equipment parameters, and substitutes the received equipment parameters into this model formula to predict the film thickness of the interlayer insulating film in each wafer. This film thickness Tch is used to calculate the polishing time during lot processing.

  As a formula for calculating the film thickness, for example, the following formula (3) can be used. Expression (3) is a composite expression that expresses the film thickness by the equipment parameters x1 to xn of the film forming apparatus 11, the coefficients k1 to kn, the constant m, and the film processing time t.

Tch = (k1 * x1 + k2 * x2... + Kn * xn + m) * t (3)
Here, the term (k1 * x1 + k2 * x2... + Kn * xn + m) is a film formation rate, and the film formation rate can be expressed as a synthesis equation of equipment parameters in this way. The film thickness is predicted by multiplying the film formation rate by the processing time. In Expression (3), the symbol * represents multiplication.

  In Equation (3), the equipment parameters x1 to xn of the film forming apparatus 11 may be measured values acquired at specific timing or statistical values. The statistical value refers to, for example, an average value, median value, standard deviation, variance, range (maximum value−minimum value), etc. of equipment parameters acquired a plurality of times during one processing. In this case, the coefficients k1 to kn and the constant m are, for example, the statistical values of the equipment parameters acquired over a plurality of times of processing and the film formation rates in the processing where the statistical values of the equipment parameters are acquired. It can be obtained by multiple regression analysis with actual measurement values as targets. In addition, the equipment parameters used as the variables x1 to xn in the formula (1) are appropriately selected from equipment parameters having a high correlation with the film forming rate by variable determination methods such as multivariate analysis and variable increase / decrease method. If it is. The film formation rate calculation formula is not limited to a linear polynomial, and a quadratic function, an exponential function, a logarithmic function, or the like of equipment parameters may be used. The equipment parameters acquired by the film forming apparatus 11 are, for example, chamber pressure, pressure control valve opening, gas flow rate, susceptor heater temperature, wall temperature, traveling wave power, reflected wave power, matching position, Vpp, Vdc, etc. It is. Here, Vpp is the plasma density in the chamber, and Vdc is an electric field applied during plasma generation.

  Next, when the lot processing proceeds to the CMP apparatus 19, the MES 15 requests the APC system 13 for the polishing time, and the APC system 13 calculates the polishing time by the polishing time calculation method described below. respond. The CMP apparatus 19 performs polishing for the polishing time specified by the MES 15. Equipment parameter data at the time of polishing is collected by the first equipment monitoring system 21 b and transmitted to the APC system 13. The APC system 13 stores in advance a model formula for predicting the polishing rate of the blank wafer using the equipment parameter, and at the same time as receiving the equipment parameter data, by substituting the received equipment parameter into this model formula, polishing is performed. Predict the hourly polishing rate. This polishing rate is used for polishing time calculation in subsequent lot processing. As a formula for calculating the polishing rate of the blank wafer, the formula (1) can be used similarly to the method according to the first embodiment.

  Next, the polishing method of this embodiment will be described with reference to FIG.

  First, in step S11 of FIG. 5, the APC system 13 collects equipment parameters for each wafer in the n-th lot processed in the CMP process at the time of CMP polishing for each wafer.

Next, in step S12, the APC system 13 calculates the polishing rate R _(n) of the blank wafer in the nth lot during the CMP polishing process. Here, when calculating the polishing rate, in the case of a polishing apparatus that performs polishing with a plurality of heads, it is desirable to calculate the polishing rate for each head and store the polishing rate data for each head in a memory or the like in the APC system 13. . In addition, an average value of polishing rates of a plurality of wafers in a lot, or a weighted average value obtained by applying a different weighting factor to the polishing rate of each wafer can be used as the polishing rate R _(n) .

Next, in step S13, when the (n + 1) th lot processed in the CMP process is formed, the APC system 13 acquires the equipment parameters for each film forming chamber from the second equipment monitor rinsing system 21a, and the APC system 13, the film thickness Tch _{(n + 1)} is predicted from the equipment parameters. Data on the predicted film thickness Tch _{(n + 1)} of the insulating film is stored in the APC system 13.

Next, the polishing rate R _{(n + 1)} of the blank wafer at the time of polishing the n + 1 lot wafer is predicted. In this step, it is predicted that the polishing rate R _{(n + 1)} is substantially equal to the polishing rate R _(n) of the _n-th blank wafer, that is, R _{(n + 1)} = R _(n) . This is because it can be approximated that the polishing rate at the time of the n-th lot processing hardly changes from the polishing rate at the time of the (n + 1) th lot processing. Here, similarly to step S4 of the first embodiment, when the polishing rate change for each lot is so large that the polishing rates of the n-th lot and the (n + 1) -th lot cannot be approximated, polishing is performed using a more detailed formula. The rate R _{(n + 1)} may be predicted.

Next, in step S15, the polishing time for each of the _{(n + 1) th} lot (for each film forming chamber) t _{(n + 1)} is calculated for each wafer by equation (2).

t _{(n + 1)} = (Tt−Tch _{(n + 1)} ) / R _{(n + 1)} + F _(Tch) (2)
Here, Tch _(n) is the film thickness of each film forming chamber of the nth lot, R _(n) is the predicted polishing rate of the insulating film in the blank wafer of the nth lot, and R _{(n + 1)} is the processing of the n + 1th lot. The predicted value of the polishing rate of the insulating film on the blank wafer at the time, Tt is the target remaining film thickness. F _(Tch) is a polishing time correction term and can be expressed as c * Tch + d as a function of Tch, for example, a linear function of Tch. “c” and “d” are coefficients, and the product polishing film thickness and the target polishing film thickness (Tt) when the lot subjected to the film thickness condition in the experiment is processed with the polishing time calculated by only the first item of Expression (2). It can be determined by estimating an appropriate polishing time from the difference from -Tch _{(n + 1)} ). Here, if c and d are prepared for each product type and each product layer, the accuracy of the polishing time can be further improved, and the film thickness of the film to be polished can be accurately set to a desired value. As R, it is desirable to use a polishing rate for each head.

Next, in step S16, the wafer of the _{(n + 1) th} lot is polished using t _{(n + 1)} calculated in step S15 as the polishing time.

  In step S17, n is replaced with n + 1, and the process returns to step S11. After that, by repeating steps S12 to S17 (this step), CMP polishing is sequentially performed with a polishing time reflecting the latest polishing rate. Thereafter, steps S11 to S17 are repeated as many times as necessary.

In the method of manufacturing a semiconductor device according to the present embodiment, the equipment parameters are collected in step S11, the polishing rate of the blank wafer of the _{(n + 1) th} lot is predicted in step S14, and the polishing time t _{(n + 1)} is calculated in step S16. Since an extremely short time is required compared with the measurement of the film thickness of the film to be polished, the polishing rate of the latest blank wafer can always be grasped by prediction. For this reason, it is possible to grasp the polishing rate in real time as compared with the conventional method in which the film thickness is measured during polishing, and high-precision polishing is possible.

  Furthermore, in the manufacturing method of this embodiment, since the film thickness of the film to be polished before polishing is predicted from the equipment parameters of the film forming apparatus in step S13, the first embodiment of measuring the film thickness of the film to be polished before polishing is performed. Compared with the method of the embodiment, the time for grasping the film thickness of the film to be polished before polishing can be greatly shortened. Therefore, the time required to process each wafer can be further shortened. Therefore, according to the manufacturing method of the present embodiment, when a plurality of embedded wirings are formed, the interlayer insulating film can be planarized while accurately controlling the interlayer insulating film thickness. Furthermore, the polishing rate can be predicted more accurately by increasing the types of equipment parameters collected in steps S11 and S13.

  Further, as described above, in step S14, it is possible to easily predict an appropriate polishing time by approximating the polishing rate of the n-th wafer to be equal to the polishing rate of the (n + 1) -th wafer. When the change in the polishing rate changes greatly for each lot or in time series, the polishing rate for the wafer of the (n + 1) th lot can be accurately predicted using a more detailed relational expression.

  In addition, when calculating the polishing time in step S15, as described above, an equation including a correction term based on the polishing film thickness of the film to be polished is used, so that the accuracy of film thickness prediction can be further improved. It is possible.

  Further, even when the types of semiconductor devices are different, the polishing rate and the polishing time can be calculated using the common equations (2) and (3). Even in the case of production, it is preferably used.

  Further, according to the semiconductor device manufacturing system shown in FIG. 4, the manufacturing method described above can be executed.

  In addition, this invention is not limited to the content of embodiment described above, It can deform | transform in the range which does not deviate from the meaning of invention. For example, the equipment parameters and relational expressions collected in steps S1, S11 and S13 are not limited to the specific examples.

  As described above, according to the present invention, even in a semiconductor device having a small process margin, the insulating film thickness between wiring layers can be accurately set to a desired value, so that variations in the film thickness of the film to be polished can be suppressed and the yield of the semiconductor device can be reduced. Can improve. Therefore, the present invention can be used for manufacturing a semiconductor device with a fine design rule.

DESCRIPTION OF SYMBOLS 1 1st interlayer insulation film 2 Trench 3 Barrier metal film 4 Wiring material film 5 Diffusion prevention film 6 2nd interlayer insulation film 10 Lower layer wiring 11 Film-forming apparatus 13 APC system 15 MES
17 Film thickness measuring device 19 CMP apparatus
21 Equipment monitoring system
21a Second facility monitoring system 21b First facility monitoring system

Claims (13)

A method for manufacturing a semiconductor device, comprising: a step of depositing an insulating film as a film to be polished on a wafer comprising a semiconductor substrate; and a step of polishing the film to be polished to a predetermined film thickness.
The step of polishing the film to be polished includes
a step (a) of collecting a first equipment parameter when polishing the n-th wafer when n is a positive integer;
A step (b) of calculating a polishing rate of the insulating film in the blank wafer of the n-th lot from the first equipment parameter;
For each chamber in which the film to be polished in the (n + 1) th lot is formed, a step (c) of grasping the film thickness of the film to be polished before polishing for each of the wafers;
a step (d) of predicting the polishing rate of the insulating film for the blank wafer of the (n + 1) th lot;
The polishing time of the (n + 1) th lot from the film thickness of the film to be polished of each wafer obtained in the step (c) and the polishing rate of the (n + 1) th lot obtained in the step (d). a step (e) of calculating t _{(n + 1)} ;
And a step (f) of polishing the film to be polished of the wafer of the _{(n + 1) th} lot for the polishing time t _{(n + 1) by} a polishing apparatus. In the manufacturing method of the semiconductor device according to claim 1,
In the step (d), the polishing rate of the insulating film of the (n + 1) th lot is estimated to be equal to the polishing rate of the nth lot obtained in the step (b) and is predicted. Method. In the manufacturing method of the semiconductor device according to claim 1 or 2,
In the step (c), the film thickness of the film to be polished is measured for each chamber in which film formation has been performed for each wafer of the (n + 1) th lot. In the manufacturing method of the semiconductor device according to claim 1 or 2,
In the step (c), a first model formula for predicting the film thickness of the film to be polished before polishing is prepared in advance, and the film to be polished is formed on the wafer of the (n + 1) th lot. The thickness of the film to be polished before the polishing of each wafer in the (n + 1) th lot is calculated by substituting the second equipment parameter at the time into the first model formula. Production method. In the manufacturing method of the semiconductor device according to any one of claims 1 to 4,
In the step (b), a second model formula for predicting the polishing rate of the insulating film on the blank wafer is prepared in advance, and the first equipment for polishing the n-th lot of the wafer is prepared. A method for manufacturing a semiconductor device, comprising: calculating a polishing rate of an insulating film on the blank wafer by substituting a parameter into the second model formula. In the manufacturing method of the semiconductor device according to any one of claims 1 to 5,
In the step (e), n + 1 is obtained by using an equation including two terms: a polishing rate dependent term of the insulating film on the blank wafer in the (n + 1) th lot and a term depending on the film thickness of the film to be polished before polishing. A method for manufacturing a semiconductor device, comprising: calculating a polishing time t _{(n + 1)} of a lot. In the manufacturing method of the semiconductor device according to any one of claims 1 to 6,
The method of manufacturing a semiconductor device, wherein the film to be polished is an interlayer insulating film formed on a buried metal wiring. A film forming apparatus having a chamber for forming an insulating film as a film to be polished on a wafer made of a semiconductor substrate;
A polishing apparatus for polishing the film to be polished;
a first monitoring device for collecting a first equipment parameter when polishing the n-th wafer when n is a positive integer;
The polishing rate of the insulating film in the n-th blank wafer is calculated from the first equipment parameter, and the film thickness of the film to be polished before being formed on each of the wafers, as determined for each chamber, APC system for calculating the polishing time t _{(n + 1)} of the n + 1 lot from the polishing rate of the insulating film on the blank wafer of the n + 1 lot,
A semiconductor device manufacturing system comprising: a production management device that instructs the polishing apparatus to determine the polishing time t _{(n + 1)} of the _{(n + 1) th} lot calculated by the APC system. The semiconductor device manufacturing system according to claim 8.
For each wafer of the (n + 1) th lot, further comprising a film thickness measuring device for measuring the film thickness of the film to be polished before polishing for each chamber in which film formation has been performed,
The APC system stores a film thickness of a film to be polished measured by the film thickness measuring device. The semiconductor device manufacturing system according to claim 8.
a second monitoring device for collecting, for each wafer, a second facility parameter when the film to be polished is formed on the wafer of the (n + 1) th lot;
The APC system stores in advance a first model formula for predicting the film thickness of the film to be polished before polishing, and sets the second equipment parameter when the film to be polished is formed. A semiconductor device manufacturing system, wherein the film thickness before polishing of the film to be polished of each wafer of the (n + 1) th lot is calculated by substituting into the first model formula. In the semiconductor device manufacturing system according to any one of claims 8 to 10,
The APC system stores in advance a second model formula for predicting the polishing rate of the insulating film on the blank wafer, and the first parameter when polishing the n-th lot of the wafer is set as the first parameter. A semiconductor device manufacturing system, wherein the polishing rate of the insulating film in the blank wafer of the nth lot is calculated by substituting into the second model formula. In the semiconductor device manufacturing system according to any one of claims 8 to 11,
The APC system regards the polishing rate of the insulating film on the n + 1 lot of the blank wafer as being equal to the polishing rate of the insulating film on the nth lot of the blank wafer, and the polishing time t _{(n + 1)} of the n + 1 lot. ₎ To calculate a semiconductor device manufacturing system. In the semiconductor device manufacturing system according to any one of claims 8 to 12,
The APC system uses an expression including two terms, a term dependent on the polishing rate of the insulating film on the blank wafer in the (n + 1) th lot and a term depending on the film thickness of the film to be polished before polishing, for the (n + 1) th lot. The semiconductor device manufacturing system is characterized in that the polishing time t _{(n + 1)} is calculated.

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