JP2011023766A - Dry etching method and device thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To perform high-precision processing by suppressing pitting or striation due to resist damage when the pattern is formed by a dry etching method using a resist film of the post ArF lithography generation or the subsequent as a mask. <P>SOLUTION: A period of time until application of bias electric power is controlled according to a plasma ignition detection signal. A backside gas pressure is set smaller than that in a main etching condition for a given period of time from the start of etching. Further, for a given period of time from the start of etching, a CxFy gas having a lower C/F ratio or a lower CxFy gas flow rate than that in the main etching condition is used. Moreover, a radical amount in plasma is monitored and the values of the above means are controlled for each wafer according to the measured value. A means for preheating wafers other than the above means is placed in a wafer conveyance system. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

The present invention relates to a dry etching apparatus and an etching method used for etching an interlayer insulating film in an etching process, and relates to via formation, high aspect ratio contact formation, self-aligned contact formation, trench formation using a resist pattern after ArF lithography, The present invention relates to a method capable of reducing resist damage in damascene formation, gate mask formation, and the like.

In a semiconductor device, dry etching using plasma is applied to an upper part of a transistor structure and an interlayer insulating film formed between wirings in order to electrically connect transistors formed on a wafer to metal wirings and between metal wirings. A contact hole is formed by the method, and a semiconductor or metal is filled in the contact hole. Especially, high integration of 90nm node and beyond
In high-speed logic device manufacturing, a damascene process in which grooves and vias are formed in an interlayer insulating film, which is a low-k material having a low dielectric constant, by a dry etching method and Cu is embedded as a wiring material;
In order to form a finer pattern, ArF lithography using a 193 nm light source is used. In the dry etching method, an etching gas introduced into a vacuum vessel is turned into plasma by high-frequency power applied from the outside, and reactive radicals and ions generated in the plasma are reacted on the wafer with high accuracy, thereby producing a resist. In this technique, a film to be processed is selectively etched with respect to a mask material typified by, a wiring layer under a via or a contact hole, or a base substrate.

Usually, when forming a wiring pattern of a semiconductor circuit, an organic antireflection film (B
ARC) is formed, and a resist film is further formed thereon. BARC is used to prevent abnormal pattern formation due to interference of laser light, which is a lithography light source. After the resist pattern is formed, BARC etching is performed, and then the film to be processed (main etching) is performed. In the BARC etching, since the material of BARC is C-rich like the resist, a mixed gas of F-rich fluorocarbon gas such as CF4 and CHF3 and a rare gas typified by Ar and oxygen gas is introduced, and 0.5 Pa To 10 Pa in the pressure region, and the ion energy incident on the wafer is changed from 0.1 kV to 1.0 kV.
Etching is performed in a controlled range of kV.

In the formation of vias and contact holes, as plasma gases, CF4, CHF3, C
Fluorocarbon gas such as 2F6, C3F6O, C4F8, C5F8, and C4F6 and a mixed gas such as rare gas represented by Ar, oxygen gas, and CO gas are introduced, and 0.5 Pa to 10
Plasma is formed in the Pa pressure region, and the ion energy incident on the wafer is accelerated from 0.5 kV to 2.5 kV.

In these etchings, a bias power is applied to the wafer after the plasma has ignited and has sufficiently grown. If the bias power is applied to the wafer under the condition that the plasma does not grow sufficiently or the plasma does not ignite depending on the plasma conditions,
Since a sufficient current flowing into the wafer cannot be secured or no current flows at all, an abnormally high voltage is applied to the bias power supply line, the electrode on which the wafer is installed, or the wafer. This may cause dielectric breakdown of the bias power supply line, sprayed film breakdown on the electrode, or cracking of the wafer. Therefore, from the viewpoint of mass productivity, means for detecting normal plasma ignition (monitoring of light emission intensity) is provided, and the wafer bias power is applied after a certain time from the detection of ignition. Further, the gas conditions (gas type, gas flow rate) and the backside gas pressure for cooling the wafer were basically processed under the same conditions from the start of etching to the end of etching.

In such an etching process, the resist material after ArF lithography is:
There are problems in that the resist rate by etching is larger than that of conventional KrF resists and i-line resists, and the surface roughness due to resist damage is large.

Since KrF resist has sufficiently higher etching resistance than ArF and the degree of device integration is not so high, striation and line edge roughness have not been a major problem. However, especially in etching that requires finished dimensional accuracy, such as hard mask etching represented by SiO2 for gate electrode formation and SiN mask etching used as an element isolation formation mask, the line edge caused by the resist roughness after etching The deterioration of roughness greatly affects the device characteristics. In addition, a low-k material (an interlayer insulating film that is currently being introduced in the manufacture of highly integrated logic devices)
In the etching of the SiOC film), high-energy ion irradiation with a relatively high bias and etching processing are performed in an O2-rich gas atmosphere. Therefore, in addition to the occurrence of striations on the pattern side wall, local holes are formed where there is no pattern. A resist punch-through phenomenon occurs.

Accordingly, an object of the present invention is to provide an etching method for ensuring etching resistance of a resist and an etching apparatus for realizing the method in an etching process using a resist of ArF lithography generation or later as a mask.

The present invention uses any of the following means to reduce carbon deposition on the wafer at the initial stage of etching as compared with the prior art and to ensure the etching resistance of the resist.

In the first means, in an etching process using a resist material having a lower etching resistance than a conventional resist material such as an ArF resist, the plasma is ignited from the plasma ignition in the etching of the organic antireflection film or the etching of the layer to be processed. The above problem is solved by controlling the time until the bias power is applied (preferably within one second).

In the second means, as a gas condition from the start of etching until the wafer temperature is saturated to a constant value, a gas having a lower C / F ratio than the actual etching condition is used, or a CxFy gas having a low flow rate is used. This solves the above-mentioned problem.

In the third means, the problem is solved by setting the backside gas pressure in the actual etching low for a certain period of time from the start of etching.

In the fourth means, the above-mentioned problem is solved by raising the temperature of the wafer to a desired temperature before the wafer is transferred into the vacuum container.

In the fifth means, the amount of radicals in the plasma is measured, and the above problem is solved by controlling the timing of applying bias power, the gas condition at the initial stage of etching, the backside gas pressure, and the like based on the measured value.

In the sixth means, the above control can be performed with high accuracy by directly or indirectly monitoring the wafer surface temperature from the opposite, oblique or back side to the wafer.

In the seventh means, the etching time dependence of the wafer surface temperature depending on the processing conditions is predicted in advance by calculation, and the wafer backside gas pressure and time are set manually or automatically so that the desired profile is obtained. Highly accurate etching is possible.

According to the present invention, resist damage that becomes a problem in pattern formation using resists after ArF lithography with low etching resistance can be efficiently suppressed, and resist penetration and striation caused by resist damage can be improved. In addition, by monitoring radicals in the plasma, it is possible to control in accordance with the etching atmosphere, which can contribute to improvement of long-term stability.

The figure which shows the relation between time after applying bias electric power to the wafer and wafer surface temperature Conceptual diagram of resist damage due to thickness of CF polymer deposited on resist Etching sequence diagram focusing on plasma power, bias power, and backside helium pressure Diagram showing relationship between backside helium pressure and wafer surface temperature Scanning electron micrographs showing etched shapes of trenches and holes in various sequences The figure which shows the relationship between CF deposit film thickness in the steady state of etching, and C / F ratio of fluorocarbon gas Scanning electron micrograph showing trench pattern etching shape with and without low deposition step at the start of etching The figure which shows the relationship between the time after discharge start, and luminous intensity ratio (C2 / O ratio) Schematic of an etching apparatus for realizing Example 2 of the present invention Schematic of the etching system for realizing Example 3 of the present invention Schematic of the electrode for realizing Example 5 of the present invention Scanning electron micrograph showing hole etching shape with and without back surface helium pressure control in Example 5 of the present invention Schematic when installing the radiation thermometer in Example 1 of the present invention in the dielectric part Schematic in the case of monitoring wafer surface temperature from the back surface of a silicon disk using the radiation thermometer in Example 1 of this invention Schematic of preheating using a heater in Example 3 of the present invention Schematic of preheating using a lamp in Example 3 of the present invention

In an etching process using a resist from the ArF lithography generation as a mask, a means for suppressing resist damage differs between main etching such as BARC processing and contact formation. Specifically, it is described in Japanese Patent Application No. 2003-303961. Accordingly, it is important to reduce the ion sputtering component in the BARC processing in which the processing is performed under an etching condition with less deposition, and for this purpose, the flow rate ratio of Ar used as a dilution gas is 10% of the total plasma gas flow rate. Below (desirably 0%). As a result, BARC
The resist surface after processing becomes smooth, and the degree of resist damage can be suppressed under main etching conditions (for example, contact processing) to be processed next.

On the other hand, in contact processing with a large amount of deposition, in order to suppress dissociation in the plasma, it is diluted with Xe or Kr gas with low ionization energy, or is normally used as a dilution gas
It is effective to add Xe or Kr to the gas. That is, the resist damage can be suppressed as the deposition film quality during etching (for example, the F / C ratio measured by XPS (X-Ray Photoelectron Spectroscopy)) is F-rich and the deposition amount itself is small.

In view of these results, the present invention provides a means for further suppressing resist damage.

Under the condition where the wafer temperature at the initial stage of etching is low, the deposited film thickness is thicker than in the steady state of etching where the wafer temperature is increased. Three approaches are conceivable to suppress this excessive deposition.

The first is to shorten the time from when the plasma is ignited until the bias power necessary for accelerating ions is applied. However, if a bias is applied when plasma growth is insufficient, sufficient current flowing into the wafer cannot be secured, and an abnormally high voltage is applied to the bias power transmission line, electrode, and wafer as compared to normal operation. There is a risk of causing wafer cracks. Therefore, it is important to monitor plasma ignition and control the timing of bias application according to the monitored value.

The second is to insert a low deposition condition etch step at the beginning of the etch. Specifically, a gas type having a low C / F ratio is used as compared with the CxFy gas used in the main etching conditions. Basically, under the condition that the plasma forming power is constant, the deposition amount decreases as the C / F ratio of the fluorocarbon gas (CxFy) decreases as shown in FIG. Therefore, by using a low C / F ratio gas at the start of etching that is not in the steady etching state, CF polymer deposited on the wafer before the wafer temperature reaches the steady state can be suppressed. Then, resist damage can be suppressed without affecting the etching performance by shifting to the actual main etching conditions. As a means for providing the same effect, there is control of the CxFy gas flow rate. By reducing the gas flow rate at the start of etching below the gas flow rate under actual etching conditions, excessive deposition at the start of etching can be suppressed.

Third, at the start of etching, a step with a pressure lower than the backside gas pressure under actual etching conditions is introduced. Thereby, the wafer temperature at the initial stage of etching can be increased. Usually, in order to control the wafer temperature, a coolant such as Fluorinart is allowed to flow inside the electrode on which the wafer is placed, and helium gas having high thermal conductivity is sealed between the wafer and the electrode to improve thermal contact. When the coolant temperature is controlled to a certain set value and bias power is applied to the wafer, the wafer temperature is uniquely determined by the pressure of the backside helium gas. (Fig. 4)
It is also effective to control these means according to the monitor value of the radical amount in the plasma. When many wafers are processed at a mass production site, the CF-based polymer deposited on the wall increases with the number of processed wafers, so that CF-based radicals are released from the walls into the plasma with the number of processed wafers. Accordingly, the deposition on the wafer gradually increases, and there is a concern that resist damage may occur. However, for example, by monitoring the emission intensity of C2 and controlling the gas conditions (gas flow rate and gas type) and the step time in the step introduced at the beginning of etching according to the value, resist damage is always maintained regardless of the number of processed sheets. Etching with less can be realized.

[Example 1]
In this embodiment, a method of reducing striations caused by resist damage by changing the timing from plasma ignition to bias power ON and the timing of backside helium introduction will be described. FIG. 1 shows the relationship between the time after applying bias power to the wafer measured during contact processing and the wafer surface temperature. The wafer is 8 inches and the bias power setting is 1500W. As shown in this figure, under etching conditions with a relatively high bias power, the wafer surface temperature is mainly determined by the bias power. Under this condition, it can be seen that the surface temperature is increased by about 35 ° C. in the steady state of etching compared to the surface temperature before application of the bias power. Further, since the electrode on which the wafer is installed has a heat capacity, it takes about 10 seconds until the temperature is saturated. In this contact processing condition, a mixed gas of Ar, C4F6, O2, and CO gas is used as an etching gas in order to ensure a selection ratio with respect to the resist. Excessive deposition will occur.

FIG. 2 is a schematic diagram at the time of etching when the resist surface is enlarged. FIG. 2A shows a case where the fluorocarbon deposit film 1 is small, and FIG. 2B shows a case where the fluorocarbon deposit film 1 is excessive. Next, ions enter and energy is applied to the surfaces of FIGS. 2A and 2B, and etching progresses. In the case of FIG. 2A, since the deposition thickness is appropriate, the energy of the ions Is not attenuated so much by the fluorocarbon deposition film 1 and reaches the surface of the underlying resist 2.

Therefore, as shown in FIG. 2C, the unevenness on the surface of the resist 2 can be maintained in the same level as in FIG. On the other hand, in the case of FIG. 2B in which the fluorocarbon deposited film 1 is excessive, the ion energy is not attenuated so much in the concave portion, so that etching progresses and FIG.
The etching progresses to a depth equivalent to the concave portion of (). However, since the fluorocarbon deposition film 1 is thick at the convex portion, the energy of ions cannot sufficiently reach the resist surface and the etching does not progress. Therefore, as shown in FIG. 2 (d), the unevenness becomes intense as compared with FIG. 2 (b), and the resist damage progresses. That is, excessive deposition is a major factor in resist damage. Here, the results of evaluating resist damage by changing the etching sequence in order to suppress excessive deposition at the initial stage of etching will be described. The gas condition is Ar 500
ml / min, C4F6 30 ml / min, O2 36 ml / min, CO 200 m
The gas pressure at that time was set to 2 Pa as l / min. The high frequency power for plasma generation is 400 W under this condition.

3A, 3B, and 3C show three types of etching sequences that were evaluated. (
Let them be sequence A, sequence B, and sequence C, respectively. ) Sequence A is an example in which a bias power is applied to the wafer 5 seconds after the high frequency power supply output for plasma generation is turned on (plasma is ignited). At that time, helium gas is introduced between the wafer and the electrode before the plasma ignition, and the pressure is increased to about 70% of the set pressure (1.5 kPa) at the time of the plasma ignition. In this case, from the time the plasma is ignited until the bias power is turned on, the gas dissociated in the plasma becomes a CF radical and deposits on the wafer. In addition, because the backside helium pressure is already high, the wafer temperature is kept low to facilitate deposition. On the other hand, sequences B and C show improved sequences. In sequence B, a bias is applied 1 second after plasma ignition, and the backside helium gas is the same as in sequence A. Sequence C
Then, a bias is applied 1 second after the plasma ignition, and the backside helium gas is introduced into the wafer simultaneously with the bias application. As shown in FIG. 4, the backside helium pressure and the wafer surface temperature are closely related, and the surface temperature decreases as the pressure increases. The rate of change is approximately 3.3 ° C./0.1 kPa under the present experimental conditions. Therefore, in sequence C, the wafer temperature is considered to be higher at the initial stage of etching than in sequences A and B.

A scanning electron microscope image (SEM image) when processing is performed in these three sequences is shown in FIG. The film structure is a resist for ArF lithography, an organic antireflection film (BARC) for suppressing abnormal pattern formation due to laser reflection interference, a silicon oxide film as a film to be processed, and a base silicon substrate. In order to observe the vertical streaks (striation 6) formed by transferring resist damage to the silicon oxide film that is the film to be processed, the two layers of resist and BARC are removed from the sample after etching by ashing. It is. When the sequence A of FIG. 5A is applied, striations of the dense hole pattern 4 and a phenomenon in which holes are opened where the pattern does not exist (pitting 5) are often observed.
The line edge roughness, which is an index of the roughness of the film, was 18.1 nm. On the other hand, when the sequence B of FIG. 5B was applied, both striation 6 and pitting 5 were slightly improved, and the line edge roughness of the trench pattern 3 was improved to 13.1 nm. Further, when the sequence C of FIG. 5C is applied, both striation 6 and pitting 5 are improved, and the line edge roughness of the trench pattern 3 is also 9.2 nm.

When these processes are performed, preliminary experiments may be performed in advance, and the backside helium pressure may be set in each step. However, a radiation thermometer installed obliquely in the dielectric 114 facing the wafer illustrated in FIG. It is also effective to always monitor the wafer surface temperature by 128 and control the backside helium pressure so that the monitored value becomes a desired value. Further, instead of monitoring the wafer surface temperature, the processing time dependence of the wafer surface temperature may be calculated from the etching conditions, and the backside helium pressure may be set automatically or manually so that it becomes a desired profile. Incidentally, when installing the radiation thermometer, it is preferable to install it behind the narrow tube 401 as shown in the enlarged view of the radiation thermometer section of FIG. As a result, fogging of the thermometer measurement part due to the deposition of the fluorocarbon system generated in the plasma can be prevented. On the other hand, there is also a method of installing a radiation thermometer from the back side of the silicon disc 116 as shown in FIG. in this case,
In order to suppress abnormal discharge due to an electric field, a quartz rod 402 is preferably inserted.

Next, an example in which the gas conditions are changed at the initial stage of etching will be described. The main etching gas conditions are Ar: 500 ml / min, C4F6: 30 ml / min, O2: 36
ml / min, CO was 200 ml / min, and the treatment pressure was set to 2 Pa. In order to suppress the deposition at the start of etching with a low wafer surface temperature, a step of changing the gas conditions was inserted for 12 seconds before the main etching. Gas conditions are Ar 125ml / min, C4F6
Is 7.5 ml / min, O2 is 7 ml / min, CO is 50 ml / min, and the pressure is 0
. 5 Pa. At this time, the power for generating plasma is 400 as in the main etching conditions.
W. Under this condition, the deposition amount can be reduced by 40% compared to the main etching condition. The etching results before and after the application of this condition are shown in FIGS. 6 (a) and 6 (b), respectively. The line edge roughness of the trench pattern 3 was reduced from 13.6 nm to 9.0 nm. Here, an example has been shown in which conditions under which the flow rate and pressure are changed without changing the gas type are inserted at the start of etching, but changing the gas type is also effective. FIG. 7 shows the relationship between the C / F ratio of CxFy gas and the amount of CF deposited on the etching surface. As is clear from this result, the deposition amount can also be reduced by reducing the gas species to a low C / F ratio. Needless to say, the effect can be increased by changing the bias power ON timing, the backside helium ON timing, and the gas condition.

Further, from the viewpoint of suppressing excessive deposition, it is desirable to change the main etching condition to a low pressure and low flow rate condition. Specifically, the Ar flow rate is from 0 ml / min to 200 m.
At 1 / min, the CxFy gas flow rate is preferably in the range of 2% to 10% of the Ar flow rate, and the processing pressure is preferably in the range of 0.1 Pa to 1.0 Pa.

[Example 2]
In this embodiment, a description will be given of an embodiment in which the amount of radicals in plasma is monitored, and the deposition suppression step at the initial stage of etching is controlled according to the monitored value. FIG. 8 shows a result of monitoring the emission intensity ratio C2 / O ratio by igniting plasma with the wall of the vacuum vessel being cold. Here, attention was focused on C2 as a radical species for carbon-based deposition and O as a radical species for removing the deposited species. Since the wall is cold until about 200 seconds from the start of discharge, the radicals in the plasma are adsorbed on the wall and show a value smaller than the original value, but after that, adsorption to the wall and desorption from the wall Are balanced and gradually increasing while showing a saturation tendency. That is, when the etching process is performed under the same conditions at the mass production site, the deposition amount at the initial stage of etching increases as the number of wafers processed increases. As described in the first embodiment, the damage of the resist for ArF lithography can be reduced by controlling (suppressing) the deposition amount at the initial stage of etching, but how stable the etching performance is from the 1st sheet to the Nth sheet at the mass production site. It is very important to hold it.

FIG. 9 is a schematic view of an etching apparatus for realizing the present embodiment. Although the configuration is not largely different from that of a normal etching apparatus, an emission spectroscopic measurement system for monitoring emission from plasma is provided. The emission spectroscopic measurement system includes an optical fiber 122, a monochromator 123, a photomultiplier tube 124, and a measurement personal computer 125 that performs data sampling. Instead of the photomultiplier tube 124, a configuration may be used in which light of a plurality of wavelengths is simultaneously measured using a CCD camera. On the other hand, between the control personal computer 127 for controlling the etching conditions and the measurement personal computer 125, there is a database personal computer 126 for instructing the automatic change of the etching conditions according to the measurement value output from the measurement personal computer. The database stores in advance etching conditions (bias power ON timing, backside helium ON timing and gas conditions) at the initial stage of etching with respect to the target emission intensity or emission intensity ratio. This control guideline may be obtained in advance by experimentation, or may be automatically generated by simulation. Next, a specific flow is shown. First, processing of the first wafer is started. At this time, a predetermined condition is applied as the etching condition at the initial stage of etching. The emission of the plasma is always monitored by the emission spectroscopic measurement system, and the emission intensity ratio (R1_1) at a predetermined time t1 after entering the main etching step is near the end of the main etching step. The emission intensity ratio (R1_2) at the determined time t2 is monitored. Further, the emission intensity ratio (R2_1, R2_2) at t1 and t2 is monitored from the second wafer processed under the same conditions as the first sheet. From the comparison of these four data, the third R3_1 is predicted, and the etching conditions used for the initial etching step are determined. Here, the method of predicting the light emission data of the wafer to be processed next from the light emission data up to the previous wafer and determining the processing conditions is shown, but the processing conditions are determined in real time from the light emission data at the time of actually starting etching. The same effect can be obtained by changing. However, this is only for controlling the etching conditions in the time zone in which the wafer temperature at the initial stage of etching is in a transient state, and does not change the main etching conditions.

[Example 3]
In the present embodiment, an embodiment will be described in which the wafer temperature is raised before processing instead of the process conditions. FIG. 10 is a diagram showing an outline of the etching system. After being taken out of the cassette, the wafer 206 is transferred to the load lock chamber 201 through a process of adjusting the alignment and evacuated. After that, it is introduced into the etching chamber 204 for performing etching through the buffer chamber 202. After predetermined processing is performed in the etching chamber, the wafer is unloaded from the unload chamber 206 to the outside of the apparatus. Here, an example in which the alignment adjustment is performed in the atmosphere has been shown, but this may be performed in a vacuum. The feature of this embodiment is that the wafer 206 is preheated in advance. As a preheating means, for example, a heater may be installed on the arm 203 of the vacuum transfer robot in the buffer chamber 202. Although not shown,
The heater installed on the arm of the buffer chamber 202 is provided with a control device for controlling the heater to a set temperature. Further, the controller and the database personal computer 126 shown in FIG. 9 may be connected by a signal transmission line so that the optimum set temperature may be transmitted from the database personal computer 126 to the buffer chamber 202. Further, as a preheating method, it is possible even after the wafer is transferred to the etching chamber. In that case, as shown in FIG. 15, the processing is started after the wafer temperature is raised to a predetermined temperature before processing using a heater 403 embedded in the electrode. On the other hand, as shown in FIG. 16, it is also effective to heat the lamp 404 from outside the chamber through a dielectric 114 typified by quartz. In that case, in order to prevent leakage of electromagnetic waves, it is desirable to install a punch metal 405 having a hole in the conductor plate.

The rising temperature ΔT of the wafer surface temperature in the steady state of etching is the heat input Q caused by the bias power applied to the wafer 206 and the thermal resistance of each part (wafer R1, backside helium R2, electrode R).
When 3) is used, it is determined by ΔT = Q × R1 + Q × R2 + Q × R3. Therefore, ΔT is uniquely determined with respect to the bias power, and the surface temperature T in the etching steady state is expressed as T = T1 + ΔT using the temperature T1 of the refrigerant flowing through the electrode. Therefore, if the wafer is heated to at least the wafer surface temperature T predicted in the etching steady state, a low temperature state in the initial etching can be avoided. In addition, it is also effective to prevent the low temperature state at the initial stage of etching by controlling the preliminary superheating temperature higher than T in consideration of the temperature drop due to the wafer placement. This is because when the wafer is placed on the electrode, the temperature of the electrode may be low, and thus the wafer temperature may decrease. Etching may be started at the same time as wafer placement or as early as possible. Therefore, the etching start timing may be controlled on the basis of the wafer installation timing.

[Example 4]
This embodiment describes a method for manufacturing a semiconductor device having the following characteristics.

A step of forming a predetermined thin film on a semiconductor substrate, a step of forming an organic antireflection layer on the thin film, and a C = O bond with a benzene ring weight ratio of 20% or less on the organic antireflection layer. Forming a resist pattern comprising: etching the organic antireflection film using the resist pattern as a mask; and etching the layer to be processed using the remaining resist film and the organic antireflection film as a mask. In a method of manufacturing a semiconductor device, the method includes means for detecting plasma ignition, from when the plasma is ignited when etching of the organic antireflection film and the layer to be processed is started until bias power is applied to the semiconductor substrate. The method for manufacturing a semiconductor device is characterized in that the time is controlled in accordance with the detected value.

Alternatively, a step of forming a predetermined thin film on a semiconductor substrate, a step of forming an organic antireflection layer on the thin film, and a weight ratio of benzene rings on the organic antireflection layer of 20% or less and C =
A step of forming a resist pattern having an O bond; a step of etching the organic antireflection film using the resist pattern as a mask; and a layer to be processed using the remaining resist film and the organic antireflection film as a mask. In the manufacturing method of the semiconductor device to be etched,
Bias power is applied to the semiconductor substrate before the plasma reaches a steady state when etching of the organic antireflection film and the layer to be processed is started, or manufacturing of the semiconductor device A method of manufacturing a semiconductor device, characterized in that the time from when the plasma is ignited until the bias power is applied to the semiconductor substrate is within one second.

Alternatively, a step of forming a predetermined thin film on a semiconductor substrate, a step of forming an organic antireflection layer on the thin film, and a weight ratio of benzene rings on the organic antireflection layer of 20% or less and C =
A step of forming a resist pattern having an O bond; a step of etching the organic antireflection film using the resist pattern as a mask; and a layer to be processed using the remaining resist film and the organic antireflection film as a mask. In the manufacturing method of the semiconductor device to be etched,
When etching the organic antireflection film and the layer to be processed, the gas condition is such that the time from the start of etching until the semiconductor substrate temperature saturates to a constant value is less than the etching condition. A method of manufacturing a semiconductor device, characterized in that the processing is performed after changing to

Alternatively, a step of forming a predetermined thin film on a semiconductor substrate, a step of forming an organic antireflection layer on the thin film, and a weight ratio of benzene rings on the organic antireflection layer of 20% or less and C =
A step of forming a resist pattern having an O bond; a step of etching the organic antireflection film using the resist pattern as a mask; and a layer to be processed using the remaining resist film and the organic antireflection film as a mask. In the manufacturing method of the semiconductor device to be etched,
Means for detecting the ignition of the plasma, and the time from when the plasma is ignited during the etching of the organic antireflection film and the layer to be processed until the bias power is applied to the semiconductor substrate is adjusted to the detected value Control is performed and the time from the start of etching until the semiconductor substrate temperature saturates to a constant value is changed to a gas condition such that the deposition amount on the semiconductor substrate is smaller than the etching condition. A method for manufacturing a semiconductor device.

Alternatively, a step of forming a predetermined thin film on a semiconductor substrate, a step of forming an organic antireflection layer on the thin film, and a weight ratio of benzene rings on the organic antireflection layer of 20% or less and C =
A step of forming a resist pattern having an O bond; a step of etching the organic antireflection film using the resist pattern as a mask; and a layer to be processed using the remaining resist film and the organic antireflection film as a mask. In the manufacturing method of the semiconductor device to be etched,
Applying a bias power to the semiconductor substrate before the plasma reaches a steady state during etching of the organic antireflection film and the work layer, and the time from the start of etching to the saturation of the semiconductor substrate temperature to a constant value. A method of manufacturing a semiconductor device, characterized in that the processing is performed by changing the gas conditions so that the deposition amount on the semiconductor substrate is smaller than the etching conditions.

Alternatively, a step of forming a predetermined thin film on a semiconductor substrate, a step of forming an organic antireflection layer on the thin film, and a weight ratio of benzene rings on the organic antireflection layer of 20% or less and C =
A step of forming a resist pattern having an O bond; a step of etching the organic antireflection film using the resist pattern as a mask; and a layer to be processed using the remaining resist film and the organic antireflection film as a mask. In the manufacturing method of the semiconductor device to be etched,
When etching the organic antireflection film and the layer to be processed, the gas pressure sealed between the semiconductor substrate and the electrode on which the semiconductor substrate is installed is set to a pressure lower than a predetermined pressure under the main etching conditions. A method for manufacturing a semiconductor device, comprising introducing a step of:

Alternatively, a step of forming a predetermined thin film on a semiconductor substrate, a step of forming an organic antireflection layer on the thin film, and a weight ratio of benzene rings on the organic antireflection layer of 20% or less and C = O
Forming a resist pattern having a bond; etching the organic antireflection film using the resist pattern as a mask; and etching a layer to be processed using the remaining resist film and the organic antireflection film as a mask In the method of manufacturing a semiconductor device, the gas pressure sealed between the semiconductor substrate and the electrode on which the semiconductor substrate is placed is etched from a predetermined pressure under the main etching conditions when etching the organic antireflection film and the layer to be processed. A method of manufacturing a semiconductor device, comprising introducing a step of processing at a low pressure and controlling the time according to the temperature of the semiconductor substrate.

Alternatively, in the above six semiconductor device manufacturing methods, when the organic antireflection film and the layer to be processed are etched, the gas pressure sealed between the semiconductor substrate and the electrode on which the semiconductor substrate is installed is adjusted under the main etching conditions. A method of manufacturing a semiconductor device, comprising introducing a step of processing at a pressure lower than a predetermined pressure.

Alternatively, in the above six semiconductor device manufacturing methods, when the organic antireflection film and the layer to be processed are etched, the gas pressure sealed between the semiconductor substrate and the electrode on which the semiconductor substrate is installed is adjusted under the main etching conditions. A method of manufacturing a semiconductor device, comprising introducing a step of processing at a pressure lower than a predetermined pressure, and controlling the time according to a semiconductor substrate temperature.

Alternatively, the semiconductor device manufacturing method is characterized in that the gas condition for the time from the start of etching to the saturation of the semiconductor substrate temperature to a constant value is performed with a gas having a lower C / F ratio than the main etching condition.

Alternatively, the semiconductor device manufacturing method is characterized in that the gas condition for the time from the start of etching to the saturation of the semiconductor substrate temperature to a constant value is performed with a CxFy gas having a lower flow rate than the main etching condition.

Alternatively, a method for manufacturing a semiconductor device comprising means for measuring the amount of radicals in plasma, and controlling the time from plasma ignition to application of bias power to the semiconductor substrate in accordance with fluctuations in the amount of radicals.

Alternatively, the semiconductor device has means for measuring the amount of radicals in the plasma, and changes the gas condition for the time from the start of etching until the semiconductor substrate temperature saturates to a constant value in accordance with the variation in the amount of radicals Manufacturing method.

Alternatively, a method of manufacturing a semiconductor device, wherein the wafer bias power at the initial stage of etching is set larger than the main etching condition.

[Example 5]
In this embodiment, an etching method for improving process performance by switching backside helium pressure introduced between a wafer and an electrode during the process will be described. The target pattern structure may be anything as long as the underlying etch stop film exists. In this embodiment, high aspect ratio contact processing will be described as an example, but Vi in a damascene structure using a low-k film is used.
It goes without saying that it is effective even when applied to a processing. As shown in FIG. 4, there is a correlation between the pressure of the backside helium and the wafer temperature. In particular, in an etching process with a high bias power, it takes time to change the wafer surface temperature even if the temperature of the coolant is changed. On the other hand, the control of the backside helium pressure is very effective in changing the wafer surface temperature at a high speed because the heat conduction is largely controlled.

The target film structure is ArF resist / BARC / TEOS / Si3N4. First,
After BARC processing, processing is performed under main etching conditions. The main etching gas conditions are Ar: 500 ml / min, C4F6: 30 ml / min, O2: 34 ml / min
, CO was 200 ml / min, and the processing pressure was set to 2 Pa. The high frequency power for plasma generation is 400 W under this condition, and the wafer bias power is 1500 W. In this case, the back pressure is set to 1.5 kPa in order to suppress etching damage of the ArF resist as a mask.
It was. The TEOS was etched under these conditions, and when the remaining film reached 50 nm, the back surface pressure was reduced from 1.5 kPa to a predetermined pressure, and overetching was performed. One condition is 1.0 kPa and the other is 0.7 kPa. This example was evaluated using the electrode structure shown in FIG. This electrode includes a gas pipe 303 through which helium gas flows, a gas flow meter 301 for helium, a back pressure control valve 302 used for controlling the back helium pressure, and a control personal computer 127 necessary for driving the valve. A transmission path for transmitting the valve opening / closing control signal 304 is provided. When the pressure in the pipe is measured by a pressure gauge (not shown) and the back pressure is lowered after a certain etching time as described above, the back pressure control valve 302 is opened according to the valve opening / closing control signal 304. Although the backside helium pressure drops instantaneously, the pressure gauge value is compared with the set value, and if the pressure falls below the set value, the backside pressure control valve is closed by the valve opening / closing control signal 304 and the pressure becomes the set value. So that
The pressure control is performed using the helium gas flow meter 301. Under the conditions of this example, the time taken to switch the backside helium pressure was 1.5 sec. Further, by changing the backside helium pressure from 1.5 kPa to 1.0 kPa, the wafer surface temperature becomes 1
By increasing the temperature by 2 ° C. and changing from 1.5 kPa to 0.7 kPa, the wafer surface temperature becomes 2
It rose 3 ° C. FIG. 12 is a scanning electron micrograph showing the hole etching shape. FIG.
12A shows the case where the backside helium pressure is not changed, FIG. 12B shows the case where the backside helium pressure is changed to 1.0 kPa during overetching, and FIG. 12C shows the case where the backside helium pressure is set to 0.7 kPa during overetching. Indicates the case where it has been changed. As a result of the experiment, when the backside helium pressure was not changed, the base Si3N4 film penetrated, whereas when the backside helium was reduced during overetching, the base selectivity was improved and penetration was suppressed. However, when the backside helium pressure was reduced to 0.7 kPa, the resist facet portion was damaged. In this experiment, the backside helium pressure was increased from 1.5 kPa to 1
. When changed to 0 kPa, both resist damage and improvement of the substrate selection ratio can be achieved.

This is presumably because the resist surface reaction chemically or physically progressed due to an increase in the wafer surface temperature. On the other hand, the increase in the wafer surface temperature effectively reduces the deposition coefficient of the deposit and transports the deposit to the inside of the hole, thereby improving the substrate selectivity. Therefore, it is needless to say that the backside helium pressure needs to be set to an optimum value that can achieve both resist damage and improvement of the substrate selection ratio.

DESCRIPTION OF SYMBOLS 1 Fluorocarbon deposit film 2 Resist 3 Trench pattern 4 Close hole pattern 5 Pitting 6 Striation 101 Vacuum vessel 102 Air core coil 103 Gas introduction pipe 104 Coaxial line 105 Matching unit 106 450 MHz power supply 107 13.56 MHz power supply 108 Lower electrode 109 Sample to be processed DESCRIPTION OF SYMBOLS 110 Gas flow meter 111 Main valve 112 Conductance valve 113 Ground potential conductor plate 114 Dielectric material 115 Disk-shaped conductor plate 116 Silicon disk 117 Electrostatic chuck part 118 Focus ring 119 Gate valve 120 Matching device 121 High frequency bias power supply 122 Optical fiber 123 Monochrome Meter 124 Photomultiplier tube 125 PC for measurement 126 PC for database 127 PC for control 128 Radiation thermometer 2 DESCRIPTION OF SYMBOLS 1 Load lock chamber 202 Buffer chamber 203 Arm of vacuum transfer robot 204 Etching chamber 205 Unload lock chamber 206 Wafer 301 Gas flow meter for helium 302 Back pressure control valve 303 Gas piping 304 Valve open / close control signal 401 Narrow tube 402 Quartz rod 403 Heater 404 Lamp 405 Punch metal

Claims (10)

A vacuum vessel that is evacuated by a vacuum evacuation unit, a gas introduction unit for introducing an etching gas into the vacuum vessel, a work sample setting unit, and a power introduction unit that introduces high-frequency power into the vacuum vessel. In a dry etching apparatus that converts the gas introduced into the vacuum vessel by the gas introduction means into plasma with high-frequency power introduced by the power introduction means, and performs surface treatment of the sample to be processed with the plasma,
Means for detecting plasma ignition, means for measuring the amount of radicals in the plasma, means for applying a bias power to the workpiece, and means for controlling the start time of the bias power application,
When starting the surface treatment of the sample to be processed, the time from the plasma ignition to the start of the application of the bias power is controlled according to the amount of radicals,
The gas introduction means controls a gas condition for a time until the temperature of the sample to be processed reaches a constant value from the start of etching to a lower deposition condition than a gas condition after the temperature of the sample to be processed reaches a constant value. A dry etching apparatus characterized by that. The dry etching apparatus according to claim 1,
The gas introduction means includes means for introducing CxFy gas into the vacuum vessel, and means for controlling the flow rate of the introduced CxFy gas,
The flow rate of the CxFy gas supplied into the vacuum container during the time until the temperature of the sample to be processed reaches a constant value from the start of etching is supplied into the vacuum container after the temperature of the sample to be processed reaches a constant value. A dry etching apparatus characterized by being set smaller than the flow rate of CxFy gas. The dry etching apparatus according to claim 1,
As the gas introduction means, there are means for introducing a dilution gas consisting of a rare gas into the vacuum vessel, and means for controlling the flow rate of the dilution gas consisting of the rare gas introduced,
The flow rate of the dilution gas consisting of a rare gas to be supplied into the vacuum vessel during the time from the start of etching until the temperature of the sample to be processed reaches a constant value, and the vacuum vessel after the temperature of the sample to be processed reaches a constant value. A dry etching apparatus characterized in that the flow rate is set to be larger than a flow rate of a dilution gas composed of a rare gas supplied into the inside. The dry etching apparatus according to claim 1,
As the gas introduction means, there are means for introducing oxygen gas or nitrogen gas into the vacuum vessel, and means for controlling the flow rate of the introduced oxygen gas or nitrogen gas,
The flow rate of oxygen gas or nitrogen gas supplied into the vacuum vessel during the time from the start of etching until reaching a constant value after the start of etching is set to the inside of the vacuum vessel after the temperature of the workpiece sample reaches a constant value. The dry etching apparatus is characterized in that it is set to be larger than the flow rate of oxygen gas or nitrogen gas supplied to the substrate. In the dry etching apparatus according to any one of claims 1 to 4,
A dry etching apparatus characterized by controlling a gas pressure sealed between a substrate to be processed and an electrode on which the substrate to be processed and a time thereof are controlled in accordance with a radical amount in plasma. In the dry etching apparatus according to any one of claims 1 to 5,
A means for monitoring the temperature of the substrate to be processed is provided, and the gas pressure sealed between the substrate to be processed and the electrode on which the substrate to be processed and the time thereof are controlled in accordance with the radical amount in the plasma and the temperature of the substrate to be processed. A dry etching apparatus characterized by that. The dry etching apparatus according to any one of claims 1 to 6,
A dry etching apparatus characterized in that a temperature controllable heater is incorporated in an electrode on which a substrate to be processed is installed. In the dry etching apparatus according to any one of claims 1 to 7,
As means for monitoring the temperature of the substrate to be processed, a non-contact type thermometer is provided on the side wall of the vacuum vessel, and depending on the amount of radicals in the plasma and the temperature of the substrate to be processed measured by the non-contact type thermometer, A dry etching apparatus characterized by controlling a gas pressure sealed between electrodes on which a substrate to be processed is placed and a time thereof. In the dry etching apparatus according to any one of claims 1 to 7,
As means for monitoring the temperature of the substrate to be processed, the electrode on which the substrate to be processed is provided has a non-contact thermometer or a contact thermometer, and the radical amount in the plasma and the non-contact thermometer or the contact thermometer A dry etching apparatus characterized by controlling a gas pressure sealed between a substrate to be processed and an electrode on which the substrate to be processed and a time thereof are controlled according to the measured substrate temperature. 8. The dry etching apparatus according to claim 1, wherein a high-frequency power for forming plasma, a high-frequency power applied to a substrate to be processed, an electrode structure for installing the substrate to be processed, and a cooling mechanism for the electrode In consideration of at least one or more items, the time dependency of the temperature of the substrate to be processed from the start of the process is predicted by calculation. A dry etching apparatus characterized by controlling a gas pressure sealed between electrodes on which a substrate to be processed is placed and a time thereof.

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