JP2011007961A - Photonic crystal optical bit memory array - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photonic crystal optical bit memory which captures serial data into resonators one bit-by-one bit, converts the serial data into parallel data without using wavelength conversion, and reads the data captured into the resonators as a pulse train, and to provide a photonic crystal optical bit memory array.SOLUTION: The photonic crystal optical bit memory array includes: the plurality of resonators each of which is arranged in each of a plurality of photonic crystals, performs a bistable operation and has three resonance modes; a bus waveguide which connects the plurality of resonators in serial and composes a multiple bit memory; and a plurality of drop waveguides which are disposed at the side of each of the plurality of resonators, wherein the bus waveguide transmits only one resonance mode among the three resonance modes, the drop waveguide transmits all of the three resonance modes.

Description

  The present invention relates to an optical bit memory and an optical bit memory array using a photonic crystal, and a data writing method, a reading method, and serial / parallel conversion using the optical bit memory.

  FIG. 1 is a diagram showing a bit memory 100 using a photonic crystal. In FIG. 1, when the bus waveguide 102 is disposed beside the resonator 101 in the optical memory photonic crystal using the photonic crystal resonator 101, the light input from the bus waveguide 102 resonates with the resonator 101. The light is trapped (resonated) by the resonator 101. Since the resonator 101 composed of a photonic crystal is extremely small, the light density can be made much higher than that of a conventional optical device, and nonlinear effects such as bistable phenomena can be efficiently extracted. It is expected as an optical memory (see Non-Patent Document 1).

However, the photonic crystal optical memory has the following problems.
FIG. 2 is a diagram showing a problem when serially arranging the same resonators having the same resonance wavelength, and FIG. 2A is a diagram showing a photonic crystal 200 for explaining the problem 1. FIG. FIG. 2B is a diagram showing a photonic crystal 210 for explaining the second problem.

  In the photonic crystal 200 shown in FIG. 2A, light input from the bus waveguide 202 is trapped (resonated) by the resonator 201 and reflected. When a plurality of resonators 201 are arranged beside the bus waveguide 202 in order to form a multi-bit memory, the light introduced from the bus waveguide 202 resonates and is reflected by the foremost resonator 201. However, there is a problem that the expected multi-bit effect cannot be obtained (problem 1).

  Further, in the photonic crystal 210 shown in FIG. 2B, in order to allow light to reach the resonators 211 at the back, a dedicated waveguide 213 is installed in each resonator 211, and light is transmitted from the waveguide 213. When input, light can enter the next resonator through the bus waveguide 212. That is, the adjacent resonators 211 interfere with each other via the bus waveguide 212. For example, when data of “1” and “0” are stored by two resonators, the data disappears due to this interference, and there is a problem that the function as a bit memory cannot be achieved.

M. Faith et al., “High-contrast all-optical bistable switching in photonic crystal microcavities” Appl. Phys. Lett. 83, 2739 (2003)). Paul E. Barclay et al., “Efficient input and output fiber coupling to a photonic crystal waveguide” OPTICS LETTERS 29, 697 (2004)

  In order to solve these problems, the resonators are optically sufficiently independent from each other, and the input serial data is converted into one bit via one bus waveguide connecting the resonators. It is necessary to provide a mechanism for taking in the resonator every time.

  As one method for solving the above problem, serial data is converted into a pulse train having different wavelengths for each bit, and resonators having resonance frequencies corresponding to those wavelengths are serially arranged, and one bus is provided. There is a method of taking light into a resonator for each bit through a waveguide. Thereby, the resonators can be optically completely independent from each other, and the input serial data can be taken into the resonator for each bit. However, since this method requires wavelength conversion for each bit, it is technically difficult and consumes high energy.

  The object of the present invention is to take serial data into a resonator bit by bit, convert serial data into parallel data, and read out the data taken into the resonator as a pulse train without going through such wavelength conversion. It is an object of the present invention to provide an optical bit memory and an optical bit memory array.

  In order to solve the above problems, a photonic crystal optical bit memory array according to the present invention is disposed in each of a plurality of photonic crystals, performs a bistable operation, and includes a plurality of resonators having three resonance modes; A plurality of resonators connected in series to form a multi-bit memory; a bus waveguide penetrating both side surfaces of the photonic crystal and disposed beside the resonator; and the plurality of resonators. A plurality of drop waveguides arranged beside each of the plurality of resonators so as to sandwich the bus waveguide, and the bus waveguide propagates only one of the three resonance modes. The drop waveguide is capable of propagating all three resonance modes.

  The drop waveguide is disposed in the same plane as the bus waveguide, is disposed on the opposite side of the bus waveguide with respect to the resonator, and is formed on the side of the photonic crystal. It is good also as what has a U-shape so that it may input from the side surface which is not penetrated and it returns to the same surface.

  The drop waveguide may be disposed on an upper surface of the resonator and may be disposed so as to penetrate a side surface of the photonic crystal that does not penetrate the bus waveguide.

  Further, the above-described photonic crystal optical bit memory array may be arranged vertically in parallel to constitute a two-dimensional multi-bit memory array.

  In order to solve the above problems, a photonic crystal optical bit memory according to the present invention is arranged in a photonic crystal, performs a bistable operation, has a resonator having three resonance modes, and the resonator is serially connected. A bus waveguide penetrating both side surfaces of the photonic crystal so as to constitute a multi-bit memory and disposed beside the resonator, and the resonator sandwiched by the bus waveguide. A drop waveguide disposed beside the resonator, wherein the bus waveguide can propagate only one of the three resonance modes, and the drop waveguide can transmit all of the three resonance modes. It can be propagated.

  In order to solve the above problems, the writing method of the photonic crystal optical bit memory array of the present invention is arranged in each of a plurality of photonic crystals, performs a bistable operation, and has a plurality of resonance modes. In order to connect the plurality of resonators in series, a bus waveguide disposed beside the plurality of resonators and capable of propagating only one of the three resonance modes, and A write method for a photonic crystal optical bit memory array comprising a plurality of drop waveguides arranged beside each of a plurality of resonators and capable of propagating all three resonance modes, wherein serial data is transmitted to the plurality of resonators Supplying to the resonator from the bus waveguide and the timing at which the desired pulse of the serial data reaches the desired resonator Sequentially supplying bias light from a plurality of drop waveguides, wherein the serial data is supplied in a resonance mode capable of propagating through the bus waveguide among the three resonance modes, and the bias light is supplied in the serial mode. It is characterized in that it is supplied in a resonance mode different from the resonance mode in which data is propagated.

  In order to solve the above-described problem, the photonic crystal optical bit memory array readout method of the present invention is arranged in each of a plurality of photonic crystals, performs a bistable operation, and has a plurality of resonance modes. In order to connect the plurality of resonators in series, a bus waveguide disposed beside the plurality of resonators and capable of propagating only one of the three resonance modes, and A method of reading a photonic crystal optical bit memory array, comprising: a plurality of drop waveguides arranged beside each of a plurality of resonators and capable of propagating all three resonance modes; From the step of inputting a read pulse having a wavelength corresponding to the dip position when the resonator is in the OFF state, and transmitting through the plurality of drop waveguides. Detecting the wavelength of the read pulse and reading ON / OFF of the plurality of resonators, wherein the read pulse is supplied in a resonance mode different from a resonance mode for propagating the serial data. It is characterized by that.

  In order to solve the above problem, the serial-parallel conversion method of the photonic crystal optical bit memory array of the present invention is arranged in each of a plurality of photonic crystals, performs bistable operation, and has three resonance modes. A plurality of resonators, and a bus waveguide disposed beside the plurality of resonators for serially connecting the plurality of resonators and capable of propagating only one of the three resonance modes. A serial-parallel conversion method for a photonic crystal optical bit memory array, comprising: a plurality of drop waveguides disposed beside each of the plurality of resonators and capable of propagating all three resonance modes; Supplying the plurality of resonators from the bus waveguide, and a desired pulse of the serial data reaches the desired resonator. A step of sequentially supplying bias light from the drop waveguide according to imming, and a step of reading parallel data of a pulse train of the serial data by reading reflection of the bias light by the drop waveguide; The data is supplied in a resonance mode that can propagate through the bus waveguide among the three resonance modes, and the bias light is supplied in a resonance mode different from the resonance mode that propagates the serial data. And

  According to the present invention, the serial data inputted through the single bus waveguide that makes the resonators optically sufficiently independent from each other and connects the respective resonators without wavelength conversion is converted into 1 It is possible to provide a photonic crystal optical bit memory array having a mechanism for taking in a resonator for each bit.

It is a figure which shows the structure of the bit memory using the photonic crystal by a prior art. FIG. 2 is a diagram showing a problem when serially arranging the same resonators having the same resonance wavelength according to the prior art, FIG. 2A is a diagram illustrating a configuration for explaining the problem 1, and FIG. FIG. 4 is a diagram illustrating a configuration for explaining problem 2; FIGS. 3A and 3B are diagrams showing a basic configuration of the photonic crystal optical bit memory 300 according to the first embodiment of the present invention. FIG. 3A shows the configuration of the optical bit memory 300, and FIG. 3 (c) shows the transmittance of the bus waveguide, and FIG. 3 (d) shows the transmittance of the drop waveguide. It is a figure explaining the write-in operation | movement of the serial data of the photonic crystal optical bit memory array by the 1st Embodiment of this invention. 5A and 5B are diagrams for explaining a serial-parallel conversion (serial data writing) operation of the optical bit memory array according to the first embodiment of the present invention. FIG. 5A shows a configuration of the optical bit memory array 500, and FIG. (B) shows an input pulse, and FIG. 5 (c) shows an output pulse. FIG. 6A is a diagram for explaining parallel data read operation of the photonic crystal optical bit memory array according to the first embodiment of the present invention. FIG. 6A shows the configuration of the optical bit memory array 600, and FIG. ) Shows a change in transmittance of the resonator, FIG. 6C shows an input pulse, and FIG. 6D shows an output pulse. FIGS. 7A and 7B are diagrams showing a basic configuration of a photonic crystal optical bit memory according to a second embodiment of the present invention, FIG. 7A shows a top view, FIG. 7B shows a front side view, and FIG. FIG. 7C is a diagram showing a right side view. It is a figure which shows the basic composition of the photonic crystal optical bit memory by the 2nd Embodiment of this invention, Fig.8 (a) shows a photon density, FIG.8 (b) shows the transmittance | permeability of a bus waveguide. FIG. 8C shows the transmittance of the drop waveguide. FIGS. 9A and 9B are diagrams illustrating a write operation of the photonic crystal optical bit memory array according to the second embodiment of the present invention. FIG. 9A shows the configuration of the optical bit memory array 900, and FIG. FIG. 9C shows the input pulse, and FIG. 9C shows the output pulse. FIGS. 10A and 10B illustrate a read (parallel) operation of the optical bit memory array according to the second embodiment of the present invention. FIG. 10A shows the configuration of the optical bit memory array 1000, and FIG. FIG. 10 (c) shows an input pulse, and FIG. 10 (d) shows an output pulse. FIG. 11A is a diagram showing a configuration of a two-dimensional array memory of a photonic crystal optical bit memory array according to a second embodiment of the present invention, and FIG. 11A shows a configuration of the optical bit memory array 1100, ) Is a diagram showing photon densities having different resonance wavelengths for each vertical arrangement.

Embodiments of the present invention will be described in detail with reference to the drawings.
First, a first embodiment of the present invention will be described with reference to FIGS.
FIG. 3 is a diagram showing a photonic crystal optical bit memory 300 according to the first embodiment of the present invention, and FIG. 3A is a diagram showing a configuration of the optical bit memory 300, and FIG. Indicates the photon density, FIG. 3C shows the transmittance of the bus waveguide, and FIG. 3D shows the transmittance of the drop waveguide.

In FIG. 3A, an optical bit memory 300 includes one resonator 301, a bus waveguide 302, a drop waveguide 303, which are two waveguides arranged so as to sandwich the resonator 301, a substrate, The photonic crystal 304 is provided. As shown in FIG. 3B, the resonator 301 has three resonance modes (resonance wavelengths λ _W , λ _R , λ _B ), two of which (λ _R , λ _B ) are bus waveguides 302. The waveguide band of the bus waveguide is adjusted so that it cannot be propagated (see FIG. 3C). One of these wavelengths (λ _R , λ _B ) is a bias light λ _B for the resonator to perform a bistable operation, and the other is a read pulse λ _R for reading data. The serial data to be written into the memory has the third resonance mode wavelength λ _W and is coupled to the resonance mode through the bus waveguide 302.

FIG. 4 is a diagram for explaining the serial data write operation of the photonic crystal optical bit memory array 400 according to the first embodiment of the present invention.
In FIG. 4, an optical bit memory array 400 has a configuration in which two optical bit memories 300 each having a resonator 301, a bus waveguide 302, and a drop waveguide 303 are arranged so that the bus waveguides 302 are continuous. is there. It is assumed that the serial data is input from the head as pulse trains (1), (2),... And stored in the resonators 301 of C1, C2,. Here, the bias light to C1, C2,. It is assumed that the resonator 301 is in a bistable OFF state when only the bias light is in the resonator 301, and is in a bistable ON state when a serial data pulse is input. When the resonator 301 is turned on, a pulse of serial data is once trapped by the resonator 301 and then reflected to the input port. Thereby, it is possible to prevent the subsequent pulse train from entering the resonator 301 that is already in the ON state.

  The point to be noted here is how to handle when a zero level pulse comes in. For example, when (2) pulse is “0” and (3) pulse is “1”, (2) pulse cannot be switched to ON state, and (3) pulse is trapped in C2. In order to eliminate this malfunction, the timing is adjusted so that the bias light is supplied when the pulse reaches the desired resonator 301. That is, the bias light is sequentially supplied from C1 with a time delay corresponding to the pulse repetition period. As a result, the pulses (1), (2),... Are trapped in C1, C2,. That is, input serial data can be taken into the resonator 301 bit by bit via one bus waveguide 302 connecting the resonators 301. Further, in this configuration, bias light is supplied to each resonator 301 independently, and “0” and “1” held by the bias light are set so that the bias light cannot propagate through the bus waveguide 302. It is possible to prevent the information from being mixed and disappearing.

  FIG. 5 is a diagram for explaining the serial-parallel conversion (serial data writing) operation of the photonic crystal optical bit memory array 500 according to the first embodiment of the present invention. FIG. 5 (a) is an optical bit memory array. FIG. 5B shows an input pulse, and FIG. 5C shows an output pulse.

  In FIG. 5A, an optical bit memory array 500 includes three optical bit memories 300 each having a resonator 301, a bus waveguide 302, and a drop waveguide 303 so that the bus waveguides 302 are continuous. This is the configuration. As described above, when the resonator 301 is turned on, the input light is once trapped by the resonator 301 and then reflected by the input port. That is, if the reflection / transmission of the bias light (B1, B2,... (FIG. 5B)) is observed after all the bit strings of the serial data are stored in the respective resonators 301, the stored pulse trains on the reflection side. The parallel data (Q1, Q2,... (FIG. 5C)) can be inverted on the transmission side.

  FIG. 6 is a diagram for explaining the parallel data read operation of the photonic crystal optical bit memory array 600 according to the first embodiment of the present invention. FIG. 6A shows the configuration of the optical bit memory array 600. 6B shows a change in the transmittance of the resonator, FIG. 6C shows an input pulse, and FIG. 6D shows an output pulse.

  6A, an optical bit memory array 600 includes three optical bit memories 300 each having a resonator 301, a bus waveguide 302, and a drop waveguide 303 so that the bus waveguides 302 are continuous. This is the configuration. If the reflected light of the bias light (B1, B2,...) Described above is cut out in a pulse shape by a modulator, parallel data can be handled as a pulse train, but here, other methods will be described. As shown in FIG. 6B, when the resonator 301 is switched from OFF to ON, the refractive index (transmittance) of the resonator 301 changes, so that the dip position of the transmission spectrum in the resonance mode changes. Here, light having a wavelength corresponding to the spectrum dip when the resonator 301 is in the OFF state is input as a lead pulse (R1, R2,... (FIG. 6C)). Set so as not to switch from stable OFF to ON. In this case, if the resonator 301 is in the OFF state, the light is trapped by the resonator 301 and reflected. On the other hand, if the resonator 301 is in the ON state, the position of the dip in the spectrum is shifted and the transmittance is shifted to a high state. With the above method, parallel data can be read out as a pulse train (Q1, Q2,... (FIG. 6D)) by the read pulse (R1, R2,...).

  It is also possible to obtain inversion of parallel data. In this case, if light having a wavelength corresponding to the spectrum dip when the resonator 301 is in the ON state is input as a read pulse, the inversion of parallel data can be read out as a pulse train (Q1, Q2,...).

Next, a second embodiment of the present invention will be described with reference to FIGS.
In the multi-bit memory of the first embodiment shown in FIGS. 3 to 6, the drop waveguide 303 for bias and read pulse is arranged in the same plane as the resonator 301, so when the number of bits increases, The arrangement of the waveguide 303 becomes a bottleneck for improving the degree of integration of the memory. In the second embodiment, referring to the technique of Non-Patent Document 2, this problem is avoided by three-dimensionally arranging bias and read pulse drop waveguides.

  In the first embodiment, a signal trapped in the resonator 301 is extracted to the adjacent waveguide 302 by a resonant tunneling phenomenon. This phenomenon is caused by the fact that the annihilation wave oozing out from the resonator 301 overlaps with the waveguide mode, and conversely, the annihilation wave oozing out from the waveguide overlaps with the mode of the resonator. Achieved. In other words, even if the waveguide is arranged on the resonator as shown in FIGS. 7, 8, 9, and 10, if there is a field overlap with the resonance mode, light can be put in and out by the resonance tunnel phenomenon. 5 and FIG. 6, serial data can be written and read.

  7A and 7B are diagrams showing a basic configuration of a photonic crystal optical bit memory 700 according to the second embodiment of the present invention. FIG. 7A shows a top view and FIG. 7B shows a front side surface. FIG. 7 (c) shows a right side view.

  In FIG. 7, an optical bit memory 700 includes a resonator 701, a bus waveguide 702, a drop waveguide 703, and a photonic crystal 704 serving as a substrate. The drop waveguide 703 is three-dimensionally arranged on the resonator 701 as shown in the front side view 710 of FIG. 7B, and as shown in the right side view 720 of FIG. The relative distance between the waveguide disposed above the resonator 701 and the resonator 701 is close in the upper part of the resonator (distance Δ <wavelength λ) and far away in other portions. This is because it is not preferable that the waveguide mode annihilation wave touches a portion of the photonic crystal 704 other than the resonator 701 because it causes scattering of the waveguide mode.

  FIG. 8 is a diagram showing a basic configuration of a photonic crystal optical bit memory according to the second embodiment of the present invention. FIG. 8A shows the photon density, and FIG. 8B shows a bus waveguide. FIG. 8C shows the transmittance of the drop waveguide. The characteristics of the optical bit memory shown in FIG. 8 are the same as those of the first embodiment shown in FIG.

FIG. 9 is a view for explaining the write operation of the photonic crystal optical bit memory array according to the second embodiment of the present invention. FIG. 9A shows the configuration of the optical bit memory array 900, and FIG. b) shows an input pulse, and FIG. 9 (c) shows an output pulse.
In FIG. 9A, an optical bit memory array 900 includes four optical bit memories 700 each having a resonator 701, a bus waveguide 702, and a drop waveguide 703 so that the bus waveguides 702 are continuous. This is the configuration. Others are the same as the write operation of the first embodiment shown in FIGS.

FIG. 10 is a view for explaining the read (parallel) operation of the photonic crystal optical bit memory array according to the second embodiment of the present invention. FIG. 10 (a) shows the configuration of the optical bit memory array 1000, FIG. 10B shows a change in transmittance of the resonator, FIG. 10C shows an input pulse, and FIG. 10D shows an output pulse.
In FIG. 10A, an optical bit memory array 1000 includes four optical bit memories 700 each having a resonator 701, a bus waveguide 702, and a drop waveguide 703 so that the bus waveguides 702 are continuous. This is the configuration. Others are similar to the read operation of the first embodiment shown in FIG.

FIG. 11 is a diagram showing a configuration of a two-dimensional array memory of a photonic crystal optical bit memory array according to the second embodiment of the present invention. FIG. 11A shows a configuration of the optical bit memory array 1100, FIG. 11B shows photon densities having different resonance wavelengths for each vertical array.
In FIG. 11, an optical bit memory array 1100 includes an optical bit memory 700 having a resonator 701, a bus waveguide 702, and a drop waveguide 703, serially arranged in the horizontal direction so that the bus waveguide 702 is continuous. In this configuration, four rows are arranged in parallel and four rows in length.

  In FIG. 11, since the drop waveguide 703 uses the above-described resonant tunneling phenomenon, it requires a structure in which light propagating through the drop waveguide 703 is bent vertically downward using a reflection mirror, a half mirror, or the like. do not do. This suggests that a resonator can be serially connected in the direction of the bus waveguide 702 and is the greatest advantage of this structure.

  In FIG. 11, bias light and a read pulse are introduced into the resonators 701 in the column by a drop waveguide 703 that runs in the vertical direction over the photonic crystal. Here, the resonance wavelength of the serially connected photonic crystal is vertical as shown in FIG. 11B so that information stored in the resonator 701 adjacent via the drop waveguide 703 is not mixed. They are set differently in the arrangement direction.

  With the above method, a two-dimensionally arranged bit memory array is constituted by a photonic crystal resonator, and input serial data can be taken into the resonator for each bit.

  As described above, according to the present invention, the serial data group that has been wavelength-converted for each bit string is distributed to serially connected photonic crystal memory strings for each wavelength using AWG or the like, and the conductive data arranged above the photonic crystal is allocated. The stored data can be read by the waveguide. Also, serial data can be converted into parallel data. Furthermore, the present invention makes it possible to read out the data captured in the resonator as a pulse train.

300,700 Photonic crystal optical bit memory 301,701 Resonator 302,702 Bus waveguide 303,703 Drop waveguide 304,704 Photonic crystal 400,500,600,900,1000,1100 Photonic crystal optical bit memory array

Claims (8)

A plurality of resonators arranged in each of the plurality of photonic crystals, performing bistable operation and having three resonance modes;
A bus waveguide that penetrates both side surfaces of the photonic crystal so as to form a multi-bit memory by serially connecting the plurality of resonators, and is disposed beside the resonator;
A plurality of drop waveguides disposed beside each of the plurality of resonators so as to sandwich the plurality of resonators with the bus waveguide;
The photonic crystal optical bit memory array, wherein the bus waveguide can propagate only one of the three resonance modes, and the drop waveguide can propagate all of the three resonance modes.   The drop waveguide is disposed in the same plane as the bus waveguide, is disposed on the opposite side of the bus waveguide with respect to the resonator, and penetrates the bus waveguide among the side surfaces of the photonic crystal. 2. The photonic crystal optical bit memory array according to claim 1, wherein the photonic crystal optical bit memory array has a U-shape so as to input from a non-side surface and return to the same surface.   The drop waveguide is disposed on an upper surface of the resonator, and is disposed so as to penetrate a side surface of the photonic crystal that does not penetrate the bus waveguide. 2. The photonic crystal optical bit memory array according to 1.   2. The photonic crystal light bit memory array according to claim 1, wherein the photonic crystal light bit memory array according to claim 1 is arranged vertically in parallel to constitute a two-dimensional multi-bit memory array. A resonator disposed in a photonic crystal, performing bistable operation and having three resonance modes;
A bus waveguide that penetrates both side surfaces of the photonic crystal so as to form a multi-bit memory by serially connecting the resonators and is disposed beside the resonators;
A drop waveguide disposed beside the resonator so as to sandwich the resonator with the bus waveguide;
The photonic crystal optical bit memory according to claim 1, wherein the bus waveguide can propagate only one of the three resonance modes, and the drop waveguide can propagate all of the three resonance modes. A plurality of resonators arranged in each of the plurality of photonic crystals, performing bistable operation, and having three resonance modes, and a plurality of resonators are connected to each other in series. A bus waveguide capable of propagating only one of the three resonant modes, and a plurality of drops disposed beside each of the plurality of resonators and capable of propagating all three resonant modes. A method of writing a photonic crystal optical bit memory array comprising a waveguide,
Supplying serial data to the plurality of resonators from the bus waveguide;
Sequentially supplying bias light from the plurality of drop waveguides in accordance with a timing at which a desired pulse of the serial data reaches a desired resonator,
The serial data is supplied in a resonance mode that can propagate through the bus waveguide among the three resonance modes, and the bias light is supplied in a resonance mode that is different from the resonance mode that propagates the serial data. A method for writing a photonic crystal optical bit memory array. A plurality of resonators arranged in each of the plurality of photonic crystals, performing bistable operation, and having three resonance modes, and a plurality of resonators are connected to each other in series. A bus waveguide capable of propagating only one of the three resonant modes, and a plurality of drops disposed beside each of the plurality of resonators and capable of propagating all three resonant modes. A method for reading a photonic crystal optical bit memory array comprising a waveguide,
Inputting a read pulse having a wavelength corresponding to a dip position when the resonator is in an OFF state from the plurality of drop waveguides;
Detecting the wavelength of the lead pulse on the transmission side of the plurality of drop waveguides, and reading ON-OFF of the plurality of resonators,
The method of reading a photonic crystal optical bit memory array, wherein the read pulse is supplied in a resonance mode different from a resonance mode for propagating the serial data. A plurality of resonators arranged in each of the plurality of photonic crystals, performing bistable operation, and having three resonance modes, and a plurality of resonators are connected to each other in series. A bus waveguide capable of propagating only one of the three resonant modes, and a plurality of drops disposed beside each of the plurality of resonators and capable of propagating all three resonant modes. A serial-parallel conversion method for a photonic crystal optical bit memory array comprising a waveguide,
Supplying serial data to the plurality of resonators from the bus waveguide;
Sequentially supplying bias light from the drop waveguide in accordance with a timing at which a desired pulse of the serial data reaches a desired resonator;
Reading parallel data of the pulse train of the serial data by reading the reflection of the bias light with the drop waveguide, and
The serial data is supplied in a resonance mode that can propagate through the bus waveguide among the three resonance modes, and the bias light is supplied in a resonance mode that is different from the resonance mode that propagates the serial data. A method for serial-parallel conversion of a photonic crystal optical bit memory array.

Images