JP2011004284A - Image coding apparatus and method of controlling the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the number of times of switching configuration data in a reconfigurable processor.SOLUTION: The image coding apparatus includes: a first coder 102 for coding image data according to a first coding system for the unit of a block in a predetermined size of the image data; a second coder 103 for coding the image data according to a second coding system different from the first coding system; and an identification bit generator 110 for selecting either the data coded by the first coder 102 or the data coded by the second coder 103, as coded data of a current block, on the basis of code lengths of the data coded by the first and second coders 102 and 103 and a boundary function corresponding to a coding system selected in the preceding block.

Description

  The present invention relates to a technique for encoding image data.

  There has been proposed an encoding method that efficiently encodes an image in which a character line image and a natural image are mixed without using an image area determination technique and that is excellent in image quality (Patent Document 1). In the encoding method of Patent Document 1, image data is input in units of pixel blocks of a predetermined size, and a data size Ly encoded by lossy encoding and a data size Lx encoded by lossless encoding are respectively obtained. ing. The code data to be output is determined depending on whether Ly ≧ f (Lx). Here, f () is a non-linear boundary function. When this condition is satisfied, the lossless encoded code data is selected. On the other hand, when this condition is not satisfied, the lossy encoded code data is selected. . That is, in a system in which the above technique is implemented, encoded data of the two methods are mixed.

  In general, image encoding is performed in order to reduce the size of image data and facilitate data transfer and storage, and the encoded data is decoded for image display and printing. Therefore, it is desirable that the encoding device perform encoding that is a convenient form for decoding.

  In order to decode a plurality of code data encoded by a plurality of different methods, it is common to prepare dedicated decoding circuits for each. However, it is not practical to provide such a decoding circuit, and it has been proposed to use a reconfigurable logic circuit in order to reduce the circuit scale and increase the flexibility of the encoding method. In particular, a technique for constructing a decoding logic circuit using reconfigurable logic has been proposed in order to flexibly support a plurality of code data encoded by a plurality of different encoding methods and to perform high-speed decoding. (Patent Document 2).

  Based on the above technique, code data in which a lossless code and an irreversible code generated by the image encoding device of Patent Literature 1 are mixed can be decoded by the decoding device of Patent Literature 2. Here, the reconfigurable processor includes a plurality of circuit configuration surfaces including multi-functional elements called PE (Processor Element) having a basic arithmetic function. The circuit configuration information (configuration data) of the reconfigurable processor is configured with PE as a basic unit. Therefore, the amount of data is small compared to the configuration data of FPGA or CPLD configured in units of logic gates, and the circuit can be reconfigured in a shorter time than that of FPGA or CPLD. The reconfigurable logic is a logic circuit that can dynamically switch functions between a plurality of functions.

JP 2006-80792 A (Claim 1, FIG. 1) JP 2002-240368 A (Claim 6, FIG. 4)

  In the reconfigurable processor, the circuit can be reconfigured in a shorter time compared to the FPGA and CPLD. However, in a reconfigurable processor, a change in circuit configuration takes a certain amount of time because it is performed through a plurality of procedures such as detection of a circuit configuration switching trigger, circuit operation stop, configuration switching, and circuit operation restart. . For this reason, in the image encoding device of Patent Document 1, if the encoding method is frequently switched, the number of times configuration data is switched increases. As a result, there arises a problem that the time overhead associated with the switching of the configuration data increases and the total processing time is delayed.

  An object of the present invention is to solve the above-mentioned problems of the prior art.

  An object of the present invention is to reduce the number of times of switching between coding systems in an image coding apparatus that performs coding by switching between the first and second coding systems.

In order to achieve the above object, an image encoding apparatus according to an aspect of the present invention has the following arrangement. That is,
First encoding means for encoding the image data by a first encoding method in units of blocks of a predetermined size of the image data;
Second encoding means for encoding the image data in a second encoding scheme different from the first encoding scheme for each block of the image data;
Based on the code length of the encoded data encoded by the first and second encoding means and the boundary function according to the encoding method selected in the preceding block, the encoded data of the current block is And selecting means for selecting one of the encoded data encoded by the first encoding means or the second encoding means.

  Advantageous Effects of Invention According to the present invention, in an image coding apparatus that performs coding by switching between the first and second coding methods, the number of times of switching between coding methods can be reduced as compared with the conventional technique.

1 is a block configuration diagram of a copier according to an embodiment. The block diagram of the encoding process part which concerns on this embodiment. FIG. 3 is a block diagram illustrating a configuration of an identification bit generation unit according to the first embodiment. The figure explaining the boundary conditions which select the lossless code and lossy code of this embodiment. FIG. 6 is a diagram for explaining an output example of code identification bits in the first embodiment. The figure which shows the example which the point which plotted the code length of the block changes in embodiment. The flowchart explaining the process of the encoding process part which concerns on this embodiment. FIG. 6 is a diagram for explaining a configuration of an identification bit generation unit according to the second embodiment. 9 is a flowchart for explaining processing of an encoding processing unit according to the second embodiment. The figure which shows an example of a result when the blocks b1-b12 of FIG. 6 are input. 10 is a flowchart for explaining processing of an encoding processing unit according to the third embodiment. It is a figure which shows the temporary selection bit signal and code | symbol identification bit of Embodiment 3.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments do not limit the present invention according to the claims, and all combinations of features described in the embodiments are not necessarily essential to the solution means of the present invention. .

<Embodiment 1>
The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram of a copying machine according to an embodiment of the present invention.

  In the figure, the control unit 1 controls the entire multifunction peripheral, and includes a CPU, a ROM, a RAM, and the like. The operation unit 2 includes a display such as liquid crystal, various switches, buttons, and the like. An original reading unit (image scanner) 3 is equipped with an ADF (Auto Document Feeder), and optically reads an original to generate image data. The image data obtained in this way is digital data of 8 bits (256 gradations) for each RGB color component. The rendering unit 4 renders a print image based on PDL format print data received via an interface (not shown) (including a network interface). The selector 5 selects one of the image data output from the document reading unit 3 and the rendering unit 4 in accordance with an instruction from the control unit 1 and outputs the selected image data to the encoding processing unit 6. The encoding processing unit 6 encodes the image data output from the selector 5. The secondary storage device 7 (hard disk device in the embodiment) stores the encoded data output from the encoding processing unit 6. The decoding processing unit 8 reads and decodes the encoded data stored in the secondary storage device 7 in the storage order. The decryption processing unit 8 has a reconfigurable logic 801 for performing decryption. The switching control unit 802 reads the code identification bit indicating the encoding method added to the head of the code data, and constructs the reconfigurable logic 801 with the corresponding configuration information. Configuration information 1 is configuration information of a decoding circuit corresponding to the first encoding scheme, and configuration information 2 is configuration information of a decoding circuit corresponding to the second encoding scheme. The image processing unit 9 receives the decoded image from the decoding processing unit 8, converts the RGB color space to YMC, which is a recording color space, performs UCR (Under Color Removal) processing, and also performs image data correction processing. . The printer engine unit 10 has a laser beam printer engine as its printing mechanism, but may be an ink jet printer that discharges ink liquid, and may be of any type.

  In the above configuration, for example, when the user operates the operation unit 2 to select the copy mode, sets the document in the document reading unit 3 (ADF), and presses the copy start key, the copy is started. . At this time, the document image data read by the document reading unit 3 is transferred to the encoding processing unit 6 via the selector 5 in raster order, where it is compression encoded and stored in the secondary storage device 7. When print data is received from the outside, the selector 5 is set to select the rendering unit 4, and an image based on the print data generated by the rendering unit 4 is compression-encoded and stored in the secondary storage device 7. . The decoding processing unit 8 reads the encoded data from the secondary storage device 7 and decodes it according to the printing speed of the printer engine unit 10. Then, YMCK component image data is generated from the image data decoded by the image processing unit 9. The result is output to the printer engine unit 10 and printed.

  The process for storing the encoded data in the secondary storage device 7 and the reading process for decoding and printing are asynchronous. That is, the secondary storage device 7 functions as a buffer interposed between the image encoding process and the decoding process. Since the original reading and encoding process is independent of the decoding and printing (recording) process, a large number of originals can be read at a high speed, and the process can quickly move to the original reading of the next job. The overall configuration of the multifunction machine according to the present embodiment has been described above. Next, the encoding processing unit 6 that is a characteristic part of the multifunction peripheral will be described.

  FIG. 2 is a block diagram of the encoding processing unit 6 according to the present embodiment.

  The input unit 101 includes a line buffer memory for a plurality of lines, and inputs the image data from the document reading unit 3 or the rendering unit 4 via the selector 5 in the raster order as described above. Then, the image data is stored in a built-in line buffer, and is output in units of blocks of a predetermined size (here 32 × 32 pixels). The first encoding unit 102 is an irreversible encoding unit, performs irreversible encoding processing on a pixel block basis input from the input unit 101, and outputs the result (encoded data). However, a code identification bit “0” (indicating irreversible code) indicating that the data has been encoded by the first encoding unit 102 is added to the head of the encoded data. The first encoding unit 102 according to the present embodiment will explain an example in which JPEG encoding (lossy encoding) is applied. That is, image data corresponding to 8 × 8 pixel units is orthogonally transformed, quantized at a predetermined quantization step, and Huffman coding processing is performed. Image coding by JPEG is known as a technique suitable for natural images.

  Unlike the first encoding unit 102, the second encoding unit 103 is a lossless encoding unit. For this reason, the decoding result is the same as the image before encoding, and in principle there is no deterioration in image quality. However, there is no parameter setting that affects the compression rate. In the present embodiment, JPEG-LS is used for the encoding of the second encoding unit 103. Although JPEG-LS bears “JPEG”, its algorithm is completely different from the lossy encoded JPEG employed in the first encoding unit 102. The feature of JPEG-LS encoding is a technique suitable for character line drawing and computer graphics. In the case of these images, it is possible to generate much less code data than JPEG which is lossy encoding. .

  The second encoding unit 103 performs encoding on the same pixel block at substantially the same timing as the first encoding unit 102 and outputs encoded data. In addition, when the second encoding unit 103 outputs the encoded data, the code identification bit “1” (reversible code indicates that the encoded data is encoded by the second encoding unit 103 at the head of the encoded data). Add).

  The first code length detector 108 detects the encoded data length (including the code identification bit (1 bit)) of the pixel block output from the first encoder 102, and generates the detected code length as an identification bit. Output to the unit 110. The second code length detection unit 109 detects the encoded data length (including the code identification bit (1 bit)) of the pixel block output from the second encoding unit 103, and generates the detected code length as an identification bit. Output to the unit 110. The identification bit generator 110 controls the encoding processor 6 according to the present embodiment. As one of the processes, the code length from the first and second code length detectors 108 and 109 and the built-in LUT (lookup table) 120 (FIG. 3) are used to output from the encoding processor 6. Determine the encoded data. The code memories 111 and 112 store lossless encoded data and lossy encoded data, respectively. The selector 125 outputs the encoded data stored in the code memory 111 or 112 to the secondary storage device 7 in accordance with the code identification bit 113 from the identification bit generation unit 110.

  FIG. 3 is a block diagram illustrating a configuration of the identification bit generation unit 110 according to the first embodiment. Parts common to those in FIG. 2 are denoted by the same symbols, and description thereof is omitted.

  The LUT 120 includes, as addresses, a code length from the first code length detection unit 108, a code length from the second code length detection unit 109, and a code identification bit 123 of the encoding selected in the previous block. Supplied. The code identification bit 123 selected in the immediately preceding block can be regarded as a signal for selecting a table of two boundary condition functions f1 () and f2 (). The code identification bit 123 is output from the encoding control unit 130. The encoding control unit 130 includes a CPU, a RAM, a ROM, and the like, and comprehensively controls the entire encoding processing unit 6 according to the flowchart shown in FIG.

  In the present embodiment, JPEG that is lossy encoding is used for the first encoding unit 102, and JPEG-LS that is lossless encoding is used for the second encoding unit 103. As is well known, JPEG is an encoding technique suitable for natural image compression, but the compression rate for character line images and the like is not high. On the other hand, JPEG-LS is suitable for compression of images such as character line drawings (including color) and monotonous bar graphs, and since it is lossless encoding, image degradation does not occur in principle. However, JPEG-LS does not have a high compression ratio for natural images. That is, these two encoding techniques are complementary to each other.

  A plurality of images assumed to be handled by the copier according to the present embodiment are sampled and losslessly encoded in 32 × 32 pixel block units, the code length of the encoded data is Lx, and the same pixel block is irreversibly encoded. Let Ly be the code length of the encoded data obtained by encoding in step (b). At that time, a point P (Lx, Ly) having Lx and Ly as coordinates is plotted, and FIG. 4 shows a region where the frequency of occurrence of the point is high.

  FIG. 4 is a diagram for explaining a boundary condition when selecting one of the lossless code and the lossy code in the present embodiment.

An area 401 is an area where character line drawings and the like mainly exist, and an area 403 is an area corresponding to natural images and the like. Here, from the viewpoint of the compression efficiency of the encoded data, the encoded data output from the encoding processing unit 6 is preferably determined under the following conditions.
(1) When there is a relationship of Ly <Lx, the encoding processing unit 6 outputs the lossy encoded data from the first encoding unit 102.
(2) When there is a relationship of Ly ≧ Lx, the encoding processing unit 6 outputs the lossless encoded data from the second encoding unit 103. In this way, the amount of encoded data can be minimized.

  However, the boundary condition Ly = Lx is not preferable because the region 401 shown in FIG. 4 is divided by the boundary 406, and the lossy encoded data and the lossless encoded data are mixed in a high-frequency region. Therefore, it is preferable to set the encoding method separately in the region 401 and the region 403. However, although the frequency is low in the area between the two areas, it always occurs probabilistically. For example, there is a portion where the nature of a line drawing is locally strong in a natural image, and a block including such a portion is considered to exist between both regions. Similarly, a character / line image may have a portion having a strong natural image property locally. Therefore, in this embodiment, two nonlinear boundary conditions indicated by a solid line 407 (f1 (x)) and a boundary line 408 (f2 (x)) are set. The boundary function f 1 () corresponds to the solid line 407, and the boundary function f 2 () corresponds to the boundary line 408. Here, referring to the boundary function in the prior art for comparison, only one boundary function f () is conventionally set as shown by a broken line 405 in FIG.

  In the present embodiment, in the region between the boundary functions f1 () and f2 (), the encoding processing unit 6 selects the same encoded data as the encoding of the preceding preceding block. That is, when the previous block exists in the area 401, lossless encoding has been selected, so the code identification bit is “1”, and the boundary of the boundary function f2 () is used for encoding selection of the current block. . When the previous block is in the area 403, the lossy code has been selected, so that the code identification bit is “0”, and the boundary function f1 () is used for the coding selection of the current block.

  Based on the above assumptions, the LUT 120 has the code identification bit of “0” in the LUT 120 when, for example, the lossy encoded data that is the output of the first encoding unit 102 is selected in the previous block. A 1-bit signal is stored in advance in the address area. Here, “1” is stored in the address position having the relationship of Ly ≧ f 1 (Lx), and “0” is stored in the address position having the relationship of Ly <f 1 (Lx).

  Here, “1” is stored in the address position having the relationship Ly ≧ f 2 (Lx), and “0” is stored in the address position having the relationship Ly <f 2 (Lx). When addressed, the bit is output as the code identification bit 113. The code identification bit 113 is supplied as a selection signal for the selector 125. The code identification bit 113 is taken into the encoding control unit 130 and output to the LUT 120 as the code identification bit 123 of the previous block, and is used for selecting a boundary condition function for the next block.

  FIG. 7 is a flowchart for explaining the processing of the encoding processing unit 6 according to this embodiment. In this flowchart, the processing from S100 to S105, which is performed when the code identification bit of the previous block is “1” (lossless coding), and the code identification bit of the previous block is “0” (lossy coding) The process is divided into S110 to S115 which are sometimes processed.

  In the first block of the image, it is assumed that the area is a character line drawing area, and the process starts from S100. In S100, it is determined whether or not it is the end of the page. If so, the process ends. If not, the process proceeds to S101. In S101, the first block is encoded using the first encoding unit 102 and the second encoding unit 103. When the encoding is completed in this way, the code length of the encoded data is detected by the first and second code length detectors 108 and 109 and input to the LUT 120. Also, the encoding control unit 130 outputs “1” to the code identification bit 123 of the previous block (S102).

  Thereby, the LUT 120 determines whether or not the relationship of Ly ≧ f2 (Lx) is established according to those inputs in S103. If Ly ≧ f2 (Lx), the process proceeds to S104, where “1” is output as the code identification bit, the lossless encoded data of the second encoding unit 103 is output as the encoded data of the current block, and the process returns to S100. . On the other hand, when Ly ≧ f2 (Lx) does not hold, the process proceeds to S105, where “0” is output as the code identification bit, and the lossy encoded data of the first encoding unit 102 is output as the encoded data of the current block. The process proceeds to S110.

  In S110, it is determined whether or not it is the end of the page as in S100. If it is not the end, the process proceeds to S111, and the next block is encoded. In S111, the block is encoded using the first encoding unit 102 and the second encoding unit 103. When the encoding is completed in this way, the code length of the encoded data is detected by the first and second code length detectors 108 and 109 and input to the LUT 120. Also, the encoding control unit 130 outputs “0” to the code identification bit 123 of the previous block (S112). The LUT 120 determines whether a relationship of Ly ≧ f1 (Lx) is established according to those inputs (S113). If Ly ≧ f1 (Lx), the process proceeds to S114, where “1” is output as the code identification bit, the lossless encoded data of the second encoding unit 103 is output as the encoded data of the current block, and the process returns to S100. . On the other hand, when Ly ≧ f1 (Lx) does not hold, the process proceeds to S115, where “0” is output as the code identification bit, and the lossy encoded data of the first encoding unit 102 is output as the encoded data of the current block. The process proceeds to S110.

  The rough processing contents of the encoding processing unit 6 according to the first embodiment have been described above. Next, the principle of determining the encoded data in the identification bit generation unit 110 in the first embodiment will be described.

  5 and 6 are diagrams for explaining an example in which the number of times of switching of the coding method is decreased in the first embodiment.

  FIG. 5 shows a part of an image as an example. Which block is selected for each block transferred to the encoding processing unit 6 in the order of blocks b1, b2, b3,... In units of 32 × 32 pixel blocks. It shows that. In the figure, reference numeral 500 denotes a code identification bit (corresponding to encoding switching) in the present embodiment, and reference numeral 501 denotes conventional encoding switching.

  FIG. 6 is a diagram plotting the amount of code data of each block by two types of encoding.

  In FIG. 5, for the blocks b1 and b2, lossy encoding which is the first method is selected. In block b3, the area moves to the vicinity of the boundary in terms of noise. For this reason, in the conventional selection method, since the determination is made based on the boundary line 405, the second encoding method (lossless encoding) is selected for the block b3. In contrast, according to the present embodiment, since the determination is based on the boundary line 408, the block b3 remains in the first encoding (lossy encoding) as shown in FIG. According to the present embodiment shown in FIG. 5, it can be seen that the switching of encoding is reduced twice compared to the conventional case.

  In blocks b4 to b8, as can be seen from FIG. 6, the property of the image is shifted from the character / line drawing area 401 to the natural picture area 403. Conventionally, since the determination is made at the boundary line 405, the block b6 is changed to the second encoding method (lossless encoding). However, in this Embodiment 1, since it determines based on the boundary line 408, the 1st encoding (irreversible encoding) is maintained in the block b6.

  Similarly, in blocks b8 to b12, as can be seen from FIG. 6, the nature of the image has shifted from the natural image region 403 to the character / line image region 401. Conventionally, since the determination is made at the boundary line 405, the block b9 is changed to the second encoding (lossless encoding). However, in the first embodiment, since the block b9 is determined based on the boundary line 408, the first encoding (lossy encoding) is maintained. The influence on image quality and compression efficiency due to such switching of the encoding method is limited because it is limited to the vicinity of the boundary. In the above description, the encoding method of this embodiment is selected by the LUT 120. However, the encoding may be performed using a technique such as configuring the boundary functions f1 () and f2 () with an arithmetic circuit.

  As described above, according to the first embodiment, since the number of encoding method switching can be reduced, the time overhead associated with the switching of configuration data can be reduced and the total encoding time can be shortened. There is.

<Embodiment 2>
In the first embodiment, the boundary function is selected so as to weight the direction in which the encoding method does not change relative to the determination of the target block by determining the encoding method of the immediately preceding block. As a result, for example, even if a character / line-like block is locally generated in a natural image area as a noise, the switching of encoding is suppressed. As a method of obtaining the same effect, there is a method of switching the encoding method for the first time when the reverse determination continues for a predetermined number of times in order to change the encoding method. Hereinafter, Embodiment 2 according to this switching method will be described. In the second embodiment, the number of continuously generated blocks necessary for switching the selected code is determined in advance. In order to switch from the first encoding method to the second encoding method, two or more blocks are continuous. To switch from the second encoding method to the first encoding method, three or more blocks are consecutive. It is assumed that the result is obtained (having hysteresis characteristics). The configuration according to the second embodiment is the same as the first embodiment except that the configuration of the identification bit generation unit of the encoding processing unit 6 is different from that of the first embodiment. Therefore, description of those configurations is omitted.

  FIG. 8 is a diagram illustrating the configuration of the identification bit generation unit 110a according to the second embodiment of the present invention.

  The LUT 220 is supplied with the code length from the first code length detection unit 108 and the code length from the second code length detection unit 109 as addresses. In the first embodiment described above, the table of the two boundary condition functions f1 () and f2 () is prepared, whereas in the second embodiment, only one boundary function indicated by the boundary line 405 in FIG. Yes. This may be the same as the boundary function of the prior art, and is assumed to be f (). The LUT 220 outputs a temporary selection bit signal 124. Here, data is prepared in the LUT 220 as follows. That is, when the first code length is Ly and the second code length is Lx, “1” is stored in advance at the address position where the condition Ly ≧ f (Lx) is satisfied, and “0” is stored in the other positions. . The temporary selection bit signal 124 output from the LUT 220 is directly input to the encoding control unit 130a. The encoding control unit 130 a includes a CPU, a RAM, and a ROM, controls the entire code processing unit 6, and generates a code identification bit 113 according to the flowchart of FIG. 9 based on the temporary selection bit signal 124.

  FIG. 9 is a flowchart for explaining processing of the encoding processing unit 6 according to the second embodiment. This flowchart is divided into S201 to S205, which are executed when the code identification bit of the previous block is “1”, and S211 to S215, which are executed when the code identification bit of the previous block is “0”. .

  Here, similarly to the above-described FIG. 7, the first block of the image is regarded as a character / line drawing region and starts from S201. In step S201, it is determined whether the page is the last page. If the page is not the last page, the process proceeds to step S202, and the first block is encoded using the first encoding unit 102 and the second encoding unit 103. When the encoding is thus completed, the first code length and the second code length are input to the LUT 220. As a result, the LUT 220 outputs “1” as the temporary selection bit signal 124 when Ly ≧ f (Lx) is established according to these inputs. The encoding control unit 130a holds the input temporary selection bit signal 124 and the previously input temporary selection bit signal. Here, since it is assumed that the beginning of the page is a character / line drawing area, all temporarily selected bit signals input in the past are set to “1”.

  In S <b> 203, the encoding control unit 130 determines whether it is “0” after two blocks (n blocks are continuous) including the temporary selection bit signal 124 of the current block. If so, the process proceeds to S205, where “0” is output as the code identification bit 113, and the process proceeds to S210. On the other hand, otherwise, the process proceeds to S204, where “1” is output as the code identification bit 113, and the process returns to S201.

  In S210, it is determined whether or not the page is the last page. If it is not the last page, the process proceeds to S211 to encode the next block. When this encoding is completed, the first code length and the second code length are input to the LUT 220. In accordance with these inputs, the LUT 220 outputs “1” as the temporary selection bit signal 124 when Ly ≧ f (Lx) is established. The encoding control unit 130a holds the input temporary selection bit signal 124 and the previously input temporary selection bit signal. In step S213, the encoding control unit 130a determines whether the block is “1” continuously for three blocks including the temporary selection bit signal of the current block. If so, the process proceeds to S216, and “1” is output as the code identification bit 113. On the other hand, in other cases, the process proceeds to S215 to output “0” as the code identification bit 113.

  In this way, the provisional selection bit signal 124 is “1” for three consecutive blocks, that is, the second coding (lossless coding) is provisionally selected for three consecutive blocks (continuous m blocks). Selected. On the other hand, the first encoding is selected only when the temporary selection signal is “0” for two consecutive blocks, that is, the first encoding (irreversible) is temporarily selected for two consecutive blocks.

  As described above, in the second embodiment, at least n blocks of the first encoding scheme different from the encoding scheme selected in the preceding block are selected in succession using the temporary selection bit signal. At this time, the first selection for selecting the encoded data encoded by the first encoding method as the encoded data of the current block is performed, and the encoding method selected in the preceding block by the temporary selection bit signal; A different second encoding scheme is selected in succession for at least m (≠ n) blocks. At this time, the second selection for selecting the encoded data encoded by the second encoding method as the encoded data of the current block is executed.

  FIG. 10 is a diagram illustrating an example of a result when the image data of the blocks b1 to b12 illustrated in FIG. 6 are input in the second embodiment.

  A temporary selection bit signal indicated by 1000 indicates a result based on the conventional example generated by the LUT 220 for the blocks b1 to b12, and is determined by a broken line 405 represented by a boundary function f (x) in FIG. Reference numeral 1001 denotes a result of the processing according to the second embodiment.

  In the block b3, the temporary selection bit signal 124 is “0” and appears only once, so the code identification bit is “1”. Further, in the blocks b5 to b7 in which the temporary selection bit signal 124 shifts from “1” to “0”, the code identification bit 113 is changed to “0” for the first time in the block b7 in which “0” is generated twice in succession. . Also, in the blocks b8 to b12 in which the temporary selection bit signal 124 shifts from “0” to “1”, the code identification bit 113 shifts to “1” for the first time in the block b11 in which “1” is generated three times in succession. Yes.

  As described above, according to the second embodiment, in addition to the effects of the first embodiment described above, only one boundary function is used, so that the circuit scale can be reduced.

<Third Embodiment>
The first and second embodiments have the property that the switching of the code identification bit is delayed when the image transitions between a character line image and a natural image. Although the influence by this is limited, the form for solving this is demonstrated as Embodiment 3. FIG. In the second embodiment, when the temporarily selected bit signal is changed, the output from the encoding processing unit 6 is output until it is determined whether the temporary selection bit signal is generated due to noise or because it is generated due to a shift to an image area having a different property. It is to stop. Then, after it is determined, the past blocks are collectively determined.

  Also in the third embodiment, in a manner similar to the second embodiment, two or more blocks are consecutively switched from the first encoding (lossy) to the second encoding (lossless), and the second encoding to the first encoding. In order to switch to, the reverse temporary selection bit signal of 3 blocks or more is required continuously. Therefore, the apparatus configuration according to the third embodiment is the same as that of the second embodiment.

  FIG. 11 is a flowchart for explaining control processing of the encoding processing unit 6 according to the third embodiment. This flowchart is divided into processing from S301 to S310 executed when the code identification bit of the previous block is “1”, and S311 to S323 executed when the code identification bit of the previous block is “0”. .

  Again, the process is started assuming that the first block of the image is a character / line drawing area, and it is determined in S301 whether or not it is the end of the page. When it is not the end of the page, the process proceeds to S <b> 302, and the first block is encoded using the first encoding unit 102 and the second encoding unit 103. When this encoding is completed, lossless and lossy encoded data are stored in the code memories 111 and 112. Here, for the sake of explanation, the block processed in S302 is referred to as a first block and referred to in a subsequent step. The code lengths detected by the first and second code length detectors 108 and 109 are input to the LUT 220. The LUT 220 outputs the temporary selection bit signal 124 as “1” when Ly ≧ f (Lx) is established according to these inputs. In step S303, the encoding control unit 130a determines whether the input temporary selection bit signal 124 is “1”. If “1”, the encoding control unit 130a advances to step S304, and sets the code identification bit of the current block to “ 1 ”. Then, the encoded data is output from the code processing unit 6 and the process returns to S301. On the other hand, if the temporary selection bit signal 124 is “0” in S303, the process proceeds to S305 to determine whether it is the end of the image. If it is the last, the process proceeds to S304. In S306, the next block is encoded while the encoded data of the current block (first block) is held in the code memory 111 and the code memory 112. Here, for the sake of explanation, the block encoded in S306 is referred to as a second block later.

  In step S307, it is determined whether the temporary selection bit signal 124 of the second block is “1”. If it is determined that it is “1”, the process proceeds to S308, where “1” of the code identification bit is added to the encoded data of the first block and the second block stored in the code memories 111 and 112, respectively. Output from the code processing unit 6. On the other hand, if the temporary selection bit signal 124 of the second block is “0” in S307, the temporary selection bit signal 124 becomes “0” twice consecutively following the determination of S303 described above. Therefore, both the first block and the second block are output from the encoding processing unit 6 with the code identification bit set to “0”. In Embodiment 2 described above, the code identification bit of only the second block is “0”, but here the difference is that both the first block and the second block are “0”.

  After the code identification bit 113 is output as “0” in step S309, the process proceeds to step S311 to determine whether the image is the last. If not, the process proceeds to step S312 and the next block is encoded. 130a. Here, for the sake of explanation, the block processed in S302 is referred to as a first block later.

  Next, the process proceeds to S313, where it is determined whether or not the temporary selection bit signal 124 is “0”. If it is “0”, the process proceeds to S314, and the encoding control unit 130a sets the code identification bit 113 “0” in the first block. In addition, the data is output from the encoding processing unit 6. If the temporary selection bit signal 124 is “1” in S313, the process proceeds to Step S315. In S315, it is determined whether or not it is the end of the image. If it is not the end, the process proceeds to step 316, and the encoded data of the current block (first block) is held in the code memory 111 and the code memory 112, and the next block is read. Encoding is performed. Here, for the sake of explanation, the block encoded in S316 is referred to as a second block in a subsequent step.

  Next, the process proceeds to S317, and it is determined whether or not the temporary selection bit signal 124 of the second block is “0” as in S313. If it is determined to be “0”, the process proceeds to S318, and the code identification bit 113 “0” is added to the encoded data of the first block and the second block held in the code memory 111 and the code memory 112, respectively. And output from the code processing unit 6. On the other hand, if the temporary selection bit signal is “1” in S317, the process proceeds to S319, and it is determined whether or not it is the end of the page. If it is determined that it is not the last, the process proceeds to S320, and the next block is encoded while the encoded data of the current block (second block) is held in the code memory 111 and the code memory 112. For the sake of explanation, the block encoded in S320 is referred to as a third block in a subsequent step.

  Next, in S321, as in S317, it is determined whether or not the temporary selection bit signal of the third block is “0”. If it is determined to be “0”, the process proceeds to S322, and the code identification bit 113 “0” is added to the code data of the first block, the second block, and the third block held in S308, respectively. Output from the code processing unit 6. On the other hand, if the temporary selection bit signal 124 is “1” in S321, the temporary selection bit signal becomes “1” three times in succession. Therefore, the code identification bit 113 “1” is added to the code data of the first block, the second block, and the third block held in the code memory 111 and the code memory 112 and output from the code processing unit 6. To do. In Embodiment 2 described above, the code identification bit of the third block is “0”, whereas in Embodiment 3, the code identification bits of the first block, the second block, and the third block are The difference is “1”.

  12 is a diagram illustrating a temporary selection bit signal and a code identification bit when the blocks b1 to b12 illustrated in FIG. 6 are input to the encoding processing unit 6 according to the third embodiment.

  Reference numeral 1200 denotes a temporary selection bit signal 124 generated by the LUT 220 for the blocks b1 to b12. The temporary selection bit signal 124 is determined by a broken line 405 represented by the boundary function f (x) in FIG. In 1201 indicating the result according to the third embodiment, the block b3 has a block whose temporary selection bit signal is “0” appears only once, so the code identification bit 113 of the block b3 remains “1”. Further, in the process of blocks b5 to b7 in which the temporary selection bit signal 124 shifts from “1” to “0”, the block b6 is processed, and when the temporary selection bit signal 124 becomes “0” only once, the code is changed. Does not output data. Then, when the next block b7 is processed and the temporary selection bit signal 124 becomes “0” and “0” is generated twice in succession, “0” is selected as the code identification bit 113 of the blocks b6 and b7. Is output.

  On the other hand, in the process of blocks b8 to b12 in which the temporary selection bit signal 124 shifts from “0” to “1”, the code data of the two is not output when the blocks b9 and b10 are processed. Then, the block b11 is processed, the temporary selection bit signal 124 becomes “1”, and “1” is generated three times in succession. As a result, in the blocks b9, b10, and b11, the code identification bit 113 is output as “1”.

  In this way, it can be seen that the code identification bits 113 are similarly changed in the blocks b6 and b9 which are the changing points of the temporarily selected bit signal.

  As described above, in the third embodiment, at least n blocks of the first encoding method different from the encoding method selected in the preceding block are selected in succession using the temporary selection bit signal. As a result, first selection is performed in which encoded data encoded by the first encoding method of n blocks stored in the code memory is selected as encoded data of the n blocks. In addition, the second encoding method different from the encoding method selected in the preceding block is selected in succession by at least m (≠ n) blocks using the temporary selection bit signal. As a result, a second selection is performed in which encoded data encoded by the second encoding method for m blocks stored in the code memory is selected as encoded data for the m blocks.

  Accordingly, in the third embodiment, in addition to the effects of the first and second embodiments described above, there is an effect that the switching of the code identification bit is not delayed when the image is shifted between the character line image and the natural image.

(Other embodiments)
The object of the present invention can also be achieved by executing the following processing. That is, a storage medium that records a program code of software that realizes the functions of the above-described embodiments is supplied to a system or apparatus, and a computer (or CPU, MPU, etc.) of the system or apparatus is stored in the storage medium. This is the process of reading the code.

  In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiment, and the program code and the storage medium storing the program code constitute the present invention.

Claims (5)

First encoding means for encoding the image data by a first encoding method in units of blocks of a predetermined size of the image data;
Second encoding means for encoding the image data in a second encoding scheme different from the first encoding scheme for each block of the image data;
Based on the code length of the encoded data encoded by the first and second encoding means and the boundary function according to the encoding method selected in the preceding block, the encoded data of the current block is Selecting means for selecting one of the encoded data encoded by the first encoding means or the second encoding means;
An image encoding apparatus comprising:   The boundary function determines an area to which the position of the point P (Lx, Ly) belongs when the code lengths of the encoded data obtained by the first and second encoding methods are Lx and Ly, respectively. The functions differ from each other depending on whether the encoding method selected in the preceding three blocks is the first encoding method or the second encoding method. Item 2. The image encoding device according to Item 1. First encoding means for encoding the image data by a first encoding method in units of blocks of a predetermined size of the image data;
Second encoding means for encoding the image data in a second encoding scheme different from the first encoding scheme for each block of the image data;
Temporary selection means for temporarily selecting either the first encoding method or the second encoding method according to the code length of the encoded data encoded by the first and second encoding means;
When at least n blocks of the first encoding scheme different from the encoding scheme selected in the preceding block are selected in succession by the temporary selection means, the encoding encoded by the first encoding scheme First selecting means for selecting data as encoded data of the current block;
When the second encoding scheme different from the encoding scheme selected in the preceding block is selected by the temporary selection means in succession at least m (≠ n) blocks, encoding is performed using the second encoding scheme. Second selection means for selecting the encoded data as encoded data of the current block;
An image encoding apparatus comprising: First encoding means for encoding the image data by a first encoding method in units of blocks of a predetermined size of the image data;
Second encoding means for encoding the image data in a second encoding scheme different from the first encoding scheme for each block of the image data;
Storage means for storing the encoded data encoded by the first and second encoding means respectively;
Temporary selection means for temporarily selecting either the first encoding method or the second encoding method according to the code length of the encoded data encoded by the first and second encoding means;
The n-th block of the n blocks stored in the storage means is not selected until at least n blocks of the first encoding method different from the encoding method selected in the preceding block are selected by the temporary selection unit. First selection means for selecting encoded data encoded by one encoding method as encoded data of the n blocks;
The m stored in the storage means is not until the second encoding method different from the encoding method selected in the preceding block is selected continuously by the temporary selection unit at least m (≠ n) blocks. Second selection means for selecting encoded data encoded by the second encoding method of a block as encoded data of the m block;
An image encoding apparatus comprising: A control method for an image encoding device, comprising:
A first encoding step in which the first encoding means of the image encoding device encodes the image data in a block unit of a predetermined size of the image data by the first encoding method;
A second encoding step in which the second encoding means of the image encoding device encodes the image data in a second encoding scheme different from the first encoding scheme in units of blocks of the image data;
Based on the code length of the encoded data encoded in the first and second encoding steps and the boundary function according to the encoding method selected in the preceding block, the selection unit of the image encoding device, A selection step of selecting any one of the encoded data encoded in the first encoding step or the second encoding step as the encoded data of the current block;
A control method for an image encoding device, comprising:

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