JP2011002659A - Synchronous detection device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To accurately detect the cross point position of waveforms.SOLUTION: The synchronous detection device includes: first and second beam detectors PDA, PDB arranged along the scanning direction of a beam; a first amplifier A and a second amplifier B which are connected to the poststage of the first and the second beam detectors PDA, PDB, respectively; a first output limit circuit (D2) which gives a first limit level VL1 between the output level VLA of the first amplifier A when a beam is not made incident to the first beam detector PDA and the saturated output level Vsat of the first amplifier A, and suppresses the approach of the output of the first amplifier A to the saturated output level Vsat thereof when the output of the first amplifier A reaches the first limit level VL1; and a cross point detection circuit C which detects the cross point of the output waveform of the first amplifier A and the output waveform of the second amplifier B.

Description

  The present invention relates to a synchronous detection device that detects a reference position for beam scanning.

  Conventionally, a synchronization detection device that accurately detects a reference position when scanning a laser beam has been proposed (see Patent Document 1 below). The basic structure of such a synchronous detection device has two photodiodes, and when a laser beam scans over each photodiode, a cross-point of an output waveform output from each photodiode is set as a reference position. Detect as. Note that the output of each photodiode is input to an amplifier.

Japanese Patent No. 30688865

  However, when the incident intensity on the photodiode becomes high and the amplifier located after the photodiode on the scanning start side is saturated, it takes time to recover, and the trailing edge of the output waveform of the amplifier is delayed, causing a crossover. The position of the point is delayed.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a synchronization detection device capable of accurately detecting a cross-point position of a waveform.

  In order to solve the above-described problems, the synchronous detection device according to the present invention is connected to the first and second beam detectors arranged along the beam scanning direction and the subsequent stage of the first and second beam detectors, respectively. A first limit level is provided between the first amplifier and the second amplifier and the output level of the first amplifier when the beam is not incident on the first beam detector and the saturation output level of the first amplifier; When the output of the first amplifier reaches the first limit level, first output limiting means for suppressing the output of the first amplifier from approaching its saturated output level, the output waveform of the first amplifier, and the second amplifier And a cross-point detection circuit for detecting a cross-point with the output waveform.

  According to the present invention, since the saturation of the first amplifier is suppressed by the first output limiting means, even when the beam intensity is high, waveform delay due to amplifier saturation does not occur, and the first and second amplifiers It is possible to accurately detect the cross point position existing in the vicinity of the adjacent position of the output waveform.

  In addition, the synchronization detection device provides a second limit level between the output level of the second amplifier and the saturation output level of the second amplifier when no beam is incident on the second beam detector, When the output of the amplifier reaches the second limit level, it is preferable to further include second output limiting means for suppressing the output of the second amplifier from approaching its saturated output level.

  According to the present invention, since the saturation of the second amplifier is suppressed by the second output limiting means, the waveform delay due to the amplifier saturation does not occur even when the beam intensity is high, and the first and second amplifiers It is possible to suppress the fluctuation of the cross point position on the rear side of the output waveform. The cross point on the rear side is not directly used for synchronization control, but the output waveform of the cross point detection circuit is determined, so that the one with less fluctuation is controlled based on this signal. There are few malfunctions.

  The first restriction level and the second restriction level are preferably different from each other. That is, if these limit levels match, the output of each amplifier may stick to this limit level and the crosspoint may become indefinite. There is an advantage that destabilization does not occur.

  According to the synchronous detection device of the present invention, it is possible to accurately detect the cross point position of the waveform output from the two beam detectors that are beam-scanned.

It is a top view of light detection sensor PDS. It is a circuit diagram of the synchronous detection apparatus which concerns on a comparative example. It is a timing chart of the light output current of the light detection sensor PDS. 3 is a timing chart of output voltages of amplifiers A and B. 3 is a timing chart of output voltages of amplifiers A and B. 3 is a timing chart of output voltage of a cross point detection circuit C. It is a timing chart of the light output current of the light detection sensor PDS. 3 is a timing chart of output voltages of amplifiers A and B. 3 is a timing chart of output voltage of a cross point detection circuit C. It is a timing chart of the light output current of the light detection sensor PDS. 3 is a timing chart of output voltages of amplifiers A and B. 3 is a timing chart of output voltage of a cross point detection circuit C. It is a circuit diagram of the synchronous detection apparatus concerning an embodiment. 1 is a detailed circuit diagram of a synchronization detection device according to an embodiment. It is a timing chart of the light output current of the light detection sensor PDS. 3 is a timing chart of output voltages of amplifiers A and B. It is a timing chart of a crosspoint detection circuit output. It is a timing chart of the light output current of the light detection sensor PDS. 3 is a timing chart of output voltages of amplifiers A and B. 4 is a timing chart of the output of the cross point detection circuit C. It is a circuit diagram of the amplifier of the synchronous detection apparatus which concerns on another embodiment. It is a graph which shows the input / output characteristic of this embodiment (in the case of diode D1, D2, D3) and a prior art example (in the case of no diode).

  Hereinafter, the synchronization detection apparatus according to the embodiment will be described. The same reference numerals are used for the same elements, and duplicate descriptions are omitted.

  FIG. 1 is a plan view of the light detection sensor PDS.

  The external shape of the photodetection sensor PDS is shown in the figure, and includes beam detectors (photodetectors: photodiodes) PDA and PDB that are spaced apart from each other on the substrate SB. When the substrate SB is made of a semiconductor, the photodiodes PDA and PDB are regions in which a semiconductor region having a conductivity type opposite to that of the substrate SB is formed. For example, if the substrate SB is an N-type semiconductor, the region where the photodiodes PDA and PDB are formed coincides with the region where the P-type semiconductor region is formed. When the substrate SB is a simple mounting substrate, the photodiodes PDA and PDB are physically separated elements, and a gas is interposed between them.

  In any case, each of the photodiodes PDA and PDB has a longitudinal direction in the Y-axis direction, and both end positions in the X-axis direction of the photodiode PDA are X (t1) and X (t2). Both end positions in the axial direction are X (t3) and X (t4).

  The laser beam LB scans the light detection sensor PDS along the X-axis direction so as to cross both the photodiodes PDA and PDB.

In the above, a photodetector is used as a beam detector. However, an apparatus that scans an object with an ion beam or an electron beam instead of a laser beam is also known. In this case, the detector PDA, An ion beam detector or an electron beam detector can also be used as the PDB.

  FIG. 2 is a circuit diagram of a synchronization detection device according to a comparative example.

  The photodiode PDA is connected to the cross point detection circuit C via the amplifier A. Similarly, the photodiode PDB is connected to the cross point detection circuit C via the amplifier B. The amplifiers A and B are preferably current-voltage conversion amplifiers, and convert the flow of charges generated in the photodiodes PDA and PDB, that is, the currents PinA and PinB, into voltages according to the incidence of light. The slightly separated photodiodes PDA and PDB are sequentially irradiated with the laser beam, and thus the currents PinA and PinB generated in response thereto are input to the crosspoint detection circuit C as voltages Va and Vb. From the point detection circuit C, when the magnitudes of the voltages Va and Vb are switched, the point detection circuit C changes to a high level if it has been low until then, and changes to a low level if it has been high until then. Since the magnitude relationship between Va and Vb is switched twice by one beam scanning, a square wave is output from the cross point detection circuit C.

  The output terminal of one amplifier A is connected to the anode of the diode D1 connected to the potential VC1, and the potential of the output terminal of the amplifier A is fixed to the potential VC1 + VFd1 when no light is incident on the photodiode PDA. Has been.

  Hereinafter, signal waveforms in the circuit will be described.

  FIG. 3 is a timing chart of the optical output currents PinA and PinB.

  The photocurrent PinA is output approximately between times t1 and t2 corresponding to the photodiode PDA, and the photocurrent PinB is output approximately corresponding to the photodiode PDB between times t3 and t4. Yes. Since the laser beam LB has a finite diameter, the edges of these photocurrent pulses are slightly inclined. The currents PinA and PinB intersect at a time between time t2 and time t3, and the magnitude relationship is reversed.

  FIG. 4 is a timing chart of the output voltages Va and Vb in the case of FIG. The figure shows a waveform when the clamping diode D1 is not used.

  From the amplifiers A and B, the output voltages Va and Vb are obtained by inverting the waveforms corresponding to the photocurrents PinA and PinB.

  FIG. 5 is a timing chart of the output voltages Va and Vb in the case of FIG. This figure shows the waveform when the clamping diode D1 is used.

  A cross point in the vicinity of the adjacent positions of these waveforms is between time t2 and time t3, and is located at time t (IS1). Note that there is a cross point between the voltage Va and the voltage Vb also on the rear side of the voltage Vb. The output voltage Vb of the amplifier B is approximately the power supply voltage Vcc when the beam is not incident on the photodiode PDB. The output voltage Va of the amplifier A is limited to VC1 + VFd1 by the potential VC1 and the diode D1. That is, it is closer to the output saturation voltage Vsat of the amplifiers A and B than the voltage Vb generated after the beam passes. As a result, even if some noise occurs in one voltage Vb, for example, in the vicinity of time t1, the magnitude relationship between Va and Vb does not invert due to the noise, and the occurrence time of the cross point Is stable.

  FIG. 6 is a timing chart of the output voltage Vc of the cross point detection circuit C in the case of FIG.

  At the cross point time t (IS1), the output of the cross point detection circuit C becomes high level, and at the cross point time t (IS2), the output of the cross point detection circuit C becomes low level. Therefore, the waveform of the voltage Vc is a square wave, and this voltage Vc can be used as a synchronization timing output for setting the start point position of beam scanning. If the time of the detected cross point is known, pixel information on the left end of the scanning region may be projected with a laser beam after Δt seconds from this time. Thus, in a normal state, accurate synchronization information can be obtained even if the above circuit structure is adopted.

  However, when the beam intensity increases, the following problems occur. The details will be described below.

  FIG. 7 is a timing chart of the optical output currents PinA and PinB. In the figure, the output is larger than that shown in FIG.

  FIG. 8 is a timing chart of the output voltages Va and Vb in the case of FIG.

  In this case, since the inputs to the amplifiers A and B exceed the output saturation voltage (level) Vsat of the amplifiers A and B (the downward direction indicates a large absolute value in the figure), the voltages Va and Vb Sticks to the saturation level Vsat. When the amplifiers A and B are saturated, even if the input current to the amplifier becomes small, it takes time to recover from the saturation, causing a delay. Therefore, the rear edge Vao of the waveform of the voltage Va in a state where saturation does not occur is delayed to the position of the edge Vad. Similarly, the edge Vbo on the rear side of the waveform of the voltage Vb in a state where saturation does not occur is delayed to the position of the edge Vbd.

  Therefore, the cross point near the adjacent position of these voltage waveforms is delayed to the position of time t (IS1D1), and the cross point behind the voltage Vb is also delayed to the position of time t (IS2D1).

  FIG. 9 is a timing chart of the output voltage Vc of the cross point detection circuit C in the case of FIG.

  At the cross point time t (IS1D1), the output of the cross point detection circuit C becomes high level, and at the cross point time t (IS2D1), the output of the cross point detection circuit C becomes low level. Therefore, although the waveform of the voltage Vc is a square wave, each time is delayed by the times DELAY11 and DELAY12 as compared with the case where the amplifier is not saturated, which is not preferable as the synchronization information. Such deterioration of the synchronization information further occurs when the input beam intensity is further increased.

  FIG. 10 is a timing chart of the optical output currents PinA and PinB when the beam intensity is further increased. In this figure, the output is larger than that shown in FIG.

  FIG. 11 is a timing chart of the output voltages Va and Vb in the case of FIG.

  As in the case of FIG. 8, the edges (Vad, Vbd) behind the voltages Va, Vb when the amplifier saturation occurs are delayed from the edges (Vao, Vbo) when there is no amplifier saturation. . Further, in the vicinity of the adjacent position of the voltage waveform, a cross point of the voltages Va and Vb occurs at time t (IS1D2), and on the rear side of the voltage Vb, the cross point of the voltages Va and Vb is generated at time t (IS2D2). It has occurred. However, in the vicinity of the adjacent position of the voltage waveform, Va≈Vb, and the magnitude relationship is unstable.

  FIG. 12 is a timing chart of the output voltage Vc of the cross point detection circuit C in the case of FIG.

  At the cross point time t (IS1D2), the output of the cross point detection circuit C becomes high level, and at the cross point time t (IS2D2), the output of the cross point detection circuit C becomes low level. Therefore, although the waveform of the voltage Vc is a square wave, the first half time t (IS1D2) is unstable, and chattering or the like may occur and fluctuate during a certain time width VARIATION. The latter time t (IS2D2) is delayed by the time DELAY2 as compared with the case where the amplifier is not saturated.

  FIG. 13 is a circuit diagram of the synchronization detection device according to the embodiment.

  In the synchronous detection device according to the embodiment, the cathode of a diode D2 for suppressing amplifier saturation is connected to the output terminal of the amplifier A, and the anode is fixed to the potential VC2. The output terminal of the amplifier B is connected to the cathode of a diode D3 for suppressing amplifier saturation, and the anode is fixed at the potential VC3. Other structures are the same as those described above.

  In this case, in addition to the effect of the diode D1, the effect of the diodes D2 and D3 occurs. That is, by connecting the diodes D2 and D3 to the output terminals of the amplifiers A and B, when the absolute values of the input currents of the amplifiers A and B exceed a predetermined level, that is, the amplifiers A and B Outputs an inverted value, so that when the output voltages Va and Vb of the amplifiers A and B are lower than the first predetermined level and the second predetermined level, respectively, the diodes D2 and D3 are turned on, and the amplifiers A and B are turned on. Current flows from the potentials VC2 and VC3 to prevent the absolute values of the output voltages Va and Vb of the amplifiers A and B from decreasing. That is, the diodes D2 and D3 are turned on so as not to reach the saturation level Vsat of the amplifiers A and B, respectively. Note that VC1 + VFd1> VC2-VFd2> VC3-VFd3 is set.

  FIG. 14 is a detailed circuit diagram of the synchronization detection apparatus shown in FIG.

  The current I0 that flows through the photodiode PDA in response to the incidence of the beam flows into the amplifier A. The current I0 that flows through the photodiode PDB in response to the incidence of the beam flows into the amplifier B. The amplifiers A and B have the same structure, and the processing of the input current I0 is the same up to the output terminal. When the current I0 flows from the power supply potential Vcc to the photodiodes PDA and PDB via the transistor Q11, the current I1 proportional to the current I0 flows to the transistor Q12 that forms a current mirror circuit together with the transistor Q11. It flows to the transistor Q1 located downstream. The transistors in the description are all bipolar transistors, but they may be MOS field effect transistors.

  The transistor Q2 forms a current mirror together with the transistor Q1, and a current I3 proportional to the current I1 flows. Note that the size of the transistor Q2 is larger than that of the transistor Q1, and the current I3 is several times larger than the current I1, and current amplification is performed. A power supply potential Vcc is connected to the emitter of the transistor Q3 via a resistor RX. A constant positive potential is connected to the base of the transistor Q3. Therefore, the potential of the node NXA downstream of the resistor RX varies depending on the magnitude of the current I2.

  If there is no current I4 flowing from the diode D2 into the node NXA in the amplifier A, the potential of the node NXA decreases as the current I2 increases, and finally decreases to a level that does not decrease further and saturates. In the present embodiment, since the diode D2 is provided, if the potential of the node NXA is lowered from the potential VC2 of the potential VC2-diode D2 (VL1 = VC2-VFd2), the diode D2 becomes conductive. Then, the current I4 merges with the current I3. That is, even if the current I3 increases, the current I4 compensates for the increase, so the current I2 flowing through the resistor RX does not increase, and the potential of the node NXA downstream of the resistor RX is fixed at VC2-VFd2.

  Similarly, in the amplifier B, if there is no current I4 flowing from the diode D3 to the node NXB downstream of the resistor RX, the potential of the node NXB decreases as the current I2 increases, and finally does not decrease any more. Saturates down to level. In the present embodiment, since the diode D3 is provided, the diode D3 becomes conductive when the potential of the node NXB tends to be lower than the potential VC3 of the potential VC3-diode D3 (VL2 = VC3-VFd3). Then, the current I4 merges with the current I3. That is, even if the current I3 increases, the current I4 compensates for the increase, so the current I2 flowing through the resistor RX does not increase, and the potential of the node NXB downstream of the resistor RX is fixed at VC3-VFd3.

  FIG. 15 is a timing chart of the light output currents PinA and PinB output from the photodiodes PDA and PDB of FIG.

  In the figure, the output when a relatively high intensity laser beam sequentially traverses the photodiodes PDA and PDB is shown. Between the time t2 and the time t3, there is a cross point of these waveforms.

  FIG. 16 is a timing chart of the output voltages Va and Vb in the case of FIG.

  Due to the function of the diode D1, the base level VLA of the voltage Va is lower than the base level VLB of the voltage Vb. As described above, even if noise is included in a part of the potential VLB, it is easily possible. The cross-point can be obtained stably without inverting the magnitude relation of the waveform.

  Further, when the voltage Va reaches the potential VL1, it is prevented from approaching the saturation level Vsat any more. Therefore, since the output saturation of the amplifier A does not occur, the position of the rear edge Vao of the waveform of the voltage Va does not change, and the voltage Va and the voltage Vb are not changed at the time t (IS1E1) between the time t2 and the time t3. Cross points can be obtained accurately.

  Further, when the voltage Vb reaches the potential VL2, the voltage Vb is not further approached to the saturation level Vsat. Accordingly, since the output saturation of the amplifier B does not occur, the position of the rear edge VbO of the waveform of the voltage Vb does not change, and the cross point between the voltage Va and the voltage Vb is accurate at the time t (IS2E1) after the time t4. Is obtained.

  Here, the level VL1 and the level VL2 are different. Specifically, the level VL2 is closer to the saturation level Vsat than the level VL1, and thus the right edge of the left waveform Va as shown in FIG. Then, the position of the left edge of the right waveform Vb is switched, and the output of the cross point detection circuit does not become unstable.

  FIG. 17 is a timing chart of the crosspoint detection circuit output in the case of FIG.

  The cross point time t (IS1E1) near the adjacent positions of the two waveforms is located between the time t2 and the time t3, and at this time, the output voltage Vc of the cross point detection circuit C becomes high level, and the second half. At the cross point time t (IS2E1), the output voltage Vc of the cross point detection circuit C becomes low level. Therefore, although the waveform of the voltage Vc is a square wave, the shape of this square wave is stable because the cross point position does not fluctuate.

  FIG. 18 is a timing chart of the light output currents PinA and PinB output from the photodiodes PDA and PDB of FIG.

  In the figure, the output when a laser beam of very high intensity sequentially traverses the photodiodes PDA and PDB is shown. Between the time t2 and the time t3, there is a cross point of these waveforms.

  FIG. 19 is a timing chart of the output voltages Va and Vb in the case of FIG.

  When the photodiodes PDA and PDB are irradiated with a laser beam having a very high intensity, and the rear edge Vao of the waveform of the voltage Va recedes from the front edge of the waveform of the voltage Vb, these cross points t (IS1E2 ) Can be determined uniquely and stably. Further, the rear edge Vbo of the voltage Vb intersects the base line VLA of the voltage Va, and this position variation hardly occurs basically.

  FIG. 20 is a timing chart of the crosspoint detection circuit output in the case of FIG.

  Cross point time t (IS1E2) near the adjacent positions of the two waveforms is located between time t2 and time t3. At this time, the output voltage Vc of the cross point detection circuit C becomes high level, and the second half. At the cross point time t (IS2E2), the output voltage Vc of the cross point detection circuit C becomes low level. Therefore, although the waveform of the voltage Vc is a square wave, the shape of this square wave is stable because the cross point position does not fluctuate.

FIG. 21 is a circuit diagram of an amplifier of a synchronization detection device according to another embodiment. This is a specific circuit of the amplifier A having upper and lower limit clamping functions.

If the symbol in this circuit diagram is the former and the symbol in FIG. 14 is the latter, Q1 is Q1, Q2 is Q2, Q3 is Q3, RX is R1, D1 is Q5, and D2 is Q4. VC1 is a voltage obtained by dividing the voltage between Vcc and GND by R3, R4, R5, and Q7, and decreasing from the connection point of R3 and R4 by the base-emitter voltage Vbe of Q2 generated at Q6 and R2. VC2 is the connection point itself between R4 and R5.

The amplifier B is a circuit that does not include Q6, R2, and Q5 of FIG. 21. Since the amplifier A and the amplifier B are arranged on the same chip, R5 and R52 (not shown) in which R5 is divided by an appropriate value are provided. Assuming that it is an intermediate point, the voltage order at the connection point of R3, R4, R51, R52, and Q7 is uniquely determined by design.

The operations of the amplifiers A and B are the same as those described with reference to FIG.

  As described above, the synchronization detection device according to each of the embodiments described above includes the first photodiode PDA and the second photodiode PDB arranged along the scanning direction of the beam LB as illustrated in FIG. The first amplifier A and the second amplifier B connected to the subsequent stage of the first photodiode PDA and the first photodiode PDB, respectively, and the output of the first amplifier A when the beam LB is not incident on the first photodiode PDA When the first limit level (VL1: see FIG. 16) is given between the level and the saturation output level Vsat of the first amplifier A, and the output of the first amplifier A reaches the first limit level VL1, A first output limiting circuit (means) (D2, Q4) for suppressing the output of one amplifier A from approaching its saturated output level Vsat, the output waveform Va of the first amplifier A and the second output A cross point detection circuit (cross point detection circuit C) for detecting a cross point (t (IS1E2)) with the output waveform Vb of amplifier B.

  According to the above-described apparatus, since the saturation of the first amplifier A is suppressed by the first output limiting means, even when the beam intensity is high (FIGS. 15 and 18), waveform delay due to amplifier saturation occurs. Therefore, it is possible to accurately detect the cross point position existing in the vicinity of the adjacent positions of the output waveforms Va and Vb of the first amplifier A and the second amplifier B.

  In addition, the synchronization detection device has a second limit level (between the output level of the second amplifier B and the saturation output level Vsat of the second amplifier B when the beam LB is not incident on the second photodiode PDB). VL2: see FIG. 16), and when the output of the second amplifier B reaches the second limit level VL2, the second output limit that suppresses the output of the second amplifier B from approaching its saturation output level Vsat. A circuit (means) (D3, Q4) is further provided.

  Since the saturation of the second amplifier B is suppressed by the second output limiting means, the waveform delay due to the amplifier saturation does not occur even when the beam intensity is high, and the output waveforms of the first amplifier A and the second amplifier B The cross-point position on the rear side (t (IS2E1): see FIG. 16) can be suppressed. The cross point on the rear side is not directly used for synchronization control, but the output waveform of the cross point detection circuit is determined, so that the one with less fluctuation is controlled based on this signal. There are few malfunctions.

  Further, as shown in FIG. 16, the first limit level VL1 and the second limit level VL2 are different. Specifically, the values of the potential VC2 and the potential VC3 are different. That is, when these limit levels VL1 and VL2 match, the outputs of the respective amplifiers A and B may stick to the limit levels VL1 and VL2, and the cross point may become indefinite. However, these limit levels VL1 , VL2 are different, such instability will not occur.

FIG. 22 shows the relationship between the currents PinA and PinB generated from the light detection sensor PDS and the cross point detection circuit inputs Va and Vb. The maximum slope of the curve is determined by the current ratio of the current mirror in the amplifier and the resistance R1. When the solid line does not have the upper / lower limit (in the conventional example, Va, Vb (D1, D2, D3 not shown) and displayed in the figure) input / output characteristics, the alternate long and short dash line corresponds to Va Input / output characteristics and a dotted line corresponding to Vb between the lower limit limit of Va and the saturation voltage Vsat when the limit is provided (Va of this embodiment, indicated in the figure as Va (with D1 and D2)) This is the input / output characteristic when the lower limit is provided (Vb of this embodiment, Vb (with D3) shown in the figure).

  The present invention is not limited to the above-described embodiment. For example, the photodiodes PDA and PDB on the rectangle are described, but other shapes such as a parallelogram, a trapezoid, and a triangle may be used as long as they are arranged along the beam scanning direction.

  The present invention can be used in a synchronous detection device that detects a reference position for beam scanning.

PDA, PDB ... photodetector, A, B ... amplifier, C ... crosspoint detection circuit, D1, D2, D3 ... diode.

Claims (3)

First and second beam detectors disposed along a scanning direction of the beam;
First and second amplifiers connected to subsequent stages of the first and second beam detectors, respectively;
A first limit level is applied between the output level of the first amplifier and the saturation output level of the first amplifier when no beam is incident on the first beam detector, and the output of the first amplifier is First output limiting means for suppressing the output of the first amplifier from approaching its saturation output level when the first limit level is reached;
A cross point detection circuit for detecting a cross point between the output waveform of the first amplifier and the output waveform of the second amplifier;
A synchronization detection circuit comprising:   A second limit level is given between the output level of the second amplifier and the saturation output level of the second amplifier when no beam is incident on the second beam detector, and the output of the second amplifier is 2. The synchronization detection according to claim 1, further comprising second output limiting means for suppressing an output of the second amplifier from approaching a saturation output level when the second limit level is reached. circuit. 3. The synchronization detection circuit according to claim 2, wherein the first limit level and the second limit level are different.

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