JP2010512559A - Information processing apparatus and nonvolatile semiconductor memory drive - Google Patents

Abstract

  The information processing apparatus includes an information processing apparatus main body and a nonvolatile semiconductor memory drive accommodated in the information processing apparatus main body. The nonvolatile semiconductor memory drive controls the write operation, the read operation, and the erase operation of the nonvolatile semiconductor memory according to a command from the information processing apparatus main body and the nonvolatile semiconductor memory, and the nonvolatile semiconductor memory Statistical information on the write operation, read operation, and erase operation is generated for each predetermined period, and statistical information corresponding to each of a plurality of periods each having a time length corresponding to the predetermined period is stored in the nonvolatile semiconductor memory. Control means for storing in the storage area.

Description

  The present invention relates to an information processing apparatus and a nonvolatile semiconductor memory drive.

  There is a computer that stores log data. As an information processing apparatus having such a log data management function, for example, an information processing apparatus described in Patent Document 1 is known.

  This information processing apparatus stores log information including the contents of user operations and information about events that have occurred in association with time information. The information processing apparatus predicts a future operation state based on the log information.

JP 2006-113961 A

  However, in this information processing apparatus, since it is necessary to select necessary information from the log information and organize the selected information in order to examine the operation content information and the event that has occurred from the log information, It is difficult to easily grasp the causes and signs of anomalies leading to equipment malfunction. In addition, the amount of log information increases each time an individual event occurs. Therefore, a large storage capacity is required for storing log information.

  An object of the present invention is to provide an information processing apparatus and a nonvolatile semiconductor memory drive that can easily organize and analyze information to be monitored.

  According to one aspect of the present invention, an information processing apparatus main body and a nonvolatile semiconductor memory drive accommodated in the information processing apparatus main body, the nonvolatile semiconductor memory and a command from the information processing apparatus main body And controlling the write operation, read operation, and erase operation of the nonvolatile semiconductor memory, and generating statistical information about the write operation, read operation, and erase operation of the nonvolatile semiconductor memory at regular intervals, An information processing apparatus comprising: a non-volatile semiconductor memory drive that includes control means for storing statistical information corresponding to each of a plurality of periods having a time length corresponding to the predetermined period in a storage area of the non-volatile semiconductor memory Provided.

  According to this information processing apparatus, it is possible to easily organize and analyze information to be monitored.

FIG. 1 is a perspective view showing an appearance of an information processing apparatus according to an embodiment of the present invention. FIG. 2 is a block diagram illustrating a schematic configuration of the information processing apparatus according to the embodiment. FIG. 3 is a block diagram showing a schematic configuration of the SSD used in the information processing apparatus of the embodiment. FIG. 4 is a schematic diagram showing an example of the storage capacity and storage area of the SSD of FIG. FIG. 5 is a schematic configuration diagram of a NAND memory provided in the SSD of FIG. FIG. 6 is a diagram illustrating an example of statistical information stored in the NAND memory provided in the SSD of FIG. FIG. 7 is a schematic diagram showing an example of a storage format of monthly information stored in the NAND memory provided in the SSD of FIG. FIG. 8 is a flowchart showing an example of a procedure of monthly information storage processing executed by the SSD of FIG. FIG. 9 is a schematic diagram showing another example of the storage format of the monthly information stored in the NAND memory provided in the SSD of FIG. FIG. 10 is a flowchart showing another example of the procedure of the monthly information storage process executed by the SSD of FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<Configuration of information processing apparatus>
FIG. 1 is a perspective view showing an appearance of an information processing apparatus according to an embodiment of the present invention. As shown in FIG. 1, the information processing apparatus 1 includes an information processing apparatus main body 2 and a display unit 3 attached to the information processing apparatus main body 2.

  The main body 2 has a box-shaped housing 4, and the housing 4 includes an upper wall 4 a, a peripheral wall 4 b, and a lower wall (not shown). The upper wall 4a of the housing 4 includes a front part 40, a central part 41, and a back part 42 in order from the side closer to the user who operates the information processing apparatus 1. The lower wall is located on the opposite side of the upper wall 4a and faces the installation surface on which the information processing apparatus 1 is placed. The peripheral wall 4b has a front wall 4ba, a rear wall 4bb, and left and right side walls 4bc, 4bd.

  The front unit 40 includes a touch pad 20 that is a pointing device, a palm rest 21, and an LED 22 that lights up in conjunction with the operation of each unit of the information processing apparatus 1.

  The central portion 41 includes a keyboard placement portion 23 to which a keyboard 23a capable of inputting character information and the like is attached.

  The back part 42 includes a battery pack 24 that is detachably attached. On the right side of the battery pack 24, a power switch 25 for turning on the information processing apparatus 1 is provided. A pair of hinge portions 26 a and 26 b that rotatably support the display unit 3 are provided on the left and right sides of the battery pack 24.

  A discharge port 29 for discharging the wind W from the inside of the housing 4 to the outside is provided in the left side wall 4bc of the housing 4. Further, on the right side wall 4bd, for example, an ODD (optical disc drive) 27 capable of reading and writing data from and on an optical storage medium such as a DVD, and a card slot 28 in which various cards are inserted and removed are arranged.

  The casing 4 is formed by a casing cover including a part of the peripheral wall 4b and the upper wall 4a, and a casing base including a part of the peripheral wall 4b and the lower wall. The housing cover is detachably combined with the housing base to form an accommodation space with the housing base. In this accommodating space, for example, an SSD (solid state drive) 10 that functions as a nonvolatile semiconductor memory drive is accommodated. Details of the SSD 10 will be described later.

  The display unit 3 includes a display housing 30 having an opening 30a and a display device 31 including an LCD or the like that can display an image on a display screen 31a. The display device 31 is accommodated in the display housing 30, and the display screen 31a is exposed to the outside of the display housing 30 through the opening 30a.

  In the housing 4, in addition to the SSD 10, the battery pack 24, the ODD 27, and the card slot 28, a main circuit board, an expansion module, a fan, and the like (not shown) are accommodated.

  FIG. 2 is a block diagram schematically showing the system configuration of the information processing apparatus 1.

  As shown in FIG. 2, the information processing apparatus 1 includes the SSD 10, the expansion module 12, the fan 13, the touch pad 20, the LED 22, the keyboard 23a, the power switch 25, the ODD 27, the card slot 28, and the display device 31. , EC (Embedded Controller) 111, Flash Memory 112 for storing BIOS (Basic Input Output System) 112a, South Bridge 113, North Bridge 114, CPU (Central Processing Unit) 115, GPU (Graphic Processing Unit) 116 and a main memory 117.

  An EC (embedded controller) 111 is an embedded system that controls each unit. The north bridge 114 is an LSI that controls connections among the CPU 115, the GPU 116, the main memory 117, and various buses. The CPU 115 is a processor that performs arithmetic processing on various signals, and executes an operating system and various application programs loaded from the SSD 10 to the main memory 117. The GPU 116 is a display controller that performs display control by processing video signals.

  The extension module 12 includes an extension circuit board, a card socket provided on the extension circuit board, and an extension module board inserted into the card socket. The card socket corresponds to a standard such as Mini-PCI, for example. Examples of the extension module substrate include a 3G (third generation) module, a television tuner, a GPS module, and a Wimax (registered trademark) module.

  The fan 13 is a cooling unit that cools the inside of the housing 4 based on the blown air, and discharges the air in the housing 4 to the outside as the wind W through the discharge port 29.

  The EC 111, the flash memory 112, the south bridge 113, the north bridge 114, the CPU 115, the GPU 116, and the main memory 117 are electronic components mounted on the main circuit board.

<Configuration of SSD>
FIG. 3 is a block diagram showing a schematic configuration of the SSD applied to the information processing apparatus of the present embodiment.

  The SSD 10 is a nonvolatile semiconductor memory drive used as an external storage device of the information processing apparatus 1 instead of a hard disk. As shown in FIG. 3, the SSD 10 is schematically configured to include a temperature sensor 101, a connector 102, a control unit 103, NAND memories 104 </ b> A to 104 </ b> H, a DRAM (memory) 105, and a power supply circuit 106. ing. The SSD 10 is an external storage device that stores data and programs and whose stored contents are not lost even when power is not supplied. Unlike the hard disk drive, the SSD 10 does not have a drive mechanism such as a magnetic disk or a head. However, the SSD 10 has a storage area of a NAND memory which is a nonvolatile semiconductor memory, a program such as an OS (operating system), and a user and software. It is a drive that can store data created based on it in a readable and writable manner for a long time and can operate as a startup drive of the information processing apparatus 1.

  The control unit 103 is connected to the connector 102, the eight NAND memories 104A to 104H, the DRAM 105, and the power supply circuit 106, respectively. The control unit 103 is connected to the host device 8 via the connector 102, and is connected to the external device 9 as necessary.

  The power source 7 is a battery pack 24 or an AC adapter (not shown). For example, power of DC 3.3V is supplied to the power circuit 106 via the connector 102. The power source 7 supplies power to the entire information processing apparatus 1.

  In the present embodiment, the host device 8 is the information processing apparatus main body 2 (the main circuit board of the main body 2). The south bridge 113 mounted on the main circuit board is connected to the control unit 103 via the connector 102. Data transmission / reception is performed between the south bridge 113 and the control unit 103 based on a standard such as serial ATA.

  The external device 9 is another information processing device different from the information processing device 1. The external device 9 is connected to the control unit 103 based on a standard such as RS-232C, for example, with respect to the SSD 10 removed from the information processing device 1, and has a function of reading data stored in the NAND memories 104A to 104H. Have.

  The board on which the SSD 10 is mounted has an outer size equivalent to, for example, a 1.8 inch type or 2.5 inch type HDD (hard disk drive). In this embodiment, it is equivalent to the 1.8 inch type.

  The control unit 103 controls the write operation, read operation, and erase operation of the NAND memories 104 </ b> A to 104 </ b> H in accordance with a command from the information processing apparatus main body 2. Specifically, the control unit 103 reads data from the NAND memories 104 </ b> A to 104 </ b> H in response to a request (read command, write command, other various commands, etc.) from the information processing apparatus body 2 that functions as the host device 8. And control the execution of the erase operation. The data transfer rate is, for example, 100 MB / Sec when reading data and 40 MB / Sec when writing.

  Each of the NAND memories 104A to 104H is, for example, a nonvolatile semiconductor memory having a storage capacity of 16 GB. Each of the NAND memories 104A to 104H is composed of, for example, an MLC (multilevel cell) -NAND memory (multilevel NAND memory) capable of recording 2 bits in one memory cell. The MLC-NAND memory has a smaller number of rewritable times than an SLC (single level cell) -NAND memory, but has a feature that it is easier to increase the storage capacity than an SLC (single level cell) -NAND memory. Have.

  The DRAM 105 is a buffer in which data is temporarily stored when data is read from and written to the NAND memories 104A to 104H under the control of the control unit 103.

  The connector 102 has a shape based on a standard such as serial ATA. Note that the control unit 103 and the power supply circuit 106 may be connected to the host device 8 and the power supply 7 by separate connectors, respectively.

  The power supply circuit 106 converts DC 3.3V supplied from the power supply 7 into, for example, DC 1.8V, 1.2V, and the like, and supplies these three types of voltages to each unit according to the drive voltage of each unit of the SSD 10. .

<Storage capacity of SSD>
FIG. 4 is a schematic diagram showing the storage capacity and storage area of the SSD 10.

  The control unit 103 of the SSD 10 manages seven types of storage capacities 104a to 104g shown in FIG.

  The storage capacity 104a is a NAND capacity, and is the maximum storage capacity using the storage areas of all the NAND memories 104A to 104H. That is, the storage capacity 104a is a total value of physical storage capacities of the NAND memories 104A to 104H. For example, when the storage capacity of each of the NAND memories 104A to 104H is 16 GB, the storage capacity 104a is 128 GB. The storage capacity 104a, that is, NAND Capacity is given by NAND configuration information of a manufacturing information write command of UART (Universal Asynchronous Receiver Transmitter), for example.

  The storage capacity 104b is Max Logical Capacity, and is the maximum storage capacity that can be accessed by a logical block address (LBA).

  The storage capacity 104c is S.I. M.M. A. R. The T log area start LBA is provided to divide the storage capacity 104b and the storage capacity 104d described below. S. M.M. A. R. The T log area start LBA indicates the head LBA of the storage area for storing the log data.

  The storage capacity 104d is a Vender Native Capacity, and is the maximum storage capacity given as a user use area. The storage capacity 104d is given by, for example, initial Identical Device data of an ATA special command. The storage capacity 104d is determined at the design stage of the SSD 10 by the manufacturer (Vender) based on the IDEMA (The International Disk Drive Equipment and Materials Association) standard, and is expressed by the following equation.

LBA = 97,696,368 + (1,953,504, × ((Capacity in GB)-50))
The storage capacity 104e is an OEM Native Capacity, and is a storage capacity determined at the time of manufacture according to a request from an OEM (Original Equipment Manufacturer). The storage capacity 104e is given, for example, by writing unique information of an ATA special command. The storage capacity 104e is a value returned by the Device Configuration Identify command when the Device Configuration Overlay Feature Set is supported.

  The storage capacity 104f is a native capacity, and the initial value is the same as the storage capacity 104e. When Feature set is supported, it is a value that can be changed with the Device Configuration Set command. The storage capacity 104f is a value returned by a Read Native Max Address (EXT) command.

  The storage capacity 104g is a current capacity and is a storage capacity in use by the user, and an initial value is the same as the storage capacity 104f. It can be changed with the Set Max Address command. It is a value returned by Word 61:60 and Word 103: 100 of the Identify Device command.

  In addition, the storage area of the SSD 10 exists between the storage capacities 104a to 104g.

  In a storage area between the storage capacities 104a and 104b, management data (management information) 107a for operating the SSD 10 and a logical block address LBA are physical addresses corresponding to sectors which are storage units of the NAND memories 104A to 104H. And a logical / physical table 108a for converting to The logical / physical table 108a shows the correspondence between each logical block address and each physical address. The management data 107a and the logical / physical table 108a are data recorded in fixed areas in the NAND memories 104A to 104H. No LBA is assigned to each of the management data 107a and the logical / physical table 108a. Therefore, the management data 107a and the logical / physical table 108a cannot be accessed using the LBA as a key. The control unit 103 has a fixed access path for accessing the management data 107a and the logical / physical table 108a, and accesses the management data 107a and the logical / physical table 108a through the fixed access path. Execute.

  In the storage area between the storage capacities 104b and 104c, S.I. M.M. A. R. T.A. (Self-Monitoring Analysis and Reporting Technology) Log data 107b is stored. S. M.M. A. R. T.A. The log data 107b includes, for example, various statistical information such as temperature information in addition to the event log data. S. M.M. A. R. T.A. The LBA assigned to the log data 107b is the firmware executed in the control unit 103 as S.P. M.M. A. R. T.A. This is used locally to access the log data 107b. The firmware executed in the control unit 103 is S.M. M.M. A. R. T.A. The log data 107b can be accessed using the LBA as a key. M.M. A. R. T.A. The log data 107b cannot be accessed.

  In the present embodiment, two types of statistical information, lifetime type statistical information and monthly type statistical information, are used. Lifetime statistical information is information collected over a lifetime. On the other hand, the monthly statistical information is statistical information collected at regular intervals, and statistical information corresponding to each of a plurality of periods is stored in a separate storage area. The control unit 103 controls the write operation, read operation, and erase operation of the NAND memory (NAND memories 104A to 104H) and statistical information (monthly statistical information) about the write operation, read operation, and erase operation of the NAND memory. Is generated for each fixed period, and statistical information for a plurality of periods (monthly statistical information for a plurality of periods) each corresponding to a plurality of periods each having a time length corresponding to the fixed period is stored in the storage capacity 104b. And 104c. Monthly statistical information is a statistic obtained by counting the operation status of the SSD 10 for each period. For example, the monthly statistical information relates to the number of times each of the NAND memory write operation, read operation, and erase operation executed within a certain period. Contains information. Specifically, the monthly statistical information indicates the number of each of the write command and the read command received from the information processing apparatus main body 2 within a certain period, and the number of blocks in the NAND memory that are erased within the certain period. .

  In this embodiment, monthly statistical information for the past nine months (or five months) from the current time is stored. That is, nine monthly statistical data storage areas for storing, for example, nine sets of monthly statistical information are provided in the storage area between the storage capacities 104b and 104c. The nine monthly statistical data storage areas include monthly statistical information corresponding to the period one month ago, monthly statistical information corresponding to the period two months ago, monthly statistical information corresponding to the period three months ago, Monthly statistical information corresponding to the period 4 months ago Monthly statistical information corresponding to the period 5 months ago, Monthly statistical information corresponding to the period 6 months ago, Monthly statistics corresponding to the period 7 months ago Information, monthly statistical information corresponding to a period of 8 months ago, and monthly statistical information corresponding to a period of 9 months ago are stored.

  Further, the control unit 103 generates lifetime type statistical information related to the write operation, read operation, and erase operation of the NAND memory executed during the period from the initial activation of the SSD 10 to the present time, and the generated lifetime type statistical information is displayed. The data is stored in a storage area between the storage capacities 104b and 104c. The lifetime statistical information is stored in a storage area different from the area where the monthly statistical information is stored. The lifetime statistical information includes, for example, information on the total number of times of the write operation, the read operation, and the erase operation of the NAND memory executed from the first activation to the current time, in addition to the temperature statistical information. Specifically, the lifetime type statistical information includes the number of write commands and read commands received from the information processing apparatus body 2 within the period from the first activation to the current time, and the period from the first activation to the current time. Indicates the number of erased blocks in the NAND memory, etc.

  For example, an unused storage area having a storage capacity of 2 MB is set in the storage area between the storage capacities 104c and 104d. This is because the minimum storage unit of LBA is 8 sectors and is a storage unit corresponding to 4 KB (a large storage unit is 1 MB), but the actual minimum recording unit of data is naturally 1 sector, so 1 MB By providing an empty storage area with the above storage capacity, S.I. M.M. A. R. T.A. This is because the log data 107b and the data recorded below the storage capacity 104d are handled independently.

  The storage area between the storage capacities 104d and 104e is unused, and the storage capacities 104d and 104e have the same value except in special cases.

  The storage area between the storage capacities 104e and 104f is a storage area used for the OEM, and the unique information 107e determined by the OEM request is written as described above.

  A storage area between the storage capacities 104f and 104g is a storage area used by the OEM or the user, and data is written according to the setting of the OEM or the user.

  The storage area of the storage capacity 104g is a storage area used by the user, and data is written according to user settings.

  The storage capacities 104a to 104g satisfy the relationship represented by the following formula.

Storage capacity 104a> Storage capacity 104b> Storage capacity 104c> Storage capacity 104d ≧ Storage capacity 104e ≧ Storage capacity 104f ≧ Storage capacity 104g
At the time of shipment from the manufacturer (Vender), the storage capacities 104d to 104g have the same value.

<Configuration of NAND memory>
FIG. 5 is a schematic configuration diagram of a NAND memory used in the present embodiment. Since the NAND memories 104A to 104H have the same function and configuration, the NAND memory 104A will be described here. Note that the numbers 0 to 7 attached to the left of the cluster 1041 and the sector 1042 indicate the cluster number and the sector number.

  The NAND memory 104A includes a plurality of blocks (a plurality of erase blocks) 1040. Each block 1040 includes a plurality of clusters, for example, 1024 clusters 1041. Each cluster 1041 includes a predetermined number of sectors, for example, eight sectors 1042. When each cluster is composed of eight sectors, the data size of each cluster is 4 KB. In this embodiment, a cluster having a data size of 1 MB can also be used. Data read / write is executed in cluster units (a predetermined number of sector group units).

<Composition of statistical information>
FIG. M.M. A. R. T. T. It is a figure which shows an example of the statistical information contained in log data, its item, and update timing. In the SSD 10 in the present embodiment, as described above, apart from the lifetime statistical information collected over the lifetime from the first activation, the monthly statistical information based on the operation status of the SSD 10 (hereinafter referred to as “monthly information”). ) Is shown in FIG. M.M. A. R. T. T. Stored in the log data 107b.

  This monthly information is statistical information indicating a statistical amount related to the operating state of the SSD 10. The control unit 103 generates statistical information (such as the number of executions) for each of a plurality of predetermined items (for example, a read operation, a write operation, an erase operation, a wear leveling operation, etc.) at regular intervals, and generates the generated statistics Information is stored in the storage areas of the NAND memories 104A to 104H. The fixed period is a period obtained by dividing the operating time of the SSD 10 by a fixed time. The certain period is a period corresponding to one month, for example. It is not always necessary to follow the calendar to determine whether or not the period of one month has passed. For example, it is determined that the period of one month has passed when the total operating time of the SSD 10 has reached 160 hours. May be. This determination method is based on the premise that, for example, the operating time of the SSD 10 (time when the SSD 10 is powered on) is 8 hours per day, and the user uses the SSD 10 for 20 days per month.

  In the following description, it is assumed that monthly information is generated and stored every time the value of an internal counter provided in the control unit 103 reaches a predetermined value (for example, count value corresponding to one month = 160 hours). To do. The internal counter counts the time during which the SSD 10 is powered on. By using such an internal counter, monthly information can be generated and stored without providing a clock such as a real time clock in the SSD 10.

  The monthly information includes, for example, statistical information regarding the host side interface, statistical information regarding the data manager, statistical information regarding the security manager, statistical information regarding the ATA driver, and statistical information regarding the NAND driver. Each piece of statistical information is composed of, for example, 256 records each having 16 bytes.

  The statistical information of the host side interface is, for example, the number of read commands received and the number of write commands received. The number of read commands received indicates the number of times a read command has been received from the host device 8 during a certain period. The number of write commands received indicates the number of times a write command has been received from the host device 8 during a certain period. The number of read commands received and the number of write commands received are incremented (+1) when the read command is received and the write command is received as the update timing.

  The statistical information of the data manager includes, for example, the maximum erase count and the erase block count of the NAND memory. The maximum erase count indicates the maximum erase count in all blocks of the NAND memory during a certain period. The number of erase blocks indicates the number of erased blocks during a certain period. The update timing of the maximum erase count is at the time of block erase. When erasing a block, it is determined whether the maximum number of erases in all blocks is greater than the current value of the maximum number of erases, and if the maximum number of erases in all blocks is greater than the current value of the maximum number of erases The maximum erase count is incremented by one. The update timing of the number of erase blocks is at the time of block erase. At the time of block erase, the number of erase blocks is incremented by one. Further, the statistical information of the data manager may include a total read data amount (total number of sectors read) during a certain period, a total write data amount (total number of sectors written) during a certain period, and the like.

  Security manager statistical information, for example, user password setting count and firmware download count. The user password setting count indicates the number of times the user password is set within a certain time. The number of firmware downloads indicates the number of times the firmware has been downloaded within a certain time. The user password setting count is incremented (+1) with the user password setting time as the update timing. Further, the number of times of firmware download is incremented (+1) with the firmware update time as the update timing.

  As statistical information of the ATA driver, for example, there are a hardware reset count and a software reset count. The number of hardware resets is incremented (+1) with the hardware reset time as the update timing. The number of software resets is incremented (+1) with the software reset time as the update timing.

  The statistical information of the NAND driver is, for example, the total amount of NAND writing and the number of erasure failures. The total NAND write amount is added to the current value with the NAND write time as the update timing. The number of erasure failures is incremented (+1) with the erasure failure time as the update timing.

<Operation>
FIG. 7 is a schematic diagram showing an example of the storage contents of the monthly information, and FIG. 8 is a flowchart showing a storage procedure of the monthly information. Hereinafter, the storage operation of the monthly information will be described with reference to each drawing. Here, a description will be given of a procedure for creating monthly information for each month for the number of read commands received, which is the above-described statistical information of the host-side interface. Note that the numerical matrix shown in FIG. 7 indicates monthly information recorded in the NAND memories 104A to 104H on a monthly basis. In FIG. 7, it is assumed that monthly information for five months is stored. The NAND memory corresponds to monthly information for one month ago, monthly information for two months ago, monthly information for three months ago, monthly information for four months ago, and monthly information for five months ago. There are two monthly information storage areas.

  When the SSD 10 starts operating on March 1 (step S1), the control unit 103 increments the read command reception number every time a read command is received (step S2: Yes) (step S3). When it is April 1 that is one month after the aggregation (step S4: Yes), the number of read commands received at that time, for example, “10” is stored in the area one month before as the copied monthly information. (Step S5). That is, the control unit 103 first monitors the number of read commands received from March 1 and counts the number of read commands received from the host device 8 for the first time. When April 1st, specifically, when the total operating time of the SSD 10 from the first activation (March 1) reaches 160 hours, the control unit 103 counts the number of received read commands. A value is acquired, monthly information including the count value (“10”) is generated, and the generated monthly information is stored in a storage area corresponding to the monthly information prepared one month before in the NAND memory. To do.

  The control unit 103 repeats the processes of steps S2 to S4 described above, and when it is May 1 two months later (S4: Yes), the control unit 103 sets the number of read commands received, for example, “30” The next information is stored in the area one month ago, and the read command reception number “10” is stored in the area two months ago (step S5). Specifically, the control unit 103 monitors the number of read commands received from March 1 and counts the number of read commands received from the host device 8 for the first time. On May 1, specifically, when the total operating time of the SSD 10 since the previous monthly information generation reaches 160 hours, the control unit 103 sets the count value of the number of received read commands. The information is acquired again, and monthly information including the count value (“30”) is generated. Then, the control unit 103 moves the monthly information (“10”) already stored in the storage area corresponding to the monthly information one month ago to the storage area corresponding to the monthly information two months ago. Then, the generated monthly information (“30”) is stored in the storage area corresponding to the monthly information of one month ago.

  Thereafter, the above-described operation is repeated every time counting is performed, that is, every certain time.

  As described above, by storing the monthly information in the NAND memories 104A to 104H in time series at the time of aggregation, it is possible to easily and quickly grasp the operation history for each predetermined period with respect to the number of read commands received. Further, the stored monthly information is read from the SSD 10 using an application that operates based on the operation of the information processing apparatus 1 and is processed by the CPU 115 of the information processing apparatus 1 to create data such as a histogram and display the screen. Etc. can also be easily performed. In the above-described monthly information generation, the case where the fixed period is not changed has been described. However, the interval from the previous aggregation time to the next aggregation time may be adjusted according to the operating state of the SSD 10.

  Further, the monthly information stored in the NAND memories 104A to 104H may be read from the SSD 10 by a device connected to the outside via the information processing apparatus 1. In this case, it is possible to grasp the operation history of the SSD 10 over a certain period in a state where the SSD 10 is accommodated in the information processing apparatus 1 main body.

  In the above example of the monthly information acquisition method, the case where the count value of the read command reception number is not cleared every month has been described. However, the count value of the read command reception number may be cleared every month. .

  FIG. 9 is a schematic diagram showing another example of the stored contents of the monthly information, and FIG. 10 is a flowchart showing another example of the procedure for storing the monthly information.

  When the SSD 10 starts operating on March 1 (step S11), the control unit 103 increments the read command reception number every time a read command is received (step S12: Yes) (step S13). When it is April 1st, one month after the aggregation (step S14: Yes), the number of read commands received at that time, for example, “10” is copied and stored in the area one month ago as monthly information. (Step S15). Next, the control unit 103 clears the aggregate value from the previous aggregation time to the actual aggregation time (step S16).

  That is, the control unit 103 first monitors the number of read commands received from March 1 and counts the number of read commands received from the host device 8 for the first time. When April 1st, specifically, when the total operating time of the SSD 10 from the first activation (March 1) reaches 160 hours, the control unit 103 counts the number of received read commands. A value is acquired, monthly information including the count value (“10”) is generated, and the generated monthly information is stored in a storage area corresponding to the monthly information prepared one month before in the NAND memory. To do. Then, the control unit 103 clears the count value of the number of read commands received.

  The control unit 103 repeats the processes of steps S12 to S14 described above, and when it is May 1 two months later (S14: Yes), the read command reception number, for example, “20” is used as monthly information for one month. Store in the previous area, and store the number of received read commands “10” in the area two months ago (step S15). Then, the total value “20” of the current number of read commands received is cleared (step S16).

  Specifically, the control unit 103 again monitors the number of read commands received from April 1, and counts the number of received read commands transmitted from the host device 8 after April 1 for the first time. On May 1, specifically, when the total operating time of the SSD 10 since the previous monthly information generation reaches 160 hours, the control unit 103 sets the count value of the number of received read commands. The information is acquired again, and monthly information including the count value (“20”) is generated. Then, the control unit 103 moves the monthly information (“10”) already stored in the storage area corresponding to the monthly information one month ago to the storage area corresponding to the monthly information two months ago. Then, the generated monthly information (“20”) is stored in the storage area corresponding to the monthly information one month ago. Next, the control unit 103 clears the count value of the number of read commands received.

  Thereafter, the above-described operation is repeated every time counting is performed, that is, every certain time. As a result, the latest monthly information for five months is stored in the NAND memory.

  In the storage area corresponding to the monthly information five months ago, only the number of read commands received corresponding to the one month period five months ago may be stored, but as shown in FIG. The number of read commands received in the entire period before the month before may be stored in a storage area corresponding to the monthly information five months ago.

  As described above, by storing the monthly information in the NAND memories 104A to 104H at each time of counting, the total value (count value) of the number of read commands received is cleared, so that any one month during a certain period can be obtained. Only the read command can be easily grasped.

  In the example described above, only the number of read commands received has been described. Actually, however, monthly information including statistics regarding each of the various monitoring target items described in FIG. 6 is stored in the NAND memory at regular intervals. As described above, in the present embodiment, statistics of various monitoring target items are generated as the monthly information for each predetermined period, and each of the monthly corresponding to a plurality of periods (for example, 5 months) each having the same predetermined period. Information is stored individually in the NAND memory. Thereby, for example, at the time of failure diagnosis of the SSD 10, it is possible to quickly grasp how the SSD 10 was used immediately before the failure and to improve analysis workability.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. In addition, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined.

Claims (8)

An information processing apparatus main body;
A nonvolatile semiconductor memory drive housed in the information processing apparatus main body, the nonvolatile semiconductor memory and a write operation, a read operation of the nonvolatile semiconductor memory in response to a command from the information processing apparatus main body, and Controlling the erase operation, and generating statistical information about the write operation, read operation, and erase operation of the nonvolatile semiconductor memory at regular intervals, each of a plurality of periods each having a time length corresponding to the regular period An information processing apparatus comprising: a non-volatile semiconductor memory drive including control means for storing statistical information corresponding to 1 in a storage area of the non-volatile semiconductor memory.   The control means further generates lifetime statistical information related to a write operation, a read operation, and an erase operation of the nonvolatile semiconductor memory executed during a period from the initial startup of the nonvolatile semiconductor memory drive to the present time, 2. The information processing apparatus according to claim 1, wherein the generated lifetime statistical information is stored in a storage area of the nonvolatile semiconductor memory different from a storage area in which statistical information corresponding to each of the plurality of periods is stored. .   The information processing apparatus according to claim 1, wherein the statistical information generated for each predetermined period includes information regarding the number of times of a write operation, a read operation, and an erase operation executed within the predetermined period.   The statistical information generated every predetermined period includes the number of write commands and read commands received from the information processing apparatus main body within the predetermined period, and the nonvolatile semiconductor memory erased within the predetermined period. The information processing apparatus according to claim 1, which indicates at least the number of blocks. A non-volatile semiconductor memory drive used as an external storage device of an information processing device,
Non-volatile semiconductor memory;
Controls write operation, read operation, and erase operation of the nonvolatile semiconductor memory according to a command from the information processing apparatus, and statistical information regarding the write operation, read operation, and erase operation of the nonvolatile semiconductor memory. Nonvolatile semiconductor comprising: control means for generating statistical information corresponding to each of a plurality of periods, each of which has a time length corresponding to the certain period, and which is generated every certain period and stored in a storage area of the nonvolatile semiconductor memory Memory drive.   The control means further generates lifetime statistical information related to a write operation, a read operation, and an erase operation of the nonvolatile semiconductor memory executed during a period from the initial startup of the nonvolatile semiconductor memory drive to the present time, 6. The nonvolatile semiconductor according to claim 5, wherein the generated lifetime statistical information is stored in a storage area of the nonvolatile semiconductor memory different from a storage area in which statistical information corresponding to each of the plurality of periods is stored. Memory drive.   The non-volatile semiconductor memory drive according to claim 5, wherein the statistical information generated for each predetermined period includes information on the number of times each of a write operation, a read operation, and an erase operation executed within the predetermined period.   The statistical information generated every fixed period includes the number of write commands and read commands received from the information processing device within the fixed period, and the number of write commands and read commands erased within the fixed period in the nonvolatile semiconductor memory. The nonvolatile semiconductor memory drive according to claim 5, wherein the nonvolatile semiconductor memory drive indicates at least the number of blocks.

Images