JP2010507147A - 最悪の場合におけるデータ管理を伴う不揮発性メモリおよびそのための方法 - Google Patents

最悪の場合におけるデータ管理を伴う不揮発性メモリおよびそのための方法 Download PDF

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Publication number
JP2010507147A
JP2010507147A JP2009532520A JP2009532520A JP2010507147A JP 2010507147 A JP2010507147 A JP 2010507147A JP 2009532520 A JP2009532520 A JP 2009532520A JP 2009532520 A JP2009532520 A JP 2009532520A JP 2010507147 A JP2010507147 A JP 2010507147A
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Japan
Prior art keywords
block
data
memory
update
blocks
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Pending
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JP2009532520A
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English (en)
Japanese (ja)
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JP2010507147A5 (enrdf_load_stackoverflow
Inventor
デビッド ベネット，アラン
デビッド ハチソン，ニール
アナトリエヴィッチ ゴロベッツ，セルゲイ
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SanDisk Corp
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SanDisk Corp
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Publication date
Priority claimed from US11/549,035 external-priority patent/US20080091901A1/en
Priority claimed from US11/549,040 external-priority patent/US20080091871A1/en
Application filed by SanDisk Corp filed Critical SanDisk Corp
Publication of JP2010507147A publication Critical patent/JP2010507147A/ja
Publication of JP2010507147A5 publication Critical patent/JP2010507147A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G11C16/105—Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7202—Allocation control and policies
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7205—Cleaning, compaction, garbage collection, erase control
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP2009532520A 2006-10-12 2007-10-08 最悪の場合におけるデータ管理を伴う不揮発性メモリおよびそのための方法 Pending JP2010507147A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/549,035 US20080091901A1 (en) 2006-10-12 2006-10-12 Method for non-volatile memory with worst-case control data management
US11/549,040 US20080091871A1 (en) 2006-10-12 2006-10-12 Non-volatile memory with worst-case control data management
PCT/US2007/080725 WO2008045839A1 (en) 2006-10-12 2007-10-08 Non-volatile memory with worst-case control data management and methods therefor

Publications (2)

Publication Number Publication Date
JP2010507147A true JP2010507147A (ja) 2010-03-04
JP2010507147A5 JP2010507147A5 (enrdf_load_stackoverflow) 2010-11-25

Family

ID=39052642

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009532520A Pending JP2010507147A (ja) 2006-10-12 2007-10-08 最悪の場合におけるデータ管理を伴う不揮発性メモリおよびそのための方法

Country Status (4)

Country Link
JP (1) JP2010507147A (enrdf_load_stackoverflow)
KR (1) KR20090088858A (enrdf_load_stackoverflow)
TW (1) TW200844999A (enrdf_load_stackoverflow)
WO (1) WO2008045839A1 (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012517627A (ja) * 2009-02-12 2012-08-02 株式会社東芝 メモリシステム及びメモリシステムの制御方法

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI413984B (zh) * 2008-10-16 2013-11-01 Silicon Motion Inc 快閃記憶體裝置以及資料更新方法
TWI408689B (zh) * 2009-04-14 2013-09-11 Jmicron Technology Corp 存取儲存裝置的方法及相關控制電路
TWI404071B (zh) * 2009-06-23 2013-08-01 Phison Electronics Corp 能識別快閃記憶體中錯誤資料的控制電路及儲存系統與方法
TWI426528B (zh) * 2009-09-30 2014-02-11 Phison Electronics Corp 用於快閃記憶體的區塊管理方法、控制器與儲存系統
DE102011107435A1 (de) * 2011-07-15 2013-01-17 Giesecke & Devrient Gmbh Verfahren zum Erkennen von gelöschten Speicherbereichen
KR101889298B1 (ko) * 2011-11-08 2018-08-20 삼성전자주식회사 불휘발성 메모리를 포함하는 메모리 장치 및 불휘발성 메모리의 제어 방법
US12293077B2 (en) * 2022-07-06 2025-05-06 Samsung Electronics Co., Ltd. Systems, methods, and devices for using a reclaim unit based on a reference update in a storage device
US20240012579A1 (en) * 2022-07-06 2024-01-11 Samsung Electronics Co., Ltd. Systems, methods, and apparatus for data placement in a storage device
US12197744B2 (en) 2022-12-12 2025-01-14 SanDisk Technologies, Inc. Storage of control data information

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050144365A1 (en) * 2003-12-30 2005-06-30 Sergey Anatolievich Gorobets Non-volatile memory and method with control data management
US20050195821A1 (en) * 2004-03-03 2005-09-08 Samsung Electronics Co., Ltd. Method and apparatus for dynamically controlling traffic in wireless station

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050144365A1 (en) * 2003-12-30 2005-06-30 Sergey Anatolievich Gorobets Non-volatile memory and method with control data management
US20050141312A1 (en) * 2003-12-30 2005-06-30 Sinclair Alan W. Non-volatile memory and method with non-sequential update block management
US20050195821A1 (en) * 2004-03-03 2005-09-08 Samsung Electronics Co., Ltd. Method and apparatus for dynamically controlling traffic in wireless station

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012517627A (ja) * 2009-02-12 2012-08-02 株式会社東芝 メモリシステム及びメモリシステムの制御方法

Also Published As

Publication number Publication date
WO2008045839A1 (en) 2008-04-17
TW200844999A (en) 2008-11-16
KR20090088858A (ko) 2009-08-20

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