JP2010287741A - Lead frame and method of manufacturing the same, and semiconductor device - Google Patents

Lead frame and method of manufacturing the same, and semiconductor device Download PDF

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JP2010287741A
JP2010287741A JP2009140520A JP2009140520A JP2010287741A JP 2010287741 A JP2010287741 A JP 2010287741A JP 2009140520 A JP2009140520 A JP 2009140520A JP 2009140520 A JP2009140520 A JP 2009140520A JP 2010287741 A JP2010287741 A JP 2010287741A
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silver plating
silver
plating layer
lead frame
die pad
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Takeshi Okai
猛 大貝
Keizo Takao
慶蔵 高尾
Akira Takatsuki
昭 高月
Tomoyuki Ariyama
智之 有山
Shinya Kinoshita
慎也 木下
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Nagasaki University NUC
Isahaya Electronics Corp
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Nagasaki University NUC
Isahaya Electronics Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2224/4805—Shape
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
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    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To improve adhesion between a silver plating layer of a lead frame and a mold resin. <P>SOLUTION: The lead frame 21 has a die pad part 22 for fixing a semiconductor chip, an inner lead part 23, and an outer lead part 24. At least on a surface of a wire bonding part 23a of the inner lead part 23, a silver plating layer 28 having a surface roughened is formed by two-stage plating of ground silver plating in which silver nuclei are deposited, and main silver plating. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、リードフレームとその製造方法、及び半導体装置に関する。   The present invention relates to a lead frame, a manufacturing method thereof, and a semiconductor device.

近年、超微細加工技術の進歩により、シリコンウェハから切り出された半導体チップの１個のサイズは、数百μｍレベルにまで小型化でき、半導体集積回路（ＩＣ）やトランジスタ１個のサイズが１ｍｍ程度の超小型製品が作成可能となっている。図１４に、一般的な半導体集積回路（ＩＣ）、大規模集積回路（ＬＳＩ）等の半導体装置の概略構成を示す。この半導体装置１は、リードフレーム２のダイパッド３上にシリコンからなる半導体チップ６が固定され、半導体チップ６のＡｌ電極パッド７とインナーリード部４とが金属細線、例えば金（Ａｕ）細線８によるワイヤボンディングで接続される。そして、半導体装置１は、アウターリード部５を除く全体をモールド樹脂９により封止して構成される。   In recent years, due to advances in ultra-fine processing technology, the size of one semiconductor chip cut out from a silicon wafer can be reduced to a level of several hundred μm, and the size of a semiconductor integrated circuit (IC) or one transistor is about 1 mm. It is possible to create ultra-small products. FIG. 14 shows a schematic configuration of a semiconductor device such as a general semiconductor integrated circuit (IC) or a large scale integrated circuit (LSI). In this semiconductor device 1, a semiconductor chip 6 made of silicon is fixed on a die pad 3 of a lead frame 2, and an Al electrode pad 7 and an inner lead portion 4 of the semiconductor chip 6 are formed by a thin metal wire, for example, a gold (Au) thin wire 8. Connected by wire bonding. The semiconductor device 1 is configured by sealing the whole except for the outer lead portion 5 with a mold resin 9.

リードフレーム２は、そのリードフレーム本体２ａが、銅合金（Ｃｕ−Ｎｉ合金）あるいは鉄合金（Ｆｅ−Ｎｉ合金）などで形成され、半導体チップとの接着および金細線とのワイヤボンディングのために、ダイパッド部３の表面及びインナーリード部４のワイヤボンディング部の表面に、銀（Ａｇ）めっき層１１が形成される。モールド樹脂９の樹脂材としては、例えば、ハロゲンフリー型熱硬化性エポキシ樹脂が用いられる。   The lead frame 2 has a lead frame body 2a formed of a copper alloy (Cu—Ni alloy) or an iron alloy (Fe—Ni alloy), etc., for bonding with a semiconductor chip and wire bonding with a gold thin wire. A silver (Ag) plating layer 11 is formed on the surface of the die pad portion 3 and the surface of the wire bonding portion of the inner lead portion 4. As the resin material of the mold resin 9, for example, a halogen-free thermosetting epoxy resin is used.

半導体チップをリードフレーム上に配置し、金属細線によりヤイヤボンディングした後、全体を樹脂モールドしてなる半導体装置は、例えば特許文献１などで一般に知られている。   A semiconductor device in which a semiconductor chip is placed on a lead frame, subjected to diamond bonding with a thin metal wire, and then entirely molded with a resin is generally known from, for example, Patent Document 1.

特開平２００９−４９０７２号公報JP 2009-49072 A

ところで、大規模集積回路（ＬＳＩ）、半導体集積回路（ＩＣ）やトランジスタ等の半導体装置においては、サイズの超小型化と共に、信号処理速度も高速化してきている。これに伴い、素子からの発熱および半田の鉛フリー化によるリフロー温度の上昇等に起因して、リードフレームとモールド樹脂との剥離現象による品質劣化が問題となっている。   Incidentally, in a semiconductor device such as a large scale integrated circuit (LSI), a semiconductor integrated circuit (IC), or a transistor, the signal processing speed has been increased along with the miniaturization of the size. Along with this, quality deterioration due to a peeling phenomenon between the lead frame and the mold resin has become a problem due to heat generation from the element and an increase in reflow temperature due to lead-free solder.

半導体装置の組み立て工程では、リードフレームのダイパッド部上に半導体（Ｓｉ）チップを接着するダイボンディング工程、半導体チップとインナーリード部を金（Ａｕ）線で接続するワイヤボンディング工程、さらにアウターリード部以外を熱硬化性エポキシ樹脂により封止するモールディング工程の３工程に大きく分類される。半導体装置のパッケージ技術と実装技術は、半導体素子が飛躍的に高集積化可能となったことや、パッケージを高密度に実装したいというニーズなどから画期的な発展を続けている。   In the assembly process of the semiconductor device, a die bonding process in which a semiconductor (Si) chip is bonded onto the die pad part of the lead frame, a wire bonding process in which the semiconductor chip and the inner lead part are connected with gold (Au) wire, and other than the outer lead part Is roughly classified into three steps, a molding step for sealing the substrate with a thermosetting epoxy resin. The packaging technology and mounting technology of semiconductor devices continue to be epoch-making due to the fact that semiconductor devices can be dramatically integrated and the need to mount packages at high density.

しかし、半導体素子の高集積化とプリント基板への実装方式の変化により発熱が増大し、熱放散が困難となり、樹脂モールドによるプラスチックパッケージタイプの半導体装置の信頼性が低下している。そのため、リードフレームは、従来より多用されてきた４２合金（Ｆｅ−４２％Ｎｉ合金）から高熱伝導性の銅合金リードフレームが主流となってきている。一方、封止用エポキシ樹脂の多くは、ガラス転移点温度が半田付け温度よりも低く、リフロー半田付け時に樹脂密着強度が低下してしまう。   However, high integration of semiconductor elements and a change in mounting method on a printed circuit board increase heat generation, making it difficult to dissipate heat, and reducing the reliability of plastic package type semiconductor devices using resin molding. For this reason, lead alloys having a high thermal conductivity from the 42 alloy (Fe-42% Ni alloy), which has been widely used in the past, have become the mainstream. On the other hand, many of the epoxy resins for sealing have a glass transition temperature lower than the soldering temperature, and the resin adhesion strength decreases during reflow soldering.

従来、上述した剥離現象は、次のように考えられていた。リードフレームをハロゲンフリー型熱硬化性エポキシ樹脂でモールドする際、２００℃付近までの加熱が必要であり、また、製品使用時の素子からの発熱量の増大および半田の鉛フリー化でリフロー温度が上昇する。これに伴い、外部からモールド樹脂、あるいはモールド樹脂とリードフレーム本体との界面を通じて侵入した水分が、モールド樹脂とリードフレーム本体との界面で蒸発し、膨張し、上記界面から剥離が起こるものと考えられていた。剥離が起こると、ワイヤボンディングされているＡｕ細線が断線し、不良となる。   Conventionally, the above-described peeling phenomenon has been considered as follows. When molding the lead frame with a halogen-free thermosetting epoxy resin, it is necessary to heat up to around 200 ° C, and the reflow temperature is increased due to an increase in the amount of heat generated from the element during use of the product and the use of lead-free solder. To rise. Along with this, it is considered that moisture that has entered from the outside through the mold resin or the interface between the mold resin and the lead frame body evaporates and expands at the interface between the mold resin and the lead frame body, and peeling occurs from the above interface. It was done. When delamination occurs, the Au fine wire bonded by wire bonding is disconnected and becomes defective.

本発明者らは、剥離現象をさらに詳しく検証した結果、銀めっき層と樹脂との密着性が非常に弱く、この銀めっき層と樹脂間での剥離によってＡｕ細線の断線が顕著に起こることを突き止めた。また、銀めっき層の表面が、リードフレーム本体、例えば銅合金リードフレームの表面に比べて平滑面であることも突き止めた。銀めっき等の貴金属めっきは、難しい技術であり、通常毒性の強いシアン系のアルカリ性めっき浴を用いて行われる。通常、金属めっきは表面が平滑面となるような条件で行われ、シアン系めっき浴を用いた銀めっき層においても、表面が平滑面に形成される。   As a result of examining the peeling phenomenon in more detail, the present inventors have found that the adhesion between the silver plating layer and the resin is very weak, and the disconnection of the Au fine wire is noticeably caused by the peeling between the silver plating layer and the resin. I found it. It has also been found that the surface of the silver plating layer is smoother than the surface of the lead frame main body, for example, a copper alloy lead frame. Noble metal plating such as silver plating is a difficult technique and is usually performed using a highly alkaline cyan-based alkaline plating bath. Usually, the metal plating is performed under the condition that the surface becomes a smooth surface, and the surface is formed on the smooth surface even in the silver plating layer using the cyan plating bath.

本発明は、上述の点に鑑み、リードフレームにおける銀めっき層とモールド樹脂との密着性が向上する、リードフレームとその製造方法を提供するものである。
また、本発明は、かかるリードフレームを用いて高信頼性化を図った半導体装置を提供するものである。 In view of the above points, the present invention provides a lead frame and a method for manufacturing the lead frame in which the adhesion between the silver plating layer and the mold resin in the lead frame is improved.
The present invention also provides a semiconductor device that achieves high reliability using such a lead frame.

本発明に係るリードフレームは、半導体チップを固定するダイパット部と、インナーリード部と、アウターリード部とを有し、少なくともインナーリード部のワイヤボンディング部の表面に、銀の結晶核を析出する下地銀めっきと本銀めっきの２段階銀めっきによる表面が粗面化された銀めっき層が形成されて成ることを特徴とする。   A lead frame according to the present invention has a die pad portion for fixing a semiconductor chip, an inner lead portion, and an outer lead portion, and deposits silver crystal nuclei at least on the surface of the wire bonding portion of the inner lead portion. A silver plating layer having a roughened surface by two-stage silver plating of base silver plating and main silver plating is formed.

本発明のリードフレームでは、少なくともインナーリード部のワイヤボンディング部の表面に、２段階銀めっきによる表面が粗面化された銀めっき層が形成されるので、樹脂モールドした樹脂と銀めっき層との密着強度が向上する。   In the lead frame of the present invention, since a silver plating layer having a roughened surface by two-step silver plating is formed on at least the surface of the wire bonding portion of the inner lead portion, the resin-molded resin and the silver plating layer Adhesion strength is improved.

本発明に係るリードフレームの製造方法は、半導体チップを固定するダイパット部と、インナーリード部と、アウターリード部を有するリードフレーム本体を形成する工程と、少なくともインナーリード部のワイヤボンディング部の表面に、非シアン系銀めっき浴を用い、銀の結晶核を析出する前段の下地銀めっきと、後段の本銀めっきとの２段階銀めっきにより、表面が粗面化された銀めっき層を形成する工程とを有することを特徴とする。   The lead frame manufacturing method according to the present invention includes a step of forming a lead pad main body having a die pad portion for fixing a semiconductor chip, an inner lead portion, and an outer lead portion, and at least a surface of a wire bonding portion of the inner lead portion. Using a non-cyan-based silver plating bath, a surface-roughened silver plating layer is formed by two-stage silver plating, which is a first-stage base silver plating for precipitating silver crystal nuclei and a second-stage main silver plating. And a process.

本発明のリードフレームの製造方法では、インナーリード部のワイヤボンディング部の表面に対して、前段の下地銀めっきで銀の結晶核を析出し、その後に銀の本めっきを行うことにより、所要の膜厚を有し表面が粗面化した銀めっき層を形成することができる。非シアン系銀めっき浴を用いるので、環境にも優しい。   In the method for manufacturing a lead frame of the present invention, the surface of the wire bonding portion of the inner lead portion is precipitated with silver crystal nuclei by the base silver plating in the previous stage, and then the main plating of silver is performed, thereby obtaining the required A silver plating layer having a film thickness and a roughened surface can be formed. Since non-cyanide silver plating bath is used, it is environmentally friendly.

本発明に係る半導体装置は、ダイパット部と、インナーリード部と、アウターリード部とを有し、少なくともインナーリード部のワイヤボンディング部の表面に、銀の結晶核を析出する下地銀めっきと、本銀めっきの２段階銀めっきによる表面が粗面化された銀めっき層が形成されてなるリードフレームと、ダイパッド上に固定され、前記インナーリード部の銀メッキ層との間で金属細線によりワイヤボンディングされた半導体チップと、半導体チップ、インナーリード部及び金属細線の全体を封止するモールド樹脂とを有して成ることを特徴とする。   A semiconductor device according to the present invention has a die pad portion, an inner lead portion, and an outer lead portion, and at least a base silver plating for depositing silver crystal nuclei on the surface of the wire bonding portion of the inner lead portion, Wire bonding is performed between the lead frame formed with a silver plating layer having a roughened surface by two-stage silver plating and fixed on the die pad, with a fine metal wire between the silver plating layer of the inner lead portion. And a mold resin that seals the semiconductor chip, the inner lead portion, and the entire thin metal wire.

本発明の半導体装置では、少なくともインナーリード部のワイヤボンディング部の表面に、２段階銀めっきによる表面が粗面化された銀めっき層を形成したリードフレームが用いられるので、樹脂モールドした樹脂とインナーリード部の銀めっき層との密着強度が上がり、樹脂と銀めっき層の界面からの剥離がし難くなる。   In the semiconductor device of the present invention, a lead frame in which a silver plating layer having a roughened surface by two-step silver plating is formed on at least the surface of the wire bonding portion of the inner lead portion is used. The adhesion strength between the lead portion and the silver plating layer is increased, and peeling from the interface between the resin and the silver plating layer is difficult.

本発明に係るリードフレームによれば、インナーリード部のボンディング部に、表面が粗面化した銀めっき層が形成されるので、この銀めっき層と樹脂モールドした樹脂との密着性を向上することができる。従って、半導体装置に適用したとき、リードフレームとモールド樹脂との剥離を抑制することができる。   According to the lead frame of the present invention, since the silver plating layer having a rough surface is formed at the bonding portion of the inner lead portion, the adhesion between the silver plating layer and the resin-molded resin can be improved. Can do. Accordingly, when applied to a semiconductor device, peeling between the lead frame and the mold resin can be suppressed.

本発明に係るリードフレームの製造方法によれば、銀の結晶核を析出する下地銀めっきと、本銀めっきの２段階銀めっきにより、インナーリード部のボンディング部の表面に、所要の膜厚で表面が粗面化した銀めっき層を形成することができる。従って、モールド樹脂と、インナーリード部の銀めっき層との密着性が向上するリードフレームを製造することができる。   According to the manufacturing method of the lead frame according to the present invention, the surface of the bonding part of the inner lead part is formed with a required film thickness by the two-step silver plating of the base silver plating for depositing silver crystal nuclei and the main silver plating. A silver plating layer having a roughened surface can be formed. Therefore, it is possible to manufacture a lead frame that improves the adhesion between the mold resin and the silver plating layer of the inner lead portion.

本発明に係る半導体装置によれば、上記リードフレームを用いて構成されるので、リードフレームのワイヤボンディング部の銀めっき層と、モールド樹脂との密着性が向上し、樹脂と銀めっき層との界面からの剥離が抑制され、信頼性の高い半導体装置を提供することができる。   According to the semiconductor device of the present invention, since the lead frame is used, the adhesion between the silver plating layer of the wire bonding portion of the lead frame and the mold resin is improved, and the resin and the silver plating layer Separation from the interface is suppressed, and a highly reliable semiconductor device can be provided.

Ａ，Ｂ 本発明に係るリードフレームの一実施の形態を示す概略構成図およびそのＡ−Ａ線上の拡大断面図である。1A and 1B are a schematic configuration diagram showing an embodiment of a lead frame according to the present invention and an enlarged cross-sectional view along the line A-A. Ａ〜Ｅ 本発明に係るリードフレームの製造方法の実施の形態を示す製造工程図である。A to E are manufacturing process diagrams showing an embodiment of a method for manufacturing a lead frame according to the present invention. Ａ，ＢおよびＣ 本発明に係る半導体装置の一実施の形態を示す概略構成図、その領域Ａの拡大断面図およびその領域Ｂの拡大断面図である。A, B, and C are a schematic configuration diagram showing an embodiment of a semiconductor device according to the present invention, an enlarged sectional view of a region A, and an enlarged sectional view of a region B. 本発明の検証に用いた試料の斜視図である。It is a perspective view of the sample used for verification of the present invention. 本発明の検証に用いた係る非シアン系銀めっきのめっき装置の概略構成図である。It is a schematic block diagram of the plating apparatus of the non-cyan system silver plating used for verification of this invention. 各サンプルにおける樹脂密着性と表面粗さＲａの関係を示すグラフである。It is a graph which shows the relationship between resin adhesiveness and surface roughness Ra in each sample. 本発明の説明に供する銀めっきの断面組織観察図である。It is a cross-sectional structure | tissue observation figure of the silver plating provided for description of this invention. 本発明の検証に係る６種類の銀めっきサンプルの表面外観図（写真）である。It is the surface external view (photograph) of six types of silver plating samples which concern on verification of this invention. Ａ〜Ｃ 本発明の検証に係るダイボンディング外観図（写真）と、ダイシェア強度および破断モード図（写真）である。AC is a die bonding external view (photograph), die shear strength and fracture mode diagram (photograph) according to verification of the present invention. Ａ〜Ｃ 本発明の検証に係るワイヤボンディング外観図（写真）と、ワイヤプル強度および破断モード図（写真）である。AC is a wire bonding external view (photograph) and wire pull strength and fracture mode diagram (photograph) according to verification of the present invention. ダイシェア強度と銀めっき条件（銀めっき膜厚）の関係を示すグラフである。It is a graph which shows the relationship between die shear strength and silver plating conditions (silver plating film thickness). ワイヤプル強度と銀めっき条件（銀めっき膜厚）の関係を示すグラフである。It is a graph which shows the relationship between wire pull strength and silver plating conditions (silver plating film thickness). 表面粗さＲａの定義の説明に供する説明図である。It is explanatory drawing with which it uses for description of the definition of surface roughness Ra. 従来の半導体装置を示す概略構成図である。It is a schematic block diagram which shows the conventional semiconductor device.

以下、図面を参照して本発明の実施の形態を説明する。   Embodiments of the present invention will be described below with reference to the drawings.

本発明の実施の形態では、リードフレームのワイヤボンディング部における銀めっき層とモールド樹脂との密着性を強化するために、銀めっき層表面の粗面化に着目した。しかし、従来のリードフレームの銀めっきは、シアン系銀めっき浴を用いて表面を平滑面にする銀めっきであり、表面粗化することを考えていない。本実施の形態は、シアンを全く含まない非シアン系銀めっき浴を用い、しかも２段階銀めっき工程により銀めっき層の表面粗化を可能にしたリードフレームの表面処理方法を開発した。同時に本実施の形態における銀めっき層は、ダイボンディング特性、ワイヤボンディング特性が使用に耐えるもの、あるいは従来のシアン系銀めっき浴で得られる基準レベルを超える特性を有するものである。この２段階銀めっきは、後で詳述するが、初めに、銀イオン濃度が低い非シアン系銀めっき浴を用いて、銀の結晶核のみを析出する下地銀めっき（以下、ストライク銀めっきという）とする。次に、前段のストライク銀めっき浴より銀イオン濃度が高い非シアン系銀めっき浴を用いて銀の本めっきを行うようにする。   In the embodiment of the present invention, attention has been paid to the roughening of the surface of the silver plating layer in order to enhance the adhesion between the silver plating layer and the mold resin in the wire bonding portion of the lead frame. However, the conventional silver plating of a lead frame is a silver plating that uses a cyan silver plating bath to smooth the surface, and does not consider surface roughening. In the present embodiment, a lead frame surface treatment method has been developed that uses a non-cyan silver plating bath that does not contain cyan at all, and that allows the surface of the silver plating layer to be roughened by a two-step silver plating process. At the same time, the silver plating layer in the present embodiment has a die bonding characteristic and a wire bonding characteristic that can withstand use, or a characteristic that exceeds a reference level obtained with a conventional cyan-based silver plating bath. This two-stage silver plating will be described in detail later. First, a base silver plating (hereinafter referred to as strike silver plating) in which only silver crystal nuclei are precipitated using a non-cyan silver plating bath having a low silver ion concentration. ). Next, the main silver plating is performed using a non-cyanide silver plating bath having a higher silver ion concentration than the strike silver plating bath in the previous stage.

図１に、本発明に係るリードフレームの実施の形態を示す。図１Ａは平面図、図１Ｂは図１ＡのＡ−Ａ線上の拡大断面図である。本実施の形態に係るリードフレーム２１は、半導体チップが接着固定されるダイパッド部２２と、複数のインナーリード部２３と、インナーリード部２３より延長したアウターリード部２４を有し、この単位が、両側に設けた一対の外枠２５に連結されて複数配列して構成される。インナーリード部２３とアウターリード部２４との境を横切るようにモールド樹脂の流れ止めに供するダムバー２６が一体に設けられ、このダムバー２６が外枠２５に連結される。また、ダイパッド２２は、連結部２７を介して外枠２５に連結される。   FIG. 1 shows an embodiment of a lead frame according to the present invention. 1A is a plan view, and FIG. 1B is an enlarged cross-sectional view taken along line AA in FIG. 1A. The lead frame 21 according to the present embodiment includes a die pad part 22 to which a semiconductor chip is bonded and fixed, a plurality of inner lead parts 23, and an outer lead part 24 extended from the inner lead part 23. A plurality of outer frames 25 connected to a pair of both sides are arranged and arranged. A dam bar 26 is provided integrally with the inner lead portion 23 and the outer lead portion 24 so as to cross the boundary between the inner lead portion 23 and the outer lead portion 24, and the dam bar 26 is connected to the outer frame 25. Further, the die pad 22 is connected to the outer frame 25 via the connecting portion 27.

本実施の形態においては、少なくともインナーリード部２３の先端に位置するワイヤボンディング部２３ａの表面に、選択に表面が粗面化した銀めっき層２８が形成される。本例では、ワイヤボンディング部２３ａの表面の銀めっき層２８と共に、ダイパッド部２２の半導体チップが接着する表面にも、表面が粗面化した銀めっき層２９が形成される。これら両銀めっき層２８，２９は、同じめっき工程で同時に形成される。   In the present embodiment, a silver plating layer 28 having a selectively roughened surface is formed at least on the surface of the wire bonding portion 23 a located at the tip of the inner lead portion 23. In this example, the silver plating layer 29 having a roughened surface is formed on the surface of the die pad portion 22 where the semiconductor chip is bonded together with the silver plating layer 28 on the surface of the wire bonding portion 23a. Both the silver plating layers 28 and 29 are formed simultaneously in the same plating process.

銀めっき層２８、２９は、非シアン系銀めっき浴を用いた２段階銀めっきによる表面が粗面化した銀めっき層として形成される。すなわち、前段の銀イオン濃度が低いめっき浴を用いたストライク銀めっきにより、上記ワイヤボンディング部２３ａの表面、およびダイパッド２２の表面に銀の結晶核が析出する。次に、この銀の結晶核が析出されたワイヤボンディング部２３ａおよびダイパッド部２２の表面に、銀イオン濃度が高いめっき浴を用いた後段の本銀めっきすることにより、表面が粗面化された所要の膜厚の銀めっき層２８，２９が形成される。   The silver plating layers 28 and 29 are formed as silver plating layers having a roughened surface by two-step silver plating using a non-cyan silver plating bath. That is, silver crystal nuclei are precipitated on the surface of the wire bonding portion 23 a and the surface of the die pad 22 by strike silver plating using a plating bath having a low silver ion concentration in the previous stage. Next, the surface of the wire bonding portion 23a and the die pad portion 22 on which the silver crystal nuclei were deposited was roughened by subjecting the main silver plating at a later stage using a plating bath having a high silver ion concentration. Silver plating layers 28 and 29 having a required film thickness are formed.

非シアン系銀めっき浴の一例を示す。この例の非シアン系銀めっき浴は、メタンスルホン酸と、メタンスルホン酸銀と、水（Ｈ２Ｏ）とから成り、例えばｐＨが２程度の強酸性の溶液で形成される。メタンスルホン酸銀の含有量を制御して、ストライク銀めっきに適した銀イオン濃度、本銀めっきに適した銀イオン濃度を設定することができる。ストライク銀めっきのめっき浴の銀イオンＡｇ＋濃度としては、例えば３ｇ／ｌ、本銀めっきのめっき浴の銀イオンＡｇ＋濃度としては、例えば３０ｇ／ｌ程度とすることができる。この濃度は適宜変更可能である。 An example of a non-cyan silver plating bath is shown. The non-cyan silver plating bath of this example is composed of methanesulfonic acid, silver methanesulfonate, and water (H 2 O), and is formed of a strongly acidic solution having a pH of about 2, for example. By controlling the content of silver methanesulfonate, a silver ion concentration suitable for strike silver plating and a silver ion concentration suitable for main silver plating can be set. The silver ion Ag + concentration of the strike silver plating bath can be, for example, 3 g / l, and the silver ion Ag + concentration of the main silver plating bath can be, for example, about 30 g / l. This concentration can be changed as appropriate.

銀めっき層２８、２９の表面粗さＲａは、後述の検証で明らかであるが、モールド樹脂、例えば熱硬化性エポキシ樹脂との密着性を確保するために、１．１５μｍ≦Ｒａ≦２．１１μｍに設定する。表面粗さＲａが１．１５μｍ未満であると、密着性が２ＭＰａ未満となり、十分な密着性が得られない。表面粗さＲａが２．１１μｍを超えると、銀めっき自体の付きが悪くなり、めっき剥がれが生じる。   The surface roughness Ra of the silver plating layers 28 and 29 is apparent from the following verification, but 1.15 μm ≦ Ra ≦ 2.11 μm in order to ensure adhesion with a mold resin, for example, a thermosetting epoxy resin. Set to. When the surface roughness Ra is less than 1.15 μm, the adhesion is less than 2 MPa, and sufficient adhesion cannot be obtained. When the surface roughness Ra exceeds 2.11 μm, the adhesion of the silver plating itself is deteriorated and the plating is peeled off.

銀めっき層２８，２９の膜厚ｔは、後述の検証で明らかであるが、ワイヤボンディング特性、ダイボンディング特性、すなわち銀めっき層とボンディングワイヤとの接着強度であるワイヤプル強度、銀めっき層と半導体チップとの接着強度であるダイシェア強度に影響する。銀めっき層２８、２９の膜厚ｔは、４．５μｍ≦ｔ≦２３．０μｍに設定する。膜厚ｔが４．５μｍ未満であると、ボンディング特性において、ボンディングワイヤの金属、例えば金（Ａｕ）と溶着し難い。膜厚ｔが２３．μｍを超えると、銀めっきの内部応力発生により、銀めっきが剥がれてしまう。   The film thickness t of the silver plating layers 28 and 29 is apparent from the later-described verification. However, the wire bonding characteristics and the die bonding characteristics, that is, the wire pull strength which is the adhesive strength between the silver plating layer and the bonding wire, the silver plating layer and the semiconductor. It affects the die shear strength, which is the adhesive strength with the chip. The film thickness t of the silver plating layers 28 and 29 is set to 4.5 μm ≦ t ≦ 23.0 μm. When the film thickness t is less than 4.5 μm, it is difficult to weld a bonding wire metal such as gold (Au) in bonding characteristics. The film thickness t is 23. When it exceeds μm, the silver plating is peeled off due to the generation of internal stress of the silver plating.

図２に、本実施の形態に係るリードフレーム２１の製造方法の一例を示す。図２は、図１のＡ−Ａ線上の断面に対応する。先ず、図２Ａに示すように、リードフレーム本体２１Ａを形成する。このリードフレーム本体２１Ａは、例えば銅合金の薄板からなり、図１に示したと同様の構成、すなわち半導体チップを接着し固定するダイパッド部２２と、インナーリード部２３と、インナーリード部２３より延長するアウターリード部２４を有する。   FIG. 2 shows an example of a manufacturing method of the lead frame 21 according to the present embodiment. FIG. 2 corresponds to a cross section on the line AA of FIG. First, as shown in FIG. 2A, a lead frame main body 21A is formed. The lead frame main body 21A is made of, for example, a copper alloy thin plate, and extends from the die pad portion 22, the inner lead portion 23, and the inner lead portion 23 that have the same configuration as shown in FIG. An outer lead portion 24 is provided.

次に、図２Ｂに示すように、銀めっき層を形成すべきダイパッド部２２およびインナーリード部２３の先端のワイヤボンディン部２３ａを除く、他の表面全面に耐めっき用マスク３１を被着形成する。   Next, as shown in FIG. 2B, an anti-plating mask 31 is formed on the entire surface except for the die pad portion 22 where the silver plating layer is to be formed and the wire bond portion 23a at the tip of the inner lead portion 23. To do.

次に、図２Ｃに示すように、このリードフレーム本体２１Ａを、銀イオン濃度が本めっき浴の銀イオン濃度より低い非シアン系銀めっき浴中に配置し、所要の電流、所要の時間でストライク銀めっきを施す。このストライク銀めっきにより、ダイパッド部２２およびインナーリード部２３のワイヤボンディン部２３ａの表面上にそれぞれ銀の結晶核２９Ｂ、２８Ｂが析出する。   Next, as shown in FIG. 2C, this lead frame main body 21A is placed in a non-cyan silver plating bath whose silver ion concentration is lower than the silver ion concentration of the main plating bath, and strikes at a required current and a required time. Apply silver plating. By this strike silver plating, silver crystal nuclei 29B and 28B are deposited on the surface of the wire bond portion 23a of the die pad portion 22 and the inner lead portion 23, respectively.

次に、図２Ｄに示すように、銀の結晶核２９Ｂ、２８Ｂが析出したリードフレーム本体２１を、銀イオン濃度が高い非シアン系銀めっき浴中に配置し、所要の電流、所要の時間で本銀めっきを施す。これにより、インナーリード部２３のワイヤボンディング部２３ａの表面、およびダイパッド部２２の表面に、それぞれ表面粗さＲａが１．１５μｍ≦Ｒａ≦２．１１μｍに設定され、膜厚ｔが４．５μｍ≦ｔ≦２３．０μｍに設定された、銀めっき層２８および２９を形成する。   Next, as shown in FIG. 2D, the lead frame main body 21 on which the silver crystal nuclei 29B and 28B are deposited is placed in a non-cyanide silver plating bath having a high silver ion concentration, and at a required current and a required time. Apply this silver plating. Thereby, the surface roughness Ra is set to 1.15 μm ≦ Ra ≦ 2.11 μm on the surface of the wire bonding portion 23 a of the inner lead portion 23 and the surface of the die pad portion 22, respectively, and the film thickness t is 4.5 μm ≦ Silver plating layers 28 and 29 set to t ≦ 23.0 μm are formed.

次に、図２Ｅに示すように、耐めっき用マスク３１を除去して、目的とするリードフレーム２１を得る。   Next, as shown in FIG. 2E, the plating-resistant mask 31 is removed to obtain the target lead frame 21.

上述の本実施の形態に係るリードフレーム２１によれば、少なくともインナーリード部２３のワイヤボンディング部２３ａの表面に２段階銀めっきにより、表面が粗面化された銀めっき層２８が形成される。このように、インナーリード部２３のワイヤボンディング部２３ａ上に粗面化した銀めっき層２８を有することにより、モールド樹脂と銀めっき層２８との密着性を向上することができる。特に、表面粗さＲａが１．１５μｍ≦Ｒａ≦２．１１μｍである銀めっき層２８を形成することにより、モールド樹脂との密着強度が向上する。従って、本実施の形態のリードフレーム２１をプラスチックパケージタイプの半導体装置に適用したときに、リードフレーム、特にインナーリード部２３の銀めっき層２８とモールド樹脂との界面での剥離を抑制することができる。   According to the above-described lead frame 21 according to the present embodiment, the silver plating layer 28 having a roughened surface is formed on at least the surface of the wire bonding portion 23a of the inner lead portion 23 by two-step silver plating. Thus, by having the roughened silver plating layer 28 on the wire bonding part 23a of the inner lead part 23, the adhesiveness of mold resin and the silver plating layer 28 can be improved. In particular, by forming the silver plating layer 28 having a surface roughness Ra of 1.15 μm ≦ Ra ≦ 2.11 μm, the adhesion strength with the mold resin is improved. Therefore, when the lead frame 21 of the present embodiment is applied to a plastic package type semiconductor device, it is possible to suppress peeling at the interface between the lead frame, particularly the silver plating layer 28 of the inner lead portion 23 and the mold resin. it can.

本実施の形態に係るリードフレーム２１によれば、インナーリード部２３のワイヤボンディング部２３の表面およびダイパッド部２２の表面に、膜厚ｔが４．５μｍ≦ｔ≦２３．０μｍの銀めっき層２８および２９が形成されるので、基準レベル以上のワイヤプル強度、ダイシェア強度が得られる。   According to the lead frame 21 according to the present embodiment, the silver plating layer 28 having a film thickness t of 4.5 μm ≦ t ≦ 23.0 μm is formed on the surface of the wire bonding portion 23 of the inner lead portion 23 and the surface of the die pad portion 22. And 29 are formed, wire pull strength and die shear strength exceeding the reference level can be obtained.

そして、本実施の形態では、表面粗さＲａが１．１５μｍ≦Ｒａ≦２．１１μｍ、膜厚ｔが４．５μｍ≦ｔ≦２３．０μｍにそれぞれ設定された銀めっき層２８および２９を有するので、モールド樹脂との剥離を抑制するとともに、ワイヤボンディング特性およびダイボンディング特性に優れたリードフレームを提供することができる。   In this embodiment, since the surface roughness Ra is 1.15 μm ≦ Ra ≦ 2.11 μm and the film thickness t is 4.5 μm ≦ t ≦ 23.0 μm, the silver plating layers 28 and 29 are provided. In addition, it is possible to provide a lead frame that is excellent in wire bonding characteristics and die bonding characteristics while suppressing peeling from the mold resin.

本実施の形態に係るリードフレームの製造方法によれば、２段階めっきを用いることにより少なくともインナーリード部２３のワイヤボンディング部２３ａの表面に、表面が粗面化した銀めっき層２８を形成することができるので、モールド樹脂との剥離を抑制できるリードフレームを製造することができる。特に、表面粗さＲａが１．１５μｍ≦Ｒａ≦２．１１μｍである銀めっき層２８を形成することにより、モールド樹脂との密着強度が向上したリードフレームを製造することができる。   According to the lead frame manufacturing method of the present embodiment, the silver plating layer 28 having a roughened surface is formed on at least the surface of the wire bonding portion 23a of the inner lead portion 23 by using two-step plating. Therefore, a lead frame that can suppress peeling from the mold resin can be manufactured. In particular, by forming the silver plating layer 28 having a surface roughness Ra of 1.15 μm ≦ Ra ≦ 2.11 μm, a lead frame with improved adhesion strength with the mold resin can be manufactured.

また、本実施の形態では、２段階銀めっきにより表面粗さＲａが１．１５≦Ｒａ≦２．１１、膜厚ｔが４．５μｍ≦ｔ≦２３．０μｍにそれぞれ設定された銀めっき層２８および２９を同時に形成することができるので、モールド樹脂との剥離を抑制するとともに、ワイヤボンディング特性およびダイボンディング特性に優れたリードフレームを製造することができる。
さらに、銀めっき浴として非シアン系銀めっき浴を用いるので、環境負荷を低減することができる。 In the present embodiment, the silver plating layer 28 in which the surface roughness Ra is set to 1.15 ≦ Ra ≦ 2.11 and the film thickness t is set to 4.5 μm ≦ t ≦ 23.0 μm by two-stage silver plating, respectively. And 29 can be formed at the same time, so that it is possible to manufacture a lead frame that is excellent in wire bonding characteristics and die bonding characteristics, while suppressing peeling from the mold resin.
Furthermore, since a non-cyan-based silver plating bath is used as the silver plating bath, the environmental load can be reduced.

なお、上例ではリードフレーム本体２１Ａを銅合金薄板で形成したが、その他、例えば鉄合金薄板などの金属薄板でリードフレーム本体を形成した場合にも、本発明は適用できる。   In the above example, the lead frame main body 21A is formed of a copper alloy thin plate, but the present invention can also be applied to a case where the lead frame main body is formed of a metal thin plate such as an iron alloy thin plate.

図３に、本発明に係る半導体装置の実施の形態を示す。図３Ａは全体の概略構成図、図３Ｂはリードフレームのワイヤボンディングされた部分の拡大断面図、図３Ｃは半導体チップがダイボンディングされた部分の拡大断面図である。   FIG. 3 shows an embodiment of a semiconductor device according to the present invention. 3A is an overall schematic configuration diagram, FIG. 3B is an enlarged cross-sectional view of a wire-bonded portion of a lead frame, and FIG. 3C is an enlarged cross-sectional view of a portion where a semiconductor chip is die-bonded.

本実施の形態に係る半導体装置３３は、上述したリードフレーム２１を用いて構成される。すなわち、このリードフレーム２１は、少なくともインナーリード部２３のワイヤボンディング部２３ａ上に表面が粗面化した銀めっき層２８が形成される。本例では上記ワイヤボンディング部２３ａ上とダイパッド部２２上に、表面粗さＲａが１．１５≦Ｒａ≦２．１１、膜厚ｔが４．５μｍ≦ｔ≦２３．０μｍにそれぞれ設定された銀めっき層２８および２９が形成される。   The semiconductor device 33 according to the present embodiment is configured using the lead frame 21 described above. That is, in the lead frame 21, a silver plating layer 28 having a roughened surface is formed at least on the wire bonding portion 23a of the inner lead portion 23. In this example, the silver whose surface roughness Ra is set to 1.15 ≦ Ra ≦ 2.11 and the film thickness t is set to 4.5 μm ≦ t ≦ 23.0 μm on the wire bonding portion 23a and the die pad portion 22, respectively. Plating layers 28 and 29 are formed.

リードフレーム２１におけるダイパッド２２の銀めっき層２９上に、半導体チップ３４が固定される。すなわち、リードフレームが４００℃に加熱された状態で半導体チップ（Ｓｉチップ）を乗せると、半導体チップ下面にスパッタ被覆されているＡｕ膜とＳｉチップが３８０℃で共晶反応により溶融し、Ｓｉチップがリードフレームに溶着される。一方、半導体チップ３４の電極パッド３５とインナーリード部２３のワイヤボンディング部２３ａとが、金属細線、例えば金（Ａｕ）細線３６のワイヤボンディングにより接続される。そして、アウターリード部２４を除いて、半導体チップ３４、リードフレーム２１及び金（Ａｕ）細線３６を含む全体がモールド樹脂、例えば熱硬化性エポキシ樹脂３７にて封止される。   A semiconductor chip 34 is fixed on the silver plating layer 29 of the die pad 22 in the lead frame 21. That is, when a semiconductor chip (Si chip) is placed while the lead frame is heated to 400 ° C., the Au film and the Si chip that are sputter coated on the lower surface of the semiconductor chip are melted by a eutectic reaction at 380 ° C. Is welded to the lead frame. On the other hand, the electrode pad 35 of the semiconductor chip 34 and the wire bonding portion 23a of the inner lead portion 23 are connected by wire bonding of a metal thin wire, for example, a gold (Au) thin wire 36. The entire structure including the semiconductor chip 34, the lead frame 21, and the gold (Au) thin wire 36 is sealed with a mold resin, for example, a thermosetting epoxy resin 37, except for the outer lead portion 24.

本実施の形態の半導体装置３３によれば、インナーリード部２３のワイヤボンディング部２３ａ上に粗面化した銀めっき層２８を有するので、モールド樹脂３７と銀めっき層２８との密着性が向上し、銀めっき層２８とモールド樹脂３７との界面での剥離を抑制することができる。特に、表面粗さＲａが１．１５≦Ｒａ≦２．１１である銀めっき層２８を形成することにより、モールド樹脂との密着強度が向上する。従って、信頼性の高いこの種の半導体装置を提供することができる。   According to the semiconductor device 33 of the present embodiment, since the roughened silver plating layer 28 is provided on the wire bonding portion 23a of the inner lead portion 23, the adhesion between the mold resin 37 and the silver plating layer 28 is improved. Further, peeling at the interface between the silver plating layer 28 and the mold resin 37 can be suppressed. In particular, by forming the silver plating layer 28 having a surface roughness Ra of 1.15 ≦ Ra ≦ 2.11, the adhesion strength with the mold resin is improved. Therefore, this kind of highly reliable semiconductor device can be provided.

本実施の形態に係る半導体装置３３によれば、インナーリード部２３のワイヤボンディング部２３の表面およびダイパッド部２２の表面に、膜厚ｔが４．５μｍ≦ｔ≦２３．０μｍの銀めっき層２８および２９が形成されるので、基準レベル以上のワイヤプル強度、ダイシェア強度が得られ、信頼性の高い半導体装置を提供することができる。   According to the semiconductor device 33 according to the present embodiment, the silver plating layer 28 having a film thickness t of 4.5 μm ≦ t ≦ 23.0 μm is formed on the surface of the wire bonding portion 23 of the inner lead portion 23 and the surface of the die pad portion 22. Therefore, the wire pull strength and die shear strength exceeding the reference level can be obtained, and a highly reliable semiconductor device can be provided.

そして、本実施の形態では、表面粗さＲａが１．１５μｍ≦Ｒａ≦２．１１μｍ、膜厚ｔが４．５μｍ≦ｔ≦２３．０μｍにそれぞれ設定された銀めっき層２８および２９を有する。これにより、リードフレーム２１とモールド樹脂３７との剥離を抑制するとともに、ワイヤボンディング特性およびダイボンディング特性に優れた高品質の半導体装置を提供することができる。   And in this Embodiment, it has the silver plating layers 28 and 29 by which the surface roughness Ra was set to 1.15 micrometer <= Ra <= 2.11 micrometer, and the film thickness t was set to 4.5 micrometer <= t <= 23.0 micrometers, respectively. As a result, it is possible to provide a high-quality semiconductor device excellent in wire bonding characteristics and die bonding characteristics while suppressing the peeling between the lead frame 21 and the mold resin 37.

次に、本実施の形態の検証を行った実験について説明する。   Next, an experiment in which this embodiment has been verified will be described.

［実験例１］
最初に、銀めっき層のない銅合金板と樹脂との密着性を検証するための実験を行った。２５ｍｍ×２５ｍｍ×０．５ｍｍの銅合金板をリードフレームと見立てた。銅合金板の成分は、Ｎｉが２．２〜２．８ｗｔ％、Ｓｉが０．３〜０．７ｗｔ％、Ｚｎが１．５〜２．０ｗｔ％、Ｐが０．０１５〜０．０６ｗｔ％、Ｃｕが残りである。図４に示すように、この銅合金板４１に直径１３ｍｍ、高さ１７ｍｍの円柱状の樹脂４２を接着させ、矢印方向にせん断応力Ｆ１を与えて、その密着性の評価を行った。樹脂４２の成分は、シリカ６７％、エポキシ樹脂１５％、フェノールノボラック１０％、その他８％である。 [Experimental Example 1]
First, an experiment was conducted to verify the adhesion between a copper alloy plate without a silver plating layer and a resin. A copper alloy plate of 25 mm × 25 mm × 0.5 mm was regarded as a lead frame. The components of the copper alloy plate are as follows: Ni is 2.2 to 2.8 wt%, Si is 0.3 to 0.7 wt%, Zn is 1.5 to 2.0 wt%, and P is 0.015 to 0.06 wt%. Cu remains. As shown in FIG. 4, a cylindrical resin 42 having a diameter of 13 mm and a height of 17 mm was adhered to the copper alloy plate 41, and a shear stress F1 was applied in the direction of the arrow to evaluate the adhesion. The components of the resin 42 are silica 67%, epoxy resin 15%, phenol novolac 10%, and other 8%.

まず、アンカー効果の密着性への影響を評価するために、人工的手法によりエメリー研磨紙を用いて銅合金板４１の表面を研磨し、アセトン脱脂、硫酸水溶液における酸化物除去、超音波洗浄を経て、銅合金板４１を専用金型に挿入し、ホットプレス機にて１８５℃まで加熱した。１８５℃に到達後、樹脂４２を挿入し、８ＭＰａの圧力で５分間圧着させた。そして、密着性評価用治具と引張試験機を用いて評価した。次に、レーザ顕微鏡を用いてエメリー研磨紙で研磨した銅合金板４１の表面の表面粗さＲａを測定し、表面粗さＲａと密着性の関係を調査した。後述の表１に樹脂密着性と表面粗さＲａのデータを示す。   First, in order to evaluate the influence of the anchor effect on the adhesion, the surface of the copper alloy plate 41 is polished using emery polishing paper by an artificial method, and acetone degreasing, oxide removal in a sulfuric acid aqueous solution, and ultrasonic cleaning are performed. Then, the copper alloy plate 41 was inserted into a special mold and heated to 185 ° C. with a hot press machine. After reaching 185 ° C., the resin 42 was inserted and pressure-bonded at a pressure of 8 MPa for 5 minutes. And it evaluated using the jig | tool for adhesive evaluation and a tensile testing machine. Next, the surface roughness Ra of the surface of the copper alloy plate 41 polished with emery polishing paper was measured using a laser microscope, and the relationship between the surface roughness Ra and the adhesion was investigated. Table 1 described later shows data on resin adhesion and surface roughness Ra.

［実験例２］
次に、銀めっきを施した銅合金板と樹脂との密着性を検証するための実験を行った。本実験では、環境に有害なシアンを全く含まない非シアン系銀めっき浴を用いて銅合金板の表面に銀めっきを施し、樹脂との密着において最適な表面粗さＲａを得る為のめっき条件、密着性の変化を調査した。 [Experiment 2]
Next, an experiment was conducted to verify the adhesion between the silver-plated copper alloy plate and the resin. In this experiment, silver plating is applied to the surface of the copper alloy plate using a non-cyan-based silver plating bath that does not contain any cyanide harmful to the environment, and plating conditions for obtaining the optimum surface roughness Ra in close contact with the resin The change in adhesion was investigated.

図５に銀めっき装置の概略構成を示す。銀めっき装置５１は、銀イオン濃度が選択された非シアン系の銀めっき浴４９を有し、この銀めっき浴４９中に陰極となる試験片４４と陽極となる金（Ａｕ）電極４８が配置される。   FIG. 5 shows a schematic configuration of the silver plating apparatus. The silver plating apparatus 51 has a non-cyan silver plating bath 49 with a selected silver ion concentration, and a test piece 44 serving as a cathode and a gold (Au) electrode 48 serving as an anode are disposed in the silver plating bath 49. Is done.

銅合金板４５の表面にめっき処理すべき領域４６を除いてポリイミドテープ４７を貼着して試験片４４を作製し、アセトン脱脂、硫酸水溶液による酸化物除去を行う。この試験片４４及び金電極４７を銀イオン濃度が低いストライク銀めっき用の非シアン系銀めっき浴４９中に浸し、定電流でストライク銀めっきを行った。その後、水洗を経て、銀イオン濃度が高い本銀めっき用の非シアン系銀めっき浴中４９に浸し、定電流で本銀めっきを行った。銀めっきが完了した後、実験例１と同様の温度条件、圧着条件で、銀めっき層上に円柱状の樹脂４２を接着させ、矢印方向にせん断応力Ｆ１を与えて（図4参照）、その密着性の評価を行った。すなわち、レーザ顕微鏡を用いて密着面の表面粗さＲａを測定し、表面粗さＲａと密着性の関係を調査した。後述の表２に樹脂密着性と表面粗さＲａのデータを示す。   A test piece 44 is prepared by sticking a polyimide tape 47 to the surface of the copper alloy plate 45 excluding the region 46 to be plated, and then degreasing with acetone and removing the oxide with an aqueous sulfuric acid solution. The test piece 44 and the gold electrode 47 were immersed in a non-cyan silver plating bath 49 for strike silver plating having a low silver ion concentration, and strike silver plating was performed at a constant current. Then, after washing with water, it was immersed in a non-cyan silver plating bath for main silver plating having a high silver ion concentration and subjected to main silver plating at a constant current. After the completion of the silver plating, the cylindrical resin 42 is bonded onto the silver plating layer under the same temperature conditions and pressure bonding conditions as in Experimental Example 1, and a shear stress F1 is applied in the direction of the arrow (see FIG. 4). The adhesion was evaluated. That is, the surface roughness Ra of the adhesion surface was measured using a laser microscope, and the relationship between the surface roughness Ra and the adhesion was investigated. Table 2 below shows data on resin adhesion and surface roughness Ra.

［実験例３］
次に、上記銅合金板の試験片４４に対して、シアン系銀めっき浴を用いて銀めっきを施し、この銀めっき層上に円柱状の樹脂４２を接着させ、矢印方向にせん断応力Ｆ１を与えて（図４参照）、その密着性の評価を行った。すなわち、レーザ顕微鏡を用いて密着面の表面粗さＲａを測定し、表面粗さＲａと密着性の関係を調査した。後述の表３に樹脂密着性と表面粗さＲａのデータを示す。 [Experiment 3]
Next, the copper alloy plate test piece 44 is subjected to silver plating using a cyan silver plating bath, and a cylindrical resin 42 is adhered onto the silver plating layer, and a shear stress F1 is applied in the direction of the arrow. (See FIG. 4) and the adhesion was evaluated. That is, the surface roughness Ra of the adhesion surface was measured using a laser microscope, and the relationship between the surface roughness Ra and the adhesion was investigated. Table 3 to be described later shows data on resin adhesion and surface roughness Ra.

ここで、表面粗さＲａを図１３に定義する。図１３に示す粗さ曲線から、その平均線ｍ１の方向に基準長さＬだけ抜き取り、この基準長さＬで切り取られた部分の平均線ｍ１からの測定曲線までの偏差の絶対値を合計し、平均した値（算術平均粗さ）を、表面粗さＲａとする。数１に、この表面粗さＲａの式を示す。   Here, the surface roughness Ra is defined in FIG. From the roughness curve shown in FIG. 13, only the reference length L is extracted in the direction of the average line m1, and the absolute value of the deviation from the average line m1 of the portion cut by the reference length L is summed. The average value (arithmetic average roughness) is defined as the surface roughness Ra. Equation 1 shows the expression of the surface roughness Ra.

表１〜表３における密着性は、剥離されたときの引っ張り圧力［ＭＰａ］で表す。表１は、銀めっき無しの銅合金リードフレームにおける表面粗さＲａと密着性の関係を示し、研磨条件の数値はエメリー研磨紙の番号を示す。表２は、非シアン系銀めっき浴による２段階銀めっきした銅合金リードフレームにおける表面粗さＲａと密着性の関係を示す。表２では、ストライク銀めっき（ＳＴ）条件を電流５ｍＡ、時間２０分で一定として、各サンプル（仕様）Ａ〜Ｊ毎に本銀めっき（ＰＬ）条件（電流、時間）を変化させた。表３は、シアン系銀めっき浴により銀めっきを施した銅合金リードフレームにおける表面粗さＲａと密着性の関係を示す。表３では同じめっき条件で銀めっきした４つのサンプル（１）〜（４）について示す。   The adhesion in Tables 1 to 3 is represented by a tensile pressure [MPa] when peeled. Table 1 shows the relationship between the surface roughness Ra and the adhesion in a copper alloy lead frame without silver plating, and the numerical value of the polishing condition indicates the number of the emery polishing paper. Table 2 shows the relationship between surface roughness Ra and adhesion in a copper alloy lead frame that has been subjected to two-stage silver plating using a non-cyan silver plating bath. In Table 2, the current silver plating (PL) conditions (current, time) were changed for each sample (specifications) A to J, with the strike silver plating (ST) conditions being constant at a current of 5 mA and a time of 20 minutes. Table 3 shows the relationship between surface roughness Ra and adhesion in a copper alloy lead frame that has been silver-plated with a cyan-based silver plating bath. Table 3 shows four samples (1) to (4) plated with silver under the same plating conditions.

図６は、表１〜表３の実験データに基く樹脂密着性と表面粗さＲａの関係を示すグラフであり、横軸が表面粗さＲａ、縦軸が密着強度ＭＰａである。図６において、曲線ａはエメリー研磨紙により表面粗化した銀めっき無しの銅合金リードフレーム（表１）である。曲線ｂは２段階の非シアン系銀めっき浴を用いて銀めっきを施した銅合金リードフレーム（表２）である。曲線ｃはシアン系銀めっき浴を用いて銀めっきを施した銅合金リードフレーム（表３）でる。   FIG. 6 is a graph showing the relationship between the resin adhesion and the surface roughness Ra based on the experimental data in Tables 1 to 3, where the horizontal axis represents the surface roughness Ra and the vertical axis represents the adhesion strength MPa. In FIG. 6, curve a is a silver alloy-free copper alloy lead frame (Table 1) roughened by emery polishing paper. Curve b is a copper alloy lead frame (Table 2) plated with silver using a two-stage non-cyan silver plating bath. Curve c is a copper alloy lead frame (Table 3) plated with a silver-based silver plating bath.

図６の曲線ｂ及び表２から明らかなように、非シアン系銀めっき浴を用いた２段階銀めっき層においては、比較的電流密度の大きな条件ほど表面粗さＲａを増大させ、併せて樹脂密着性も増加している。曲線ｂにおいて、表面粗さＲａが約１．７を超えると樹脂密着性が減少に転じるのは、銀表面に硫化物など何らかの金属状態が生じており、樹脂密着性と表面粗さＲａが比例関係にならなかったものと考えられる。   As apparent from curve b of FIG. 6 and Table 2, in the two-stage silver plating layer using the non-cyan silver plating bath, the surface roughness Ra is increased under the condition of relatively large current density, and the resin Adhesion has also increased. In curve b, when the surface roughness Ra exceeds about 1.7, the resin adhesion starts to decrease because some metal state such as sulfide is generated on the silver surface, and the resin adhesion and the surface roughness Ra are proportional. It is thought that it was not related.

図７に、銀めっきの断面組織観察図を示す。同図において、５３は銅合金によるリードフレーム本体、５４は銀めっき層、５５はエポキシ樹脂を示す。図７ａはシアン系銀めっき浴から得られた銀めっき層の断面（表３のサンプル（１））、図７ｂは非シアン系銀めっき浴か得られた銀めっき層の断面（表２の仕様Ｄ）、図７ｃは非シアン系銀めっき浴か得られた銀めっき層の断面（表２の仕様Ｈ）を示す。   In FIG. 7, the cross-sectional structure | tissue observation figure of silver plating is shown. In the figure, 53 is a lead frame body made of a copper alloy, 54 is a silver plating layer, and 55 is an epoxy resin. 7a is a cross section of a silver plating layer obtained from a cyan silver plating bath (sample (1) in Table 3), and FIG. 7b is a cross section of a silver plating layer obtained from a non-cyan silver plating bath (specifications in Table 2). D), FIG. 7c shows a cross section (specification H in Table 2) of the silver plating layer obtained from the non-cyan silver plating bath.

図７の結果からも明らかなように、シアン系銀めっき浴から得られた銀めっき層の表面（図７ａ）は、平滑であるのに対して、非シアン系銀めっき浴から得られた銀めっき層の表面（図７ｃ）は凹凸が顕著に現れており、エポキシ樹脂との密着性において、アンンカー効果の差が明確である。図７ｂは、非シアン系銀めっき浴から得られた平滑銀メッキ層の断面写真を示しており、図７ａのシアン系銀めっき浴から得られた平滑銀メッキ層と同等レベルの表面粗さである。このように、非シアン系銀めっき浴の場合、めっき条件を制御することにより、図７ｂや図７ｃのように幅広く表面粗さをコントロールできる。また、同等レベルの表面粗さで比較した場合でも、非シアン系の方がシアン系より高い密着性を示す（表２の仕様Ｄ、表３のサンプル１参照）。   As is clear from the results of FIG. 7, the surface of the silver plating layer obtained from the cyan silver plating bath (FIG. 7a) is smooth, whereas the silver obtained from the non-cyan silver plating bath is smooth. The surface of the plating layer (FIG. 7c) has conspicuous irregularities, and the difference in the Anker effect is clear in the adhesion with the epoxy resin. FIG. 7b shows a cross-sectional photograph of the smooth silver plating layer obtained from the non-cyan silver plating bath, with the same level of surface roughness as the smooth silver plating layer obtained from the cyan silver plating bath of FIG. 7a. is there. Thus, in the case of a non-cyan silver plating bath, the surface roughness can be controlled widely as shown in FIGS. 7b and 7c by controlling the plating conditions. Further, even when compared at the same level of surface roughness, the non-cyan system exhibits higher adhesion than the cyan system (see specification D in Table 2 and sample 1 in Table 3).

表２、図６及び図７の実験データによる検証結果に基き、本実施の形態に係るリードフレームの銀めっき層の表面粗さＲａは、１．１５μｍ以上で２．１１μｍ以下の範囲に設定することが望ましい。表面粗さＲａが１．１５μｍ未満の場合には、密着性が２ＭＰａ未満となり、十分な密着が得られない。表面粗さＲａが２．１１μｍを超える場合には、銀めっき自体の付着が悪くなり銀めっき剥が生じる。   Based on the verification results based on the experimental data in Table 2, FIG. 6 and FIG. 7, the surface roughness Ra of the silver plating layer of the lead frame according to this embodiment is set in the range of 1.15 μm to 2.11 μm. It is desirable. When the surface roughness Ra is less than 1.15 μm, the adhesion is less than 2 MPa, and sufficient adhesion cannot be obtained. When the surface roughness Ra exceeds 2.11 μm, the adhesion of the silver plating itself becomes worse and the silver plating is peeled off.

［実験例４］
次に、本実施の形態に係る非シアン系銀めっき層を有するリードフレームが、従来の基準レベルのダイボンディング特性およびワイヤボンディング特性をクリアできるか評価・検証した。 [Experimental Example 4]
Next, it was evaluated and verified whether or not the lead frame having the non-cyan silver plating layer according to the present embodiment can clear the conventional die bonding characteristics and wire bonding characteristics.

表４に６種類の銀めっきサンプル（仕様Ａ〜仕様Ｆ）の作製条件を示す。ストライク銀めっき（ＳＴ）条件は、電流５ｍＡで２０分間行い、本銀めっき（ＰＬ）条件の電流と時間を変化させた。   Table 4 shows the production conditions of six types of silver plating samples (specifications A to F). Strike silver plating (ST) conditions were performed at a current of 5 mA for 20 minutes, and the current and time of the present silver plating (PL) conditions were changed.

図８に、得られた銀めっきサンプル（仕様Ａ〜仕様Ｆ）の表面外観写真を示す。銀めっき層の膜厚は仕様Ａ側が薄く、仕様Ｆ側が厚い。これらの６種類の銀めっきサンプルに対して、表５および表６に示すダイボンディング条件およびワイヤボンディング条件にて、半導体（Ｓｉ）チップおよび金（Ａｕ）細線を接着させた。表５のダイボンディング条件における評価仕様のボンデンディン時間は、基準モデルの１７ｍｓに比べて長い５００ｍｓとした。これは次の理由による。基準モデルでは、数ミリサイズの小さなリードフレームを使用するのに対し、評価仕様では、数センチサイズの大きな銅合金板を使用したため、熱容量が大きくなり、それに合わせてボンディング時間を長くしないと接着しないためである。表６のワイヤボンディング条件における評価仕様の前発振超音波出力（前発振ＵＳ（Ultra Sonic）−パワー）は、基準モデルの０（ｂｉｔ）に比べて大きい７０（ｂｉｔ）とした。理由は、評価仕様では、リードフレームの熱容量が大きいため、超音波出力を大きくして、接着出来るようにしたためのである。   In FIG. 8, the surface appearance photograph of the obtained silver plating sample (specification A-specification F) is shown. The thickness of the silver plating layer is thin on the specification A side and thick on the specification F side. A semiconductor (Si) chip and a gold (Au) fine wire were bonded to these six types of silver plating samples under the die bonding conditions and wire bonding conditions shown in Tables 5 and 6. Bonding time of the evaluation specifications under the die bonding conditions in Table 5 was set to 500 ms, which is longer than 17 ms of the reference model. This is due to the following reason. The standard model uses a small lead frame of several millimeters, while the evaluation specification uses a large copper alloy plate of several centimeters, which increases the heat capacity and does not bond unless the bonding time is increased accordingly. Because. The pre-oscillation ultrasonic output (pre-oscillation US (Ultra Sonic) -power) in the evaluation specifications under the wire bonding conditions in Table 6 was set to 70 (bit), which is larger than 0 (bit) of the reference model. The reason is that, in the evaluation specification, the heat capacity of the lead frame is large, so that the ultrasonic output is increased to enable bonding.

図９に、ダイボンディング外観（図９Ａ）と、破壊試験によるダイシェア強度および破断モード（図９Ｂ）と、基準モデルのダイボンディング外観および破断モード（図９Ｃ）の関係を示す。ダイシェア強度（破壊強度）では、平均（ＡＶＥ）、最大（ＭＡＸ）、最小（ＭＩＮ）を示す。基準モデルは、シアン系銀めっき浴から得られた銀めっき層を有する。仕様Ａは全て不着であり濡れ性が不足していた。仕様Ｂは、全て不着であり濡れ性が不足していた。仕様Ｃは銀めっき剥がれが有り濡れ性が不足していた。仕様Ｄは銀めっき剥がれが有り濡れ性が不足していた。仕様Ｅは銀めっき剥がれが有り濡れ性が不足していた。仕様Ｆは銀めっき剥がれが６０％で、１０％Ｓｉ残りが有った。ここで、１０％Ｓｉ残りとは、トータルＳｉチップ数の１０％が銀めっきと溶着したことを意味する。つまり、この仕様Ｆでは、密着性が非常に良いサンプルがあり、シリコン結晶部で破壊しシリコンが残ったことを意味する。濡れ性とは、半導体チップ下面にスパッタ被覆されているＡｕ膜とＳｉチップが３８０℃で共晶反応により溶融し、これが銀めっき表面に濡れ広がる状況を意味する。   FIG. 9 shows the relationship between the die bonding appearance (FIG. 9A), the die shear strength and breaking mode (FIG. 9B) by the destructive test, and the die bonding appearance and breaking mode (FIG. 9C) of the reference model. In die shear strength (breaking strength), average (AVE), maximum (MAX), and minimum (MIN) are shown. The reference model has a silver plating layer obtained from a cyan silver plating bath. Specifications A were all non-attached and had insufficient wettability. Specification B was all non-attached and had insufficient wettability. Specification C had peeling of silver plating and lacked wettability. Specification D had peeling of silver plating and lacked wettability. Specification E had peeling of silver plating and lacked wettability. Specification F had 60% silver plating peeling and 10% Si remaining. Here, the 10% Si remaining means that 10% of the total number of Si chips is welded to the silver plating. In other words, this specification F means that there was a sample with very good adhesion, and the silicon crystal part was broken and silicon remained. The wettability means a situation in which the Au film and the Si chip that are sputter-coated on the lower surface of the semiconductor chip are melted by a eutectic reaction at 380 ° C., and this spreads on the surface of the silver plating.

図９に示すように、仕様Ａ〜仕様Ｂでは、半導体チップと銀めっきが接着せず、十分なダイシェア強度が得られなかったが、仕様Ｃ〜仕様Ｆでは、利用可能な２００ｇ以上のダイシェア強度が得られた。特に、仕様Ｆでは、基準レベルを上回る良好なダイシェア強度６３５．６ｇが達成された。   As shown in FIG. 9, in the specifications A to B, the semiconductor chip and the silver plating did not adhere and sufficient die shear strength could not be obtained, but in the specifications C to F, the die shear strength of 200 g or more that can be used. was gotten. In particular, in the specification F, a good die shear strength of 635.6 g exceeding the reference level was achieved.

図１０に、ワイヤボンディング外観（図１０Ａ）と、ワイヤプル強度（破壊強度）および破断モード（図１０Ｂ）と、基準モデルのステッチ外観および破断モード（図１０Ｃ）の関係を示す。仕様Ａはワイヤ不着のため結果無し。仕様Ｂはワイヤ不着のため結果無し。仕様Ｃは全てステッチが残る、但しボール剥がれが７％。仕様Ｄは全てステッチが残る、但しボール剥がれが４４％。仕様Ｅは全てステッチが残る、但しボール剥がれが４２％。仕様Ｆは全てステッチが残る。   FIG. 10 shows the relationship among wire bonding appearance (FIG. 10A), wire pull strength (breaking strength) and break mode (FIG. 10B), and stitch appearance and break mode (FIG. 10C) of the reference model. Spec A has no results because of no wire attachment. Specification B has no results because of no wire attachment. For specification C, all stitches remain, but the ball peels 7%. For specification D, all stitches remain, but ball peeling is 44%. For specification E, all stitches remain, but ball peeling is 42%. For specification F, all stitches remain.

図１０に示すように、仕様Ａ〜仕様Ｂでは、金線と銀めっきが接着せず、十分なワイヤプル強度が得られなかったが、仕様Ｃ〜仕様Ｆでは、利用可能な５ｇ以上のワイヤプル強度が得られた。特に、仕様Ｆでは、基準レベルを上回る良好なワイヤプル強度６．８９ｇが達成された。   As shown in FIG. 10, in specification A to specification B, the gold wire and silver plating did not adhere and sufficient wire pull strength was not obtained, but in specification C to specification F, the wire pull strength of 5 g or more that can be used. was gotten. In particular, in the specification F, a good wire pull strength of 6.89 g exceeding the reference level was achieved.

図１１に、ダイシェア強度と銀めっき層のめっき条件（銀めっき膜厚）の関係のグラフを示し、図１２に、ワイヤプル強度と銀めっき層のめっき条件（銀めっき膜厚）の関係のグラフを示す。図１１に示すように、基準レベルのダイシェア強度範囲は、４００ｇ〜７００ｇであり、平均基準値が５５０ｇ程度である。図１２に示すように、基準レベルのワイヤプル強度範囲は、５ｇ〜８ｇであり、平均基準値が６．５ｇ程度である。図１１および図１２から明らかなように、銀めっき膜厚が１０μｍ以上のサンプル（仕様Ｆ）において、基準レベルを上回る良好なダイシェア強度およびワイヤプル強度が得られることが分かる。仕様Ｃ、Ｄ、Ｅにおいても、使用可能である。つまり、ダイボンディング特性およびワイヤボンディング特性には、銀めっき膜厚が大きく影響している。   FIG. 11 shows a graph of the relationship between die shear strength and silver plating layer plating conditions (silver plating film thickness), and FIG. 12 shows a graph of the relationship between wire pull strength and silver plating layer plating conditions (silver plating film thickness). Show. As shown in FIG. 11, the die shear strength range of the reference level is 400 g to 700 g, and the average reference value is about 550 g. As shown in FIG. 12, the reference level wire pull strength range is 5 to 8 g, and the average reference value is about 6.5 g. As is clear from FIGS. 11 and 12, it can be seen that in a sample (specification F) having a silver plating film thickness of 10 μm or more, good die shear strength and wire pull strength exceeding the reference level can be obtained. It can also be used in specifications C, D, and E. That is, the silver plating film thickness has a great influence on the die bonding characteristics and the wire bonding characteristics.

表７に、前述の表２で示したと同様の銀めっき条件で作製した仕様Ａ〜Ｊにおける銀めっき膜厚を示す。   Table 7 shows the silver plating film thicknesses in specifications A to J produced under the same silver plating conditions as shown in Table 2 above.

上述のボンディング特性の検証および表７の実験データに基き、本実施の形態のリードフレームの銀めっき層の膜厚ｔは、４．５μｍ以上で２３．０μｍ以下の範囲内に設定することが望ましい。好ましくは、上記範囲内で１０μｍ以上に設定する。膜厚ｔが４．５μｍ未満の場合には、ボンディング特性において、仕様Ａおよび仕様Ｂの結果のようにボンディングワイヤである金（Ａｕ）細線と溶着し難い。膜厚ｔが２３．０μｍを超える場合には、銀めっきに発生する内部応力により、銀めっきが剥がれてしまう。   Based on the verification of the bonding characteristics described above and the experimental data in Table 7, it is desirable to set the film thickness t of the silver plating layer of the lead frame of the present embodiment within the range of 4.5 μm to 23.0 μm. . Preferably, it is set to 10 μm or more within the above range. When the film thickness t is less than 4.5 μm, it is difficult for the bonding characteristics to be welded to a gold (Au) thin wire as a bonding wire as in the results of the specifications A and B. When the film thickness t exceeds 23.0 μm, the silver plating is peeled off due to the internal stress generated in the silver plating.

上述の検証により、樹脂密着性とボンディング特性の両方をクリアできる仕様は、仕様Ｃ、Ｆ、Ｇ、Ｈ、Ｉ、Ｊの６つになる。   According to the verification described above, there are six specifications C, F, G, H, I, and J that can clear both the resin adhesion and the bonding characteristics.

上述の実験による検証結果により、非シアン系銀めっき浴を利用し、２段階銀めっきにおけるめっき条件を制御することにより、銀めっき層と樹脂間において高い密着強度が得られることが確認できた。そして、銀めっき層の表面粗さＲａを１．１５〜２．１１μｍのレベルまで増大させることができ、密着強度を従来のシアン系銀めっき浴を利用した平滑な銀めっき層としたときの密着強度１ＭＰａ未満より大きい２ＭＰａ〜５．８ＭＰａのレベルまで向上できた。また、めっき条件を制御して銀めっき層の膜厚ｔを４．５μｍ〜２３．０μｍとすることにより、ダイボンディング特性およびワイヤボンディング特性を使用に耐えるレベルにすることが確認できた。   From the verification results by the above-described experiment, it was confirmed that high adhesion strength was obtained between the silver plating layer and the resin by using a non-cyan silver plating bath and controlling the plating conditions in the two-step silver plating. Then, the surface roughness Ra of the silver plating layer can be increased to a level of 1.15 to 2.11 μm, and the adhesion strength is a smooth silver plating layer using a conventional cyan silver plating bath. The strength was improved to a level of 2 MPa to 5.8 MPa, which is greater than 1 MPa. In addition, it was confirmed that the die bonding characteristics and the wire bonding characteristics can be made to withstand use by controlling the plating conditions so that the film thickness t of the silver plating layer is 4.5 μm to 23.0 μm.

２１・・リードフレーム、２１Ａ・・リードフレーム本体、２２・・ダイパッド、２３・・インナーリード部、２３ａ・・ワイヤボンディング部、２４・・アウターリード部、２８，２９・・銀めっき層、３３・・半導体装置、３４・・半導体チップ、３５・・電極パッド、３６・・金（Ａｕ）細線、３７・・モールド樹脂   21..Lead frame, 21A..Lead frame main body, 22..Die pad, 23..Inner lead portion, 23a..Wire bonding portion, 24..Outer lead portion, 28, 29..Silver plated layer, 33.・ Semiconductor device 34 ..Semiconductor chip 35 ..Electrode pad 36 ..Gold (Au) fine wire 37 ..Mold resin

Claims (13)

半導体チップを固定するダイパット部と、
インナーリード部と、
アウターリード部とを有し、
少なくとも前記インナーリード部のワイヤボンディング部の表面に、銀の結晶核を析出する下地銀めっきと、本銀めっきの２段階銀めっきによる表面が粗面化された銀めっき層が形成されて成る
ことを特徴とするリードフレーム。 A die pad portion for fixing the semiconductor chip;
An inner lead,
An outer lead portion,
At least the surface of the wire bonding portion of the inner lead portion is formed with a base silver plating for depositing silver crystal nuclei and a silver plating layer having a roughened surface by two-step silver plating of the main silver plating. Lead frame characterized by. 前記銀めっき層の表面の粗さＲａが、１．１５μｍ≦Ｒａ≦２．１１μｍに設定されて成る
ことを特徴とする請求項１記載のリードフレーム。 2. The lead frame according to claim 1, wherein the surface roughness Ra of the silver plating layer is set to 1.15 μm ≦ Ra ≦ 2.11 μm. 前記ダイパッド部の表面に、銀の結晶核を析出する下地銀めっきと、本銀めっきの２段階銀めっきによる表面が粗面化された銀めっき層が形成されて成る
ことを特徴とする請求項１記載のリードフレーム。 The base silver plating for depositing silver crystal nuclei and the silver plating layer whose surface is roughened by two-step silver plating of the main silver plating are formed on the surface of the die pad portion. The lead frame according to 1. 前記銀めっき層の表面の粗さＲａが、１．１５μｍ≦Ｒａ≦２．１１μｍに設定され、
前記銀めっき層の膜厚ｔが、４．５μｍ≦ｔ≦２３．０μｍに設定されて成る
ことを特徴とする請求項３記載のリードフレーム。 The surface roughness Ra of the silver plating layer is set to 1.15 μm ≦ Ra ≦ 2.11 μm,
The lead frame according to claim 3, wherein a film thickness t of the silver plating layer is set to 4.5 μm ≦ t ≦ 23.0 μm. 半導体チップを固定するダイパット部と、インナーリード部と、アウターリード部を有するリードフレーム本体を形成する工程と、
少なくとも前記インナーリード部のワイヤボンディング部の表面に、非シアン系銀めっき浴を用い、銀の結晶核を析出する前段の下地銀めっきと、後段の本銀めっきとの２段階銀めっきにより、表面が粗面化された銀めっき層を形成する工程と
を有することを特徴とするリードフレームの製造方法。 Forming a lead frame body having a die pad portion for fixing a semiconductor chip, an inner lead portion, and an outer lead portion;
At least on the surface of the wire bonding part of the inner lead part, a non-cyan-based silver plating bath is used to form a surface by two-stage silver plating of a preceding base silver plating for precipitating silver crystal nuclei and a subsequent main silver plating. Forming a roughened silver plating layer. A method for producing a lead frame, comprising: 前記２段階銀めっきにより、前記銀めっき層の表面粗さＲａを、１．１５μｍ≦Ｒａ≦２．１１μｍに設定する
ことを特徴とする請求項５記載のリードフレームの製造方法。 The lead frame manufacturing method according to claim 5, wherein the surface roughness Ra of the silver plating layer is set to 1.15 μm ≦ Ra ≦ 2.11 μm by the two-stage silver plating. 前記ワイヤボンディング部の表面への前記銀めっき層の形成と同時に、前記ダイパッド部の表面に、銀の結晶核を析出する前段の下地銀めっきと、後段の本銀めっきとの２段階銀めっきにより、表面が粗面化された銀めっき層を形成する工程と
を有することを特徴とする請求項５記載のリードフレームの製造方法。 Simultaneously with the formation of the silver plating layer on the surface of the wire bonding portion, two-step silver plating is performed on the surface of the die pad portion, which is a pre-stage silver plating for precipitating silver crystal nuclei and a post-main silver plating. 6. A method of manufacturing a lead frame according to claim 5, further comprising: forming a silver plating layer having a roughened surface. 前記２段階銀めっきにより、前記ワイヤボンディング部及び前記ダイパッド部の前記銀めっき層の表面粗さＲａを、１．１５μｍ≦Ｒａ≦２．１１μｍに設定し、
前記銀めっき層の膜厚ｔを、４．５μｍ≦ｔ≦２３．０μｍに設定する
ことを特徴とする請求項７記載のリードフレームの製造方法。 By the two-stage silver plating, the surface roughness Ra of the silver plating layer of the wire bonding part and the die pad part is set to 1.15 μm ≦ Ra ≦ 2.11 μm,
The lead frame manufacturing method according to claim 7, wherein a film thickness t of the silver plating layer is set to 4.5 μm ≦ t ≦ 23.0 μm. 前記下地銀めっきを、銀イオン濃度が前記本銀めっきにおける非シアン系メッキ浴の銀イオン濃度より低濃度の非シアン系メッキ浴を用いて行う
ことを特徴とする請求項６又は８記載のリードフレームの製造方法。 The lead according to claim 6 or 8, wherein the base silver plating is performed using a non-cyan plating bath having a silver ion concentration lower than that of the non-cyan plating bath in the main silver plating. Manufacturing method of the frame. ダイパット部と、インナーリード部と、アウターリード部とを有し、少なくとも前記インナーリード部のワイヤボンディング部の表面に、銀の結晶核を析出する下地銀めっきと、本銀めっきの２段階銀めっきによる表面が粗面化された銀めっき層が形成されてなるリードフレームと、
前記ダイパッド上に固定され、前記インナーリード部の前記銀メッキ層との間で金属細線によりワイヤボンディングされた半導体チップと、
前記半導体チップ、前記インナーリード部及び前記金属細線の全体を封止するモールド樹脂とを有して成る
ことを特徴とする半導体装置。 A two-step silver plating of a base silver plating having a die pad portion, an inner lead portion, and an outer lead portion, in which silver crystal nuclei are precipitated at least on the surface of the wire bonding portion of the inner lead portion, and a main silver plating. A lead frame in which a silver plating layer having a roughened surface is formed;
A semiconductor chip fixed on the die pad and wire-bonded with a thin metal wire between the silver plating layer of the inner lead part; and
A semiconductor device comprising: the semiconductor chip, the inner lead portion, and a mold resin that seals the entire thin metal wire. 前記銀めっき層の表面の粗さＲａが、１．１５μｍ≦Ｒａ≦２．１１μｍに設定されて成る
ことを特徴とする請求項１０記載の半導体装置。 11. The semiconductor device according to claim 10, wherein a surface roughness Ra of the silver plating layer is set to 1.15 μm ≦ Ra ≦ 2.11 μm. 前記ダイパッド部の表面に、銀の結晶核を析出する下地銀めっきと、本銀めっきの２段階銀めっきによる表面が粗面化された銀めっき層が形成されて成る
ことを特徴とする請求項１０記載の半導体装置。 The base silver plating for depositing silver crystal nuclei and the silver plating layer whose surface is roughened by two-step silver plating of the main silver plating are formed on the surface of the die pad portion. 10. The semiconductor device according to 10. 前記銀めっき層の表面の粗さＲａが、１．１５μｍ≦Ｒａ≦２．１１μｍに設定され、
前記銀めっき層の膜厚ｔが、４．５μｍ≦ｔ≦２３．０μｍに設定されて成る
ことを特徴とする請求項１２記載の半導体装置。 The surface roughness Ra of the silver plating layer is set to 1.15 μm ≦ Ra ≦ 2.11 μm,
13. The semiconductor device according to claim 12, wherein a film thickness t of the silver plating layer is set to 4.5 μm ≦ t ≦ 23.0 μm.
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