JP2010278741A - Digital radio device and method for controlling the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a digital radio device, capable of becoming simultaneous standby state for each of radio signals of a plurality of standards which differ in the occupied bandwidth, degree of modulation, baseband filter band and bit rate, even if the radio signals exist mixed, and to provide a method for controlling the device. <P>SOLUTION: The digital radio device executes simultaneous detection processing, before baseband processing; determines a standard parameter of an incoming signal; supplies the data to a baseband processing block; sets the required processing parameters, including a filter band, a clock frequency and degree of modulation etc., and thereafter executes baseband processing. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a digital radio and a control method thereof, and more specifically, a digital radio capable of simultaneously waiting for reception of a plurality of standard transmission signals having different occupied frequency bandwidths, modulation degrees, and the like, and control of the digital radio Regarding the method.

2. Description of the Related Art In recent years, narrowing and digitization of the occupied frequency band per channel have been promoted in various wireless communication systems including a commercial radio (Land Mobile Radio) from the viewpoint of frequency utilization efficiency. For digitalization, for example, FSK (Frequency Shift Keying), PSK (Phase Shift Keying), etc. that are easy to coexist and share with conventional analog systems are adopted in commercial wireless systems, for example. Has been.
On the other hand, with the narrowing of the occupied frequency band, the frequency shift amount and the phase shift amount modulated by the information (data) to be transmitted are reduced, and so-called modulation depth is reduced. As an example of band narrowing implemented in the past, the occupied band per channel was 25 kHz (wide), which is half 12.5 kHz (narrow), and further half that 6.25 kHz (berry) Narrowing is being promoted in stages. Even at the present time when the bellows narrowing is being promoted, not only narrowband radios but also wideband radios before that are used in part.

FIG. 6 is a block diagram showing a general configuration of a conventional heterodyne receiver of a digital radio. The operation of the radio having this configuration will be briefly described. First, a signal arriving at the antenna ANT is supplied to a reception RF unit (reception high-frequency unit) 40, amplified by a high-frequency amplifier (AMP) 41, mixed with a local oscillator 43 output in a mixer (mixer) 42, and mixed. A necessary intermediate frequency signal (IF) signal is separated (frequency conversion) from the signal and amplified to a required level by the intermediate frequency amplifier 44.
Further, the amplified intermediate frequency signal is demodulated into an original signal superimposed on the high frequency signal by a demodulator (detector) 45. In a conventional analog modulation radio system, the demodulated signal is an audio signal. In the digital system, after passing through the band limiting filter 46, the analog / digital converter 47 converts the demodulated signal into a digital signal, and a digital signal processor such as a DSP. Various digital processing including synchronization detection is performed in the baseband processing unit 50 including

By the way, in a system in which a lot of noise is mixed in the transmission path such as a digital mobile radio system, the decoded word data in the synchronous frame detection process of the baseband processing unit 50 includes many errors, so that the frame detection process accuracy deteriorates. To do. In addition, since the method of detecting the frame synchronization word after acquiring the symbol timing in advance takes too much time, if immediate connectivity is required as in a voice call, for example, the demodulated signal waveform before decoding is known in advance. A method of detecting the frame synchronization word based on the correlation with the frame synchronization word is used.
Briefly describing this method, assuming that each symbol value of the frame synchronization word is S and the symbol value detected from the demodulated waveform of the received detection signal is a, the correlation value R between them is the “shift amount” of the waveform. When the function R (τ) of τ is expressed by (Expression 1) and the value R (τ) is the maximum value, the frame synchronization word detection timing is reached.
R (τ) = Lim1 / T∫a (t + τ) S (t) dt (Equation 1)
However, T is ∞ and the integration range is from 0 to ∞.
Now, assuming that the number of symbols of the frame synchronization word is n, the data (symbol values) thereof are S1 to Sn, and the symbol sampling data of the frame synchronization word candidate read from the demodulated waveform is a1 to an, the above (Equation 1) is It can be expressed as the following (Formula 2).
C = Σ (a _i * S _i ) where i is from 1 to n (Expression 2)
Actually, it is necessary to divide (Equation 2) by the number of samples n. However, this is a constant and does not affect the principle explanation, so it is omitted here.
In this equation, since the correlation value C takes the maximum value in an ideal synchronization state, the synchronization value is compared with a “threshold value” appropriately set in consideration of an allowable bit error, thereby performing a quick synchronization determination. It is common to perform detection. A method for setting a threshold value with a certain allowable value taken into account is disclosed in Patent Document 1 and can be referred to.

Also, instead of the waveform correlation described above, frame synchronization word detection is performed based on the error between the known frame synchronization word symbol value and each symbol value of the frame synchronization word candidate extracted from the received waveform, that is, the difference (error) between the two. Is often used, which depends on the calculated value E shown in (Equation 3).
E = Σ (a _i −S _i ) ² where i is 1 to n (Equation 3)
In such a digital radio, when the occupied frequency band is different, for example, the bit rate, the pass band of the baseband filter, the modulation degree, and the like are different.
Therefore, the baseband processing unit 50 shown in FIG. 6 adjusts the modulation factor so as to conform to the standard, and similarly passes through a baseband filter that matches the passband of the standard, and then based on the included signal. Thus, if clock recovery processing, synchronization detection, and data detection processing can be performed, the obtained data can be supplied to the data analysis unit 51 and the audio data decoder 52.

FIG. 7 is a synchronization word waveform diagram showing a calculation example of the above (formula 2) and (formula 3) cited in the invention filed by the same applicant (Patent Document 2). 2) the correlation value becomes the maximum at the synchronization point (time t _8), be a (dissimilarity of formula 3) (error), the value (level) is zero synchronization point (time t ₈₎ (0) Understandable.
In FIG. 7, the modulation method is 4-level FSK (Frequency Shift Keying) or 4-level PSK (Phase Shift Keying), and the number of frame synchronization words S is assumed to be 4 for the sake of simplicity. FIG. 6 is a waveform diagram after demodulating a digital reception signal with S1 = −3, S2 = 1, S3 = −1, and S4 = 3. The horizontal axis represents time, and the vertical axis represents the amplitude value of the received demodulated signal, indicating the symbol value (shift amount) of the frame synchronization word.
When the symbol timing is t ₁ to t ₁₁ , a _{1 to} a ₄ in the figure are frame synchronization word candidates at the symbol timing t ₄ , and each time the reception timing shifts with time, the right side in the figure It is shifted by one symbol. In this example, since the number of frame synchronization words is four, there are four of a _{1 to} a ₄ , but in reality, for example, in APCO P25, there are 24 symbols. Reference can be made to Patent Document 2 for further detailed description.

Japanese Patent Laid-Open No. 3-70226 JP 2007-150472 A

By the way, although not limited to commercial radio, a large number of communication channels are often used in a reception standby state in order to receive emergency communication and emergency communication, and various methods are used as means for that purpose. . There is a similar request in digital radios, but in the case of realizing the same reception standby in a radio system in which a plurality of standards of occupied frequency bands per channel are mixed as described above, in the conventional method, It was not always easy to use.
For example, a method of arranging a necessary number of receivers corresponding to different standards can be considered, but the equipment becomes large and expensive, so that it is difficult to employ except in special cases. In particular, it is not suitable as a wireless device for mobile radio.

As another method, in order to support a plurality of standards in one receiver, a part that is not affected by the standard is shared, and other parts are provided with a plurality of receiving units that can correspond to each standard, One that sequentially scans at high speed can be considered. However, the time-division scanning method cannot receive (monitor) all at the same time, so even if there is an incoming call to another standard reception channel while monitoring one standard reception channel, It cannot be detected. In addition, even if it can be done, the start of reception is delayed, resulting in a problem such as a loss of the head of the call (talk head disconnection), which has hindered quick response to urgent communications.
In order to perform simultaneous standby of a plurality of channels in which signals of different standards are mixed in a digital wireless device, frame synchronization detection is performed in a state where the modulation degree, baseband filter bandwidth, symbol rate (bit rate), etc. are unknown. Means need to be established.
The present invention has been made in view of the above-described circumstances, and is a digital that enables standby for simultaneous reception even when a plurality of wireless signals of different standards having different occupied bandwidths, modulation degrees, bit rates, and the like are mixed. An object of the present invention is to provide a radio and a control method thereof.

  In order to solve such a problem, the present invention provides a digital radio according to claim 1, a synchronization word detection means for detecting a frame synchronization signal from a received and detected signal, a bit rate, a baseband signal frequency band, and a modulation degree. At least one of a modulation degree adjustment unit, a baseband filter processing unit, a clock regeneration processing unit, and a data acquisition processing unit capable of changing a processing parameter according to a signal based on a plurality of standards, at least one of which is different from each other. In the digital radio including a data acquisition processing block, the synchronization word detection means includes a plurality of known synchronization word data for detecting synchronization words of a plurality of different standards, a received detection signal, and the plurality of known synchronization word data. Multiple sync word detection processing blocks that perform sync word detection by comparing Standard parameter determining means for determining a required parameter, and at least one process of a modulation degree adjusting means for the data acquisition processing block, a baseband filter processing section, a clock recovery processing section, and a data processing section based on the determined standard parameter A means for controlling the parameters is provided.

  According to a second aspect of the present invention, in the digital radio of the first aspect, the synchronous word detecting means includes a synchronous word storage means for storing a known synchronous word in advance, and a synchronous word from the received signal waveform received and detected. Synchronization word candidate acquisition means for acquiring candidate symbol data; symbol error calculation means for obtaining a symbol error between each symbol value of the synchronization word candidate obtained by the synchronization word candidate acquisition means and each symbol corresponding value of the stored synchronization word; Offset correction by subtracting the symbol error average value from each symbol error of the synchronization word candidate obtained by the symbol error average calculation means for obtaining the symbol error average value for all symbols obtained by the symbol error calculation means. Symbol error average subtraction means for obtaining the value and each symbol of the synchronization word candidate A correction value square calculation means for squaring the offset correction value obtained by the symbol error average subtraction means, and a symbol for obtaining a synchronization word symbol error by adding the results obtained by the correction value square calculation means to all the synchronization word candidate symbols The error summation means, and a synchronization word determination means for comparing whether or not the synchronization word candidate is a synchronization word by comparing the synchronization word symbol error obtained by the synchronization symbol error addition means with a preset threshold value. It is characterized by that.

According to a third aspect of the present invention, in the digital wireless device according to the first or second aspect, the synchronization word detecting means further includes a memory that stores known synchronization word data and digital processing parameters corresponding to a plurality of standards. Features.
The invention according to claim 4 relates to a control method for a digital radio, wherein at least one of a synchronization word detection means for detecting a frame synchronization signal from a received and detected signal, and a bit rate, a baseband signal frequency band, and a modulation degree, respectively. Digital radio including a data acquisition process including at least one of a modulation degree adjustment process, a baseband filter process, a clock recovery process, and a data acquisition process, which can change a processing parameter according to signals based on a plurality of different standards In the machine control method, the synchronization word detection means relates to a digital radio device control method, and a plurality of known synchronization word data for detecting synchronization words of different standards, a received detection signal, and the plurality of detection signals Multiple sync word detection processes that detect sync word by comparing with known sync word data, At least one of a standard parameter determination process for determining a required standard parameter from the synchronized word, a modulation degree adjustment process of the data acquisition process based on the determined standard parameter, a baseband filter process, a clock recovery process, and a data processing unit It includes processing for controlling processing parameters.

As described above, the present invention provides data including a modulation degree adjustment unit, a baseband filter processing unit, a clock reproduction processing unit, and a data acquisition processing unit that can change processing parameters in accordance with signals based on a plurality of different standards. Before performing baseband processing in a digital radio including an acquisition processing block, first, by performing synchronization detection, standard information about the received signal at that time is acquired, and each processing parameter of the data acquisition processing block is set. After that, the baseband processing is performed or processed. Therefore, the processing block that should be provided for a plurality of standards is a synchronization detection processing block (synchronization processing device), and the other parts can be shared by one, which increases costs and increases the size of the device. Without waiting for simultaneous reception.
In addition, a data acquisition processing block including a modulation degree adjustment unit, a baseband filter processing unit, a clock reproduction processing unit, and a data acquisition processing unit, which can change processing parameters according to signals based on a plurality of different standards, respectively. The digital wireless device can be realized by an existing technology if it is configured to include a CPU, a DSP, a memory, and the like and install a digital processing program according to a standard for waiting for reception. In particular, it will be easy to implement using recent software radio technology.

1 is a block diagram showing an embodiment of a digital radio according to the present invention. The block diagram which shows an example of the synchronous detection process part used in this invention. It is a figure for demonstrating the process example of the Example of this invention, (a), (b), (c) is a frame synchronous word signal waveform diagram. The flowchart which shows the example of control of the digital radio of this invention. The flowchart which shows the other example of control of the digital radio of this invention. The block diagram which shows the structural example of the conventional digital radio. FIG. 5 is a synchronization signal waveform diagram shown in Patent Document 2.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely illustrative examples and not intended to limit the scope of the present invention only unless otherwise specified. .
In order to detect synchronization of received signals of multiple standards, the present invention detects synchronization in a state where the received signal standards are unknown, that is, in a situation where at least one of the baseband filter band, the clock frequency, the modulation factor, etc. is unknown. Performs processing, detects what standard the received signal corresponds to, and determines the processing parameters necessary for digital processing of the standard signal to ensure subsequent baseband processing The present invention provides a digital radio and a control method thereof, and an embodiment thereof will be described below.

FIG. 1 is a block diagram of a receiving unit of a digital radio according to the present invention.
In this example, the antenna to the A / D converter is almost the same as the conventional radio shown in FIG. That is, a signal received at the antenna ANT1 is amplified to a required level by a high-frequency amplifier (AMP) 3 of a reception RF unit (reception high-frequency unit) 2 and mixed with an output of the local oscillator 5 in a mixer (mixer) 4. A desired intermediate frequency signal (IF) signal filtered from the mixed signal is amplified by the intermediate frequency amplifier 6 to a required level.
The intermediate frequency signal is further demodulated by a demodulator (detector) 7, passed through a band limiting filter 8, and converted into a digital signal by an analog / digital converter (A / D converter) 9. The band limiting filter 8 in this example is a filter that can pass the widest band signal among various standard signals scheduled to be received, but is used for the purpose of passing a necessary detection signal and removing unnecessary noise. As long as the filter does not affect the standard signal band, a conventional filter may be used.

The digital radio shown in this example is characterized by the functional configuration and processing method of the baseband processing block 10 after the A / D converter 9.
That is, in this example, the synchronization detection process is performed prior to other processes among the functional blocks of the baseband processing unit 50 in the block diagram shown in FIG. 6, and the parameters of the signal received by the synchronization detection are determined. By controlling the processing parameters of other processing blocks based on these, modulation degree adjustment, clock recovery, data acquisition, and the like are enabled.
For this purpose, the baseband processing block 10 includes a synchronization (frame) detection processing unit 11, a modulation signal (detection signal) path switching switch SW, and a processing block that performs baseband processing other than synchronization processing (hereinafter, data acquisition processing). Block) 12.
The data acquisition processing block 12 performs modulation degree adjustment by a multiplier 13 that supplies a modulation signal via the switch SW, a modulation degree adjustment processing unit 14 that supplies a modulation degree adjustment signal to the multiplier 13, and the modulation degree adjustment. A baseband filter processing unit 15 that extracts a desired signal from the signal, a clock recovery unit 16 that extracts a clock signal from the baseband signal, and a data acquisition processing unit 17 that detects target data are included.
In the synchronization (frame) detection processing unit 11 shown in this example, unlike the conventional baseband processing unit, synchronization detection is performed from the signal before the baseband filter processing, so in a situation where the symbol points are clearly determined. However, it is affected by several symbols of adjacent frames (intersymbol interference), but since synchronization words are arranged in large numbers (usually several tens of symbols), it is synchronization that is affected by other data. It stays at the first and last few symbols of the word and does not make synchronization detection impossible.

Since synchronous detection is performed from the detection signal that has not passed through the baseband filter in this way, the known word data (S1 to Sn) is similar to a pattern that does not pass through the baseband filter. Calculation in advance is effective in increasing the possibility of synchronization detection.
Furthermore, the synchronization detection processing function may be the same as the conventional one, but the standards a1 to an shown in each formula are in an unknown state (standard is unknown), and are simply converted to digital. Since it appears as a voltage signal, the symbol values (S1 to Sn) of known frame synchronization word data to be compared with this are preferably prepared as voltage values instead of integers such as -3 to +3.

FIG. 2 is a functional block diagram illustrating a specific example of the synchronization detection processing unit 11 of FIG. In this example, in order to simplify the explanation, the case where the number of different standards for performing standby reception is two is shown. However, the same method can be applied to any number of three or more.
The synchronization detection processing unit 11 shown in this example compares a plurality of known synchronization word data for detecting synchronization words of a plurality of different standards, a received detection signal, and the plurality of known synchronization word data to detect synchronization words. A plurality of synchronization word detection processing blocks, a standard parameter determination unit that determines a required standard parameter from the detected synchronization word, a modulation degree adjustment unit of the data acquisition processing block based on the determined standard parameter, and a baseband filter processing unit Means for controlling at least one processing parameter of the clock recovery processing unit and the data processing unit.

A specific description will be given with reference to FIG. The synchronization detection processing unit 11 shown in this example supplies a modulation signal that is an output signal of the demodulator (detector) 7 to the two synchronization detection calculation units 21 and 22. Each synchronization detection calculating unit, respectively, different known (fixed) synchronous word data S ₁ to S memory _23, 24 _n are stored which correspond to the standard have been added, in this memory, each of the standards The processing parameters corresponding to are stored. The plurality of synchronization detection calculation units 21 and 22 simultaneously perform synchronization detection calculation on the input modulation signal, and supply the result to a threshold (threshold) determination unit 25 that performs synchronization determination. With such a configuration or process, in a state where the standard of the received signal is unknown, that is, in a situation where the baseband filter band, the clock frequency, the modulation factor, etc. are unknown, the synchronization detection process is performed, and the received signal becomes any standard. Since it detects whether it is applicable and determines the processing parameters necessary for digital processing of the standard signal, it is possible to detect synchronization for a plurality of different standards at the same time, and therefore can wait for simultaneous reception. .

FIG. 3 is a synchronization detection waveform diagram showing an example in which synchronization detection is performed in response to received signals based on different standards. In FIGS. 4A and 4B, the synchronization word pattern is the same, but the occupied frequency standby is different, so that the modulation degree and the symbol rate are different. Even in such a case, if the detected signal waveform is sampled at a required frequency to extract the characteristics of the signal waveform and collated with the synchronization symbol waveform data of each standard stored in the memories 23 and 24 in advance, It is possible to determine what standard signal waveform it is. At this time, even if there is a difference in symbol rate or modulation degree, if the waveform of the synchronization word signal is similar, the standard can be detected by detecting the characteristics of the waveform. In addition, even if there is compression or expansion in the vertical or horizontal axis direction instead of a similar shape, the standard can be similarly inferred from the characteristics of the waveform and how the maximum value point, minimum value point, and intermediate value point are arranged. It will be possible.
Based on such processing, as shown in FIG. 3C, even if other sync word waveforms are used, if the characteristics of the sync word signal waveforms are known in advance (if stored), It is possible to determine which standard synchronization word is used. Based on the detected standard, necessary parameters are supplied to the data acquisition processing block 12, and the switch SW is controlled to supply the modulation signal to the data acquisition processing block 12. Receiving necessary parameters, each processing unit of the data acquisition processing block 12 generates a modulation degree adjustment value matched with those parameters, sets a baseband filter band, and regenerates a clock, and is necessary from the supplied modulation signal. The correct data.

FIG. 4 is a flowchart showing an example of a control method of synchronization processing in the digital radio according to the present invention. This will be described with reference to FIGS. When the process is started, the received and detected modulated signal is first supplied to the synchronization (frame) detection processing unit 11 (ST1). As shown in FIG. 2, the synchronization (frame) detection processing unit 11 uses a plurality of synchronization detection calculations in which the synchronization word candidate symbol data extracted from the received signal (modulated signal) is set with a plurality of standard known word data. The synchronization detection calculation process is executed at the same time (ST2).
In this synchronization detection calculation processing, synchronization detection is performed as described above, and when synchronization is detected in any of the plurality of synchronization detection calculation processing units, a reception signal of the corresponding standard is received. Judgment (ST3, Yes), the parameter of the standard that has been detected synchronously is supplied to the data acquisition processing block 12, and the processing parameters necessary for the signal processing of the corresponding standard, for example, the baseband filter A parameter for determining the pass bandwidth, a parameter necessary for the modulation degree adjustment process, a parameter necessary for clock recovery, etc. are set (ST4). When this processing is completed, the path changeover switch SW is controlled to supply the received detection signal (modulated signal) to the data acquisition processing block 12 (ST5), and in the data acquisition processing block 12 in which the parameters of each block are adjusted, Modulation degree adjustment, baseband filter processing, clock recovery processing, and data acquisition processing as already described are executed (ST6). Note that, in the above process ST3, when a standard synchronization word that can be detected in synchronization is not included, the process returns to the process ST1 and the same step process is performed (ST3, No).

As explained above, it was explained that the use of the dissimilarity (error) shown in (Equation 3) is useful as means for performing synchronization detection in a state where the standard is not clear. If the invention of Patent Document 2 (referred to as “the invention described in Patent Document 2”) is used, synchronization (frame) detection processing can be performed more reliably.
Instead of calculating the correlation value between the known synchronization word data and the received synchronization word candidate as in the prior art, the synchronization detection means shown in the invention described in Patent Document 2 uses the difference (error) shown in (Equation 3). Further, the calculation for removing the DC offset component is performed, and the synchronization determination is performed based on the calculation result. Since the synchronization determination can be performed accurately even in a state where the reception quality is poor, the present invention can be realized. Very useful. The invention described in Patent Document 2 is described in detail in the publication, and all of them can be referred to. Therefore, only the basic concept will be described here. In the following description, the names of processing blocks and apparatuses described in Patent Document 2 are used, but they can be referred to instead of the same functional blocks in the description of the present invention.

  In one embodiment of the synchronization word detection device according to the invention described in Patent Document 2, a synchronization word storage means for storing a known synchronization word in advance, and a synchronization word candidate acquisition means for acquiring synchronization word candidate symbol data from a received signal waveform A symbol error calculation means for calculating a symbol error between each symbol value of the synchronization word candidate obtained by the synchronization word candidate acquisition means and each symbol corresponding value of the stored synchronization word, and symbols for all symbols obtained by the symbol error calculation means A symbol error average calculating means for obtaining an error average value, a symbol error average subtracting means for subtracting the symbol error average value from each symbol error of the synchronization word candidate obtained by the symbol error calculating means to obtain an offset correction value, The symbol error average subtraction means for each word candidate symbol Correction value square calculation means for squaring the offset correction value obtained in this step, symbol error summing means for adding a result obtained by the correction value square calculation means for all symbols of the synchronization word candidate to obtain a synchronization word symbol error, and a synchronization symbol A synchronization word determination unit is provided for comparing the synchronization word symbol error obtained by the error summing unit with a preset threshold value and determining whether or not the synchronization word candidate is a synchronization word.

The synchronous word detection device includes a clock recovery unit that recovers a clock signal based on a clock signal extracted from the received signal, and a frequency adjustment unit that adjusts an oscillation frequency of the clock recovery unit, and the symbol error It is also possible to provide a means for performing symbol determination by regarding the symbol error average value for all symbols of the synchronization word candidate obtained by the average calculation means as the frequency offset amount of the received signal.
In such a synchronization word detecting means, the average error value is a DC offset amount due to a frequency shift of the received signal, etc., and therefore, by subtracting this offset amount from each symbol error of the synchronization word candidate, An offset correction value that eliminates the influence of the offset can be obtained. Therefore, even when the received signal includes an offset component due to a frequency shift or the like, the synchronization word can be accurately detected by removing the influence. In addition, since this object can be achieved by a simple calculation, there is an effect of shortening the time until the synchronization word is detected and synchronized.
If synchronization word detection is possible in this way, based on the result, even when the clock frequency of the synchronization word detection device is different from the frequency of the clock signal extracted from the received signal, the frequency is automatically corrected. Therefore, the effect of further shortening the time to the synchronization probability can be obtained.

FIG. 5 is a flowchart (FIG. 1 of Patent Document 2) showing an example of the synchronous word detection method described in Patent Document 2. Hereinafter, the outline of the invention described in Patent Document 2 will be described with reference to FIG.
In the example shown in FIG. 5, the output of the reception high-frequency unit is detected by the demodulator (ST11), for example, a signal waveform as shown in FIG. 3 or 7 is obtained, and synchronization word candidate data is obtained from this signal waveform, The symbol data (a _i ) of the synchronization word candidate is acquired from these received signal waveforms (ST12). When the symbol data of the synchronization word candidate is obtained, the symbol error (a _i −S _i ) is calculated by subtracting the corresponding value (S _i ) of the synchronization word stored in advance from (a _i ) ( S13).
Next, an average symbol error value is calculated. This is based on the same concept as the symbol error calculation, and (a _j −S _j ) is calculated for n symbol values, and j is changed from 1 to n. After adding all, the symbol error average value is obtained by dividing by the number of symbols n (ST14).
This calculation is performed based on the equation F _off = Σ (a _j −S _j ) / n (where j is 1 to n). This equation is obtained by dividing Equation 2 E = Σ (a _i −S _i ) ² already described by the number of symbols n and corresponds to an offset amount due to frequency deviation or the like.

This symbol error average value (offset amount) F _off is a waveform offset correction value extracted from the received signal waveform as a synchronization word candidate by subtracting the symbol error calculated in ST13 (a _i −S _i ). The value of − {Σ (a _j −S _j ) / n} is obtained (ST15). Further, a square value of this value is obtained (ST16), and then D = Σ [(a _i −S _i ) − {Σ (a _j −S _j ) / n}] ² (where i and j are 1). The word symbol error D is obtained on the basis of the following formula: This value D indicates the degree of difference between the symbol value of the synchronization word candidate from which the offset is eliminated and the known regular synchronization word, and is a value indicating the degree of synchronization (correlation).
Therefore, this is compared with a preset threshold value (ST19), and if it is smaller than the threshold value (ST19 Yes), it is determined that the synchronization word candidate is a correct synchronization word, and the process proceeds to the next processing. (ST20). If it is determined in step ST19 that the value is larger than the threshold value, it is determined that the synchronization word candidate is not a synchronization word (No in ST19), and a new synchronization word candidate is shifted by one symbol from the received signal waveform. Taking out (ST21), the process returns to the process ST11, and the same process is performed.
As explained above, the invention described in Patent Document 2 is
Since the offset component is detected by calculating F _off = Σ (a _j −S _j ) / n and the influence is removed to perform synchronization detection, synchronization detection is performed from the received detection signal that is expected to generate the offset component. It is extremely useful when performing the above, and can be used as a synchronization detecting means performed in the present invention.

The present invention is not limited to the example described above, and various modifications can be made.
For example, a case has been described in which the synchronization detection processing unit 11 simultaneously performs synchronization detection for signals of a plurality of standards. If synchronization detection cannot be performed at a time, first, what standard the received signal corresponds to? It is also possible to configure to perform accurate synchronization detection by setting necessary parameters after the standard is known, only detecting information necessary to determine In other words, when the reception quality is not good enough to enable synchronization detection, for example, the offset component is detected by calculating F _off = Σ (a _j −S _j ) / n, the influence is removed, and then again. If synchronization detection is performed, the possibility of synchronization detection will increase. In that case, the processing blocks shown in FIGS. 1 and 2 need to be slightly changed.
Further, various modifications in the configuration of the synchronization detection processing unit 11 and combinations of other block configurations and functional processes that function in the same manner are possible. In particular, these processes can be realized in various ways as long as they are digital processing units including a CPU, a DSP, and a memory. For example, the above-described processing for simultaneously comparing the known synchronization word data of a plurality of standards and the received signal is equivalent to the case where the time division processing is performed at high speed and the reception processing is performed substantially simultaneously. Also good.
Furthermore, the object of the present invention is achieved by programming the digital processing and the processing for realizing the functional blocks of the above-described embodiments, respectively, storing them in a digital processing unit including a CPU, DSP, and memory and executing them. Needless to say.

  1 antenna, 2 receiving RF section (receiving high frequency section), 3 high frequency amplifier, 4 mixer, 5 local oscillator, 6 intermediate frequency amplifier, 7 demodulator (detector), 8 band limiting filter, 9 analog / digital converter, 10 baseband processing block, 11 synchronization (frame) detection processing unit, 12 data acquisition processing block, 13 multiplier, 14 modulation degree adjustment processing unit, 15 baseband filter processing unit, 16 clock recovery unit, 17 data acquisition processing unit, 21, 22 Synchronization detection calculation unit, 23, 24 Synchronization word data storage memory, 25 Threshold (threshold) determination unit

Claims (4)

Synchronization word detection means for detecting a frame synchronization signal from the received detection signal, and processing parameters can be changed according to signals based on a plurality of standards each having at least one of a bit rate, a baseband signal frequency band, and a modulation degree, In a digital radio including a data acquisition processing block including at least one of a modulation degree adjustment unit, a baseband filter processing unit, a clock recovery processing unit, and a data acquisition processing unit,
The synchronization word detecting means performs a synchronization word detection by comparing a plurality of known synchronization word data for detecting a plurality of synchronization words of different standards, a received detection signal and the plurality of known synchronization word data. A synchronization word detection processing block; a standard parameter determination means for determining a required standard parameter from the detected synchronization word; a modulation degree adjustment means for the data acquisition processing block based on the determined standard parameter; a baseband filter processing section; A digital wireless device comprising means for controlling at least one processing parameter of a processing unit and a data processing unit. 2. The digital radio of claim 1, wherein the synchronization word detecting means is
Synchronization word storage means for storing a known synchronization word in advance, synchronization word candidate acquisition means for acquiring synchronization word candidate symbol data from the received signal waveform received and detected, and synchronization word candidate obtained by the synchronization word candidate acquisition means Symbol error calculation means for calculating a symbol error between each symbol value and each symbol corresponding value of the stored synchronization word, symbol error average calculation means for calculating a symbol error average value for all symbols obtained by the symbol error calculation means, and symbol error Symbol error average subtracting means for obtaining an offset correction value by subtracting the symbol error average value from each symbol error of the synchronization word candidate obtained by the arithmetic means, and symbol symbol average subtraction means for each symbol of the synchronization word candidate. Correction value to square the offset correction value An arithmetic means, a symbol error summing means for obtaining a sync word symbol error by adding the results obtained by the correction value square computing means for all symbols of the sync word candidate, and a sync word symbol error obtained by the sync symbol error summing means are preset. A digital radio comprising: a synchronization word determination means for determining whether or not the synchronization word candidate is a synchronization word in comparison with the threshold value.   3. The digital radio according to claim 1, wherein said synchronization word detecting means further includes a memory storing known synchronization word data and digital processing parameters corresponding to a plurality of standards. Synchronization word detection means for detecting a frame synchronization signal from the received detection signal, and processing parameters can be changed according to signals based on a plurality of standards each having at least one of a bit rate, a baseband signal frequency band, and a modulation degree, In a control method of a digital radio including a data acquisition process including at least one of a modulation degree adjustment process, a baseband filter process, a clock recovery process, and a data acquisition process,
The synchronization word detecting means performs a synchronization word detection by comparing a plurality of known synchronization word data for detecting a plurality of synchronization words of different standards, a received detection signal and the plurality of known synchronization word data. Synchronization word detection process, standard parameter determination process for determining a required standard parameter from the detected synchronization word, modulation degree adjustment process of the data acquisition process based on the determined standard parameter, baseband filter process, clock recovery process, data A method for controlling a digital radio, comprising a process of controlling at least one processing parameter of a processing unit.

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