JP2010266731A - Variable optical attenuator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable optical attenuator using a rib type silicon thin line waveguide, which achieves high speed operation with low power consumption without requiring useless power. <P>SOLUTION: On the upper surface of a core 103 of an area held between an electrode 141 and an electrode 151, a silicon oxide layer 107 formed by oxidizing the core 103 of this area is provided. For example, the silicon oxide layer 107 is formed by a well known thermal oxidization method, or a plasma oxidization method. It is enough that the thickness of the layer of the silicon oxide layer 107 is about 5 nm. When a voltage is applied, unnecessary current flow is prevented by providing the silicon oxide layer 107, and thereby, lower power consumption is achieved. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a variable optical attenuator that is used in a planar lightwave circuit and an element having silicon as an optical waveguide, and in which the optical intensity of the waveguide can be electrically controlled.

  In a DWDM (Dense Wavelength Division Multiplexing) system that realizes large-capacity optical communication, for example, an EDFA (Er Doped Fiber Amplifier) is used to transmit an optical signal propagating in an optical fiber. In addition to the optical amplifier to be increased, a variable attenuator for attenuating the signal light intensity propagating in the optical fiber to an arbitrary light intensity is also required. As the variable optical attenuator, those using a quartz waveguide or a polymer waveguide, those using a MEMS structure, and the like have been developed. The operating speeds of these variable optical attenuators are millisecond and microsecond, but in order to cope with the recent high speed and wide band of communication, higher speed operation is required.

  Here, a variable optical attenuator using a conventional silicon thin-wire rib waveguide that enables high-speed operation will be described with reference to FIGS. 6 and 7 (see Patent Document 1). FIG. 6 is a sectional view showing a section of the variable optical attenuator, and FIG. 7 is a plan view. FIG. 6 shows a cross section taken along line AA 'of FIG. This variable optical attenuator includes a lower clad 602 on a silicon substrate 601, and a core 603, a slab layer 604, and a slab layer 605 on the lower clad 602. In this structure, the core 603 is formed thicker than the slab layer 604 and the slab layer 605 so that the effective refractive index of the core 603 is relatively large, and is covered with the upper clad 606 so that light is confined. It is said.

  In addition, a p-type semiconductor region 604a into which a p-type impurity is introduced so as to sandwich the core 603 (slab layer 604, slab layer 605), and an n-type impurity into which n-type impurities are introduced are part of a waveguide formed by the core 603. Type semiconductor region 605a.

  In this variable optical attenuator, a PIN structure is formed from a p-type semiconductor region 604a and an n-type semiconductor region 605a provided so as to sandwich a core 603 between a part of a rib waveguide, and a metal electrode 641 is formed on each of these. A metal electrode 651 is connected. By flowing a forward current through the p-type semiconductor region 604a and the n-type semiconductor region 605a using the metal electrode 641 and the metal electrode 651, carriers (electrons and holes) are caused to enter the core 603 of the waveguide. The signal light guided through the rib waveguide is attenuated by absorption of the invaded carriers. The amount of carriers entering the core 603 becomes an amount corresponding to the magnitude of the voltage, and the amount of attenuation can be varied by varying the applied voltage.

  In the variable optical attenuator using the rib-type silicon fine wire waveguide, it is possible to use a silicon fine wire waveguide whose core width is as small as about 0.5 μm, and the p-type semiconductor region 604a and the n-type semiconductor region 605a. Can be close to each other. As a result, light can be attenuated with a very fast response on the order of nanoseconds. In addition, this variable optical attenuator is based on a silicon wire waveguide with strong light confinement and a small core cross-sectional dimension, so it can be made very small, and it can be made multi-channel with multiple variable optical attenuators and other channels. There is also a feature of easy integration with other devices.

JP 2004-258119 A

  However, in the above-described variable optical attenuator using the rib-type silicon fine wire waveguide, the distance between the p-type semiconductor region 604a and the n-type semiconductor region 605a is close to several μm. However, there is a drawback in that it tends to flow even in other routes that are not inside the core 603 such as an interface between the core 603 and the upper clad 606. As a result, the silicon thin-line variable optical attenuator can operate at high speed, but the current that passes the voltage between pn includes a current that does not participate in optical attenuation, and a lot of power is wasted to attenuate light. There was a problem of needing.

  The present invention has been made in order to solve the above-described problems, and in a variable optical attenuator using a rib-type silicon fine wire waveguide, it operates at high speed with low power consumption without needless power consumption. The purpose is to be able to.

  In the variable optical attenuator according to the present invention, a lower cladding layer having a refractive index smaller than that of silicon, a slab layer made of a silicon layer formed on the lower cladding layer, and a part of the slab layer are thickened. Covering the core and the silicon oxide layer, the core formed from the side surface to the surface of the slab layer from the core, and the silicon oxide layer formed by being disposed and oxidized in at least one of the upper surface of the core An upper clad layer formed on the slab layer, an n-type carrier supply part provided near the core of the slab layer, and the vicinity of the core of the slab layer facing the n-type carrier supply part via the core At least a p-type carrier supply unit, and an electrode connected to each of the n-type carrier supply unit and the p-type carrier supply unit.

  In the variable optical attenuator, the silicon oxide layer may be formed by a thermal oxidation method or a plasma oxidation method. Moreover, the slab layer is good to be formed in the film thickness of half or less of a core. In addition, the n-type carrier supply unit and the p-type carrier supply unit may be provided in the vicinity of the core as long as the light propagating through the core is not affected.

  As described above, according to the present invention, the silicon oxide layer formed by oxidizing at least one of the region from the side surface of the core to the surface of the slab layer and the upper surface of the core is provided. In the variable optical attenuator using the thin wire waveguide, an excellent effect is obtained that it is possible to operate at high speed with low power consumption without requiring unnecessary power.

It is sectional drawing which shows the structure of the variable optical attenuator in Embodiment 1 of this invention. It is a top view which shows the structure of the variable optical attenuator in Embodiment 1 of this invention. It is a characteristic view which shows the result of having compared the relationship between optical attenuation amount and the electric current amount sent between PN with the variable optical attenuator of the conventional structure, and the variable optical attenuator in Embodiment 1. FIG. It is sectional drawing which shows the structure of the variable optical attenuator in Embodiment 2 of this invention. It is a top view which shows the structure of the variable optical attenuator in Embodiment 2 of this invention. It is sectional drawing which shows the cross section of a variable optical attenuator. It is a top view which shows the structure of a variable optical attenuator.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[Embodiment 1]
First, Embodiment 1 of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view showing the configuration of the variable optical attenuator according to Embodiment 1 of the present invention, and FIG. 2 is a plan view showing the configuration of the variable optical attenuator according to Embodiment 1. FIG. 1 shows a cross section taken along line AA ′ of FIG.

  This variable optical attenuator first includes a lower clad layer 102 made of an insulating material such as silicon oxide, silicon oxynitride, or silicon nitride on a silicon base 101, and a slab made of silicon on the lower clad layer 102. A layer 104 and a slab layer 105 are provided. The lower cladding layer 102 is formed with a layer thickness of about 3 μm, for example. The slab layer 104 and the slab layer 105 are sandwiched between the slab layer 104 and the core 103 having a ridge structure extending in a predetermined direction. The core 103 is formed to have a width of about 0.2 to 0.6 μm, for example, and the height of the core 103 from the interface of the lower cladding layer 102 is about 0.2 to 0.3 μm. The slab layer 104 and the slab layer 105 are formed thinner than half the height of the core 103.

  In this structure, for example, a silicon (SOI) layer on a buried insulating layer of an SOI substrate is left thin in a region other than the core by a general lithography technique such as known photolithography or electron beam lithography and an etching technique. It can be formed by fine processing. In this case, the buried insulating layer of the SOI substrate becomes the lower cladding layer 102. Further, the pattern formed by processing the SOI layer becomes the core 103, and the remaining regions become the slab layer 104 and the slab layer 105.

  The core 103 thus formed is covered with an upper clad layer 106 made of a material having a smaller refractive index. The upper cladding layer 106 has a thickness of about 2 to 6 μm. Therefore, the core 103 is formed by sandwiching the lower clad layer 102 and the upper clad layer 106 having a lower refractive index than the core 103. In a region other than the core 103, the slab layer 104 and the slab layer 105 are sandwiched between the lower cladding layer 102 and the upper cladding layer 106. These constitute a rib-type waveguide.

  The upper clad layer 106 may be made of silicon oxide, silicon oxynitride, silicon nitride, or the like, like the lower clad layer 102. The upper clad layer 106 may be made of an organic resin material such as polyimide resin, epoxy resin, or silicone resin. There is little loss due to the material, the design of the refractive index is easy, the consistency with the optical device fabrication process using silicon fine wires is good, and the material with little change to the environment is the top material. The clad layer 106 may be used.

  Further, in a partial region in the waveguide direction of the waveguide centering on the core 103, the n-type carrier supply unit 104a and the p-type carrier supply unit 105a are provided on the slab layer 104 and the slab layer 105 near both sides of the core 103. I have. The n-type carrier supply unit 104 a and the p-type carrier supply unit 105 a are disposed opposite to each other in the vicinity of the core 103 with the core 103 interposed therebetween. In addition, an electrode 141 and an electrode 151 that are partially exposed on the upper cladding layer 106 are connected to the n-type carrier supply unit 104a and the p-type carrier supply unit 105a, respectively.

  The n-type carrier supply unit 104a and the p-type carrier supply unit 105a are provided in a range that does not affect the attenuation of light guided through the waveguide centering on the core 103 in a state where no voltage is applied to the electrodes 141 and 151. As long as it is formed at a position as close as possible. Further, the n-type carrier supply unit 104 a and the p-type carrier supply unit 105 a may be formed in a range where carriers can be injected into the core 103. The n-type carrier supply unit 104a and the p-type carrier supply unit 105a can be easily formed by using a known impurity introduction technique such as an ion implantation method, a diffusion method, and a plasma doping method.

  In this variable optical attenuator, the slab layer 104 and the slab layer 105 in which the n-type carrier supply unit 104 a and the p-type carrier supply unit 105 a are formed are formed to be thinner than half the height of the core 103. With this structure, the light guided through the core 103 hardly oozes out to the slab layer 104 and the slab layer 105 and concentrates on the core 103 to form a single mode. For this reason, according to the variable optical attenuator in the present embodiment, there is no region into which impurities are introduced in the region of high optical intensity in the waveguide, and signal light can be propagated without being attenuated. It has become.

  Further, according to this variable optical attenuator, the n-type carrier supply unit 104 a and the p-type carrier supply unit 105 a can be brought closer to the core 103. For example, even when the n-type carrier supply unit 104a and the p-type carrier supply unit 105a are brought close to the edge of the core 103 from 0.5 μm, the signal light can be propagated without attenuating the signal light when no voltage is applied. It is. If the width of the core 103 is 0.5 μm, the distance between the n-type carrier supply unit 104a and the p-type carrier supply unit 105a can be about 1.5 μm.

  In addition, the variable optical attenuator according to the present embodiment includes a silicon oxide layer 107 formed by oxidizing the core 103 in this region on the upper surface of the core 103 in the region sandwiched between the electrode 141 and the electrode 151. For example, the silicon oxide layer 107 can be formed by a well-known thermal oxidation method or plasma oxidation method. The silicon oxide layer 107 may have a thickness of about 5 nm. By including the silicon oxide layer 107, an unnecessary current flow can be prevented in voltage application described later, and power consumption can be reduced. Note that the silicon oxide layer 107 may be formed over the entire area of the core 103 (waveguide).

  The manufacturing process will be briefly described. First, an SOI substrate is prepared, and then the surface silicon layer (SOI layer) is oxidized by about 5 nm. The oxide layer formed by this oxidation treatment becomes the silicon oxide layer 107 on the core 103. At this time, thermal oxidation or plasma oxidation is used for the oxidation treatment of silicon. Next, the SOI layer is finely processed so as to leave a region other than the core 103 thin by a general lithography technique such as known photolithography or electron beam lithography and an etching technique. Next, an n-type carrier supply unit 104a and a p-type carrier supply unit 105a are formed in part of the slab layer 104 and the slab layer 105 by a known impurity introduction technique.

  Next, an upper clad layer 106 made of a material having a refractive index lower than that of the core 103 is formed by a known plasma CVD technique or the like, thereby forming a silicon rib waveguide. In this case, the buried insulating layer of the SOI substrate becomes the lower cladding layer 102. Further, the pattern formed by fine processing becomes the core 103, and the remaining SOI layer regions become the slab layer 104 and the slab layer 105. The film formed on the core 103, the slab layer 104, and the slab layer 105 becomes the upper clad layer 106. In addition, the oxide layer formed first becomes the thin oxide silicon layer 107 on the upper surface of the core 103. In the case of the manufacturing method example described above, the oxide layer silicon 107 is formed on the upper surface of the core 103 over the entire area of the core 103.

  The n-type carrier supply unit 104a and the p-type carrier supply unit 105a can be easily formed by using an impurity introduction technique such as an ion implantation method, a diffusion method, and a plasma doping method before the upper cladding layer 106 is formed. The electrode 141 and the electrode 151 connected to the n-type carrier supply unit 104a and the p-type carrier supply unit 105a can be formed by opening a contact hole in the upper clad layer 106 and embedding an electrode metal.

  Here, the operation of the variable optical attenuator in the present embodiment will be described. In this variable optical attenuator, by applying a voltage to the electrode 141 and the electrode 151, carriers are injected into the core 103 from the n-type carrier supply unit 104a and the p-type carrier supply unit 105a, and a waveguide composed of the core 103 is guided. The intensity of the signal light that propagates (propagates) is attenuated. Further, by changing the magnitude of the voltage applied to the electrode 141 and the electrode 151, the amount of carriers injected into the core 103 from the n-type carrier supply unit 104a and the p-type carrier supply unit 105a is changed. The attenuation is variable.

  In addition, since the variable optical attenuator in this embodiment further includes a highly insulating silicon oxide layer 107 formed by oxidation, when a voltage is applied to the electrodes 141 and 151, Leakage current flowing along the interface with the upper cladding layer 106 is suppressed, and almost all of the current flows in the core 103. For this reason, the variable optical attenuator in the present embodiment can be operated with lower power compared to the conventional structure.

  In the conventional structure, the core of the rib type structure is directly covered by the upper clad. The upper clad layer is generally formed by plasma CVD of a silicon oxide film or the like. In this case, the surface composition of the core is not changed by reaction or the like, and the upper clad layer is formed on the core. Only a film is deposited. For this reason, the core made of silicon and the upper clad made of the deposited film are not fused at the interface, and the adhesion is not good.

  In addition, the deposited film in the vicinity of the interface with the core at the beginning of deposition is, for example, in the case of a silicon oxide film, an unstable film quality such that silicon becomes an excessive oxide film, so that the insulating characteristics are not good. As a result, in the conventional structure in which the upper cladding is formed only by depositing an insulating material such as a silicon oxide film, when a voltage is applied through the electrode, a wasteful current that does not participate in the attenuation of light flowing along the interface between the core and the upper cladding is generated. Exists.

  On the other hand, the variable optical attenuator in the present embodiment includes a silicon oxide layer 107 formed by an oxidation reaction on the upper surface of the core 103. Since the silicon oxide layer 107 is formed by the oxidation reaction of the core 103, it is fused with the silicon constituting the core 103, and is a film having high adhesion and insulating properties. As a result, the silicon oxide layer 107 can prevent an interface leak current with the upper cladding layer 106.

  Since the silicon oxide layer 107 is a film having good insulation formed by an oxidation reaction, a layer thickness of about 5 nm is sufficient. Although the thickness may be further increased, since it is formed by oxidation of the core 103, the thickness of the core 103 is also affected, and the optical waveguide characteristics are also affected. Therefore, the silicon oxide layer 107 is preferably as thin as possible.

  Furthermore, in the variable optical attenuator in the present embodiment, light confinement is enhanced by thinning the slab layer 104 and the slab layer 105, and light leakage to the slab layer 104 and slab layer 105 is reduced. The n-type carrier supply unit 104a and the p-type carrier supply unit 105a can be formed at positions close to the core 103, which is advantageous for speeding up the variable damping operation and reducing energy.

FIG. 3 shows a variable optical attenuator having a conventional structure and the variable optical attenuator according to the first embodiment. The optical attenuation is between the PN (between the n-type carrier supply unit 104a and the p-type carrier supply unit 105a). This is a comparison of the relationship with the amount of current to flow. In this measurement, the variable optical attenuator was manufactured by setting the impurity concentration of the n-type carrier supply unit 104a and the p-type carrier supply unit 105a to 10 ²⁰ / cm ³ and the distance between PNs of 3 μm. In the variable optical attenuator (black circle) in the present embodiment provided with the thin silicon oxide layer 107 on the upper surface of the core 103, a large optical attenuation was obtained at a significantly low current. In FIG. 3, white squares are the results of the variable optical attenuator having the conventional structure. According to the present invention, it has been confirmed that low power consumption of the variable optical attenuator operation can be realized.

[Embodiment 2]
Next, Embodiment 2 of the present invention will be described with reference to FIGS. FIG. 4 is a cross-sectional view showing the configuration of the variable optical attenuator in the second embodiment of the present invention, and FIG. 5 is a plan view showing the configuration of the variable optical attenuator in the second embodiment. FIG. 4 shows a cross section taken along line AA ′ of FIG.

  This variable optical attenuator first includes a lower clad layer 102 made of an insulating material such as silicon oxide or silicon nitride on a silicon base 101, and a slab layer 104 made of silicon, a slab on the lower clad layer 102. Layer 105 is provided. The lower cladding layer 102 is formed with a layer thickness of about 3 μm, for example. The slab layer 104 and the slab layer 105 are sandwiched between the slab layer 104 and the core 103 having a ridge structure extending in a predetermined direction. The core 103 is formed to have a width of about 0.2 to 0.6 μm, for example, and the height of the core 103 from the interface of the lower cladding layer 102 is about 0.2 to 0.3 μm. The slab layer 104 and the slab layer 105 are formed thinner than half the height of the core 103.

  The core 103 is covered with an upper cladding layer 106 made of a material having a smaller refractive index. The upper cladding layer 106 has a thickness of about 2 to 6 μm. The upper clad layer 106 may be made of silicon oxide, silicon oxynitride, silicon nitride, or the like, like the lower clad layer 102. Therefore, the core 103 is formed by sandwiching the lower clad layer 102 and the upper clad layer 106 having a lower refractive index than the core 103. In a region other than the core 103, the slab layer 104 and the slab layer 105 are sandwiched between the lower cladding layer 102 and the upper cladding layer 106. These constitute a rib-type waveguide.

  Further, in a partial region in the waveguide direction of the waveguide centering on the core 103, the n-type carrier supply unit 104a and the p-type carrier supply unit 105a are provided on the slab layer 104 and the slab layer 105 near both sides of the core 103. I have. The n-type carrier supply unit 104 a and the p-type carrier supply unit 105 a are disposed opposite to each other in the vicinity of the core 103 with the core 103 interposed therebetween. In addition, an electrode 141 and an electrode 151 that are partially exposed on the upper cladding layer 106 are connected to the n-type carrier supply unit 104a and the p-type carrier supply unit 105a, respectively. These configurations are the same as those in the first embodiment.

  In the variable optical attenuator according to the present embodiment, the silicon oxide layer 108 and the silicon oxide layer 109 are provided on the side surface of the core 103 and the surfaces of the slab layer 104 and the slab layer 105. The plan view of FIG. 5 shows a case where the silicon oxide layer 108 and the silicon oxide layer 109 are formed in the entire region where the core 103 (waveguide) extends. The silicon oxide layer 108 and the silicon oxide layer 109 may have a thickness of about 5 nm.

  By providing the silicon oxide layer 108 and the silicon oxide layer 109, a leakage current that flows along the interface between the core 103 and the upper cladding layer 106 when a voltage is applied to the electrodes 141 and 151, as in the above-described embodiment. And almost all of the current flows in the core 103. For this reason, the variable optical attenuator in the present embodiment can also be operated with lower power than the conventional structure.

  Note that the silicon oxide layers 108 and 109 do not need to be formed over the entire area of the core 103 and the slab layers 104 and 105 (including the n-type carrier supply unit 104a and the p-type carrier supply unit 105a). For example, silicon oxide layers 108 and 109 may be formed on the side surface of the core 103 and the surfaces of the slab layers 104 and 105 in a region sandwiched between the electrode 141 and the electrode 151.

  Note that a mask layer 401 used to form the core 103 is provided on the core 103. The mask layer 401 will be described later.

  Next, manufacturing will be briefly described. First, an SOI substrate is prepared, and finely processed so as to leave the SOI layer thin by a general lithography technique such as known photolithography or electron beam lithography and an etching technique, and the core 103 is formed. In the patterning of the core 103, for example, a mask layer 401 made of silicon oxide formed by deposition such as CVD is used as a mask for selective etching. Next, an n-type carrier supply unit 104a and a p-type carrier supply unit 105a are formed in part of the slab layer 104 and the slab layer 105 by a known impurity introduction technique. For example, a known impurity introduction technique such as an ion implantation method, a diffusion method, or a plasma doping method may be used.

  Next, thermal oxidation or plasma oxidation is performed to form an oxide film of about 5 nm on the side surface of the core 103 and the surfaces of the slab layer 104 and the slab layer 105. At this time, the side surface of the core 103 and the surfaces of the slab layer 104 and the slab layer 105 are oxidized by performing the above oxidation while leaving the mask layer 401 used as a mask for forming the core 103. The mask layer 401 used as a mask for forming the core 103 may be removed and then oxidized, but in this case, there is a problem in that the number of steps for removing the mask layer 401 is increased. Since the mask layer 401 used as an etching mask is the same silicon oxide as the upper clad 106, it is not necessary to remove it.

  Here, when plasma oxidation is performed, ECR plasma is generated by oxygen gas, and this ECR plasma is irradiated to the side surfaces of the core 103, the surfaces of the slab layer 104 and the slab layer 105, and an oxide film is formed on these silicon surfaces. Just do it. In this case, a silicon oxide layer is formed on the side surface of the core 103 and the surfaces of the slab layer 104 and the slab layer 105 including the n-type carrier supply unit 104a and the p-type carrier supply unit 105a throughout the variable optical attenuator. Become so.

  After forming the silicon oxide layer 108 and the silicon oxide layer 109 in this way, silicon oxide, silicon oxynitride, and silicon nitride are deposited by a known plasma CVD technique or the like to form the upper clad layer 106, thereby forming silicon. Complete the rib waveguide.

  Next, a contact hole is opened in the upper clad layer 106 and a metal is embedded to form an electrode 141 and an electrode 151 connected to the n-type carrier supply unit 104a and the p-type carrier supply unit 105a. In the manufacturing method described above, the buried insulating layer of the SOI substrate becomes the lower cladding layer 102, the pattern formed by processing becomes the core 103, and the regions left by processing become the slab layer 104 and the slab layer 105.

  As described above, in the present invention, between the silicon core and the upper cladding layer covering the silicon core, by oxidizing these to at least one of the region from the side surface of the core to the surface of the slab layer and the upper surface of the core. Since the formed silicon oxide layer is provided, it is possible to prevent useless leakage current flowing outside the core when a voltage is applied to the PIN structure. Here, the silicon oxide layer formed by oxidation may be formed on any one of the upper surface of the core, the side surface of the core, and the upper surface of the slab layer, or may be formed on both. .

  In addition, the n-type carrier supply unit and the p-type carrier supply unit were arranged at positions close to the possible range of the core within a range where there is no influence. Further, by making the thickness of the slab layer less than half of the core, the light propagating through the rib waveguide is prevented from leaking into the slab layer so that the n-type carrier supply unit and the p-type carrier supply unit can be brought close to the core. did.

  As a result, the current efficiently flows inside the core, the interval between the n-type carrier supply unit and the p-type carrier supply unit is narrowed, and the carriers are quickly injected into the core. It is possible to obtain an excellent effect that the optical attenuation operation can be performed with low power consumption and the optical attenuation can be performed with a fast response.

  DESCRIPTION OF SYMBOLS 101 ... Silicon base part, 102 ... Lower clad layer, 103 ... Core, 104 ... Slab layer, 104a ... N-type carrier supply part, 105 ... Slab layer, 105a ... P-type carrier supply part, 106 ... Upper clad layer, 107 ... Oxidation Silicon layer, 141, 151 ... electrode.

Claims (4)

A lower cladding layer having a refractive index lower than that of silicon;
A slab layer made of a silicon layer formed on the lower cladding layer;
A core formed by thickening part of this slab layer;
A silicon oxide layer formed by being disposed and oxidized in at least one of a region from the side surface of the core to the surface of the slab layer and the upper surface of the core;
An upper clad layer formed on the slab layer covering the core and the silicon oxide layer;
An n-type carrier supply unit provided in the vicinity of the core of the slab layer;
A p-type carrier supply unit provided in the vicinity of the core of the slab layer facing the n-type carrier supply unit via the core;
A variable optical attenuator comprising at least electrodes connected to the n-type carrier supply unit and the p-type carrier supply unit, respectively. The variable optical attenuator according to claim 1, wherein
The variable optical attenuator, wherein the silicon oxide layer is formed by a thermal oxidation method or a plasma oxidation method. The variable optical attenuator according to claim 1 or 2,
The variable optical attenuator, wherein the slab layer is formed to have a film thickness less than half of the core. The variable optical attenuator according to any one of claims 1 to 3,
The variable optical attenuator, wherein the n-type carrier supply unit and the p-type carrier supply unit are provided in the vicinity of the core as long as light propagating through the core is not affected.

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