JP2010258503A - Tdd type wireless communication device - Google Patents

Tdd type wireless communication device Download PDF

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JP2010258503A
JP2010258503A JP2009102910A JP2009102910A JP2010258503A JP 2010258503 A JP2010258503 A JP 2010258503A JP 2009102910 A JP2009102910 A JP 2009102910A JP 2009102910 A JP2009102910 A JP 2009102910A JP 2010258503 A JP2010258503 A JP 2010258503A
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transmission
reception
delay
frequency
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Daisuke Nagai
大介 永井
Toshio Hayashi
俊夫 林
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NEC Engineering Ltd
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NEC Engineering Ltd
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<P>PROBLEM TO BE SOLVED: To solve the problem that when the reception-side speed of a TDD type wireless communication device is slow, a delay for correcting variations of an antenna peripheral circuit can not be measured with high precision. <P>SOLUTION: In the TDD type wireless communication device which performs conversion between a digital main signal input from a host device and an analog transmission and reception signal with an intermediate frequency between the frequency of the digital main signal and a carrier frequency, a timing control unit 12 which varies a delay time of a calibration signal for measuring delay times of antenna peripheral circuits 30, 31 in a no-signal section of a time-division switching part between a transmission time and a reception time is provided on a transmission side. Each of the antenna peripheral circuits returns a transmission calibration signal to a reception side. A correlator 25 calculates correlation between the transmission calibration signal and the returned calibration signal. A transmission delay adjustment unit 13 and a reception delay adjustment unit 22 adjust a delay of the digital signal with the intermediate frequency based upon a result of the correlation. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、TDD(Time Division Duplex)方式のデジタル無線通信システムに関し、特に、TDD方式の無線通信装置における遅延補正回路に関する。   The present invention relates to a TDD (Time Division Duplex) digital wireless communication system, and more particularly to a delay correction circuit in a TDD wireless communication apparatus.

TDD方式の無線通信装置においては、同一の帯域で複数の局が同時に通信を行なう際の他局間干渉対策として、複数のアンテナで構成されるアダプティブアレーアンテナを用いることが多い。この場合、各アンテナに対応するアンテナ周辺回路はアナログ素子で構成されるため遅延量のバラツキが大きいので、その補正するために遅延量を測定する必要がある。この測定を遅延のキャリブレーションという。   In a TDD wireless communication apparatus, an adaptive array antenna composed of a plurality of antennas is often used as a countermeasure against interference between other stations when a plurality of stations communicate simultaneously in the same band. In this case, since the antenna peripheral circuit corresponding to each antenna is composed of analog elements, there is a large variation in the delay amount. Therefore, it is necessary to measure the delay amount in order to correct it. This measurement is called delay calibration.

従来、送受信に同一の周波数を使用するTDD方式の無線通信装置におけるキャリブレーションは、送信時間と受信時間の時分割切替え部分の無信号区間であるギャップを利用して、送信側から固定タイミングでキャリブレーション信号(試験信号)を送信する。受信側では自局内で折り返されたキャリブレーション信号を受信し、回路遅延量を変えながら送信キャリブレーション信号との相関検出することにより行なう。   Conventionally, calibration in a TDD wireless communication apparatus that uses the same frequency for transmission and reception is performed at a fixed timing from the transmission side using a gap that is a no-signal section of a time division switching portion between transmission time and reception time. Transmission of test signals (test signals). The receiving side receives the calibration signal turned back in its own station, and detects the correlation with the transmission calibration signal while changing the circuit delay amount.

図7は、上記の従来技術を本願発明との対比を容易化するように描いたTDD方式無線通信装置である。この無線通信装置は、上位装置(不図示)から入力してくるデータの速度を中間周波数に逓倍するDUC(Digital Up Converter)42と、キャリア周波数を中間周波数に逓減するDDC(Digital Down Converter)53を用いている。キャリブレーション信号を発生するコード発生部41は主信号の流れの経路に挿入されている。   FIG. 7 shows a TDD wireless communication apparatus in which the above prior art is drawn so as to facilitate comparison with the present invention. This wireless communication device includes a DUC (Digital Up Converter) 42 that multiplies the speed of data input from a host device (not shown) to an intermediate frequency, and a DDC (Digital Down Converter) 53 that multiplies the carrier frequency to an intermediate frequency. Is used. A code generator 41 for generating a calibration signal is inserted in the main signal flow path.

図7において、送信側(図の上部)のコード発生部41から固定タイミングでキャリブレーション信号を送信し、アンテナ共用制御部30およびカプラ31を経て受信側(図の下部)へ折り返す。受信側のタイミング制御部54は、このキャリブレーション信号について遅延量を変えるようにタイミング制御を行う。相関器56は、送信側のキャリブレーション信号とタイミング制御されたキャリブレーション信号との相関をとることにより、アンテナ周辺回路(アンテナ共用制御部30およびカプラ31)の遅延量を測定する。   In FIG. 7, a calibration signal is transmitted at a fixed timing from the code generation unit 41 on the transmission side (upper part of the figure), and is returned to the reception side (lower part of the figure) via the antenna sharing control unit 30 and the coupler 31. The timing control unit 54 on the reception side performs timing control so as to change the delay amount for this calibration signal. The correlator 56 measures the delay amount of the antenna peripheral circuit (the antenna sharing control unit 30 and the coupler 31) by correlating the calibration signal on the transmission side with the timing-controlled calibration signal.

しかしながら、この構成では、相関器56の入力データ速度はDDC53の出力、即ち、受信データ速度(受信のデータサンプリング周期)に制限されるため、受信側の速度が遅い場合には、高精度な遅延測定ができないという問題点がある。また、この構成でタイミング制御部54を送信側(DUCの直前)へ移した場合は主信号の送信に悪影響を与えてしまう。   However, in this configuration, since the input data rate of the correlator 56 is limited to the output of the DDC 53, that is, the reception data rate (reception data sampling period), a high-accuracy delay is achieved when the reception side is slow. There is a problem that it cannot be measured. In addition, when the timing control unit 54 is moved to the transmission side (immediately before the DUC) in this configuration, the main signal transmission is adversely affected.

なお、タイミング制御回路54を送信側に設け、基準周波数を逓倍した速度でキャリブレーション信号を送信し、送信側と受信側の受信までの遅延時間を測定するようにした技術も公知である。しかし、この技術は、送信側と受信側の相関をとるという概念が無く、恰もストップウォッチで計時するように、キャリブレーション信号が送信側から受信側へ戻ってくるまでの遅延時間を計測するため、送信側で速い速度でキャリブレーション信号を送出しても、受信側の速度が遅い場合には、高精度の測定ができないという問題点がある。   A technique is also known in which a timing control circuit 54 is provided on the transmission side, a calibration signal is transmitted at a speed obtained by multiplying the reference frequency, and a delay time until reception on the transmission side and the reception side is measured. However, this technique has no concept of correlating the transmission side and the reception side, and measures the delay time until the calibration signal returns from the transmission side to the reception side, as if it is timed by a stopwatch. Even when the calibration signal is transmitted at a high speed on the transmission side, there is a problem that high-precision measurement cannot be performed if the reception side is slow.

特開2000−013454号公報Japanese Unexamined Patent Publication No. 2000-013454 特許第3180735号公報Japanese Patent No. 3180735

解決しようとする問題点は、受信側の速度が遅い場合には、アンテナ周辺回路のバラツキを補正するための遅延量を高精度で測定できないということである。   The problem to be solved is that when the speed on the receiving side is slow, the delay amount for correcting variations in the antenna peripheral circuit cannot be measured with high accuracy.

本発明は、キャリブレーション信号の遅延量を変化させるタイミング制御部を送信側のサンプリング速度が高速な部分に設け、かつキャリブレーション信号を主信号の経路へ挿入することを最も主要な特徴とする。   The main feature of the present invention is that a timing control unit for changing the delay amount of the calibration signal is provided in a portion where the sampling rate on the transmission side is high, and the calibration signal is inserted into the path of the main signal.

本発明のTDD方式無線通信装置は、受信側のデータ速度よりも高精度な遅延量を検出できるという第1の利点がある。その理由は、受信データ速度よりも高速なタイミング制御回路を送信側に設け、送信側の速度変換後の高速な速度単位にてタイミング制御を行うことにより、受信データ速度よりも細かい単位での高精度な遅延量が相関値の計算結果から取得できるからである。   The TDD wireless communication apparatus of the present invention has a first advantage that it can detect a delay amount with higher accuracy than the data rate on the receiving side. The reason for this is that a timing control circuit that is faster than the received data rate is provided on the transmission side, and timing control is performed in units of higher speeds after the speed conversion on the transmitting side, so that a higher unit in finer units than the received data rate. This is because an accurate delay amount can be obtained from the calculation result of the correlation value.

また、キャリブレーション信号のみの挿入タイミングを制御するため運用中でも遅延測定が可能となることであるという第2の利点がある。   Further, there is a second advantage that delay measurement is possible even during operation because the insertion timing of only the calibration signal is controlled.

本発明のTDD方式無線通信装置の一実施例を示すブロック図The block diagram which shows one Example of the TDD system radio | wireless communication apparatus of this invention タイミング制御部の動作を説明するための図Diagram for explaining the operation of the timing controller コード発生部で保持しているキャリブレーション信号を示す図Diagram showing calibration signal held by code generator タイミング制御部で遅延挿入されたキャリブレーション信号を示す図The figure which shows the calibration signal which is inserted with delay in the timing control section DDCでのDecimationを示す図Diagram showing Decimation at DDC 相関器における相関値の算出結果を示す図The figure which shows the calculation result of correlation value in correlator 従来のTDD方式無線通信装置を示すブロック図Block diagram showing a conventional TDD wireless communication apparatus

図1は、本発明の一実施例を示すブロック図である。このTDD方式の無線通信装置はアンテナ周辺回路の経時変化や装置の環境温度、送信周波数等に起因する、ばらつきの発生による遅延量を補正するものである。図1において、送信側は、上位装置から入力してくるデジタルデータを送出するデジタルデータ送信部10、デジタルデータの速度を変換するDUC11、タイミング制御を行うタイミング制御部12、送信のキャリブレーション結果を反映する送信遅延調整部13、デジタル信号をアナログ信号に変換するDAC(Digital To Analog Converter)14、キャリア周波数まで周波数変換する無線送信部15、キャリブレーション信号を発生するコード発生部16から構成される。   FIG. 1 is a block diagram showing an embodiment of the present invention. This TDD wireless communication apparatus corrects the amount of delay due to the occurrence of variations caused by changes in the antenna peripheral circuit over time, the environmental temperature of the apparatus, the transmission frequency, and the like. In FIG. 1, the transmission side transmits a digital data transmission unit 10 that transmits digital data input from a host device, a DUC 11 that converts the speed of the digital data, a timing control unit 12 that performs timing control, and a transmission calibration result. A transmission delay adjusting unit 13 to reflect, a DAC (Digital To Analog Converter) 14 for converting a digital signal into an analog signal, a wireless transmission unit 15 for frequency conversion to a carrier frequency, and a code generation unit 16 for generating a calibration signal .

また受信側は、受信データの処理を行う無線受信部20、アナログ信号をデジタル信号に変換するADC(Analog To Digital Converter)21、受信のキャリブレーション結果を反映する受信遅延調整部22、受信速度を変換するDDC23、デジタルデータの受信処理を行うデジタルデータ受信部24、相関計算を行う相関器25から構成される。   The reception side also includes a wireless reception unit 20 that processes received data, an ADC (Analog To Digital Converter) 21 that converts an analog signal into a digital signal, a reception delay adjustment unit 22 that reflects a reception calibration result, and a reception speed. It comprises a DDC 23 for conversion, a digital data receiver 24 for receiving digital data, and a correlator 25 for performing correlation calculation.

送信側の出力端子17,受信側の入力端子26は、アンテナ共用制御部30の端子a,cに接続され、アンテナ共用制御部30の端子b,dはカプラ31の2つの端子に接続される。端子bに接続されているカプラ31の一端はアンテナ32に導かれ、カプラ31の他端は端子dに接続されている。   The output terminal 17 on the transmission side and the input terminal 26 on the reception side are connected to the terminals a and c of the antenna sharing control unit 30, and the terminals b and d of the antenna sharing control unit 30 are connected to two terminals of the coupler 31. . One end of the coupler 31 connected to the terminal b is led to the antenna 32, and the other end of the coupler 31 is connected to the terminal d.

上位装置から入力してくるデータの速度を5MHz、キャリア周波数は送信、受信共に2GHz、これらの中間の速度を80MHzとする。中間の速度は、送信側の回路11〜14および受信側の回路21〜23に要求される動作速度や回路構成等を考慮して決定される。図1に示した各要素10〜16,20〜25,30は上位装置からの制御信号により動作する。   The speed of data input from the host device is 5 MHz, the carrier frequency is 2 GHz for both transmission and reception, and the intermediate speed is 80 MHz. The intermediate speed is determined in consideration of the operation speed and circuit configuration required for the transmission-side circuits 11 to 14 and the reception-side circuits 21 to 23. Each element 10-16, 20-25, 30 shown in FIG. 1 operate | moves by the control signal from a high-order apparatus.

DUC11は16倍Interpolation回路を内蔵し、上位装置から入力してくるデータの速度5MHzを80MHzに逓倍する。コード発生部16は、図3(A)に示す5MHzのキャリブレーション信号と、図3(B)に示す80MHzのキャリブレーション信号を保持しており、前者は相関器25、後者はタイミング制御部12へ出力する。図3は、黒点が示す値に意味があり、それらを結ぶ実線は補助線であるに過ぎない。また、図3(B)において、各黒点の時間間隔が1/80MHzである。   The DUC 11 has a built-in 16-times Interpolation circuit, and multiplies the data rate 5 MHz input from the host device to 80 MHz. The code generator 16 holds a calibration signal of 5 MHz shown in FIG. 3A and an calibration signal of 80 MHz shown in FIG. 3B. The former is the correlator 25 and the latter is the timing controller 12. Output to. In FIG. 3, the values indicated by the black dots are meaningful, and the solid line connecting them is only an auxiliary line. In FIG. 3B, the time interval between the black spots is 1/80 MHz.

タイミング制御部12は、コード発生部16が保持している80MHzのキャリブレーション信号を、図4に示すように、1/80MHz単位で遅延させながら、送信時間と受信時間の無信号区間に挿入する。図4におけるkの値は遅延を測定するのに十分な値とする。N=kのときの遅延量はk/80MHzとなる。送信遅延調整部13は、送信経路のキャリブレーション結果を反映するように主信号を遅延させる。DAC14の出力は80MHzであり、これを無線送信部15でキャリア周波数2GHzまでアップコンバートして、送信端子17から出力される。   The timing control unit 12 inserts the 80 MHz calibration signal held by the code generation unit 16 into the no-signal interval between the transmission time and the reception time while delaying in units of 1/80 MHz as shown in FIG. . The value of k in FIG. 4 is a value sufficient to measure the delay. The delay amount when N = k is k / 80 MHz. The transmission delay adjusting unit 13 delays the main signal so as to reflect the calibration result of the transmission path. The output of the DAC 14 is 80 MHz, and this is up-converted to a carrier frequency of 2 GHz by the wireless transmission unit 15 and output from the transmission terminal 17.

アンテナ共用制御部30はアンテナ32との間で主信号を受け渡しする。主信号の送信時には、図2(A)に示すように端子aと端子bが直結され、受信時には、図2(B)に示すように端子bと端子cが直結される。また、送信経路遅延測定時には、図2(C)に示すように端子aと端子b、端子cと端子dが直結され、受信経路遅延測定時には、図2(D)に示すように端子aと端子d、端子bと端子cが直結される。   The antenna sharing control unit 30 exchanges main signals with the antenna 32. At the time of transmission of the main signal, the terminal a and the terminal b are directly connected as shown in FIG. 2 (A), and at the time of reception, the terminal b and the terminal c are directly connected as shown in FIG. 2 (B). Further, at the time of transmission path delay measurement, terminal a and terminal b and terminal c and terminal d are directly connected as shown in FIG. 2 (C), and at the time of reception path delay measurement, terminal a and terminal a as shown in FIG. 2 (D). Terminals d, b and c are directly connected.

受信端子26から入力される主信号はキャリア周波数2GHzであり、これを無線受信部20で80MHzまでダウンコンバートする。ADC21の出力は80MHzであり、送信遅延調整部22は、受信経路のキャリブレーション結果を反映するように主信号を遅延させる。   The main signal input from the reception terminal 26 has a carrier frequency of 2 GHz, and is down-converted to 80 MHz by the radio reception unit 20. The output of the ADC 21 is 80 MHz, and the transmission delay adjustment unit 22 delays the main signal to reflect the calibration result of the reception path.

DDC23は1/16Decimation回路を内蔵し、80MHzの入力データを5MHzにダウンコンバートする。図5は、タイミング制御部12で遅延量を変えた場合に、DDC23でサンプリングされる信号の検出レベルが変化する様子を示す。この結果が相関器25へ出力される。   The DDC 23 incorporates a 1/16 Decimation circuit and down-converts 80 MHz input data to 5 MHz. FIG. 5 shows how the detection level of the signal sampled by the DDC 23 changes when the delay amount is changed by the timing control unit 12. This result is output to the correlator 25.

相関器25は、DDC23の出力である受信データRx(m)と、コード発生部16が保持している5MHzのキャリブレーション信号Tx(m)との間で相関値を次式により計算する。Pはキャリブレーション信号の数を表す。

Figure 2010258503
The correlator 25 calculates a correlation value between the reception data Rx (m), which is the output of the DDC 23, and the 5 MHz calibration signal Tx (m) held by the code generator 16 by the following equation. P represents the number of calibration signals.
Figure 2010258503

図6は、キャリブレーション信号の遅延量Nを変化させた場合の相関値をグラフ表示する。相関値が最大となるグラフの頂点を与える遅延量kの値がこのシステムの遅延量となる。アンテナ共用制御部30における接続を図2(C)と図2(D)に示したように切り換えて、送信経路と受信経路について、このような相関を求める。相関器25で求められた相関結果は上位装置へ出力される。上位装置は、相関結果から送信遅延調整部13と受信遅延調整部22に対し遅延を指示するための制御信号を出力する。   FIG. 6 graphically displays the correlation value when the delay amount N of the calibration signal is changed. The value of the delay amount k that gives the vertex of the graph with the maximum correlation value is the delay amount of this system. The connection in the antenna sharing control unit 30 is switched as shown in FIGS. 2C and 2D, and such correlation is obtained for the transmission path and the reception path. The correlation result obtained by the correlator 25 is output to the host device. The host device outputs a control signal for instructing the delay to the transmission delay adjustment unit 13 and the reception delay adjustment unit 22 from the correlation result.

上位装置から入力してくる主信号は、デジタルデータ送信部10〜無線送信部15,アンテナ共用制御部30およびカプラ31を経由してアンテナ32から送信される。このとき、タイミング制御部12におけるタイミング制御はなく、送信遅延調整部13においては上位装置からの制御信号により主信号の遅延を調整する。制御信号は、図2(C)に示した接続により求めた送信経路の遅延測定に基づくものである。また、アンテナ共用制御部30における端子間の接続は図2(A)に示したとおりである。   The main signal input from the host device is transmitted from the antenna 32 via the digital data transmission unit 10 to the wireless transmission unit 15, the antenna sharing control unit 30 and the coupler 31. At this time, there is no timing control in the timing control unit 12, and the transmission delay adjustment unit 13 adjusts the delay of the main signal by the control signal from the host device. The control signal is based on the transmission path delay measurement obtained by the connection shown in FIG. Further, the connection between the terminals in the antenna sharing control unit 30 is as shown in FIG.

アンテナ32で受信された主信号は、カプラ31,アンテナ共用制御部30および無線受信部20〜デジタルデータ受信部24を経由して上位装置へ送出される。このとき、アンテナ共用制御部30における端子間の接続は図2(B)に示したとおりである。また、受信遅延調整部22においては上位装置からの制御信号により主信号の遅延を調整する。制御信号は、図2(D)に示した接続により求めた受信経路の遅延測定に基づくものである。このような主信号の送信時間と受信時間の時分割切替部分の無信号区間であるギャップを利用して、前述のような相関を求める。   The main signal received by the antenna 32 is sent to the host device via the coupler 31, the antenna sharing control unit 30, and the radio reception unit 20 to the digital data reception unit 24. At this time, the connection between the terminals in the antenna sharing control unit 30 is as shown in FIG. The reception delay adjusting unit 22 adjusts the delay of the main signal by a control signal from the host device. The control signal is based on the delay measurement of the reception path obtained by the connection shown in FIG. The correlation as described above is obtained by using the gap which is a non-signal section of the time division switching portion between the transmission time and the reception time of the main signal.

ここまでの基本的な構成の無線通信装置に対して、下記のような種々の実施の形態が考えられる。先ず、マルチキャリア構成とするために、異なるキャリア周波数の主信号を送信するデジタルデータ送信部10,DUC11,タイミング制御部12,コード発生部16および送信遅延調整部13の複数Xセットを並列に接続し、送信信号の各キャリア周波数が周波数軸上で重ならないように束ねる処理部をDAC14の前段に設ける。また、受信遅延調整部22,DDC23,デジタルデータ受信部24および相関器25の複数Xセットを並列に接続し、多重された受信信号を分離する処理部をADC21の後段に設ける。この構成により、X個の回路群毎に、前述の基本構成と同様な効果を得ることができる。   The following various embodiments are conceivable for the wireless communication apparatus having the basic configuration so far. First, in order to obtain a multi-carrier configuration, a plurality of X sets of digital data transmission unit 10, DUC 11, timing control unit 12, code generation unit 16, and transmission delay adjustment unit 13 that transmit main signals of different carrier frequencies are connected in parallel. A processing unit that bundles the carrier frequencies of the transmission signals so as not to overlap on the frequency axis is provided in the front stage of the DAC 14. In addition, a plurality of X sets of the reception delay adjusting unit 22, DDC 23, digital data receiving unit 24, and correlator 25 are connected in parallel, and a processing unit for separating the multiplexed received signals is provided in the subsequent stage of the ADC 21. With this configuration, it is possible to obtain the same effect as the above-described basic configuration for each of the X circuit groups.

次に、基本構成ではアンテナ32を1つとしているが、複数のアンテナおよびアンテナ共用制御部を設けたマルチチャネル構成としてもよい。この場合には、アンテナ周辺回路の経時変化等と共にアンテナ周辺回路のバラツキを補正するために遅延量を測定することとなる。このマルチチャネル構成はマルチキャリア構成と組み合わせてもよい。   Next, although the single antenna 32 is used in the basic configuration, a multi-channel configuration in which a plurality of antennas and an antenna sharing control unit are provided may be used. In this case, the delay amount is measured in order to correct the variation of the antenna peripheral circuit along with the aging of the antenna peripheral circuit. This multi-channel configuration may be combined with the multi-carrier configuration.

10 デジタルデータ送信部
11 DUC
12 タイミング制御部
13 送信遅延調整部
14 DAC
15 無線送信部
16 コード発生部
17 送信端子
20 無線受信部
21 ADC
22 受信遅延調整部
23 DDC
24 デジタルデータ受信部
25 相関器
26 受信端子
30 アンテナ共用制御部
31 カプラ
32 アンテナ部
a〜d 端子
10 Digital data transmitter 11 DUC
12 Timing control unit 13 Transmission delay adjustment unit 14 DAC
DESCRIPTION OF SYMBOLS 15 Wireless transmission part 16 Code generation part 17 Transmission terminal 20 Wireless reception part 21 ADC
22 Reception delay adjustment unit 23 DDC
24 digital data receiving unit 25 correlator 26 receiving terminal 30 antenna sharing control unit 31 coupler 32 antenna unit a to d terminals

Claims (4)

上位装置から入力するデジタル主信号の周波数とキャリア周波数の中間周波数で前記デジタル主信号とアナログ送受信信号との変換を行なうTDD方式無線通信装置において、
送信時間と受信時間の時分割切替え部分の無信号区間でアンテナ周辺回路の遅延時間を測定するためのキャリブレーション信号の遅延時間を変えるタイミング制御部を送信側に設け、
前記キャリブレーション信号を前記アンテナ周辺回路から受信側へ折り返す手段と、
前記送信キャリブレーション信号と前記折り返されたキャリブレーション信号との相関計算を行なう手段と、
前記相関の結果に基づいて、前記中間周波数で前記デジタル信号の遅延調整を行なう手段を有することを特徴とするTDD方式無線通信装置。
In a TDD wireless communication apparatus that performs conversion between the digital main signal and the analog transmission / reception signal at an intermediate frequency between the frequency of the digital main signal input from the host device and the carrier frequency,
Provided on the transmission side a timing control unit for changing the delay time of the calibration signal for measuring the delay time of the antenna peripheral circuit in the no-signal section of the time division switching part of the transmission time and the reception time,
Means for folding the calibration signal from the antenna peripheral circuit to the receiving side;
Means for calculating a correlation between the transmission calibration signal and the folded calibration signal;
A TDD wireless communication apparatus comprising means for performing delay adjustment of the digital signal at the intermediate frequency based on the correlation result.
上位装置から入力する主信号の周波数のキャリブレーション信号および前記主信号の周波数とキャリア周波数との中間周波数のキャリブレーション信号を保持しているコード発生部と、
前記主信号の周波数を前記中間周波数に変換するDUCと、
送信時間と受信時間の時分割切替え部分の無信号区間で前記DUCからの主信号に前記主信号の周波数のキャリブレーション信号を挿入し、その遅延時間を変えるタイミング制御部と、
アンテナとの間で主信号を受け渡しすると共に前記無信号区間で前記遅延時間を変えられたキャリブレーション信号を受信側へ折り返すアンテナ周辺回路と、
受信された主信号および前記折り返されたキャリブレーション信号の周波数を前記中間周波数から前記主信号の周波数に変換するDDCと、
前記コード発生部が保持しているキャリブレーション信号と、前記DDCから出力されるキャリブレーション信号との相関計算を行なう相関器と、
前記相関計算の結果に基づく前記上位装置からの制御信号により、前記中間周波数における送信主信号および受信主信号の遅延調整を行なう遅延調整部を有することを特徴とするTDD方式無線通信装置。
A code generator holding a calibration signal of the frequency of the main signal input from the host device and a calibration signal of an intermediate frequency between the frequency of the main signal and the carrier frequency;
A DUC that converts the frequency of the main signal to the intermediate frequency;
A timing control unit that inserts a calibration signal of the frequency of the main signal into the main signal from the DUC in a no-signal section of a time-division switching part between the transmission time and the reception time, and changes the delay time;
An antenna peripheral circuit that passes the main signal to and from the antenna and folds back the calibration signal whose delay time is changed in the no-signal section to the receiving side,
A DDC that converts the frequency of the received main signal and the folded calibration signal from the intermediate frequency to the frequency of the main signal;
A correlator for performing a correlation calculation between the calibration signal held by the code generator and the calibration signal output from the DDC;
A TDD wireless communication apparatus, comprising: a delay adjustment unit configured to adjust a delay of a transmission main signal and a reception main signal at the intermediate frequency by a control signal from the host apparatus based on a result of the correlation calculation.
前記DUC,前記タイミング制御部,前記コード発生部および送信側の前記遅延調整部の複数Xセットを並列に接続し、送信信号の各キャリア周波数が周波数軸上で重ならないように束ねる処理部を設け、
また、受信側の遅延調整部,前記DDCおよび前記相関器の複数Xセットを並列に接続し、多重された受信信号を分離する処理部を設けたことを特徴とする請求項2に記載のマルチキャリア構成のTDD方式無線通信装置。
A plurality of X sets of the DUC, the timing control unit, the code generation unit, and the delay adjustment unit on the transmission side are connected in parallel, and a processing unit is provided so that the carrier frequencies of transmission signals are bundled so as not to overlap on the frequency axis ,
3. The multi-path according to claim 2, further comprising: a delay-side adjustment unit on the reception side, a plurality of X sets of the DDC and the correlator connected in parallel, and a processing unit for separating the multiplexed reception signals. A TDD wireless communication apparatus having a carrier configuration.
複数の前記アンテナおよび前記アンテナ共用制御部を設けてマルチチャネル構成としたことを特徴とする請求項2または請求項3に記載のTDD方式無線通信装置。   4. The TDD wireless communication apparatus according to claim 2, wherein a plurality of the antennas and the antenna sharing control unit are provided to have a multi-channel configuration. 5.
JP2009102910A 2009-04-21 2009-04-21 Tdd type wireless communication device Pending JP2010258503A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2769483A4 (en) * 2011-10-21 2015-07-01 Optis Cellular Technology Llc Methods, processing device, computer programs, computer program products and antenna apparatus for calibration of antenna apparatus
WO2016158665A1 (en) * 2015-03-31 2016-10-06 株式会社オートネットワーク技術研究所 Signal conversion device, reception device, and transmission/reception device
JP2019165392A (en) * 2018-03-20 2019-09-26 日本電気株式会社 Delay adjustment device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09247066A (en) * 1996-03-05 1997-09-19 Toshiba Corp Synthesized diversity radio communication equipment
JP2000013454A (en) * 1998-06-18 2000-01-14 Matsushita Electric Ind Co Ltd Calibration device
JP3180735B2 (en) * 1997-10-22 2001-06-25 松下電器産業株式会社 Wireless terminal with transmission timing correction function and method of manufacturing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09247066A (en) * 1996-03-05 1997-09-19 Toshiba Corp Synthesized diversity radio communication equipment
JP3180735B2 (en) * 1997-10-22 2001-06-25 松下電器産業株式会社 Wireless terminal with transmission timing correction function and method of manufacturing the same
JP2000013454A (en) * 1998-06-18 2000-01-14 Matsushita Electric Ind Co Ltd Calibration device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2769483A4 (en) * 2011-10-21 2015-07-01 Optis Cellular Technology Llc Methods, processing device, computer programs, computer program products and antenna apparatus for calibration of antenna apparatus
WO2016158665A1 (en) * 2015-03-31 2016-10-06 株式会社オートネットワーク技術研究所 Signal conversion device, reception device, and transmission/reception device
JP2019165392A (en) * 2018-03-20 2019-09-26 日本電気株式会社 Delay adjustment device
JP7110643B2 (en) 2018-03-20 2022-08-02 日本電気株式会社 delay adjuster

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