JP2010237991A - Buffer degeneration system, device, and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent discontinuity of operation when a buffer failure occurs between units connected through a PCI express interface. <P>SOLUTION: A buffer degeneration system is provided with: a buffer degeneration means for, when a failure region of a buffer is detected, degenerating a buffer by disabling the detected failure region of the buffer; a capacity calculation means for calculating an available capacity in the degenerated buffer; and a payload size setting and updating means for updating set maximum value of the payload size based on the capacity calculated by the capacity calculation means. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a buffer degeneration method, a buffer degeneration apparatus, and a buffer degeneration method that enable operation to be continued by performing buffer degeneration when a buffer fails.

  There is a buffer degeneration device that detects a failure and can continue operation with a small buffer capacity from which the detected failure portion is separated when a buffer failure occurs. For example, Patent Literature 1 describes a buffer degeneration device that uses an instruction buffer empty detection circuit to confirm that a buffer is empty and then writes to the degenerated buffer.

Japanese Patent Laid-Open No. 03-166626

  However, in the apparatus described in Patent Document 1, in a system in which data is transmitted / received via a certain bus or interface, the data transmission side cannot directly recognize the degeneration status of the buffer. Therefore, the transmitted data may cause a data overrun with respect to the degenerated buffer, and such a device cannot be employed.

  Therefore, the present invention provides a buffer degeneration method, a buffer degeneration apparatus, and a buffer that can perform buffer degeneration when a buffer failure occurs between units connected by a PCI express interface and can continue operation without causing data overrun. The purpose is to provide a degeneration method.

  In the buffer degeneration method according to the present invention, when a buffer failure area is detected, a buffer degeneration means for degenerating the buffer by setting the detected failure area of the buffer as unusable, and a usable capacity after degeneration in the degenerated buffer And a payload size setting updating unit for updating the setting of the maximum value of the payload size based on the capacity calculated by the capacity calculating unit.

  When the buffer degeneration apparatus according to the present invention detects a buffer failure area, the buffer degeneration means sets the detected buffer failure area to be unusable and degenerates the buffer, and the information processing apparatus is degenerated by the buffer degeneration means. Capacity calculating means for calculating usable capacity after degeneration in the buffer, and payload size setting updating means for causing the information processing apparatus to update the setting of the maximum value of the payload size based on the capacity calculated by the capacity calculating means. It is characterized by having.

  According to the buffer degeneration method of the present invention, when a failure area of a buffer is detected, a buffer degeneration step for degrading the buffer by setting the detected failure area of the buffer to be unusable, and a usable capacity after degeneration in the degenerated buffer And a payload size setting update step for updating the setting of the maximum value of the payload size based on the calculated capacity.

  The present invention includes a buffer failure detection circuit, a failure flag, and a write control unit and a read control unit operating in conjunction with these in a unit connected by a PCI express interface, and even when a failure occurs in the buffer, It is characterized in that the buffer can be degenerated and the operation can be continued.

  According to the present invention, between units connected by a PCI express interface, buffer degeneration can be performed when a buffer failure occurs, and operation can be continued without causing data overrun.

It is a block diagram which shows the structural example of the PCI express add-in card to which the buffer degeneration method by this invention is applied. It is a functional block diagram which shows the function structural example of a buffer degeneration apparatus. It is a flowchart which shows the process example which a buffer degeneration apparatus performs. It is a functional block diagram which shows the minimum functional structural example of a buffer degeneration apparatus.

  Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration example of a PCI express add-in card to which a buffer degeneration method according to the present invention is applied. As shown in FIG. 1, in this embodiment, an example in which the buffer degeneration method is applied to a PCI express add-in card 1 will be described.

  As shown in FIG. 1, the PCI express add-in card 1 includes a PCI express interface control unit 2, a write control unit 3, a read control unit 4, a reception buffer 5, a failure flag 6, and a failure detection circuit 7. The PCI express add-in card 1 is mounted on an information processing apparatus such as a personal computer that operates according to a program, for example. In the present embodiment, the buffer degeneration device is realized by, for example, the PCI express add-in card 1 and an information processing device equipped with the PCI express add-in card 1.

  The PCI express interface control unit 2 has a function of performing data transmission / reception and interrupt notification control via the PCI express interface using the PCI express.

  The write control unit 3 has a function of writing the reception data received by the PCI express interface control unit 2 in the reception buffer 5. The write control unit 3 has a function of sequentially writing received data from an address area where the failure flag 6 of the reception buffer 5 is not set.

  The read control unit 4 has a function of reading received data from the reception buffer 5. The read control unit 4 has a function of reading received data in order from an address area where the failure flag 6 of the reception buffer 5 is not set.

  The reception buffer 5 stores reception data received by the PCI express interface control unit 2. Data stored in the reception buffer 5 is written and read by the write control unit 3 and the read control unit 4.

  The failure flag 6 is set corresponding to a predetermined memory capacity unit of the reception buffer 5. The state in which the failure flag 6 is set indicates that a failure has occurred in the address region corresponding to the failure flag 6 in the reception buffer 5. The state in which the failure flag 6 is reset indicates that the address area corresponding to the failure flag 6 is normal in the reception buffer 5 and can be used.

  The failure detection circuit 7 has a function of performing an error check (for example, parity check) on the data read from the reception buffer 5 and detecting a failure of the reception buffer 5. The failure detection circuit 7 detects, for example, that there is a failure in the address area of the reception buffer 5 in which the data in which the error was detected by the error check was stored. When the failure detection circuit 7 detects a failure in the reception buffer 5, the failure detection circuit 7 sets a failure flag 6 corresponding to the address area where the failure is detected, and further has an interrupt notification to the PCI express interface control unit 2.

  Next, the functional configuration of the buffer degeneration apparatus according to the present invention will be described. FIG. 2 is a functional block diagram illustrating a functional configuration example of the buffer degeneration apparatus.

  As shown in FIG. 2, the buffer degeneration device includes a failure area detection unit 11, a buffer degeneration unit 12, a capacity calculation unit 13, a payload size setting update unit 14, a retransmission unit 15, a data writing unit 16, and a data reading unit 17. Including.

  The failure area detection means 11 is specifically realized by the failure detection circuit 7. The failure area detection means 11 has a function of detecting a failure of the reception buffer 5. For example, the failure area detection unit 11 performs an error check on the data read from the reception buffer 5 and detects the address area of the reception buffer 5 in which the data in which the error was detected is stored as being defective.

  The buffer degeneration means 12 is specifically realized by the failure detection circuit 7. The buffer degeneration means 12 has a function of degenerating the buffer by setting the detected failure area of the buffer to be unusable. The buffer degeneration means 12 makes the failure area unusable, for example, by setting a failure flag 6 indicating a failure state in the failure area of the reception buffer 5.

  Specifically, the capacity calculation unit 13 is realized by a device driver installed in the information processing apparatus. The capacity calculation means 13 has a function of calculating the usable capacity after degeneration in the reception buffer 5 degenerated by the buffer degeneration means. For example, the capacity calculation means specifies an area in the reception buffer 5 where the failure flag 6 is not set, and calculates the usable capacity in the reception buffer 5.

  Specifically, the payload size setting updating unit 14 is realized by a device driver installed in the information processing apparatus. The payload size setting updating unit 14 has a function of updating the setting of the maximum value of the payload size based on the capacity calculated by the capacity calculating unit 13. The payload size setting updating unit 14 sets the maximum value of the payload size, for example, by resetting Max_Payload_Size of the configuration register Device Control register of the root complex connected to the higher level of the PCI express add-in card 1 to wp. Update.

  Specifically, the retransmission unit 15 is realized by a device driver installed in the information processing apparatus. The retransmission means 15 resends the data stored in the failure area of the reception buffer 5 based on the maximum value of the payload size set by the payload size setting update means 14 when a failure is detected from the reception buffer 5. It has a function to send.

  In this embodiment, the expression that the device driver executes processing and the expression that means realized by the device driver execute processing may be used. Specifically, the buffer degeneration device is realized. The CPU of the information processing apparatus that performs the processing executes according to the device driver.

  Specifically, the data writing unit 16 is realized by the write control unit 3. The data writing unit 16 has a function of writing data to the reception buffer 5. The data writing means 16 has a function of writing data to an area of the reception buffer 5 where the failure flag 6 is not set.

  Specifically, the data reading unit 17 is realized by the read control unit 4. The data reading means 17 has a function of reading data from the reception buffer 5. The data reading means 17 has a function of reading data from an area where the failure flag 6 is not set in the reception buffer 5.

  Next, an operation performed by the buffer degeneration apparatus will be described. FIG. 3 is a flowchart showing an example of processing executed by the buffer degeneration apparatus.

  When the PCI express interface control unit 2 receives data via the PCI express interface, the data writing unit 16 writes the received data into the reception buffer 5. When the data reading unit 17 reads data from the reception buffer 5, the failure area detection unit 11 performs an error check on the data read by the data reading unit 17 and performs a process of detecting a failure of the reception buffer 5. When a failure is detected, the buffer degeneration means 12 sets a failure flag 6 corresponding to the address area in which the read data is stored. Further, the buffer degeneration means 12 sends an interrupt notification to the PCI express interface control unit 2 (step S21). The PCI express interface control unit 2 notifies the device driver of an interrupt. When the device driver receives the interrupt notification, the following interrupt processing is executed.

  In step S21, upon receiving an interrupt notification from the PCI express interface control unit 2, the device driver determines whether or not the cause of the interrupt is a failure of the reception buffer 5 (step S22).

  If it is determined in step S22 that the interrupt factor is not a failure of the reception buffer 5, the device driver performs processing corresponding to the interrupt factor. On the other hand, when it is determined in step S22 that the interrupt factor is a failure of the reception buffer 5, the capacity calculation unit 13 determines that the capacity of the reception buffer 5 in which the failure flag 6 is not set (that is, a usable reception buffer). (Capacity of 5) is calculated (calculated) (step S23).

  Next, the payload size setting update unit 14 is connected to the higher level of the PCI express add-in card 1 via the PCI express add-in card 1 and the PCI express interface based on the calculated capacity of the reception buffer 5. The configuration register Device Control register Max_Payload_Size of the Complex is reset to wp (step S24). Here, Max_Payload_Size means the maximum value of the payload that can be transferred in packet communication. Specifically, the payload size setting update unit 14 can transfer the packet according to the decrease in the reception buffer area due to the occurrence of a failure. Set to reduce the maximum value of the payload. That is, the payload size setting updating unit 14 limits the maximum data size of the packet by updating the setting of the maximum value of the payload size.

  In step S24, when the setting of Max_Payload_Size (maximum value of payload size) is updated, the retransmission unit 15 performs a retransmission process for the data in which the error is detected in step S21 (step S25).

  When retransmission processing is performed in step S25, the PCI express interface control unit 2 receives the retransmitted data. At this time, the data writing means 16 checks the failure flag 6, and if the failure flag 6 is set, the reception buffer 5 in the address area is out of order. Set the write address in. The data writing means 16 writes data in the order of the set addresses. Similarly, when the data reading means 17 reads the data from the reception buffer 5 and the failure flag 6 is set, the reception buffer 5 in the address area has failed, so that the next address A read address is set in the area reception buffer 5. Then, the data reading unit 17 reads data in the set address order.

  As described above, according to the present embodiment, in PCI express buffer control, when a failure is detected in the buffer, the buffer is degenerated, and Device Control register Max_Payload_Size (maximum value of payload size) in accordance with the buffer degeneration. ) Is reset. Therefore, transmission / reception of data exceeding the capacity of the degenerated buffer can be restricted, and operation can be continued without causing data overrun due to buffer degeneration.

  Next, the minimum configuration of the buffer degeneration apparatus according to the present invention will be described. FIG. 4 is a functional block diagram illustrating a minimum functional configuration example of the buffer degeneration device. As shown in FIG. 4, the buffer degeneration device includes a buffer degeneration unit 12, a capacity calculation unit 13, and a payload size setting unit 14 as the minimum components.

  In the buffer degeneration apparatus having the minimum configuration shown in FIG. 4, when the buffer degeneration means 12 detects a failure area of the buffer, the buffer degeneration means 12 sets the detected failure area of the buffer as unusable and degenerates the buffer. Then, the capacity calculation unit 13 calculates the usable capacity after degeneration in the degenerated buffer. Then, the payload size setting updating unit 14 updates the setting of the maximum value of the payload size based on the capacity calculated by the capacity calculating unit 13.

  Therefore, according to the buffer degeneration apparatus of the minimum configuration shown in FIG. 4, when a failure is detected in the buffer, the buffer is degenerated, and the maximum value of the payload size is reset according to the buffer degeneration. Therefore, transmission / reception of data exceeding the capacity of the degenerated buffer can be restricted, and operation can be continued without causing data overrun due to buffer degeneration.

  In the present embodiment, the characteristic configuration of the buffer degeneration method as shown in the following (1) to (5) is shown.

  (1) When a buffer failure area is detected (for example, realized by the failure area detection means 11), a buffer degeneration means (for example, buffer degeneration means) that sets the detected buffer failure area as unusable and degenerates the buffer. 12), a capacity calculation means for calculating a usable capacity after degeneration in the buffer degenerated by the buffer degeneration means (for example, realized by the capacity calculation means 13), and a capacity calculation means It is characterized by comprising payload size setting updating means (for example, realized by the payload size setting updating means 14) for updating the setting of the maximum value of the payload size based on the capacity.

  (2) In the buffer degeneration method, the buffer degeneration means sets a flag (for example, realized by the failure flag 6) indicating a failure state in the detected failure area of the buffer, and the capacity calculation means Of these, an area where no flag is set may be specified by the buffer degeneration means, and the usable capacity in the buffer may be calculated.

  (3) The buffer degeneration method may be configured to include a data writing unit (for example, realized by the data writing unit 16) that writes data to an area of the buffer where a flag is not set.

  (4) The buffer degeneration method may be configured to include data reading means (for example, realized by the data reading means 17) for reading data from an area of the buffer where no flag is set.

  (5) The buffer degeneration method is a retransmission unit (for example, retransmission) that retransmits the data stored in the detected failure area of the buffer based on the maximum value of the payload size set by the payload size setting update unit. (Implemented by means 15).

  The present invention can be applied to an application for improving the reliability of a unit connected via a PCI express interface.

DESCRIPTION OF SYMBOLS 1 PCI express add-in card 2 PCI express interface control part 3 Write control part 4 Read control part 5 Reception buffer 6 Failure flag 7 Failure detection circuit 11 Failure area detection means 12 Buffer degeneration means 13 Capacity calculation means 14 Payload size setting means 15 Retransmission Means 16 Data writing means 17 Data reading means

Claims (9)

When detecting a buffer failure area, a buffer degeneration means for degenerating the buffer by setting the detected failure area of the buffer to be unusable,
Capacity calculation means for calculating usable capacity after degeneration in the buffer degenerated by the buffer degeneration means;
A buffer degeneration method comprising: a payload size setting updating unit that updates a setting of a maximum value of the payload size based on the capacity calculated by the capacity calculating unit. The buffer degeneration means sets a flag indicating a failure state in the detected failure area of the buffer,
The buffer degeneration method according to claim 1, wherein the capacity calculation unit specifies an area of the buffer in which the flag is not set by the buffer degeneration unit and calculates a usable capacity in the buffer. The buffer degeneration method according to claim 2, further comprising data writing means for writing data to an area of the buffer in which no flag is set. 4. The buffer degeneration method according to claim 2, further comprising data reading means for reading data from an area of the buffer in which no flag is set. The retransmit means for retransmitting the data stored in the detected failure area of the buffer based on the maximum value of the payload size set by the payload size setting update means. Or the buffer degeneration method according to claim 1. When detecting a buffer failure area, a buffer degeneration means for degenerating the buffer by setting the detected failure area of the buffer to be unusable,
Capacity calculation means for causing the information processing device to calculate usable capacity after degeneration in the buffer degenerated by the buffer degeneration means;
A buffer degeneration device, comprising: a payload size setting updating unit that causes the information processing device to update the setting of the maximum value of the payload size based on the capacity calculated by the capacity calculating unit. The buffer degeneration means causes the information processing apparatus to set a flag indicating a failure state in the detected failure area of the buffer,
7. The buffer degeneration apparatus according to claim 6, wherein the capacity calculation means causes the information processing apparatus to calculate an available capacity in the buffer by specifying an area of the buffer in which the flag is not set by the buffer degeneration means. A buffer degeneration step of detecting a buffer failure area and degenerating the buffer by setting the detected failure area of the buffer to be unusable;
A capacity calculating step for calculating a usable capacity after degeneration in the degenerated buffer;
And a payload size setting update step for updating the setting of the maximum value of the payload size based on the calculated capacity. In the buffer degeneration step, set a flag indicating a failure state in the detected buffer failure area,
The buffer degeneration method according to claim 8, wherein in the capacity calculation step, an area in which the flag is not set in the buffer is specified to calculate a usable capacity in the buffer.

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