JP2010232988A - Wide-band bias circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a bias circuit used for a high-frequency amplifier for amplifying a wide-band high-frequency signal and having high isolation characteristic with a power supply in a wide band and reducing the influence on the high-frequency signal. <P>SOLUTION: One end of a wide-band bias circuit 110 is connected to a power supply 120, and the other end is connected, to at least either of a connection point 106 on an input side and a connection point 107 of the output side of an amplifier circuit 101. A DC bias current is supplied from the power supply 120 to the amplifier circuit 101. Three stage inductors 111, 112, 113 are connected from the connection points 106, 107, in the ascending order of the inductance. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a bias circuit used in an amplifier that amplifies a high-frequency signal, and more particularly to a technical field of a wide-band bias circuit used in an amplifier suitable for amplifying a wide-band pulse signal or the like.

  A high-frequency device such as a cellular phone uses a high-frequency amplifier for amplifying a high-frequency signal. In such a high-frequency amplifier, a bias circuit that supplies a DC bias current is provided on the output terminal side of the amplifier circuit. (For example, Patent Document 1). Conventional high-frequency devices are intended for signals with a relatively narrow band, and correspondingly, the bias circuit is also configured to operate suitably in a relatively narrow frequency band.

  On the other hand, in recent years, the use of high-frequency devices using pulse signals formed using a wide frequency band has been promoted. As an example, in order to improve the accuracy of distance measurement, angle measurement, and the like, development of a radar apparatus that performs measurement using a pulse signal is in progress. In such a radar apparatus, for example, when a pulse signal having a pulse width of about 1 ns is transmitted and received at a repetition period of about 1 MHz, a wide frequency band of about 1 MHz to 3 GHz is required. Since the upper limit frequency is a pulse signal, it is a value including up to the third harmonic.

  In a high-frequency device using such a broadband signal, even a high-frequency amplifier used for signal amplification is required to have good characteristics over a wide band. An example of a block diagram is shown in FIG. 8 as a schematic configuration of the high-frequency amplifier. A high-frequency amplifier 900 shown in the figure includes an amplifier circuit 901 and a bias circuit 902, and the bias circuit 902 is connected to the output side of the amplifier circuit 901. The bias circuit 902 includes an inductor 902a and the like, and supplies a DC bias current from the power source 903 to the amplifier circuit 901. In general, a capacitor 904 is connected to the power supply side of the bias circuit 902 for the purpose of reducing the impedance of the line between the bias circuit 902 and the power supply 903.

  In the high-frequency amplifier 900 configured as shown in FIG. 8, signal leakage is suppressed by the bias circuit 902 so that a high-frequency signal does not leak from the amplifier circuit 901 side to the power source 903 side. If the signal leaks to the power supply side, the operation of other circuits may be affected. The performance of preventing signal leakage from the bias circuit input terminal 905 to the power supply input terminal 906 of the bias circuit is hereinafter referred to as isolation. Further, it is necessary to prevent the bias circuit 902 from affecting the high frequency signal and degrading its characteristics. The loss of the signal when the high-frequency signal input from the input terminal 905 of the bias circuit passes to the output terminal 907 of the bias circuit is hereinafter referred to as insertion loss, and the delay time at each frequency of the high-frequency signal to be transmitted is referred to as group delay characteristic. . The bias circuit 902 can be configured as an LC filter combining, for example, an inductor and a capacitor in order to supply a direct current from the power supply side to the amplifier circuit 901 and to increase isolation from the power supply side. Further, by using a large number of inductors, it is possible to configure a bias circuit that can handle a wideband signal. Note that although the example in which the bias circuit 902 is connected to the output side of the amplifier circuit 901 has been described, there are cases where the bias circuit 902 is connected to the input side or both the input side and the output side.

JP-A-5-175757

  However, when a bias circuit 911 as shown in FIG. 9 is configured by combining an inductor and a capacitor, for example, the isolation characteristic to the power supply side as a filter is improved, but the bias circuit is in a wide frequency band of interest. It is difficult to keep the insertion loss characteristic and group delay characteristic flat, and this will have an adverse effect on high-frequency signals. FIG. 9 shows a high frequency amplifier 910 including a bias circuit 911 having inductors 911a, 911b, and 911c and capacitors 911d and 911e, and a capacitor 911d is connected between the inductors 911a and 911b. Thus, when the capacitor 911d is connected in front of the inductor 911b, a pole is formed in the insertion loss characteristic and group delay characteristic of the bias circuit at the resonance frequency formed by the inductor 911a and the capacitor 911d in front of the inductor 911b. There's a problem. If the insertion loss characteristic and the group delay characteristic are extreme within the use band of the high-frequency signal and the flatness is impaired, there is an adverse effect such as the waveform of the high-frequency signal being broken. The capacitor 911e also has a pole for the same reason, which may cause a problem.

  Further, if the isolation characteristics are increased over a wide band by using a large number of inductors 921a to 921f as in the wide band bias circuit 921 provided in the high frequency amplifier 920 shown in FIG. There is a problem in that it is difficult to prevent the pole from appearing in the insertion loss characteristic and group delay characteristic of the bias circuit in the band, and the high frequency signal is adversely affected. In order to avoid such a pole, it is necessary to appropriately determine the inductance of each inductor, but the determination method has not been known so far, and it takes a long time to determine all the inductances. Was.

  Accordingly, the present invention has been made to solve the above-described problem, and is used in a high-frequency amplifier that amplifies a wide-band high-frequency signal. The high-frequency signal is transmitted while increasing isolation from the power source side over a wide band. An object of the present invention is to provide a bias circuit in which the influence on the frequency is reduced.

  In a first aspect of the broadband bias circuit of the present invention, one end is connected to a power source, and the other end is connected to an amplifier circuit that amplifies a broadband high-frequency signal using a predetermined frequency band, and supplies a DC bias current. A wide-band bias circuit, comprising: an inductor having three or more stages connected in series to at least one of an input side and an output side of the amplifier circuit and connected in series from a connection point of the amplifier circuit. And

  In another aspect of the wideband bias circuit of the present invention, among the three or more stages of inductors, the inductance of the first stage closest to the connection point is minimized, and the inductances of the inductors after the second stage are the same or sequentially. It is characterized by being enlarged.

  Another aspect of the broadband bias circuit according to the present invention is that each of the inductors from the first stage to the second stage before the last stage among the three or more stages of inductors has an isolation characteristic of the inductor and a subsequent stage of the inductor. Each inductance is determined such that the frequency at which the isolation characteristic of the adjacent inductor intersects is between the self-resonant frequencies of the two adjacent inductors.

  Another aspect of the wideband bias circuit according to the present invention is that the inductors from the first stage to the first stage before the last stage among the three or more stages of inductors have a lower Q value than the last stage inductor. The change in the isolation characteristic in the vicinity of the self-resonant frequency is gradual.

  Another aspect of the wideband bias circuit of the present invention is characterized in that an isolation characteristic in which the inductors of three or more stages are connected in series is greater than 25 dB in the predetermined frequency band.

  In another aspect of the wideband bias circuit of the present invention, in the insertion loss characteristic, the inductance of each of the three or more stages of inductors is determined so that the fluctuation range in the predetermined frequency band is 0.4 dB or less. It is characterized by.

  Another aspect of the wideband bias circuit of the present invention is that, in the group delay characteristic, the inductance of each of the three or more stage inductors is set so that the delay time in the predetermined frequency band or another frequency band narrower than that is 100 ps or less. Is determined.

  Another aspect of the wideband bias circuit of the present invention is characterized in that the predetermined frequency band is 1 MHz or more and 3 GHz or less.

  According to the bias circuit of the present invention, by connecting three or more inductors having a predetermined inductance in series, it is possible to have high isolation characteristics over a wide band and reduce the influence on high-frequency signals, It can be used for a high-frequency amplifier that amplifies a broadband high-frequency signal.

It is a block diagram which shows the structure of the high frequency amplifier provided with the wide-band bias circuit of the 1st Embodiment of this invention. It is a graph which shows an example of the isolation characteristic, insertion loss characteristic, and group delay characteristic when using the bias circuit provided with the inductor of 1 step | paragraph. It is a graph which shows an example of the isolation characteristic at the time of using the bias circuit provided with the inductor of 2 steps | paragraphs, an insertion loss characteristic, and a group delay characteristic. It is a graph which shows an example of the isolation characteristic, insertion loss characteristic, and group delay characteristic at the time of using the wideband bias circuit of 1st Embodiment. 6 is a graph showing an example of isolation characteristics, insertion loss characteristics, and group delay characteristics when the wideband bias circuit of Comparative Example 1 is used. 6 is a graph showing an example of isolation characteristics, insertion loss characteristics, and group delay characteristics when the wideband bias circuit of Comparative Example 2 is used. 12 is a graph comparing the isolation characteristics, insertion loss characteristics, and group delay characteristics of the wideband bias circuit of the first embodiment and Comparative Example 3. It is a block diagram which shows an example of schematic structure of the conventional high frequency amplifier. It is a block diagram which shows another example of schematic structure of the conventional high frequency amplifier. It is a block diagram which shows another example of schematic structure of the conventional high frequency amplifier.

  A broadband bias circuit according to a preferred embodiment of the present invention will be described in detail with reference to the drawings. Each component having the same function is denoted by the same reference numeral for simplification of illustration and description. The present invention relates to a wide-band bias circuit suitable for use in an amplifier that amplifies a wide-band high-frequency signal. The wide-band bias circuit is configured so that one end is connected to a power source and the other end is connected to at least one of the input side and the output side of the amplifier circuit to supply a DC bias current from the power source. In the following, an embodiment in which the broadband bias circuit is connected to the output side of the amplifier circuit will be described, but even when the broadband bias circuit is connected to the input side of the amplifier circuit, or when both the input side and the output side are connected, An effect equivalent to that described below can be obtained. Hereinafter, a signal using a band of 1 MHz to 3 GHz will be described as an example of a broadband high-frequency signal.

  In such a wide-band bias circuit, it is necessary to supply a direct current from the power supply side to the output side of the amplifier circuit, while reducing leakage of high-frequency signals from the amplifier circuit side to the power supply side as much as possible. This requires high isolation characteristics for high-frequency signals in a wide-band bias circuit. In addition, it is necessary to reduce the influence of the wide-band bias circuit on the characteristics of the high-frequency signal output from the amplifier circuit as much as possible. The characteristics that can affect the wideband bias circuit include the insertion loss characteristic and group delay characteristic of the bias circuit. It is preferable to make these characteristics flat in a wide frequency band that covers these characteristics. If this is damaged, adverse effects such as collapse of the waveform of the broadband signal will appear.

In the present invention, the following conditions for each characteristic are set as conditions for determining that the isolation characteristic, the insertion loss characteristic, and the group delay characteristic are appropriate.
(1) The isolation characteristic is about 25 dB or more.
(2) As an insertion loss characteristic, a flat characteristic value with a fluctuation within 0.4 dB is secured in a band from 1 MHz to 3 GHz.
(3) As a group delay characteristic, a flat characteristic value having a delay time of 100 ps or less is ensured in a band of 50 MHz to 3 GHz.

  The broadband bias circuit according to the first embodiment of the present invention will be described below with reference to FIG. FIG. 1 is a block diagram illustrating a configuration of a high-frequency amplifier 100 including a wide-band bias circuit 110 according to the present embodiment. The high-frequency amplifier 100 has a configuration in which the broadband bias circuit 110 of the present embodiment is connected to the output side (output end 103 side) of the amplifier circuit 101. Capacitors 104 and 105 for cutting DC components are provided on the input side (input end 102 side) and output side of the amplifier circuit 101, respectively. In general, a capacitor 114 is connected to the power supply side of the bias circuit 110 for the purpose of reducing the impedance of the line between the bias circuit 110 and the power supply 120.

  The broadband bias circuit 110 of the present embodiment has one end connected to the power source 120 and the other end connected to at least one of the input side connection point 106 and the output side connection point 107 of the amplifier circuit 101. A DC bias current is supplied from the power source 120 to the amplifier circuit 101. The broadband bias circuit 110 includes three stages of inductors 111, 112, 113 in order from at least one of the connection point 106 or 107 side, and a capacitor 114 having one end grounded is provided on the power source 120 side. ing. The three-stage inductors 111, 112, and 113 are connected in series.

  In the following embodiments, a case where the wideband bias circuit includes a three-stage inductor will be described. However, the present invention is not limited thereto, and four or more inductors may be included. Further, in the following embodiment, a case where the wide band bias circuit 110 is connected to the connection point 107 on the output side of the amplifier circuit 101 will be described, but the wide band bias circuit 110 is connected to the connection point 106 on the input side of the amplifier circuit 101. In either case of connection or connection to both of the connection points 106 and 107, an effect similar to that of the present embodiment can be obtained.

  Since each of the inductors 111, 112, and 113 has a parasitic capacitance, parallel resonance occurs at a frequency (self-resonant frequency) determined by the inductance of each inductor and the capacitance of the parasitic capacitance. The isolation characteristic realized by the inductor shows the highest value at this self-resonant frequency. When a narrow-band signal is output from the amplifier circuit 101, a suitable isolation characteristic can be obtained even when a bias circuit having only one stage of inductor is used. However, for a wide band signal of about 3 GHz, it is difficult to obtain a suitable isolation characteristic in the entire band to be used with a bias circuit having only one inductor.

  As an example, FIG. 2 shows isolation characteristics, insertion loss characteristics, and group delay characteristics when a bias circuit including a single-stage inductor is used. The isolation characteristic is a signal passing loss from the input terminal 130 of the bias circuit in FIG. 1 to the power supply input terminal 131 of the bias circuit, and the insertion loss characteristic and the group delay characteristic are from the input terminal 130 of the bias circuit to the bias circuit. A signal passing to the output end 132 is shown. Here, the isolation characteristic, the insertion loss characteristic, and the group delay characteristic when using a bias circuit having only one inductor having an inductance of 15 μH are shown in FIGS. 2 (a), 2 (b), and 2 (c), respectively. Show. As shown in FIG. 2A, it can be seen that the frequency band in which the isolation characteristic can be secured at 25 dB or more is a very limited range centering on the self-resonant frequency, and does not satisfy the above condition (1). . In addition, the insertion loss characteristic shown in FIG. 2B is greatly reduced in the vicinity of 1 GHz and does not satisfy the condition (2).

  Therefore, FIG. 3 shows an example of isolation characteristics, insertion loss characteristics, and group delay characteristics when one stage of inductor is added and the bias circuit has a two-stage configuration. Here, a bias circuit is used in which an inductor having an inductance of 1 μH is arranged in the first stage and an inductor having an inductance of 15 μH is arranged in the second stage. The isolation characteristic, insertion loss characteristic, and group delay characteristic when such a bias circuit is used are shown in FIGS. 3A, 3B, and 3C, respectively.

  In FIG. 3A, reference numerals 91 and 92 indicate the isolation characteristics of the first and second stage inductors, respectively, and reference numeral 90 indicates the isolation characteristics of the two-stage inductors connected in series. . From the isolation characteristic 90 in which the inductors shown in FIG. 3A are connected in series, the isolation characteristic can be ensured to be 25 dB or more in the vicinity of the frequency where the isolation characteristics of the first and second stage inductors intersect. It cannot be seen that the above condition (1) is not satisfied. Also in the insertion loss characteristic shown in FIG. 3B, the isolation characteristic of the inductor is greatly reduced in the vicinity of the intersecting frequency, and the condition (2) is not satisfied.

  As described above, when a bias circuit composed of a single-stage or two-stage inductor is used, it is extremely difficult to obtain suitable characteristics for a broadband signal of about 3 GHz. It was. On the other hand, as shown in FIG. 10, if the inductor is multi-staged such as 7 stages or 8 stages, there is a problem that a suitable characteristic is not necessarily obtained and optimal setting is difficult. In order to solve such a problem, the inventor has three stages of inductors, and each inductance is connected in series according to a predetermined condition, so that any of isolation characteristics, insertion loss characteristics, and group delay characteristics can be suitably set. I found.

  FIG. 4 shows an example of isolation characteristics, insertion loss characteristics, and group delay characteristics when the wide band bias circuit 110 of the present embodiment shown in FIG. 1 is used. In this embodiment, the first stage inductor 111 having an inductance of 1 μH is used, the second stage inductor 112 having an inductance of 4.7 μH, and the third stage inductor 113 having an inductance of 15 μH. Used. When such a three-stage wideband bias circuit 110 is used, the isolation characteristics, the insertion loss characteristics, and the group delay characteristics are suitable characteristics as shown in FIGS. 4 (a), 4 (b), and 4 (c), respectively. It becomes.

  In FIG. 4A, reference numerals 11, 12, and 13 indicate the isolation characteristics of the first, second, and third stage inductors 111, 112, and 113, respectively, and reference numeral 10 indicates a three-stage inductor. The isolation characteristics connected in series are shown. It can be seen from the isolation characteristic 10 shown in FIG. 4A that an isolation characteristic of 25 dB or more can be secured in the frequency band up to 3 GHz. Further, in the insertion loss characteristic shown in FIG. 4B, the variation of the insertion loss characteristic in the band from 1 MHz to 3 GHz is reduced within 0.4 dB, and a flat insertion loss characteristic is ensured. Furthermore, in the group delay characteristic shown in FIG. 4C, the delay time in the band of 50 MHz to 3 GHz is reduced within 100 ps, and a flat group delay characteristic is ensured.

  As described above, according to the wideband bias circuit 110 of the present embodiment, which is configured by suitably arranging three stages of inductors, high isolation characteristics are realized in a wide band, and the insertion loss characteristics and group of the bias circuit are realized. It is possible to ensure the flatness of the delay characteristics. By connecting the wide-band bias circuit 110 of this embodiment to the output side of the amplifier circuit 101, the high-frequency amplifier 100 that can suitably amplify a wide-band high-frequency signal can be realized. Since the bias circuit 110 of the present embodiment has a simple configuration in which three stages of inductors 111, 112, and 113 are connected in series, a low-cost high-frequency amplifier can be provided. In the above description, the characteristics when the wide-band bias circuit 110 is connected to the output side of the amplifier circuit 101 have been described. However, even when the wide-band bias circuit 110 is connected to the input side of the amplifier circuit 101, the same isolation as described above is used. Characteristics, insertion loss characteristics, and group delay characteristics are obtained.

  In the wide-band bias circuit 110 of this embodiment, three-stage inductors having inductances of 1 μH, 4.7 μH, and 15 μH are arranged in this order, and the first-stage inductor 111, the second-stage inductor 112, and the third-stage inductor are arranged in this order. Used for the eye inductor 113. In the present embodiment, it is possible to obtain preferable characteristics as shown in FIG. 4 by suitably arranging the three-stage inductors 111, 112, and 113 as described above. On the other hand, even in the case of a bias circuit configured by using a three-stage inductor as in the present embodiment, when a different arrangement is used by using an inductor having a different inductance from the inductors 111, 112, and 113 of the present embodiment. Cannot obtain preferable characteristics as shown in FIG.

  FIG. 5 shows an example of isolation characteristics, insertion loss characteristics, and group delay characteristics when an inductor having an inductance different from the inductors 111, 112, and 113 of the present embodiment is used. Here, instead of the third stage inductor 113 having an inductance of 15 μH, another inductor having an inductance of 100 μH is used. The broadband bias circuit configured in this way is referred to as a broadband bias of Comparative Example 1 below. This is called a circuit.

  In FIG. 5A, reference numerals 21, 22, and 23 indicate the isolation characteristics of the first, second, and third stage inductors, respectively, and reference numeral 20 indicates an isolation in which three-stage inductors are connected in series. The characteristics are shown. In the broadband bias circuit of Comparative Example 1, in the isolation characteristic 20 shown in FIG. 5A, the above condition (1) is not satisfied in the vicinity of the frequency at which the isolation characteristics 21, 22, and 23 of the inductors intersect. In particular, the isolation characteristic 20 is greatly reduced near the frequency at which the isolation characteristics 23 and 22 of the third and second stage inductors intersect.

  Also, in the group delay characteristic shown in FIG. 5C, a large fluctuation with a delay time exceeding 100 ps is observed in the band of 50 MHz to 3 GHz, and the above condition (3) is not satisfied. In particular, in the vicinity of the frequency where the isolation characteristics 23 and 22 of the third and second stage inductors shown in FIG. 5A intersect, the delay time also varies greatly in the group delay characteristic, and the flatness is impaired. Yes.

  As described above, even when a wide-band bias circuit is configured by connecting three stages of inductors in series, when the inductance of each inductor is not appropriately selected as in the first comparative example, the above condition is satisfied. All of (1) to (3) cannot be satisfied. Therefore, a preferable method for selecting a three-stage inductor will be described below.

  Comparing FIG. 4 showing the characteristics of the wideband bias circuit 110 of the present embodiment with FIG. 5 showing the characteristics of Comparative Example 1, the isolation characteristics of the third-stage inductor and the second-stage inductor are compared in the isolation characteristics. There are significant differences in the way the inductors interact with the isolation characteristics. In the isolation characteristic of the wide band bias circuit 110, the peak (self-resonant frequency) of the isolation characteristic 12 of the second stage inductor substantially overlaps the line of the isolation characteristic 13 of the third stage inductor. As a result, even in the vicinity of the frequency where the isolation characteristic 13 of the third-stage inductor and the isolation characteristic 12 of the second-stage inductor intersect, the isolation characteristic 10 in which the inductors are connected in series does not drop significantly. The condition (1) can be satisfied.

  On the other hand, in the isolation characteristic of Comparative Example 1, the peak of the isolation characteristic 22 possessed by the second stage inductor is located on the high frequency side away from the line of the isolation characteristic 23 possessed by the third stage inductor. . As a result, in the vicinity of the frequency where the isolation characteristic 23 of the third-stage inductor and the isolation characteristic 22 of the second-stage inductor intersect, the isolation characteristic 20 in which the inductors are connected in series greatly deteriorates and deteriorates. . From the above results, in the isolation characteristic, the second stage so that the peak at the self-resonant frequency of the isolation characteristic of the second stage inductor substantially overlaps the line of the isolation characteristic of the third stage inductor. It is preferable to select the inductance of the third stage inductor.

  In the method of overlapping the isolation characteristics of the first-stage inductor and the second-stage inductor, there is no significant difference between the present embodiment and the comparative example 1, and the isolation characteristic of the first-stage inductor at the self-resonant frequency. The peak is arranged on the high frequency side from the isolation characteristic line of the second stage inductor. However, the isolation characteristics 11 and 21 of the first stage inductor are self-comparing to the isolation characteristics 12 and 22 of the second stage inductor and the isolation characteristics 13 and 23 of the third stage inductor. The peak in the vicinity of the resonance frequency changes gently. As a result, the drop in the isolation characteristics 10 and 20 in which the inductors are connected in series near the frequency at which the isolation characteristics 11 and 21 of the first-stage inductor intersect with the isolation characteristics 12 and 22 of the second-stage inductor. However, the degree is reduced, and the isolation characteristic 10 in which the inductors in the present embodiment are connected in series can satisfy the above condition (1).

  As a comparative example 2, a broadband bias circuit configured so that the peak at the self-resonant frequency of the isolation characteristic of the first stage inductor is arranged on the lower frequency side than the line of the isolation characteristic of the second stage inductor. The characteristics are shown in FIG. In the broadband bias circuit of Comparative Example 2, the inductances of the three-stage inductors are 2.2 μH, 4.7 μH, and 15 μH. 6A, 6B, and 6C show the isolation characteristic, insertion loss characteristic, and group delay characteristic of the wideband bias circuit of Comparative Example 2, respectively. In the wideband bias circuit of Comparative Example 2, although both the insertion loss characteristic and the group delay characteristic shown in FIGS. 6B and 6C satisfy the above conditions (2) and (3), FIG. The isolation characteristics shown in FIG. 1 deteriorate near 1 GHz and do not satisfy the above condition (1).

  The broadband bias circuit of Comparative Example 2 uses a circuit in which the self-resonant frequency of the first stage inductor is located on the lower frequency side as compared with the broadband bias circuit 110 of the present embodiment. As a result, isolation characteristics of 25 dB or more cannot be obtained in the vicinity of 1 GHz on the high frequency side. In order to obtain preferable isolation characteristics in a wide band, it is preferable to disperse the self-resonant frequencies of the three-stage inductors in as wide a band as possible. In addition, it is preferable that an inductor having a resonance frequency on the high frequency side uses a Q value that is made smaller and the isolation characteristic in the vicinity of the self-resonance frequency is moderated so that the isolation characteristic is ensured up to the high frequency side. . In particular, the first-stage inductor with the smallest inductance has a gradual isolation characteristic peak at the self-resonance frequency, and the self-resonance frequency is on the high-frequency side of the isolation characteristic line of the second-stage inductor. It is preferable to use the one located.

  Next, the connection order of the three-stage inductor will be described below. In the wide-band bias circuit 110 of the present embodiment, the inductance of the first-stage inductor 111 is minimized, and the inductance is increased in the order of the second-stage and third-stage inductors 112 and 113. The results of examining how the connection order of three-stage inductors having different inductances affect the isolation characteristics, insertion loss characteristics, and group delay characteristics will be described below. In the following, compared to the wide-band bias circuit connected in order from the smallest inductance according to the present embodiment shown in FIG. Comparing.

  FIG. 7 shows the result of comparison of the characteristics of the wide-band bias circuit of this embodiment and Comparative Example 3. 7A shows the isolation characteristics 41 and 51 of the present embodiment and Comparative Example 3, and FIG. 7B shows the insertion loss characteristics 42 and 52 of the present embodiment and Comparative Example 3, FIG. 7C shows the group delay characteristics 43 and 53 of this embodiment and Comparative Example 3, respectively. FIG. 7A shows that the isolation characteristics 41 and 51 of the present embodiment and the comparative example 3 are substantially the same. From this, it can be confirmed that the order of connecting the three-stage inductors hardly affects the isolation characteristics. Also in the group delay characteristics 43 and 53 shown in FIG. 7C, the present embodiment and the comparative example 3 are almost the same.

On the other hand, in the insertion loss characteristics 42 and 52 shown in FIG. 7B, the insertion loss characteristic 42 of the present embodiment gradually decreases on the high frequency side, whereas the insertion loss characteristic 52 of the comparative example 3 rapidly increases. It can be confirmed that it vibrates after being lowered. In this way, when an inductor having a high inductance is connected to the first stage and the inductors are connected so that the inductance decreases in the order of the second and third stages, the flatness of the insertion loss characteristic of the broadband bias circuit is impaired. It can be confirmed that there is a possibility.
From the above results, the order of connecting the three-stage inductors is to connect the inductor having the smallest inductance to the first stage, connect the next largest inductance to the second stage, and connect the inductor having the largest inductance to the third stage. It was confirmed that it was good to connect.

  Note that the description in the present embodiment shows an example of the wide band bias circuit according to the present invention, and the present invention is not limited to this. The detailed configuration and detailed operation of the wide-band bias circuit in this embodiment can be changed as appropriate without departing from the spirit of the present invention.

DESCRIPTION OF SYMBOLS 100 Broadband bias circuit 101 Amplifier circuit 102 Input terminal 103 Output terminals 104, 105, 114 Capacitor 106 Input side connection point 107 Output side connection point 110 Broadband bias circuit 120 Power supply 111, 112, 113 Inductor 130 Input terminal 131 of bias circuit Power supply input terminal 132 of bias circuit Output terminal of bias circuit

Claims (8)

A broadband bias circuit having one end connected to a power source and the other end connected to an amplifier circuit for amplifying a broadband high-frequency signal using a predetermined frequency band and supplying a DC bias current, the input side of the amplifier circuit A wide-band bias circuit comprising three or more inductors connected in series to at least one of the output sides and connected in series from a connection point of the amplifier circuit. 2. The inductor of the first stage closest to the connection point among the three or more stages of inductors is minimized, and the inductances of the inductors of the second and subsequent stages are increased by the same or sequentially. A wide-band bias circuit as described in 1. Of the three or more stages of inductors, each of the inductors from the first stage to the second stage before the last stage intersects with the isolation characteristic of the inductor and the isolation characteristic of the inductor adjacent to the subsequent stage of the inductor. The wide-band bias circuit according to claim 2, wherein each inductance is determined so that a frequency is between self-resonant frequencies of the two adjacent inductors. Among the inductors of three or more stages, the inductors from the first stage to the stage before the last stage have a lower Q value than the last stage inductor, and the change in the isolation characteristic of the inductor in the vicinity of the self-resonant frequency The wide-band bias circuit according to claim 3, wherein the voltage is moderate. 5. The wideband bias circuit according to claim 1, wherein an isolation characteristic in which the inductors of three or more stages are connected in series is greater than 25 dB in the predetermined frequency band. 6. The insertion loss characteristic, wherein the inductance of each of the three or more stages of inductors is determined so that a fluctuation range in the predetermined frequency band is 0.4 dB or less. The wide-band bias circuit according to one item. The group delay characteristic is characterized in that the inductance of each of the three or more stage inductors is determined so that a delay time in the predetermined frequency band or another frequency band narrower than the predetermined frequency band is 100 ps or less. The wide-band bias circuit according to any one of 1 to 6. The broadband bias circuit according to any one of claims 1 to 7, wherein the predetermined frequency band is 1 MHz or more and 3 GHz or less.

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