JP2010231699A - Data processing device, data processing method and data processing program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data processing method or the like for repairing data error that occurs during writing of data as much as possible. <P>SOLUTION: The CPU 201 adds, to data to be stored in a phase change memory 202 and a flash memory 203, a management number and a symbol showing "presence of data" to be input, and stores them in a management area 1 (301) as information on first data. The CPU stores, when the "presence of data" is added, the same data as the data to the phase change memory 202 together with a verification value showing the validity of the data; stores, upon storage of the data by the first storage means, the same data as the data to the flash memory 203; and adds, upon storage of the same data as the data to the flash memory 203, the same management number as the management number shown in the information on the first data and an end flag N as new information on the data, and stores them as information on second data. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a data processing apparatus, a data processing method, a data processing program, and the like. More specifically, for example, data processing that can remedy a phenomenon in which an error occurs in data being written as much as possible. It relates to technical fields such as methods.

  In recent years, in data processing devices represented by mobile phones, PDAs, personal computers, workstations, etc. that handle various data, when processing the data to be handled (for example, storage, processing, etc.) Is temporarily stored in a storage area (e.g., RAM).

  For example, a flash memory having a floating gate structure is employed as the storage area.

  In a flash memory having a floating gate structure generally used, data is written by injecting electrons into the floating gate of the memory element. Then, read data is determined based on whether or not the amount of electrons stored in the floating gate is equal to or higher than a certain threshold voltage (for example, Patent Document 1).

JP 2007-115359 A

  However, in the technique described in Patent Document 1, when power supply is stopped in the middle of writing, electrons injected into the floating gate of the memory element stop in the middle, so that the amount of accumulated electrons does not reach a specified value. appear. As a result, if the amount of accumulated electrons is small, there is a problem that the data becomes wrong.

  For this reason, if a power outage occurs during writing to a non-volatile memory such as flash memory, not only the data that was about to be written immediately before the power outage will be lost, but there will also be data that appears to be written during the writing. Resulting in. In this state, the mobile device may operate with incorrect data, which may cause unexpected operation.

  In particular, in portable devices, the battery is often used as the power source, and the user replaces the battery without forgetting to turn off the power, or the battery is removed at a timing unintended by the user due to dropping, etc. The power supply stop will occur.

  In order to prevent these problems, a means for storing the power supply stoppage in addition to the CPU and the memory and a method of simply duplicating the data in the memory can be taken. However, due to an increase in the number of parts and an increase in the memory capacity. There was a problem that the cost increased.

  Accordingly, the present invention has been made in view of the above problems, and an example of the object thereof is a data processing apparatus and a data processing method capable of relieving as much as possible a phenomenon in which an error occurs in data being written. And providing a data processing program and the like.

  In order to solve the above-mentioned problem, the invention described in claim 1 has a storage area divided into at least two or more, and includes a management area for storing information related to input data and a data area for storing the data. A data processing apparatus comprising: a first storage unit having a second storage unit having a data area that stores the same data as the data, wherein the first storage unit and the second storage unit A management number and a code indicating the presence of the input data are assigned to the data stored in the first storage area and stored in the management area of the first storage section as information relating to the first data. The data management means, and the first storage means for storing the same data as the data together with the verification value indicating the validity of the data in the first storage section when the code is given, first When the data is stored by the storage unit, when the second storage unit stores the same data as the data in the second storage unit, and when the data is stored by the second storage unit As the information related to the new data, the management number that is the same as the management number indicated in the information related to the first data and the data indicated by the information related to the first data are stored in the second storage unit And a second data management means for storing the information as information relating to the second data.

  According to this invention, the information related to the first data and the information related to the second data are stored for the data stored in the first storage unit and the second storage unit.

  Therefore, the management information (information related to the first data and information related to the second data) is stored in pairs, so that the state of data writing to the flash memory and phase change memory when the power is stopped is accurate. Thus, the phenomenon in which an error occurs in the data being written can be remedied as much as possible.

  According to a second aspect of the present invention, in the data processing device according to the first aspect, when the data is read, the information about the first data and the information for confirming the existence of the information about the second data Data erasure for erasing data indicated by the information on the first data from the second storage unit when it is determined by the checking means and the information checking means that there is no information on the second data Means, verification means for verifying validity of data stored in the first storage section, and storage in the first storage section in the second storage section when the validity is confirmed. Information about the second data is stored by the second data management unit when the data is stored by the recovery unit storing the data and the recovery unit.

  According to the present invention, when data is read, the validity of the data is confirmed, and the data for which the validity is confirmed is stored as the recovery data.

  Therefore, it is possible to restore data even if the power is stopped during writing.

  According to a third aspect of the present invention, in the data storage device according to any one of the first or second aspect, a phase change memory is used for the first storage unit.

  Therefore, by providing a management area in the phase change memory and storing management information in pairs, it is possible to accurately grasp the data write status to the flash memory and phase change memory when the power is stopped, It is possible to reliably prevent the mobile device from malfunctioning by performing recovery suitable for the above and using data in the middle of writing. Furthermore, if a data area is provided on the phase change memory and the write data with the checksum added is stored, the data can be recovered even if the power is stopped during the writing.

  Further, when a management area is constructed using a flash memory, data erasure is required and processing time is required. However, using a phase change memory eliminates the need for data erasure. Therefore, the processing time can be shortened.

  According to a fourth aspect of the present invention, in the data processing device according to the third aspect, the first data management means stores the first data that is newly stored when the storage capacity of the management area is insufficient. Overwrite information about the data of.

  Therefore, by providing a management area in the phase change memory and repeatedly using it by overwriting, it is possible to minimize the capacity of the management area, reduce the component cost, and shorten the erasing time by overwriting.

The invention according to claim 5 has a storage area divided into at least two or more, a management area for storing information relating to input data, and a first storage unit having a data area for storing the data, A data processing method included in a data processing apparatus comprising: a second storage unit having a data area for storing the same data as the data, wherein the data is stored in the first storage unit and the second storage unit First data stored in the management area of the first storage unit as information related to the first data by assigning a management number and a code indicating the presence of the input data to the data to be stored A management process, and a first storage process for storing the same data as the data in the first storage unit together with a verification value indicating the validity of the data when the code is given;
When the data is stored in the first storage step, the second storage step stores the same data as the data in the second storage unit, and the data is stored in the second storage step. In this case, as the information related to the new data, the management number that is the same as the management number indicated in the information related to the first data and the data indicated by the information related to the first data are the second storage unit And a second data management step of assigning a code indicating that the data is stored and storing it as information relating to the second data.

  The invention according to claim 6 is a data processing method for reading data stored by the data processing method according to claim 5, wherein when the data is read, information on the first data, and the data An information confirmation step for confirming the presence of information relating to the second data, and the data indicated by the information relating to the first data when the information confirmation step determines that no information relating to the second data exists. A data erasing step for erasing from the second storage unit, a verification step for verifying the validity of the data stored in the first storage unit, and the second step when the validity is confirmed. When the storage unit stores the data stored in the first storage unit, and when the data is stored by the recovery unit, the second data management step performs the previous process. Information about the second data is stored.

  The invention according to claim 7 causes a computer to function as the data processing apparatus according to claim 1.

  The invention described in claim 8 causes a computer to function as the data processing apparatus described in claim 2.

  As described above, according to the present invention, when write management information and write data are placed on the phase change memory, the writing is in progress when the power supply to the portable device is stopped during the writing of the flash memory or the phase change memory. It is possible to remedy as much as possible the phenomenon in which errors occur in the data.

3 is a block diagram showing an outline of the configuration of a mobile phone S. FIG. 3 is a block diagram illustrating a configuration outline of a control unit 103. FIG. It is a conceptual diagram which shows a management area. It is a conceptual diagram which shows a data area. It is a flowchart which shows operation | movement of CPU201 at the time of data writing (memory | storage). It is a flowchart which shows operation | movement of CPU201 at the time of data reading.

  Hereinafter, the best embodiment of the present application will be described in detail with reference to the drawings. The embodiment described below is an embodiment when the present application is applied to a mobile phone as an example of a data processing device.

  First, the configuration and functional overview of the mobile phone S according to the present embodiment will be described with reference to FIG.

  FIG. 1 is a block diagram showing an outline of the configuration of the mobile phone S.

  As shown in FIG. 1, the mobile phone S includes an antenna 101, a transmission / reception unit 102, a control unit 103, a speaker 104, a microphone 105, a display unit 106, an operation unit 107, a power supply unit 108, and the like.

  The outline of the function of each unit will be described by taking the incoming operation of the mobile phone S as an example. First, the radio wave received by the antenna 101 is sent to the transmission / reception unit 102, demodulated, and analyzed by the control unit 103. When the control unit 103 recognizes that it is an incoming call, the control unit 103 sends the transmission data to the transmission / reception unit 102 and displays the incoming call on the display unit 106. Also, a ring tone is generated from the speaker 104 to notify the user of the incoming call. When the user notices an incoming call and operates the operation unit 107, the control unit 103 detects it and activates the voice using the microphone 105. The transmitted / received audio signal is transmitted to the transmitting / receiving unit 102 and communicates with a base station (not shown) through the antenna 101. The power supply unit 108 supplies power to each unit.

  Next, the control unit 103 will be described in detail with reference to FIG.

  FIG. 2 is a block diagram showing an outline of the configuration of the control unit 103.

  As shown in FIG. 2, a CPU (Central Processing Unit) 201, a phase change memory 202 as a first storage unit, a flash memory (nonvolatile memory) 203 as a second storage unit, a RAM (Random Access Memory) 204, etc. It is comprised including.

  A ROM (Read Only Memory) (not shown) stores a program to be executed by the CPU 201, and the CPU 201 comprehensively controls the control unit 103 based on this program. A RAM 204 is a memory used as a work area for the CPU 201 to control the control unit 103 in an integrated manner.

  The phase change memory 202 is based on the principle that a certain material exhibits different resistance values due to a phase change due to a temperature change, and is non-volatile like a flash memory but does not need to be erased. Can be used in Moreover, it is suitable for large capacity and can be used for storing data and programs.

  The phase change memory 202 is connected to the CPU 201 similarly to the flash memory 203 and the RAM 204, and the CPU 201 performs writing / reading of these memories in accordance with a program stored in the memory.

  Further, in the present embodiment, the storage area of the phase change memory 202 is divided into at least two or more, and has a management area for storing information related to input data and a data area for storing the data.

  Next, details of the management area and the data area will be described with reference to FIGS.

  FIG. 3 is a conceptual diagram showing a management area.

  When data is input and data is written to the flash memory 203 (nonvolatile memory), first, a management area 1 (301) is created in the phase change memory 202, and a management number, “Data present” is given as a code indicating the presence of the input data. In addition, the start address of the write data is given and stored as information about the first data.

  Here, the management number is an identification number for identifying input data from other data, and is given, for example, under the control of the CPU 201. In the present embodiment, it is assumed that the management numbers 0, 1, 2,... If there is information “data present” in the management number N (FIG. 3), the data is stored in the data area.

  FIG. 4 is a conceptual diagram showing a data area.

  When the management number N (FIG. 3) includes “data present” information, the data area 402 provided in a separate area from the management area 401 of the phase change memory 202 is used, and after writing data in the management area 401 and the nonvolatile memory Before the data is written, the data to which the verification value (check sum) is added is stored in the data area 402 of the phase change memory 202.

  The verification value may be used generally for data transfer, and may be CRC or ECC. After this data storage is completed, data is written to the flash memory 203, and when the data is completed, an end flag is written in the management area (end flag N in FIG. 3).

  As shown in FIG. 4, the management area 401 and the data area 402 are correlated so that if the management number is known, it is possible to know in which area of the data area 402 the data of the management number N is present.

  Returning to the description of FIG. 3, data is written to the flash memory 203. When the writing is completed, the same management number is assigned and an end flag is written.

  In other words, when data writing to the flash memory 203 is normally completed, the management area 1 (301) has two sets of two pieces of data that have the same management number and store the start address / data present / none flag and the end flag. To be. When these are repeated and the management number N is reached and the preset area of the management area 1 (301) disappears, the management area 2 (302) is created using the same address space of the phase change memory 202. The management area 2 (302) uses the management area 1 (301) by overwriting to avoid using a new memory area. As in the management area 1 (301), the management data is written every time data is written to the nonvolatile memory as the management number N + 1 from the youngest address.

  Returning to FIG. 2, the flash memory 203 is a kind of nonvolatile semiconductor memory, and is characterized in that data can be electrically rewritten in an on-board state.

  As described above, the CPU 201 controls the overall operation of the control unit 103 as well as the first data management unit, the first storage unit, the second storage unit, the second data management unit, and the information of the present application. It functions as a confirmation unit, a data erasing unit, a verification unit, and a recovery unit.

  The CPU 201 as the first data management means assigns a management number to the data stored in the phase change memory 202 and the flash memory 203 and “with data” as a code indicating the presence of the input data. Then, it is stored in the management area 1 (301) as information relating to the first data.

  When the “data present” is given, the CPU 201 as the first storage means stores the same data as the data in the phase change memory 202 together with a verification value indicating the validity of the data.

As described above, CRC can be applied as an example of the verification value.
CRC is an abbreviation of Cyclic Redundancy Check, and is a mechanism for detecting data errors (verifying the validity of data). In error detection by CRC, first, a CRC code is generated from data as an example of a verification value.

  The CRC code is characterized in that the same CRC code is always generated from the same data. For example, if even one byte of data is different, a completely different CRC code is generated. This feature is used to verify the validity of data.

  In addition, since CRC is a well-known technique, detailed description is abbreviate | omitted.

  The CPU 201 as the second storage unit stores the same data as the data in the flash memory 203 when the data is stored by the first storage unit.

  When the same data as the data is stored in the flash memory 203, the CPU 201 as the second data management means is the same as the management number indicated in the information related to the first data as the information related to the new data. And an end flag N are stored in the management area 1 (301) as information relating to the second data.

  When reading out the data, the CPU 201 as the information confirmation unit confirms the existence of information related to the first data and information related to the second data.

  Specifically, the CPU 201 determines whether or not the management number is a set of two, that is, the management number of the information related to the first data and the management number of the information related to the second data exist. Check if it is.

  The CPU 201 as the data erasure unit erases the data indicated by the information about the first data from the flash memory 203 when the information confirmation unit determines that there is no information about the second data.

  The CPU 201 as verification means verifies the validity of the data stored in the phase change memory 202.

  When the validity is confirmed, the CPU 201 as the recovery unit stores the data stored in the phase change memory 202 in the flash memory 203.

  The operation of the CPU 201 will be described in more detail with reference to FIGS. 3 and 4. For example, before the start address of the management number 0 in the management area 1 (301) in FIG. When the supply is stopped, the data to be written to the nonvolatile memory becomes invalid, but there is no problem because erroneous data is not read out.

  After the start address of the management number 0 in the management area 1 (301) in FIG. 3 is written, if the power supply is stopped before the writing to the nonvolatile memory is completed, the end flag of the management number 0 is written. No data exists. In this case, since there is a high possibility that the writing to the nonvolatile memory is not normally completed, the data in the nonvolatile memory is discarded.

  After the start address of the management number 0 in the management area 1 (301) in FIG. 3 is written, if the power supply is stopped before the end flag of the management number 0 is written, the writing to the nonvolatile memory is completed normally. However, it is difficult for the CPU 201 to judge it. Since there is no data in which the end flag of management number 0 is written, the data in the nonvolatile memory is discarded. It is the data area 402 in FIG. 4 that relieves the same problem.

  If the end flag of the management number 0 is written after the start address of the management number 0 in the management area 1 (301) in FIG. 3 is written, there is no power supply stop during writing to the nonvolatile memory. No problem.

  After the management number N is written in the management area 401 of FIG. 4, when the power supply is stopped while the data of the management number N is being written in the data area 402, the verification value of the data of the management number N is NG. Since there is no valid data written in the nonvolatile memory, it is discarded.

  After the management number N is written in the management area 401 of FIG. 4, when the data of the management number N is written to the data area 402 and the power supply is stopped while writing to the nonvolatile memory, the checksum of the data of the management number N Therefore, the nonvolatile memory is written using the data remaining in the data area 402, and the management flag of the management number N is written.

  The power supply stop while writing the end flag of the management number N in FIG.

  By using the phase change memory configured in the device and devising how to use the management area, it is possible to reliably prevent malfunctions due to reduced data reliability due to power supply interruption without cost increase. .

  Next, the operation of the CPU 201 at the time of data writing (storage) will be described with reference to FIG.

  FIG. 5 is a flowchart showing the operation of the CPU 201 at the time of data writing (storage).

  First, data writing from the CPU 201 to the flash memory 203 occurs (S101).

  The CPU 201 writes the management number and start address in the management area of the phase change memory 202 (S102).

  It is determined whether data is written to the data area 402 of the phase change memory 202 in the management area (S103). When data is written (S103: Y), the write data to the nonvolatile memory is changed to the data of the phase change memory 202. After a verification value is added to the area 402 and transferred (S104), data is written to the flash memory 203 (S105).

  When data writing is not performed (S103: N), data is immediately written to the flash memory 203 (S105). Then, the management number and end flag are written in the management area (S106), and the operation is terminated (S107).

  Next, the operation of the CPU 201 at the time of data reading will be described using FIG.

  FIG. 6 is a flowchart showing the operation of the CPU 201 when reading data.

  As shown in FIG. 6, data read from the CPU 201 to the flash memory 203 occurs (S201).

  CPU 201 reads the management number of the management area of phase change memory 202 (S202).

  The CPU 201 reads all the management numbers and confirms whether the management numbers are one set (S203).

  When all the management numbers are one set (S203: Y), there is no problem such as power supply stop, so the recovery process is not performed and the process ends (S210).

  When the management number is not one set (S203: N), it is recognized that a power supply stop has occurred in the data write flow of FIG. 5, and a recovery process is performed.

  First, in order to prevent malfunction, the start address area (flash memory 203) of the mismatched management number is erased (S204).

  Next, the information of the management area is analyzed, and it is confirmed that there is no data for the management number that does not coincide with “data present / not present” (S205).

  If there is no data (S205: Y), the recovery process cannot be performed, so the end flag of the management number that does not match the management area is overwritten (S209), and the operation is ended (S210).

  If there is data (S205: N), there is a possibility that the data can be recovered, so a recovery process is performed.

  First, the checksum of the data on the phase change memory 202 with the mismatched management number is calculated (S206). The data and the verification value are determined (S207). If the verification value is NG (S207: Y), the data cannot be recovered, so the management number end flag that does not match the management area is overwritten (S209), and the operation ends. (S210).

  If the verification value is OK (S207: N), recovery processing is possible, so the verification value OK data is written to the start address area (flash memory 203) (S208), the write operation is restarted, and the management area does not match The management number end flag is overwritten (S209), and the operation is terminated (S210).

  As described above, the CPU 201 assigns a management number to data stored in the phase change memory 202 and the flash memory 203 and “data present” as a code indicating the presence of the input data, Stored in the management area 1 (301) as information relating to the first data, and when “data present” is given, the same data as the data is verified in the phase change memory 202 to indicate the validity of the data When the data is stored together with the value and the data is stored by the first storage means, the same data as the data is stored in the flash memory 203, and the same data as the data is stored in the flash memory 203 In addition, as the information regarding the new data, the same management number as the management number indicated in the information regarding the first data, and The completion flag N Grant, stored in the management area 1 (301) as information on the second data.

  Therefore, the management information (information related to the first data and information related to the second data) is stored in pairs, so that the data write state to the flash memory and phase change memory when the power is stopped is accurate. Thus, the phenomenon in which an error occurs in the data being written can be remedied as much as possible.

  Further, when the CPU 201 reads the data, the CPU 201 confirms the existence of the information related to the first data and the information related to the second data, and determines that there is no information related to the second data. The data indicated by the information related to the first data is erased from the flash memory 203, the validity of the data stored in the phase change memory 202 is verified, and when the validity is confirmed, The data stored in the phase change memory 202 is stored, and information regarding the second data is stored.

  In addition, when a management area is constructed using a flash memory, data erasure is required and processing time is required. However, using a phase change memory eliminates the need for data erasure. Therefore, the processing time can be shortened.

  In addition, when the nonvolatile memory is a flash memory, there is a process that requires erasure. However, when the nonvolatile memory is a phase change memory, it is effective because erasure is unnecessary.

  Further, the management area operation system using the CPU of the present invention is built in the phase change memory itself. If only the result determined in the present invention is output by accessing from the outside of the phase change memory, the user can enjoy the countermeasure against the power supply stop without being particularly conscious.

  In the above embodiment, an example in which the present application is applied to the mobile phone S has been shown. However, other portable devices such as a PDA, a portable music player, an electronic notebook, a laptop PC, a transceiver, etc. It is applicable to.

DESCRIPTION OF SYMBOLS 101 Antenna 102 Transmission / reception part 103 Control part 104 Speaker 105 Microphone 106 Display part 107 Operation part 108 Power supply part 201 CPU
202 Phase change memory 203 Flash memory 204 RAM
S mobile phone

Claims (8)

A first storage unit having a storage area divided into at least two or more and having a management area for storing information about input data and a data area for storing the data;
A second storage unit having a data area for storing the same data as the data;
A data processing apparatus comprising:
A management number and a code indicating the presence of the input data are assigned to the data stored in the first storage unit and the second storage unit, and the information about the first data is the first First data management means for storing in the management area of one storage unit;
A first storage means for storing the same data as the data in the first storage unit together with a verification value indicating the validity of the data when the code is given;
A second storage unit that stores the same data as the data in the second storage unit when the data is stored by the first storage unit;
When the data is stored by the second storage means, the management number that is the same as the management number indicated in the information related to the first data, and the information related to the first data, as information related to the new data A second data management means for assigning a code indicating that the data indicated by the information is stored in the second storage unit, and storing the data in the management area of the first storage unit as information relating to the second data; ,
A data processing apparatus comprising: The data processing apparatus according to claim 1,
When reading the data,
Information confirmation means for confirming the presence of information related to the first data and information related to the second data;
A data erasure unit for erasing data indicated by the information about the first data from the second storage unit when the information confirmation unit determines that there is no information about the second data;
Verification means for verifying the validity of the data stored in the first storage unit;
When the validity is confirmed, a recovery unit that stores the data stored in the first storage unit in the second storage unit;
When data is stored by the recovery unit, the second data management unit stores information relating to the second data. In the data processing device according to any one of claims 1 and 2,
A data storage device using a phase change memory for the first storage unit. The data processing apparatus according to claim 3, wherein
The data processing apparatus according to claim 1, wherein the first data management means overwrites information on the first data newly stored when the storage capacity of the management area is insufficient. A first storage unit having a storage area divided into at least two or more and having a management area for storing information about input data and a data area for storing the data;
A second storage unit having a data area for storing the same data as the data;
A data processing method included in a data processing apparatus comprising:
A management number and a code indicating the presence of the input data are assigned to the data stored in the first storage unit and the second storage unit, and the information about the first data is the first A first data management step stored in one storage unit;
A first storage step of storing the same data as the data in the first storage unit together with a verification value indicating the validity of the data when the code is given;
When the data is stored by the first storage step, a second storage step of storing the same data as the data in the second storage unit;
When the data is stored in the second storage step, as the information related to the new data, the management number that is the same as the management number indicated in the information related to the first data, and the first data A second data management step of assigning a code indicating that the data indicated by the information is stored in the second storage unit, and storing the data in the management area of the first storage unit as information relating to the second data; ,
A data processing method characterized by comprising: A data processing method for reading data stored by the data processing method according to claim 5, comprising:
When reading the data,
Information confirmation step for confirming the presence of information on the first data and information on the second data;
A data erasing step of erasing the data indicated by the information about the first data from the second storage unit when it is determined by the information confirmation step that information about the second data does not exist;
A verification step of verifying the validity of the data stored in the first storage unit;
When the validity is confirmed, a recovery step of storing the data stored in the first storage unit in the second storage unit;
A data processing method characterized in that, when data is stored by the recovery means, information on the second data is stored by the second data management step.   A data processing program for causing a computer to function as the data processing apparatus according to claim 1.   A data processing program for causing a computer to function as the data processing device according to claim 2.

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