JP2010231498A - Constant voltage power supply - Google Patents

Constant voltage power supply Download PDF

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JP2010231498A
JP2010231498A JP2009078317A JP2009078317A JP2010231498A JP 2010231498 A JP2010231498 A JP 2010231498A JP 2009078317 A JP2009078317 A JP 2009078317A JP 2009078317 A JP2009078317 A JP 2009078317A JP 2010231498 A JP2010231498 A JP 2010231498A
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transistor
constant voltage
power supply
voltage power
current path
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Hiroshi Sakazume
浩 坂爪
Takaaki Yoshino
貴昭 吉野
Satoru Yamane
覚 山根
Hiroshi Tanigawa
寛 谷川
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Asahi Kasei Toko Power Devices Corp
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<P>PROBLEM TO BE SOLVED: To provide a constant voltage power supply for improving ripple rejection characteristics in a relatively high frequency domain by improving circuit configurations. <P>SOLUTION: A transistor M3 operating when receiving supply of a fixed bias from a constant voltage source VB is installed between a transistor M1 configuring an active load and a transistor 5 configuring a differential amplifier circuit. Then, a power transistor MP is driven by using a signal appearing at the common connection point of the transistor M3 and the transistor M5 so that the transistor M3 can be interposed between the gate of the power transistor MP and the active load M1. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、定電圧電源の高周波領域におけるリップルリジェクション特性を向上させるための回路構成の改良に関するものである。   The present invention relates to an improvement in a circuit configuration for improving ripple rejection characteristics in a high frequency region of a constant voltage power supply.

シリーズ型の定電圧電源は、例えばスイッチング型の定電圧電源に比べて回路構成が簡素であり、また負荷の変動に対する応答速度が早いという特徴がある。そこでシリーズ型の定電圧電源は、比較的電力消費の小さな負荷に対して安定度の高い電圧を供給するための電源回路として使用されている。   The series type constant voltage power supply is characterized in that the circuit configuration is simpler than that of, for example, a switching type constant voltage power supply, and the response speed to load fluctuations is fast. Therefore, the series type constant voltage power supply is used as a power supply circuit for supplying a highly stable voltage to a load with relatively small power consumption.

図2は従来の一般的な定電圧電源の回路図であり、各回路素子を次のように接続構成している。
定電圧電源の入力端子INと出力端子OUTの間にパワートランジスタMPの主電流路を接続し、出力端子OUTと回路の基準電位点(以下、グラントと言う)の間に検出抵抗R1およびR2を直列に接続する。ゲート同士が共通接続されたトランジスタM1およびM2の各ソースを入力端子INにそれぞれ接続し、トランジスタM2のゲート・ドレイン間を短絡する。トランジスタM1のドレインはトランジスタM3の主電流路を介してトランジスタM5のドレインに接続し、トランジスタM2のドレインはトランジスタM4の主電流路を介してトランジスタM6のドレインに接続する。
FIG. 2 is a circuit diagram of a conventional general constant voltage power supply, in which each circuit element is connected and configured as follows.
The main current path of the power transistor MP is connected between the input terminal IN and the output terminal OUT of the constant voltage power source, and the detection resistors R1 and R2 are connected between the output terminal OUT and a reference potential point (hereinafter referred to as a grant) of the circuit. Connect in series. The sources of the transistors M1 and M2 whose gates are commonly connected are respectively connected to the input terminal IN, and the gate and drain of the transistor M2 are short-circuited. The drain of the transistor M1 is connected to the drain of the transistor M5 via the main current path of the transistor M3, and the drain of the transistor M2 is connected to the drain of the transistor M6 via the main current path of the transistor M4.

差動増幅回路を構成するようにトランジスタM5とトランジスタM6のソースを共通接続し、そのソースの共通接続点を電流源CS1を介してグランドに接続する。トランジスタM3とM4のゲートはそれぞれ定電圧源VBに接続する。トランジスタM5のゲートは基準電圧源VREFに接続し、トランジスタM6のゲートは検出抵抗R1とR2の共通接続点に接続する。入力端子INとグランドの間にトランジスタM7の主電流路と電流源CS2を直列に接続し、トランジスタM7のゲートをトランジスタM1とトランジスタM3の共通接続点に接続する。トランジスタM7のゲート・ドレイン間に位相補償抵抗RFと位相補償コンデンサCFを直列に接続する。   The sources of the transistors M5 and M6 are commonly connected so as to constitute a differential amplifier circuit, and the common connection point of the sources is connected to the ground via the current source CS1. The gates of the transistors M3 and M4 are each connected to a constant voltage source VB. The gate of the transistor M5 is connected to the reference voltage source VREF, and the gate of the transistor M6 is connected to the common connection point of the detection resistors R1 and R2. The main current path of the transistor M7 and the current source CS2 are connected in series between the input terminal IN and the ground, and the gate of the transistor M7 is connected to the common connection point of the transistors M1 and M3. A phase compensation resistor RF and a phase compensation capacitor CF are connected in series between the gate and drain of the transistor M7.

以上のように接続構成した図2の回路において、トランジスタM1〜M7と電流源CS1、CS2と定電圧源VBが誤差増幅器を構成している。ここで、トランジスタM1とM2が誤差増幅器内部における能動負荷を構成し、トランジスタM3、M4がそれぞれトランジスタM5、M6とカスコード回路を構成している。また、トランジスタM5とM6が誤差増幅器内部における差動増幅回路を構成し、トランジスタM7と電流源CS2が出力回路を構成している。なお、パワートランジスタMPおよびトランジスタM3、M4、M5、M6はNチャネル型で、トランジスタM1、M2、M7はPチャネル型である。   In the circuit of FIG. 2 configured as described above, the transistors M1 to M7, the current sources CS1 and CS2, and the constant voltage source VB constitute an error amplifier. Here, the transistors M1 and M2 constitute an active load in the error amplifier, and the transistors M3 and M4 constitute a cascode circuit with the transistors M5 and M6, respectively. Transistors M5 and M6 constitute a differential amplifier circuit in the error amplifier, and transistor M7 and current source CS2 constitute an output circuit. Note that the power transistor MP and the transistors M3, M4, M5, and M6 are N-channel type, and the transistors M1, M2, and M7 are P-channel type.

図2に示す定電圧電源は、出力端子OUTの位置の電圧(以下出力電圧と言う)を検出抵抗R1とR2で分圧して検出し、それをトランジスタM1〜M7他からなる誤差増幅器において基準電圧源VREFの基準電圧と比較している。そして、図2の定電圧電源は、前記2つの電圧の差に基づいて出力回路に接続されたパワートランジスタMPを駆動している。その際、検出抵抗R1とR2の共通接続点に現れる電圧が基準電圧源VREFの基準電圧に等しくなるよう、パワートランジスタMPの主電流路を通過する電流が制御されている。その結果、図2の定電圧電源は、その出力電圧が検出抵抗R1とR2の共通接続点の電圧と基準電圧源VREFの基準電圧を等しくするような値で安定化するように動作する。   The constant voltage power source shown in FIG. 2 detects the voltage at the position of the output terminal OUT (hereinafter referred to as the output voltage) by dividing it with detection resistors R1 and R2, and this is detected by a reference voltage in an error amplifier comprising transistors M1 to M7 and others. Comparison is made with the reference voltage of the source VREF. 2 drives the power transistor MP connected to the output circuit based on the difference between the two voltages. At that time, the current passing through the main current path of the power transistor MP is controlled so that the voltage appearing at the common connection point of the detection resistors R1 and R2 becomes equal to the reference voltage of the reference voltage source VREF. As a result, the constant voltage power supply of FIG. 2 operates so that its output voltage is stabilized at a value that makes the voltage at the common connection point of the detection resistors R1 and R2 equal to the reference voltage of the reference voltage source VREF.

特許WO2003−091817号公報Patent WO2003-091817

特許文献1の中でも議論されているように、シリーズ型の定電圧電源は安定度の高い電圧を要求する負荷に接続されて使用されることが多いため、そのリップルリジェクション特性が重視される。図2に示す回路構成を有する定電圧電源の場合、比較的高周波領域でのリップルリジェクション特性に問題が有った。   As discussed in Patent Document 1, since the series type constant voltage power supply is often used connected to a load that requires a highly stable voltage, its ripple rejection characteristics are emphasized. In the case of the constant voltage power supply having the circuit configuration shown in FIG. 2, there is a problem in the ripple rejection characteristics in a relatively high frequency region.

図2の定電圧電源において、トランジスタM1は、そのゲート・ソース間とドレイン・ゲート間にそれぞれ寄生容量C1aとC1bを有する。また、パワートランジスタMPは、そのゲート・ソース間に寄生容量CPを有する。ここで、入力端子INに供給される電圧(以下、入力電圧と言う)に比較的高周波のリップルが重畳された場合、そのリップル成分が寄生容量C1a、C1b、位相補償抵抗RF、位相補償コンデンサCF、寄生容量CPの経路を通って出力端子OUTに漏洩する。これが図2の構成を持つ定電圧電源のリップルリジェクション特性が比較的高周波領域で低下する原因の一つだと推定される。   In the constant voltage power supply of FIG. 2, the transistor M1 has parasitic capacitances C1a and C1b between its gate and source and between its drain and gate, respectively. The power transistor MP has a parasitic capacitance CP between its gate and source. Here, when a relatively high-frequency ripple is superimposed on a voltage supplied to the input terminal IN (hereinafter referred to as input voltage), the ripple components are parasitic capacitances C1a and C1b, a phase compensation resistor RF, and a phase compensation capacitor CF. Then, it leaks through the path of the parasitic capacitance CP to the output terminal OUT. It is estimated that this is one of the causes that the ripple rejection characteristic of the constant voltage power supply having the configuration of FIG.

そこで本発明は、回路構成の改良により比較的高周波領域におけるリップルリジェクション特性を向上させた定電圧電源を提供することを目的とする。   Accordingly, an object of the present invention is to provide a constant voltage power supply having improved ripple rejection characteristics in a relatively high frequency region by improving the circuit configuration.

上記課題を解決するための本発明は、 出力電圧と基準電圧に応じて動作する誤差増幅器にて入出力端子間に接続されたパワートランジスタを駆動し、安定した該出力電圧を得る定電圧電源において、 誤差増幅器の内部において差動増幅回路を構成するように主電流路の一端が共通接続された第1および第2のトランジスタと、第1のトランジスタの主電流路の他端と能動負荷の間に接続された第3のトランジスタと、第2のトランジスタの主電流路の他端と能動負荷の間に接続された第4のトランジスタと、第3および第4のトランジスタに一定のバイアスを供給する定電圧源とを具備し、 第1のトランジスタの主電流路の他端と第3のトランジスタとの共通接続点に得られる信号を利用してパワートランジスタを駆動することを特徴とする。   The present invention for solving the above-described problems is a constant voltage power source that drives a power transistor connected between input and output terminals by an error amplifier that operates according to an output voltage and a reference voltage, and obtains the stable output voltage. A first and a second transistor having one end of a main current path commonly connected so as to form a differential amplifier circuit in the error amplifier, and the other end of the main current path of the first transistor and an active load A constant bias is supplied to the third transistor connected to the second transistor, the fourth transistor connected between the other end of the main current path of the second transistor and the active load, and the third and fourth transistors. A power source is driven by using a signal obtained at a common connection point between the other end of the main current path of the first transistor and the third transistor. That.

一定のバイアスの供給を受けて動作する第3のトランジスタがパワートランジスタのゲートと能動負荷の間に介在することにより、能動負荷を介して出力端子に漏洩する比較的高周波領域のリップル成分を低減できる。これによりリップルリジェクション特性の向上した定電圧電源を提供できる。   A third transistor that operates with a constant bias supplied is interposed between the gate of the power transistor and the active load, thereby reducing a ripple component in a relatively high frequency region that leaks to the output terminal through the active load. . As a result, a constant voltage power supply with improved ripple rejection characteristics can be provided.

本発明による定電圧電源の実施例の回路図。The circuit diagram of the Example of the constant voltage power supply by this invention. 従来の定電圧電源の回路図。The circuit diagram of the conventional constant voltage power supply.

以下に、本発明に係る定電圧電源の実施の形態を図面を参照しながら説明する。
図1は本発明による定電圧電源の回路図である。図1の回路は、トランジスタM7のゲートと位相補償抵抗RFの一端をトランジスタM3とトランジスタM5の共通接続点に接続したことを特徴としている。図1におけるその他の各回路素子の存在、およびその接続構成は図2の回路と同じになっている。
Embodiments of a constant voltage power source according to the present invention will be described below with reference to the drawings.
FIG. 1 is a circuit diagram of a constant voltage power source according to the present invention. The circuit of FIG. 1 is characterized in that the gate of the transistor M7 and one end of the phase compensation resistor RF are connected to the common connection point of the transistors M3 and M5. The presence of other circuit elements in FIG. 1 and the connection configuration thereof are the same as those of the circuit of FIG.

このような回路構成とすると、主として以下の2つの作用により定電圧電源のリップルリジェクション特性が向上する。
先ず、図1の回路では、一定のバイアスの供給を受けるトランジスタM3がトランジスタM1、位相補償抵抗RFおよび位相補償コンデンサCFと共に入力端子INとパワートランジスタMPのゲートとの間に介在している。このため、トランジスタM1の寄生容量C1a、C1bを通ってパワートランジスタMPのゲート方向に漏洩していく高周波領域のリップルがトランジスタM3で制限される。
With such a circuit configuration, the ripple rejection characteristic of the constant voltage power source is improved mainly by the following two actions.
First, in the circuit of FIG. 1, a transistor M3 that receives a constant bias is interposed between the input terminal IN and the gate of the power transistor MP together with the transistor M1, the phase compensation resistor RF, and the phase compensation capacitor CF. For this reason, the transistor M3 limits the ripple in the high-frequency region that leaks in the gate direction of the power transistor MP through the parasitic capacitances C1a and C1b of the transistor M1.

また、トランジスタM1と同様にトランジスタM7のゲート・ソース間にも寄生容量が存在し、その寄生容量を介してパワートランジスタMPのゲート方向に高周波領域のリップルが漏洩することも考えられる。ここで図1の回路構成だと、トランジスタM7のゲート・ソース間寄生容量を介して漏洩してきたリップルの一部はトランジスタM3のゲート・ソース間寄生容量と定電圧源VBを介してグランドの方向に漏洩していく。
これらの作用により、図1の定電圧電源のリップルリジェクション特性が図2の回路に比べて向上するようになる。
Similarly to the transistor M1, there is a parasitic capacitance between the gate and the source of the transistor M7, and it is conceivable that a ripple in a high frequency region leaks in the gate direction of the power transistor MP through the parasitic capacitance. In the circuit configuration of FIG. 1, a part of the ripple leaked through the gate-source parasitic capacitance of the transistor M7 is in the direction of the ground via the gate-source parasitic capacitance of the transistor M3 and the constant voltage source VB. To leak.
With these actions, the ripple rejection characteristic of the constant voltage power source of FIG. 1 is improved as compared with the circuit of FIG.

IN:入力端子
OUT:出力端子
MP:パワートランジスタ
M1、M2:トランジスタ(能動負荷)
M3:トランジスタ(第3)
M4:トランジスタ(第4)
M5:トランジスタ(第1)
M6:トランジスタ(第2)
VB:定電圧源(一定バイアス)
VREF:基準電圧源(基準電圧)
R1、R2:検出抵抗
C1a、C1b:寄生容量
CP:寄生容量
IN: input terminal OUT: output terminal MP: power transistors M1, M2: transistors (active load)
M3: Transistor (third)
M4: Transistor (fourth)
M5: Transistor (first)
M6: Transistor (second)
VB: Constant voltage source (constant bias)
VREF: Reference voltage source (reference voltage)
R1, R2: detection resistors C1a, C1b: parasitic capacitance CP: parasitic capacitance

Claims (2)

出力電圧と基準電圧に応じて動作する誤差増幅器にて入出力端子間に接続されたパワートランジスタを駆動し、安定した該出力電圧を得る定電圧電源において、
該誤差増幅器の内部において差動増幅回路を構成するように主電流路の一端が共通接続された第1および第2のトランジスタと、該第1のトランジスタの主電流路の他端と能動負荷の間に接続された第3のトランジスタと、該第2のトランジスタの主電流路の他端と能動負荷の間に接続された第4のトランジスタと、該第3および第4のトランジスタに一定のバイアスを供給する定電圧源とを具備し、
該第1のトランジスタの主電流路の他端と該第3のトランジスタとの共通接続点に得られる信号を利用して該パワートランジスタを駆動することを特徴とする定電圧電源。
In a constant voltage power source that drives a power transistor connected between input and output terminals with an error amplifier that operates according to an output voltage and a reference voltage, and obtains the stable output voltage,
The first and second transistors having one end of the main current path commonly connected so as to form a differential amplifier circuit in the error amplifier, the other end of the main current path of the first transistor, and the active load A third transistor connected in between, a fourth transistor connected between the other end of the main current path of the second transistor and the active load, and a constant bias on the third and fourth transistors A constant voltage source for supplying
A constant voltage power supply, wherein the power transistor is driven using a signal obtained at a common connection point between the other end of the main current path of the first transistor and the third transistor.
前記第1のトランジスタの主電流路の他端と前記第3のトランジスタとの共通接続点を出力回路を介して前記パワートランジスタのゲートに接続したことを特徴とする、請求項1に記載の定電圧電源。   The constant connection according to claim 1, wherein a common connection point between the other end of the main current path of the first transistor and the third transistor is connected to a gate of the power transistor through an output circuit. Voltage power supply.
JP2009078317A 2009-03-27 2009-03-27 Constant voltage power supply Withdrawn JP2010231498A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120064617A (en) * 2010-12-09 2012-06-19 세이코 인스트루 가부시키가이샤 Voltage regulator
JP7402707B2 (en) 2020-02-13 2023-12-21 ローム株式会社 Error amplifier and power circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120064617A (en) * 2010-12-09 2012-06-19 세이코 인스트루 가부시키가이샤 Voltage regulator
KR101689897B1 (en) 2010-12-09 2016-12-26 에스아이아이 세미컨덕터 가부시키가이샤 Voltage regulator
JP7402707B2 (en) 2020-02-13 2023-12-21 ローム株式会社 Error amplifier and power circuit

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