JP2010213450A - Apparatus for detection of line-to-ground fault - Google Patents

Apparatus for detection of line-to-ground fault Download PDF

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JP2010213450A
JP2010213450A JP2009056506A JP2009056506A JP2010213450A JP 2010213450 A JP2010213450 A JP 2010213450A JP 2009056506 A JP2009056506 A JP 2009056506A JP 2009056506 A JP2009056506 A JP 2009056506A JP 2010213450 A JP2010213450 A JP 2010213450A
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ground fault
power supply
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resistance element
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JP5157972B2 (en
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Kiwamu Suzuki
究 鈴木
Fukashi Uehara
深志 上原
Takeshi Kitani
剛士 木谷
Masamitsu Takizawa
将光 滝沢
Masaru Ina
勝 伊奈
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Fuji Electric Co Ltd
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Fuji Electric Systems Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a line-to-ground fault detecting apparatus generating a DC power required for the line-to-ground fault detecting apparatus inside and transmitting a line-to-ground fault detecting signal to a controller without using a high breakdown voltage transformer. <P>SOLUTION: Feeding means 3 and 4 are connected to connection points of a first resistance element group GR1 and a second resistance element group GR2, which are connected in series between a positive side and a negative side of a DC power supply 1, so as to secure power. A third resistance element group GR3 where a line-to-ground fault current flows is connected between a mutual connection point M of the first resistance element group GR1 and the second resistance element group GR2 and a ground point G. The apparatus includes intermittent signal generating means 6 and 7 comparing an inter-terminal voltage VC between the connection point C of the resistance elements constituting the third resistance element group GR3 and the mutual connection point M with a reference voltage VSET, and generating an intermittent signal when the inter-terminal voltage exceeds the reference voltage and an electric light converting means 8 converting the intermittent signal generated by the intermittent signal generating means into an optical signal. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、電力変換装置等の地絡故障を検出する地絡検出装置に関する。   The present invention relates to a ground fault detection device that detects a ground fault such as a power converter.

電力変換装置を構成するインバータ等の高電圧の直流電源を使用する装置では、地絡故障を検出するために直流地絡検出装置が一般的に使用されている。
図5は従来の直流地絡検出装置を使用した装置の回路図である。この図5において、101は直流電源であり、商用電源を整流して直流電圧を発生する整流器を使用したり、太陽電池や燃料電池などの直流発電装置を使用したりする。この直流電源101の直流出力がインバータなどの電力変換装置102に供給される。この電力変換装置102は直流電源101のP極とN極に接続された負荷装置となっている。また、P極とN極との間に等しい抵抗値を有する分圧抵抗R1及びR2が互いに直列に接続され、これら分圧抵抗R1及びR2によってP極とN極との電圧を分圧した中性点Mと、接地点Gとの間で互いに直列に接続された接地抵抗R3及び地絡検出リレー103によって直流地絡検出装置が構成されている。
In a device using a high-voltage DC power source such as an inverter constituting a power converter, a DC ground fault detector is generally used to detect a ground fault.
FIG. 5 is a circuit diagram of an apparatus using a conventional DC ground fault detection apparatus. In FIG. 5, reference numeral 101 denotes a DC power source, which uses a rectifier that rectifies a commercial power source to generate a DC voltage, or uses a DC power generator such as a solar cell or a fuel cell. The direct current output of the direct current power supply 101 is supplied to a power converter 102 such as an inverter. The power converter 102 is a load device connected to the P pole and the N pole of the DC power supply 101. Further, voltage dividing resistors R1 and R2 having equal resistance values are connected in series between the P pole and the N pole, and the voltage between the P pole and the N pole is divided by the voltage dividing resistors R1 and R2. The DC ground fault detection device is constituted by the grounding resistor R3 and the ground fault detection relay 103 connected in series between the characteristic point M and the ground point G.

このような直流地絡検出装置において、地絡が発生していない時は、中性点MはP極とN極との中間電圧なので接地点と同じ零電位となり、接地抵抗R3や地絡検出リレー103には電流が流れることは無く、したがって、地絡検出リレー103は動作せず地絡故障は検出されない。
しかし、直流回路の正極が地絡すると、中性点Mの電位が零電位から負電位に変化して接地抵抗R3と地絡検出リレー103に検出電流I1が流れ、これにより地絡検出リレー103が動作し、この結果は図示しない制御装置に伝達されて地絡故障として認識される。
In such a DC ground fault detection device, when no ground fault occurs, the neutral point M is an intermediate voltage between the P pole and the N pole, so it has the same zero potential as the ground point, and the ground resistance R3 and ground fault detection No current flows through the relay 103, and therefore the ground fault detection relay 103 does not operate and no ground fault is detected.
However, when the positive pole of the DC circuit is grounded, the potential at the neutral point M changes from zero potential to a negative potential, and the detection current I1 flows through the grounding resistor R3 and the ground fault detection relay 103, thereby causing the ground fault detection relay 103. The result is transmitted to a control device (not shown) and recognized as a ground fault.

また、直流回路の負極が地絡すると、中性点Mの電位が零電位から正電位に変化して接地抵抗R3と地絡検出リレー103に検出電流I2が流れ、これにより地絡検出リレー103が動作し、この結果が図示しない制御装置に伝達されて地絡故障が認識される。
しかし、地絡検出リレーは高価なことや納期などの面で入手性に問題があることから別の方法として図6の回路図に示すような地絡検出リレーを使用しない直流地絡検出装置が提案されている(例えば、特許文献1参照)。
Further, when the negative electrode of the DC circuit is grounded, the potential at the neutral point M changes from zero potential to a positive potential, and the detection current I2 flows through the grounding resistor R3 and the ground fault detection relay 103, thereby causing the ground fault detection relay 103. This is transmitted to a control device (not shown) to recognize a ground fault.
However, since the ground fault detection relay is expensive and has a problem in availability in terms of delivery time, a DC ground fault detection device that does not use the ground fault detection relay as shown in the circuit diagram of FIG. 6 is another method. It has been proposed (see, for example, Patent Document 1).

この図6では、直流地絡検出器のみの回路図を示しており、実際の装置では例えば図4のP極とN極間に接続され、分圧抵抗R1,R2及び接地抵抗R3,地絡検出リレー103で構成された直流地絡検出器を置き換えるかたちで使用する。図6において、分圧抵抗R1P,R1N及びR2P,R2Nは直流回路の正極Pと負極Nとの間で互いに直列に接続された分圧抵抗である。これらの分圧抵抗において、R1PとR1Nとの接続点Mは接地点Gに直接接続され、分圧抵抗R2PとR1Pの接続点A及び分圧抵抗R1NとR2Nの接続点Bをそれぞれ電圧検出点A及びBとしている。電圧検出点A及びBには絶対値電圧差検出回路104が接続されており、この絶対値電圧差検出回路104で、接地点Gに対する電圧検出点Aの電圧VAと接地点Gに対する電圧検出点Bの電圧VBとの差ΔVGを検出して出力する。   6 shows a circuit diagram of only the DC ground fault detector. In an actual device, for example, it is connected between the P pole and the N pole of FIG. 4, and the voltage dividing resistors R1 and R2, the grounding resistor R3, and the ground fault are connected. It is used in the form of replacing the DC ground fault detector composed of the detection relay 103. In FIG. 6, voltage dividing resistors R1P and R1N and R2P and R2N are voltage dividing resistors connected in series between the positive electrode P and the negative electrode N of the DC circuit. In these voltage dividing resistors, the connection point M between R1P and R1N is directly connected to the ground point G, and the connection point A between the voltage dividing resistors R2P and R1P and the connection point B between the voltage dividing resistors R1N and R2N are respectively voltage detection points. A and B are used. An absolute value voltage difference detection circuit 104 is connected to the voltage detection points A and B. In the absolute value voltage difference detection circuit 104, the voltage VA of the voltage detection point A with respect to the ground point G and the voltage detection point with respect to the ground point G are detected. A difference ΔVG with respect to the voltage VB of B is detected and output.

この絶対値電圧差検出回路104の出力と電圧レベル設定器107で設定された基準電圧VRとが地絡判定回路105に入力される。
一般的に直流回路で発生する地絡現象はP極またはN極と対地間の絶縁が劣化して発生する。この場合、P極又はN極と接地点Gとの間は絶縁の劣化の度合いに応じた絶縁抵抗が見掛け上接続された状態となる。P極が地絡した場合の回路状態は、等価的に図7のようになる。この図7のように地絡抵抗をRGとすると、正極Pと中性点Mの合成抵抗RPは下記(1)式で表され、且つ負極Nと中性点Mの合成抵抗RNは下記(2)式で表される。
The output of the absolute value voltage difference detection circuit 104 and the reference voltage VR set by the voltage level setting unit 107 are input to the ground fault determination circuit 105.
In general, the ground fault phenomenon that occurs in a DC circuit is caused by the deterioration of the insulation between the P or N pole and the ground. In this case, between the P pole or N pole and the ground point G, an insulation resistance according to the degree of insulation deterioration is apparently connected. The circuit state when the P pole is grounded is equivalent to FIG. As shown in FIG. 7, when the ground fault resistance is RG, the combined resistance RP of the positive electrode P and the neutral point M is expressed by the following formula (1), and the combined resistance RN of the negative electrode N and the neutral point M is the following ( 2) It is expressed by the formula.

Figure 2010213450
Figure 2010213450

中性点に対する正極Pの電圧VPは直流電圧をEとして下記(3)式で表され、負極Nの電圧VNは同様にして下記(4)式で表される。   The voltage VP of the positive electrode P with respect to the neutral point is expressed by the following equation (3), where the DC voltage is E, and the voltage VN of the negative electrode N is similarly expressed by the following equation (4).

Figure 2010213450
Figure 2010213450

次に、中性点Mに対する電圧検出点Aの電圧VA及び電圧検出点Bの電圧VBは上記(1)式〜(4)式より下記(5)式及び(6)式のように求められる。   Next, the voltage VA at the voltage detection point A and the voltage VB at the voltage detection point B with respect to the neutral point M are obtained from the above formulas (1) to (4) as in the following formulas (5) and (6). .

Figure 2010213450
Figure 2010213450

上記(5)式及び(6)式より、中性点Mに対する電圧検出点A及びBの電圧差の絶対値ΔVoは、
ΔVo=|VB−VA| ・・・(7)
となる。
From the above equations (5) and (6), the absolute value ΔVo of the voltage difference between the voltage detection points A and B with respect to the neutral point M is
ΔVo = | VB−VA | (7)
It becomes.

抵抗の決定においては分圧抵抗のR2P,R2N及びR1P,R1Nの値をそれぞれ等しくすることで中性点Mを直流電源のP極とN極の中間電位の零電位とする。ここで、分圧抵抗R2P,R2N及びR1P,R1Nの抵抗値を同じくすることに着目して、
R1P=R1N=R1 ・・・(8)
R2P=R1N=R2 ・・・(9)
とし、前述した(5)式、(6)式、(8)式及び(9)式を前述した(7)式に代入して整理すると、下記(10)式のようになる。
In determining the resistance, the neutral points M are set to zero potential, which is an intermediate potential between the P and N poles of the DC power supply, by equalizing the values of the voltage dividing resistors R2P, R2N and R1P, R1N. Here, paying attention to the same resistance value of the voltage dividing resistors R2P, R2N and R1P, R1N,
R1P = R1N = R1 (8)
R2P = R1N = R2 (9)
Then, when the above-mentioned formulas (5), (6), (8) and (9) are substituted into the above-mentioned formula (7) and rearranged, the following formula (10) is obtained.

Figure 2010213450
Figure 2010213450

分圧抵抗R1P,R2P及びR1N,R2Nの分圧比は、これらの接続点A及びBに接続される絶対値電圧差検出回路104において使用可能な電圧を考慮して決定すれば良い。   The voltage dividing ratio of the voltage dividing resistors R1P, R2P and R1N, R2N may be determined in consideration of the voltage that can be used in the absolute value voltage difference detection circuit 104 connected to these connection points A and B.

以上のように構成することで、P極又はN極の何れかが地絡すると絶対値電圧差検出回路104から電圧差ΔVGが出力され、この値と電圧レベル設定器106で設定した電圧VRとが地絡判定回路105で比較され、ΔVG>VRとなると地絡判定回路105から地絡故障検出信号が出力され、この地絡故障検出信号が図示しない手段で、図示しない制御装置に入力されて地絡故障として認識される。   With the above configuration, when either the P pole or the N pole is grounded, the voltage difference ΔVG is output from the absolute value voltage difference detection circuit 104, and this value and the voltage VR set by the voltage level setting unit 106 are output. Are compared by the ground fault determination circuit 105, and when ΔVG> VR, a ground fault detection signal is output from the ground fault determination circuit 105, and this ground fault detection signal is input to a control device (not shown) by means not shown. Recognized as a ground fault.

図6の構成を適用することにより、地絡リレーを用いずに、一般的な電子部品である演算増幅器や抵抗素子などを使用して直流地絡検出器を構成することができる。   By applying the configuration of FIG. 6, it is possible to configure a DC ground fault detector using an operational amplifier, a resistance element, or the like, which is a general electronic component, without using a ground fault relay.

特開平2−237421号公報JP-A-2-237421

しかしながら、上記特許文献1に記載の従来例にあっては、一般的な電子部品である演算増幅器や抵抗素子などを使用して地絡検出装置を構成することは可能であるが、回路を動作させるために不可欠な電源については何ら考慮されていない。したがって、別途電源を用意することになるが、この場合は直流回路の電圧が高圧になるとこれに対応させて電源の絶縁耐圧も高くしなければならず、結果としてその部分の大きさとコストとが増加することから、全体としての小型化やコストダウンの障害となるという未解決の課題がある。   However, in the conventional example described in Patent Document 1, it is possible to configure a ground fault detection device using a general electronic component such as an operational amplifier or a resistance element, but the circuit operates. No consideration is given to the power supply that is indispensable for the purpose. Therefore, a separate power supply is prepared. In this case, if the voltage of the DC circuit becomes high, the withstand voltage of the power supply must be increased correspondingly, resulting in the size and cost of that portion. Since it increases, there exists an unsolved subject that it becomes the obstacle of size reduction and cost reduction as a whole.

また、上記従来例にあっては、地絡検出信号を制御装置に伝える手段については全く考慮されていないため、直流回路の電圧が高い場合は地絡検出の信号を絶縁するための高耐圧変圧器などを備えた装置が必要となり、これも全体としての小型化やコストダウンの障害となるという未解決の課題がある。
そこで、本発明は、上記従来例の未解決の課題に着目してなされたものであり、地絡検出装置に必要とする直流電源を内部で生成するとともに、地絡検出信号を高耐圧変圧器を用いることなく制御装置に伝達することが可能な地絡検出装置を提供することを目的としている。
Further, in the above-described conventional example, no consideration is given to the means for transmitting the ground fault detection signal to the control device. Therefore, when the voltage of the DC circuit is high, the high withstand voltage transformer for insulating the ground fault detection signal. However, there is an unresolved problem that this is an obstacle to downsizing and cost reduction as a whole.
Therefore, the present invention has been made paying attention to the above-mentioned unsolved problems of the conventional example, and generates a DC power source required for the ground fault detection device inside, and outputs the ground fault detection signal to the high voltage transformer. It is an object of the present invention to provide a ground fault detection device that can be transmitted to a control device without using an alarm.

上記目的を達成するために、請求項1に係る地絡検出装置は、直流電源の正側と負側との間に直列接続された第1の抵抗素子群及び第2の抵抗素子群と、該第1の抵抗素子群及び前記第2の抵抗素子群の相互接続点と接地点の間に接続された地絡電流が流れる第3の抵抗素子群と、前記第1の抵抗素子群を構成する抵抗素子同士の接続点及び前記第2の抵抗素子群を構成する抵抗素子同士の接続点に接続され、少なくとも正側電源及び負側電源を出力する給電手段と、該給電手段の出力側に接続された第1及び第2の蓄電手段と、前記第3の抵抗素子群を構成する抵抗素子同士の接続点と前記相互接続点との間の端子間電圧と基準電圧とを比較して当該端子間電圧が前記基準電圧を超えたときに間欠信号を発生する間欠信号発生手段と、該間欠信号発生手段で発生された前記間欠信号を光信号に変換する電光変換手段と、を備え、前記間欠信号発生手段と電光変換手段に、前記給電手段の少なくとも正側電源を供給することを特徴とする。   To achieve the above object, a ground fault detection device according to claim 1 includes a first resistance element group and a second resistance element group connected in series between a positive side and a negative side of a DC power source, A third resistor element group in which a ground fault current is connected between an interconnection point of the first resistor element group and the second resistor element group and a ground point, and the first resistor element group is configured. A power supply means connected to a connection point between the resistance elements to be connected to each other and a connection point between the resistance elements constituting the second resistance element group, and outputs at least a positive power supply and a negative power supply, and an output side of the power supply means Comparing the reference voltage and the inter-terminal voltage between the connected first and second power storage means and the connection point between the resistance elements constituting the third resistance element group and the interconnection point Intermittent signal generating means for generating an intermittent signal when the voltage between the terminals exceeds the reference voltage; Electro-optic conversion means for converting the intermittent signal generated by the signal generation means into an optical signal, and supplying at least positive power of the power supply means to the intermittent signal generation means and the electro-optic conversion means, To do.

この構成によると、給電手段で必要な直流電力を賄うことができ、第3の抵抗素子群を構成する抵抗素子同士の接続点と前記相互接続点との間の端子間電圧と基準電圧とを比較して当該端子間電圧が前記基準電圧を超えたときに間欠信号を発生し、この間欠信号を電光変換して出力するので、低電力で地絡検出信号を制御装置に送信することが可能となる。   According to this configuration, the DC power necessary for the power supply means can be covered, and the inter-terminal voltage and the reference voltage between the connection points of the resistance elements constituting the third resistance element group and the interconnection points are obtained. In comparison, an intermittent signal is generated when the inter-terminal voltage exceeds the reference voltage, and this intermittent signal is converted into light and output, so that it is possible to transmit a ground fault detection signal to the control device with low power. It becomes.

また、請求項2に係る地絡検出装置は、前記第1の抵抗素子群、第2の抵抗素子群及び第3の抵抗素子群は分圧抵抗回路を構成している。
この構成によると、分圧抵抗回路を3組設けることにより、必要な直流電力の給電と地絡検出とを行うことができる。
また、請求項3に係る地絡検出装置は、前記給電手段は、前記第1の抵抗素子群を構成する抵抗素子同士の接続点に接続された第1の給電手段と、前記第2の抵抗素子群を構成する抵抗素子同士の接続点に接続された第2の給電手段とで構成されていることを特徴としている。
In the ground fault detection apparatus according to claim 2, the first resistor element group, the second resistor element group, and the third resistor element group constitute a voltage dividing resistor circuit.
According to this configuration, by providing three sets of voltage dividing resistor circuits, it is possible to perform necessary DC power supply and ground fault detection.
Further, in the ground fault detection device according to claim 3, the power supply means includes a first power supply means connected to a connection point between the resistance elements constituting the first resistance element group, and the second resistance. It is characterized by being comprised with the 2nd electric power feeding means connected to the connection point of the resistive elements which comprise an element group.

この構成によると、第1の給電手段で正側電源を形成し、第2の給電手段で負側電源を形成することができ、間欠信号発生手段と電光変換手段で必要な電力を賄うことができる。
また、請求項4に係る地絡検出装置は、前記給電手段はDC/DCコンバータで構成されていることを特徴としている。
According to this configuration, the first power supply means can form a positive power supply, the second power supply means can form a negative power supply, and the intermittent signal generating means and the electro-optic conversion means can provide necessary power. it can.
The ground fault detection apparatus according to claim 4 is characterized in that the power supply means is constituted by a DC / DC converter.

この構成によると、給電手段をDC/DCコンバータの一つの回路で構成できるので、全体構成を簡略化することができる。
また、請求項5に係る地絡検出装置は、前記間欠信号発生手段は、前記間欠信号のオン区間の幅が周期に比較して十分に短い幅に設定された構成とされている。
この構成によると、地絡検出装置の全体としての平均的な消費電流を地絡検出に影響しないレベルまで小さくすることができる。
According to this configuration, the power supply means can be configured by a single circuit of the DC / DC converter, so that the overall configuration can be simplified.
Further, in the ground fault detection device according to claim 5, the intermittent signal generating means is configured such that the width of the ON section of the intermittent signal is set to a sufficiently short width compared to the period.
According to this configuration, the average current consumption of the ground fault detection device as a whole can be reduced to a level that does not affect ground fault detection.

また、請求項6に係る地絡検出装置は、前記間欠信号発生手段は、前記端子間電圧と前記基準電圧とを比較し、当該端子間電圧が前記基準電圧を超えたときに比較出力を出力する電圧比較回路と、該電圧比較回路の比較出力が入力されたときに間欠信号を発生する間欠信号発振器とで構成され、前記電圧比較器に前記正側電源及び負側電源が供給され、前記間欠信号発振器に前記正側電源が供給されることを特徴としている。   Further, in the ground fault detection device according to claim 6, the intermittent signal generating means compares the inter-terminal voltage and the reference voltage, and outputs a comparison output when the inter-terminal voltage exceeds the reference voltage. The voltage comparator circuit, and an intermittent signal oscillator that generates an intermittent signal when the comparison output of the voltage comparator circuit is input, the positive power source and the negative power source are supplied to the voltage comparator, The positive power supply is supplied to the intermittent signal oscillator.

この構成によると、電圧比較回路では、入力と出力の一方又は双方が正側と負側の両方の範囲で動くことになるので、給電手段の正側電源及び負側電源を供給し、間欠信号発振器では入力及び出力が正側のみの範囲で動くので、給電手段の正側電源のみを供給する。   According to this configuration, in the voltage comparison circuit, one or both of the input and the output move in both the positive side and the negative side. Therefore, the positive power source and the negative power source of the power supply means are supplied, and the intermittent signal is supplied. In the oscillator, the input and output move only in the range of the positive side, so only the positive side power supply of the power supply means is supplied.

本発明によれば、地絡検出器で検出した地絡故障を間欠的に点灯する光信号に変換して制御装置に伝えるので、地絡検出装置において光信号の点灯により消費する電力を最小限とすることができ、直流電源から分圧抵抗で構成される第1抵抗群及び第2抵抗群を通じて給電される微小な電流で間欠信号発生手段を動作可能とし、外部からの電源供給が不要になり、且つ光信号を介して地絡検出信号を外部に出力することで、絶縁変圧器などの高耐圧機器が不要となるので装置全体の小型化とコストダウンが可能となるという効果が得られる。   According to the present invention, since the ground fault detected by the ground fault detector is converted into an optical signal that is intermittently lit and transmitted to the control device, the power consumed by the lighting of the optical signal in the ground fault detection device is minimized. The intermittent signal generating means can be operated with a minute current fed from the DC power source through the first resistor group and the second resistor group constituted by voltage dividing resistors, and no external power supply is required. In addition, by outputting the ground fault detection signal to the outside via the optical signal, there is no need for a high voltage device such as an insulation transformer, so that the entire device can be reduced in size and cost can be obtained. .

本発明による地絡検出装置の一実施形態を示すブロック図である。It is a block diagram which shows one Embodiment of the ground fault detection apparatus by this invention. 本発明の地絡検出装置の動作の説明に供する信号波形図である。It is a signal waveform diagram with which it uses for description of operation | movement of the ground fault detection apparatus of this invention. 間欠信号の説明に供する信号波形図である。It is a signal waveform diagram with which it uses for description of an intermittent signal. 本発明の他の実施形態を示すブロック図である。It is a block diagram which shows other embodiment of this invention. 従来の地絡検出装置を示す回路図である。It is a circuit diagram which shows the conventional ground fault detection apparatus. 従来の地絡リレーを使用しない地絡検出装置を示す回路図である。It is a circuit diagram which shows the ground fault detection apparatus which does not use the conventional ground fault relay. P極が地絡した場合の回路状態を等価的に示す回路図である。It is a circuit diagram equivalently showing a circuit state when a P pole is grounded.

以下、本発明の実施の形態を図面に基づいて説明する。
図1において、1は高電圧の直流電源であり、前述した従来例と同様に、商用交流電源を整流して直流電圧を発生する整流器を使用したり、太陽電池や燃料電池などの直流発電装置を使用したりすることができる。
この直流電源1のP極及びN極間に負荷装置となるインバータなどの電力変換装置2が直列に接続されている。
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
In FIG. 1, reference numeral 1 denotes a high-voltage DC power supply, which uses a rectifier that rectifies a commercial AC power supply to generate a DC voltage, or a DC power generator such as a solar cell or a fuel cell, as in the conventional example described above. Can be used.
A power converter 2 such as an inverter serving as a load device is connected in series between the P pole and the N pole of the DC power supply 1.

そして、直流電源1のP極及びN極間に分圧抵抗R1P及びR2Pを直列に接続した第1の抵抗素子群GR1と、分圧抵抗R1N及びR2Nを直列に接続した第2の抵抗素子群GR2とが互いに直列に接続されている。
この第1抵抗素子群GR1の分圧抵抗R1P及びR2Pの接続点Aが第1の給電手段としての正側給電回路3に接続され、この正側給電回路3から正側電源Vccが出力される。この正側給電回路3としては、様々な構成の給電回路を適用することができ、最も簡単なものとしては整流用ダイオードを使用しても良いし、3端子レギュレータのように出力電圧を一定に調整する能力を持った素子を使用してもよい。また、ダイオードや3端レギュレータでは入力として設定できる電圧の範囲が狭いので、直流電圧の変動が大きい場合でも十分な動作を確保するためにDC/DCコンバータなどの回路を使用してもよい。
The first resistor element group GR1 in which the voltage dividing resistors R1P and R2P are connected in series between the P pole and the N pole of the DC power supply 1 and the second resistor element group in which the voltage dividing resistors R1N and R2N are connected in series. GR2 is connected in series with each other.
A connection point A of the voltage dividing resistors R1P and R2P of the first resistance element group GR1 is connected to a positive power supply circuit 3 as a first power supply means, and a positive power supply Vcc is output from the positive power supply circuit 3. . As the positive-side power supply circuit 3, power supply circuits having various configurations can be applied. As the simplest one, a rectifying diode may be used, and the output voltage is made constant as in a three-terminal regulator. An element having the ability to adjust may be used. In addition, since a voltage range that can be set as an input is narrow in a diode or a three-terminal regulator, a circuit such as a DC / DC converter may be used to ensure a sufficient operation even when the fluctuation of the DC voltage is large.

また、第2の抵抗素子群GR2の分圧抵抗R1N及びR2Nの接続点Bが第2の給電手段としての負側給電回路4に接続され、この負側給電回路4から負側電源Veeが出力される。この負側給電回路4としては、上述した正側給電回路3に対して電源としての電流の向きが異なることを考慮すれば適用する素子や回路構成は基本的に正側給電回路3と同様の構成を適用することができる。   Further, the connection point B of the voltage dividing resistors R1N and R2N of the second resistor element group GR2 is connected to the negative power supply circuit 4 as the second power supply means, and the negative power supply Vee outputs the negative power supply Vee. Is done. The negative side power supply circuit 4 is basically the same as the positive side power supply circuit 3 in consideration of the fact that the direction of the current as a power source differs from that of the positive side power supply circuit 3 described above. Configuration can be applied.

そして、第1の抵抗素子群GR1及び第2の抵抗素子群GR2の相互接続点Mと正側給電回路3の出力側との間に第1の蓄電手段としてのコンデンサC1が接続され、相互接続点Mと負側給電回路4の出力側との間に第2の蓄電手段としてのコンデンサC2が接続されている。
さらに、第1の抵抗素子群GR1及び第2の抵抗素子群GR2の相互接続点Mと接地Gとの間に第3の抵抗素子群GR3が接続されている。この第3の抵抗素子群GR3も分圧抵抗となる接地抵抗R1GとR2Gとが直列に接続された構成を有し、接地抵抗R1G及びR2Gの接続点Cから分圧抵抗R1Gの端子間電圧VCが検出される。
A capacitor C1 as a first power storage means is connected between the interconnection point M of the first resistance element group GR1 and the second resistance element group GR2 and the output side of the positive power supply circuit 3, and the interconnection A capacitor C2 as a second power storage unit is connected between the point M and the output side of the negative power supply circuit 4.
Further, a third resistance element group GR3 is connected between the interconnection point M of the first resistance element group GR1 and the second resistance element group GR2 and the ground G. The third resistance element group GR3 also has a configuration in which ground resistors R1G and R2G serving as voltage dividing resistors are connected in series, and a voltage VC between terminals of the voltage dividing resistor R1G from a connection point C of the ground resistors R1G and R2G. Is detected.

接続点Cで検出される端子間電圧VCは、基準電圧設定回路5から基準電圧VSETが一方の入力側に入力された電圧比較回路6の他方の入力側に入力される。この電圧比較回路6では、端子間電圧VCが基準電圧VSET以下であるときには例えば論理値“0”となり、端子間電圧VCが基準電圧VSETを超えたときに論理値“1”となる比較出力Vdetが出力される。   The inter-terminal voltage VC detected at the connection point C is input to the other input side of the voltage comparison circuit 6 in which the reference voltage VSET is input from the reference voltage setting circuit 5 to one input side. In this voltage comparison circuit 6, for example, when the inter-terminal voltage VC is equal to or lower than the reference voltage VSET, the comparison output Vdet becomes, for example, a logical value “0”, and when the inter-terminal voltage VC exceeds the reference voltage VSET, Is output.

この電圧比較回路6から出力される比較出力Vdetは、間欠信号発振回路7に入力される。この間欠信号発振回路7では比較出力Vdetが論理値“1”となっている間、オン状態とオフ状態とを所定周期で繰り返すパルス状の間欠信号Sintを出力する。ここで、間欠信号Sintは、図3に示すように、周期Tの間で、論理値“1”となるオン状態の区間T1に比較して論理値“0”となるオフ状態の区間T2が十分長くなるように設定されている。この間欠信号発振回路としては、積分回路、比較器、フリップフロップ回路等で構成されるCRタイミング発生回路や、積分回路とシュミットトリガ回路とを組み合わせた発振回路等を適用することができ、三角波と基準電圧とを比較することにより、間欠信号を発生させる。   The comparison output Vdet output from the voltage comparison circuit 6 is input to the intermittent signal oscillation circuit 7. The intermittent signal oscillation circuit 7 outputs a pulse-like intermittent signal Sint that repeats an ON state and an OFF state at a predetermined cycle while the comparison output Vdet is a logical value “1”. Here, as shown in FIG. 3, the intermittent signal Sint has an off-state interval T2 having a logical value “0” compared to an on-state interval T1 having a logical value “1” during a period T. It is set to be long enough. As this intermittent signal oscillation circuit, a CR timing generation circuit composed of an integration circuit, a comparator, a flip-flop circuit, etc., an oscillation circuit combining an integration circuit and a Schmitt trigger circuit, etc. can be applied. An intermittent signal is generated by comparing with a reference voltage.

そして、間欠信号発振回路7から出力される間欠信号Sintは、電気信号を光信号に変換する電光変換回路としてのE/O変換回路8に供給されて、このE/0変換回路8で間欠光信号に変換される。このE/O変換回路8から出力される間欠光信号は光ケーブル9を介して光電変換を行うO/E変換回路10を備えた制御装置11に光伝送される。   The intermittent signal Sint output from the intermittent signal oscillation circuit 7 is supplied to an E / O conversion circuit 8 as an electro-optical conversion circuit that converts an electrical signal into an optical signal, and the E / O conversion circuit 8 performs intermittent light. Converted to a signal. The intermittent optical signal output from the E / O conversion circuit 8 is optically transmitted via the optical cable 9 to a control device 11 including an O / E conversion circuit 10 that performs photoelectric conversion.

そして、基準電圧設定回路5には、正側給電回路3から出力される正側電源Vccが供給され、他端が第1の抵抗素子群GR1及び第2の抵抗素子群GR2の相互接続点である中性点Mに接続される。また、電圧比較回路6には、入力及び出力の少なくとも一方が正側と負側の双方の範囲に働くことから正側給電回路3及び負側給電回路4の正側電源Vcc及び負側電源Veeが供給され、残りの間欠信号発振回路7及びE/O変換回路8には入力と出力とが正側の範囲のみに働くので、正側給電回路3の正側電源Vccのみを供給し、他端を中性点Mに接続する。   The reference voltage setting circuit 5 is supplied with the positive power supply Vcc output from the positive power supply circuit 3, and the other end is an interconnection point between the first resistance element group GR1 and the second resistance element group GR2. Connected to a certain neutral point M. In addition, since at least one of the input and the output works in both the positive side and the negative side in the voltage comparison circuit 6, the positive power supply Vcc and the negative power supply Vee of the positive power supply circuit 3 and the negative power supply circuit 4 are used. Is supplied to the remaining intermittent signal oscillation circuit 7 and the E / O conversion circuit 8 because only the positive side power supply Vcc of the positive side power supply circuit 3 is supplied to the input and output. Connect the end to the neutral point M.

次に、上記実施形態の動作を説明する。
図1において、直列接続された第1及び第2の抵抗素子群GR1及びGR2の分圧抵抗R1P,R2P及びR1N,R2NがP電極とN電極との間の電圧を分圧して第1及び第2の抵抗素子群GR1及びGR2の相互接続点である中性点Mの電位が決定される。これらの間では直列接続された第1及び第2の抵抗素子群GR1及びGR2の分圧抵抗R2P,R1P及びR1N,R2Nの値を等しく設定することで中性点Mは地絡が発生しない通常動作においては零電位となっており、接地点Gも零電位となる。
Next, the operation of the above embodiment will be described.
In FIG. 1, the voltage dividing resistors R1P, R2P and R1N, R2N of the first and second resistance element groups GR1 and GR2 connected in series divide the voltage between the P electrode and the N electrode, thereby The potential of the neutral point M, which is an interconnection point between the two resistance element groups GR1 and GR2, is determined. Between these, the neutral point M does not generate a ground fault by setting equal values of the voltage dividing resistors R2P, R1P, R1N, and R2N of the first and second resistance element groups GR1 and GR2 connected in series. In operation, the potential is zero, and the ground point G is also zero.

この状態では、正側給電回路3は、第1の抵抗素子群GR1の直列接続された分圧抵抗R2P及びR1Pの接続点Aに入力が接続され、正側給電回路3を通った出力が正側電源Vccとして基準電圧設定回路5、電圧比較回路6、間欠信号発振回路7及びE/O変換回路8に動作電圧として供給されるとともに、コンデンサC1を充電する。このとき、回路の共通電位(グランド)は中性点Mとなる。また、負側給電回路4を通った出力が負側電源Veeとして電圧比較回路6に動作電圧として供給される。   In this state, the input of the positive power supply circuit 3 is connected to the connection point A of the voltage dividing resistors R2P and R1P connected in series of the first resistance element group GR1, and the output passing through the positive power supply circuit 3 is positive. The side power supply Vcc is supplied as an operating voltage to the reference voltage setting circuit 5, the voltage comparison circuit 6, the intermittent signal oscillation circuit 7, and the E / O conversion circuit 8, and the capacitor C1 is charged. At this time, the common potential (ground) of the circuit is the neutral point M. Further, the output passing through the negative power supply circuit 4 is supplied as an operating voltage to the voltage comparison circuit 6 as a negative power supply Vee.

このように、基準電圧設定回路5、電圧比較回路6、間欠信号発振回路7及びE/O変換回路8に動作電圧が供給されることにより、これら各回路が動作状態となる。
ここで、地絡故障が発生していない状態では、前述したように、中性点Mは零電位となっており、接地点Gも零電位となっているので、これら中性点Mと接地点Gとの間に接続されている第3の抵抗素子群GR3の分圧抵抗R1G及びR2Gを流れる地絡電流Igは零となり、結果として分圧抵抗R1Gの両端に発生する端子間電圧VCは零となる。
As described above, when the operation voltage is supplied to the reference voltage setting circuit 5, the voltage comparison circuit 6, the intermittent signal oscillation circuit 7, and the E / O conversion circuit 8, each of these circuits enters an operation state.
Here, in the state where no ground fault has occurred, as described above, the neutral point M is at zero potential and the ground point G is also at zero potential. The ground fault current Ig flowing through the voltage dividing resistors R1G and R2G of the third resistive element group GR3 connected to the point G becomes zero, and as a result, the terminal voltage VC generated at both ends of the voltage dividing resistor R1G is It becomes zero.

このため、この端子間電圧VCと基準電圧設定回路5で設定された基準電圧VSETとを電圧比較回路6で比較すると、VC<VSETとなり、電圧比較回路6の比較出力Vdetは論理値“0”となる。このため、比較出力Vdetを受ける間欠信号発振回路7から間欠信号Sintが出力されず、E/O変換回路8からも光信号は出力されないので、制御装置11側でも地絡故障が認識されることはない。   Therefore, when this inter-terminal voltage VC and the reference voltage VSET set by the reference voltage setting circuit 5 are compared by the voltage comparison circuit 6, VC <VSET, and the comparison output Vdet of the voltage comparison circuit 6 has the logical value “0”. It becomes. For this reason, the intermittent signal Sint is not output from the intermittent signal oscillation circuit 7 that receives the comparison output Vdet, and the optical signal is not output from the E / O conversion circuit 8, so that the ground fault is recognized also on the control device 11 side. There is no.

この通常状態から、図1において地絡故障が発生すると、第3の抵抗素子群GR3に図2(a)に示すように時点t0から徐々に増加する地絡電流Igが流れる。このように第3の抵抗素子群GR3に地絡電流Igが流れると、接地抵抗R1Gの両端には地絡電流Igの大きさに応じて図2(b)に示す端子間電圧VCが発生する。   When a ground fault occurs in FIG. 1 from this normal state, a ground fault current Ig that gradually increases from time t0 flows through the third resistance element group GR3 as shown in FIG. 2A. When the ground fault current Ig flows through the third resistance element group GR3 in this way, the terminal voltage VC shown in FIG. 2B is generated at both ends of the ground resistance R1G according to the magnitude of the ground fault current Ig. .

そして、地絡電流Igが大きくなって、これに応じて増加した端子間電圧VCが時点t1で、基準電圧設定回路5で設定した基準電圧VSETを超過すると、電圧比較器6から出力される比較出力Vdetが図2(c)に示すように、論理値“0”から論理値“1”に反転する。   Then, when the ground fault current Ig increases and the inter-terminal voltage VC increased in response thereto exceeds the reference voltage VSET set by the reference voltage setting circuit 5 at time t1, the comparison output from the voltage comparator 6 is performed. The output Vdet is inverted from the logical value “0” to the logical value “1” as shown in FIG.

このように、比較出力Vdetが論理値“1”に反転すると間欠信号発振回路7から周期Tで一時的に論理値“1”となる間欠信号Sintが出力され、この間欠信号SintがE/O変換回路8に入力される。このE/O変換回路8において、内部の発光素子は間欠信号Sintが例えば論理値“1”であるとき に点灯状態となって間欠光信号を出力し、この間欠光信号が光ケーブル9を介して制御装置11のO/E変換回路10に光伝送される。そして、制御装置11では、O/E変換回路10で間欠光信号を間欠電気信号に変換することにより、地絡故障の発生を認識し、図示しない任意の手段によって直流電源1の出力を停止させて電力変換装置2の動作を停止させるなどの予め設定された処理を実行する。   As described above, when the comparison output Vdet is inverted to the logical value “1”, the intermittent signal oscillation circuit 7 outputs the intermittent signal Sint temporarily having the logical value “1” in the period T, and the intermittent signal Sint is output from the E / O. Input to the conversion circuit 8. In this E / O conversion circuit 8, the internal light emitting element is turned on when the intermittent signal Sint is a logical value “1”, for example, and outputs an intermittent optical signal. The intermittent optical signal is transmitted via the optical cable 9. Optically transmitted to the O / E conversion circuit 10 of the control device 11. Then, the control device 11 recognizes the occurrence of the ground fault by converting the intermittent optical signal into the intermittent electric signal by the O / E conversion circuit 10 and stops the output of the DC power source 1 by any means (not shown). Then, a preset process such as stopping the operation of the power converter 2 is executed.

ここで、本実施形態では、正側の場合は直流電源1のP極から分圧抵抗R2Pを経由して給電点となる接続点Aから電流を取り出し、負側の場合には直流電源1のN極から分圧抵抗R2Nを経由して給電点となる接続点Bから電流を取り出す構成となっている。しかし、分圧抵抗R2PやR2Nには中性点Mの電位を決定するために、直流電源1のP極からN極に流れる電流や地絡電流も流れるので、給電回路3及び4側に流れる電流が大きくなると中性点Mの電圧が変動することが考えられる。中性点Mの電圧が変動すると、地絡電流の大きさも変わり、地絡が発生していない通常状態で誤った地絡故障を検出したり、逆に地絡が発生したときに地絡故障を検出できなかったりする恐れがある。そこで、本実施形態では、大きな消費電力を必要とするE/O変換回路8を使用しても、地絡故障の誤御検出の問題を生じないようにするため、図3に示すような間欠信号Sintの周期tにおいて、論理値“1”のオン状態の区間T1が論理値“0”のオフ状態の区間T2より短い間欠信号を使用することで、地絡検出装置全体としての平均的な消費電力が地絡検出に影響しないレベルまで小さくできるようにしており、地絡故障の誤検出を確実に防止することができる。   Here, in the present embodiment, in the case of the positive side, a current is taken out from the connection point A serving as a feeding point via the voltage dividing resistor R2P from the P pole of the DC power source 1, and in the case of the negative side, A current is taken out from the connection point B serving as a feeding point from the N pole via the voltage dividing resistor R2N. However, in order to determine the potential of the neutral point M in the voltage dividing resistors R2P and R2N, a current flowing from the P pole to the N pole of the DC power supply 1 and a ground fault current also flow. It is conceivable that the voltage at the neutral point M varies as the current increases. When the voltage at the neutral point M fluctuates, the magnitude of the ground fault current also changes, and when a ground fault is detected in a normal state where no ground fault has occurred, or when a ground fault occurs, a ground fault occurs. May not be detected. Therefore, in this embodiment, even if the E / O conversion circuit 8 that requires large power consumption is used, the intermittent detection as shown in FIG. In the cycle t of the signal Sint, an average signal of the entire ground fault detection device is obtained by using an intermittent signal in which the ON state interval T1 of the logical value “1” is shorter than the OFF state interval T2 of the logical value “0”. The power consumption can be reduced to a level that does not affect the detection of the ground fault, and the erroneous detection of the ground fault can be surely prevented.

しかも、E/O変換回路8で間欠光信号に変換して出力するので、絶縁変圧器などの高耐圧機器が不要となるので装置全体の小型化とコストダウンが可能となる。
なお、上記実施形態においては、間欠信号発振回路として、CRタイミング発振回路や積分・シュミットトリガ発振回路等を適用した場合について説明したが、これに限定されるものではなく、前述した図3のようにオンデューティの小さい間欠信号を形成することができれば、任意の間欠信号発振回路を適用することができる。
In addition, since the E / O conversion circuit 8 converts the signal into an intermittent optical signal and outputs it, a high-voltage device such as an insulation transformer is not required, and thus the entire apparatus can be reduced in size and cost.
In the above embodiment, the case where a CR timing oscillation circuit, an integration / Schmitt trigger oscillation circuit, or the like is applied as the intermittent signal oscillation circuit has been described. However, the present invention is not limited to this, as shown in FIG. If an intermittent signal with a small on-duty can be formed, any intermittent signal oscillation circuit can be applied.

また、上記実施形態では、電圧比較回路6でVC>VSETのときに論理値“0”から論理値“1”に反転する比較出力Vdetを出力する場合について説明したが、これに限定されるものではなく、VC>VSETのときに論理値“1”から論理値“0”に反転する比較出力Vdetを出力するようにしてもよく、この場合には間欠信号発振回路7で論理値“0”の比較出力Vdetが入力されたときに間欠信号Sintを出力するように構成すればよい。   In the above-described embodiment, the case where the voltage comparison circuit 6 outputs the comparison output Vdet that is inverted from the logical value “0” to the logical value “1” when VC> VSET is described. However, the present invention is not limited to this. Instead, the comparison output Vdet that is inverted from the logical value “1” to the logical value “0” may be output when VC> VSET. In this case, the intermittent signal oscillation circuit 7 outputs the logical value “0”. The intermittent signal Sint may be output when the comparison output Vdet is input.

また、上記実施形態においては、E/O変換回路8と制御装置11のO/E変換回路10とを光ケーブル9で接続した場合について説明したが、これに限定されるものではなく、E/O変換回路8とO/E変換回路10とを光無線通信系統で接続するようにしてもよい。   In the above embodiment, the case where the E / O conversion circuit 8 and the O / E conversion circuit 10 of the control device 11 are connected by the optical cable 9 has been described. However, the present invention is not limited to this. The conversion circuit 8 and the O / E conversion circuit 10 may be connected by an optical wireless communication system.

また、上記実施形態においては、正側給電回路3と負側給電回路4の2個の給電回路を使用する構成として説明したが、DC/DCコンバータなどの回路方式によっては、図4に示すように、これらを1個の部品として正側電源と負側電源を給電できる構成も適用することができ、このような構成を採用することで回路構成をより簡略化できる。   In the above-described embodiment, the description has been given of the configuration using two power feeding circuits, that is, the positive power feeding circuit 3 and the negative power feeding circuit 4. However, depending on the circuit system such as a DC / DC converter, as shown in FIG. In addition, a configuration in which the positive side power source and the negative side power source can be fed as a single component can be applied. By adopting such a configuration, the circuit configuration can be further simplified.

すなわち、図4では、DC/DCコンバータ21の入力側は正側と負側の2入力で、出力側は正側と負側に加えてグランドM(零電位)の3出力となる。そして、DC/DCコンバータ21の正入力側が第1の抵抗素子群GR1の直列接続された分圧抵抗R2P及びR1Pの接続点Aに接続され、負入力側が第2の抵抗素子群GR2の直列接続された分圧抵抗R1N及びR2Nの接続点Bに接続され、出力側の正側出力とグランドMとの間に第1の蓄電手段としてのコンデンサC1が接続され、グランドMと負側出力との間に第2の蓄電手段としてのコンデンサC2が接続されている。また、接続はDC/DCコンバータ21(電源)のグランドMを主回路の相互接続点である中性点Mに固定するために両者を接続する。   That is, in FIG. 4, the input side of the DC / DC converter 21 has two inputs of the positive side and the negative side, and the output side has three outputs of ground M (zero potential) in addition to the positive side and the negative side. The positive input side of the DC / DC converter 21 is connected to the connection point A of the voltage dividing resistors R2P and R1P connected in series of the first resistor element group GR1, and the negative input side is connected in series to the second resistor element group GR2. Is connected to a connection point B of the divided voltage dividing resistors R1N and R2N, and a capacitor C1 as a first power storage means is connected between the positive output on the output side and the ground M, and the ground M and the negative output are connected to each other. A capacitor C2 as a second power storage means is connected between them. Further, the connection is made to connect the ground M of the DC / DC converter 21 (power supply) to a neutral point M which is an interconnection point of the main circuit.

1…直流電源、2…電力変換装置、3…正側給電回路、4…負側給電回路、5…基準電圧設定回路、6…電圧比較回路、7…間欠信号発振回路、8…E/O変換回路、9…光ケーブル、10…O/E変換回路、11…制御回路、21…DC/DCコンバータ、GR1…第1の抵抗素子群、GR2…第2の抵抗素子群、GR3…第3の抵抗素子群、R1P,R2P,R1N,R2N…分圧抵抗、G1G,R2G…接地抵抗   DESCRIPTION OF SYMBOLS 1 ... DC power supply, 2 ... Power converter, 3 ... Positive side feeding circuit, 4 ... Negative side feeding circuit, 5 ... Reference voltage setting circuit, 6 ... Voltage comparison circuit, 7 ... Intermittent signal oscillation circuit, 8 ... E / O Conversion circuit, 9 ... optical cable, 10 ... O / E conversion circuit, 11 ... control circuit, 21 ... DC / DC converter, GR1 ... first resistor element group, GR2 ... second resistor element group, GR3 ... third Resistive element group, R1P, R2P, R1N, R2N ... voltage dividing resistor, G1G, R2G ... ground resistance

Claims (6)

直流電源の正側と負側との間に直列接続された第1の抵抗素子群及び第2の抵抗素子群と、
該第1の抵抗素子群及び前記第2の抵抗素子群の相互接続点と接地点の間に接続された地絡電流が流れる第3の抵抗素子群と、
前記第1の抵抗素子群を構成する抵抗素子同士の接続点及び前記第2の抵抗素子群を構成する抵抗素子同士の接続点に接続され、少なくとも正側電源及び負側電源を出力する給電手段と、
該給電手段の出力側に接続された第1及び第2の蓄電手段と、
前記第3の抵抗素子群を構成する抵抗素子同士の接続点と前記相互接続点との間の端子間電圧と基準電圧とを比較して当該端子間電圧が前記基準電圧を超えたときに間欠信号を発生する間欠信号発生手段と、
該間欠信号発生手段で発生された前記間欠信号を光信号に変換する電光変換手段と、
を備え、
前記間欠信号発生手段と電光変換手段に、前記給電手段の少なくとも正側電源を供給することを特徴とする地絡検出装置。
A first resistor element group and a second resistor element group connected in series between the positive side and the negative side of the DC power supply;
A third resistor element group through which a ground fault current connected between an interconnection point and a ground point of the first resistor element group and the second resistor element group flows;
Power supply means connected to a connection point between the resistance elements constituting the first resistance element group and a connection point between the resistance elements constituting the second resistance element group, and outputting at least a positive power source and a negative power source When,
First and second power storage means connected to the output side of the power supply means;
The inter-terminal voltage between the connection points of the resistance elements constituting the third resistance element group and the interconnection point is compared with the reference voltage, and intermittent when the inter-terminal voltage exceeds the reference voltage Intermittent signal generating means for generating a signal;
Electro-optic conversion means for converting the intermittent signal generated by the intermittent signal generation means into an optical signal;
With
A ground fault detection apparatus characterized in that at least a positive power source of the power supply means is supplied to the intermittent signal generation means and the electro-optic conversion means.
前記第1の抵抗素子群、第2の抵抗素子群及び第3の抵抗素子群は分圧抵抗回路を構成していることを特徴とする請求項1に記載の地絡検出装置。   2. The ground fault detection device according to claim 1, wherein the first resistance element group, the second resistance element group, and the third resistance element group constitute a voltage dividing resistor circuit. 前記給電手段は、前記第1の抵抗素子群を構成する抵抗素子同士の接続点に接続された第1の給電手段と、前記第2の抵抗素子群を構成する抵抗素子同士の接続点に接続された第2の給電手段とで構成されていることを特徴とする請求項1又は2に記載の地絡検出装置。   The power supply means is connected to a connection point between the first power supply means connected to the resistance elements constituting the first resistance element group and a connection point between the resistance elements constituting the second resistance element group. The ground fault detection device according to claim 1, wherein the ground fault detection device comprises: 前記給電手段はDC/DCコンバータで構成されていることを特徴とする請求項1又は2に記載の地絡検出装置。   The ground fault detection apparatus according to claim 1, wherein the power feeding unit is configured by a DC / DC converter. 前記間欠信号発生手段は、前記間欠信号のオン区間の幅が周期に比較して十分に短い幅に設定されていることを特徴とする請求項1乃至4の何れか1項に記載の地絡検出装置。   The ground fault according to any one of claims 1 to 4, wherein the intermittent signal generating means is set such that the width of the ON section of the intermittent signal is sufficiently shorter than the period. Detection device. 前記間欠信号発生手段は、前記端子間電圧と前記基準電圧とを比較し、当該端子間電圧が前記基準電圧を超えたときに比較出力を出力する電圧比較回路と、該電圧比較回路の比較出力が入力されたときに間欠信号を発生する間欠信号発振器とで構成され、前記電圧比較器に前記正側電源及び負側電源が供給され、前記間欠信号発振器に前記正側電源が供給されることを特徴とする請求項1乃至5の何れか1項に記載の地絡検出装置。   The intermittent signal generating means compares the inter-terminal voltage with the reference voltage, and outputs a comparison output when the inter-terminal voltage exceeds the reference voltage, and a comparison output of the voltage comparison circuit And an intermittent signal oscillator that generates an intermittent signal when the signal is input, the positive power supply and the negative power supply are supplied to the voltage comparator, and the positive power supply is supplied to the intermittent signal oscillator. The ground fault detection apparatus according to any one of claims 1 to 5, wherein
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JP2012078289A (en) * 2010-10-05 2012-04-19 Origin Electric Co Ltd Dc power supply device
JP2013183522A (en) * 2012-03-01 2013-09-12 Fuji Electric Co Ltd State monitor
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KR101428454B1 (en) * 2012-09-28 2014-08-12 인텍전기전자 주식회사 Direct current earth potential detection and trip power supply unit and method

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JP2012078289A (en) * 2010-10-05 2012-04-19 Origin Electric Co Ltd Dc power supply device
JP2013183522A (en) * 2012-03-01 2013-09-12 Fuji Electric Co Ltd State monitor
KR101428455B1 (en) * 2012-09-28 2014-08-12 인텍전기전자 주식회사 Direct current circuit breaker apparatus and method
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