JP2010212820A - Frequency-dependent erasure circuit and phase shift circuit using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a frequency-dependent erasure circuit in which the amplitude of an output signal does not change but only the phase thereof is shifted at 90° with respect to an input signal, and which can keep accuracy without changing a circuit constant over a wide band; and a phase shift circuit using the same. <P>SOLUTION: The frequency-dependent erasure circuit 2 is structured such that an integrator 5 and a differentiator 6 are each connected to an input terminal; the integrator 5 and the differentiator 6 are connected to a multiplier 8; outputs of the integrator 5 and the differentiator 6 are multiplied with each other by the multiplier 8 to eliminate frequency dependency of signal amplitude; and only the phase is shifted at 90°. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a frequency-dependent cancellation circuit that shifts only the phase by 90 degrees without changing the amplitude regardless of the frequency of the input signal, and a phase shift circuit using the same.

In general, examples of circuits that shift the phase of an analog signal by 90 ° include an integrator and a PLL (Phase-Locked Loop) circuit. In these circuits, the output amplitude changes depending on the frequency of the signal. Further, in an all-pass filter that shifts the phase without changing the amplitude, it is necessary to change the circuit constant every time the signal frequency changes.
At present, various devices are made based on these circuits, and many 90 ° phase shift circuits are realized. For example, in the wideband phase shift circuit described in Patent Document 1, signals that are orthogonal to each other over a wide band are generated by using two all-pass filters having different orders.

Patent Publication No. 8-307208

L. Callegaro, V.M. D'Elia, Meas. Sci. Technol. 8, (1997), 673-675. B. Djoic, et. al: IEEE IM, Vol. 49, no. 1, 161-165 (2000)

However, the circuit configuration has two outputs for one input, and these two outputs are orthogonal to each other, but the output signals are not orthogonal to the input signals.
In the 90 ° phase shift circuit described in Non-Patent Document 1, an LPF is configured by a transconductance amplifier, and the current input to the transconductance amplifier is controlled so that the cutoff frequency of the filter matches the frequency of the input signal. . As a result, the signal input to the LPF shifts only the phase by 45 ° without changing the amplitude. Furthermore, the phase is shifted by 90 ° in total by connecting another stage of the same circuit in series. However, since current control depending on the frequency of the input signal is required in order to match the frequency of the input signal and the cutoff frequency of the filter, it is generally difficult to obtain accuracy.

Furthermore, in the 90 ° phase shift circuit described in Non-Patent Document 2, a signal is input to an integrator and the phase is shifted by 90 °, and then the amplitude that changes depending on the signal frequency is amplified by a frequency-dependent variable gain amplifier. Thus, a signal having the same amplitude as the input signal and a phase shifted by 90 ° is obtained. Although this circuit has obtained highly accurate results, its bandwidth is very narrow.
Therefore, at present, a highly accurate circuit has a very narrow band, and a broadband circuit tends to have a low accuracy.

  The present invention has been made in view of the circumstances as described above. By using a method different from such a conventional 90 ° phase shift circuit, the amplitude of the output signal is changed with respect to the input signal. Another object of the present invention is to provide a frequency-dependent canceling circuit in which only the phase is shifted by 90 ° and the accuracy can be maintained without changing circuit constants over a wide band, and a phase shift circuit using the same.

The frequency-dependent cancellation circuit of the present invention and the phase shift circuit using the frequency-dependent cancellation circuit multiply the outputs of the integrator and the differentiator of the frequency-dependent cancellation circuit, thereby reducing the frequency dependency (ω component) of the signal amplitude. Erasing and shifting only the phase by 90 degrees without changing the circuit constant according to the signal frequency.
Further, the square root output of the frequency dependence elimination circuit is converted into a square output by a square root circuit that outputs √ of the input.
Further, the rectified waveform is restored by the rectified waveform restoration circuit 4.

The frequency dependent cancellation circuit of the present invention and the phase shift circuit using the frequency cancellation circuit are characterized by canceling the frequency component of the amplitude (component of ω) by multiplying the outputs of the integrator and the differentiator. The phase is always 90 ° shifted from the input signal.
Therefore, in the band where the integrator and the differentiator can operate, only the phase can be rotated by 90 ° without changing the amplitude, and no troublesome compensation or adjustment is required even when the frequency of the input signal changes.

It is a block diagram of the phase shift circuit of this invention. It is a figure which shows each part signal waveform of the circuit of FIG. FIG. 2 is a circuit diagram of a modification example of the circuit 2 and the circuit 3 of the circuit of FIG. It is a circuit diagram of the example of a change of the circuit 4 of the circuit of FIG.

  The frequency dependence canceling circuit and the phase shift circuit using the same according to the present invention are configured to cancel the frequency component (ω component) of the amplitude by multiplying the outputs of the integrator and the differentiator.

Embodiment 1 of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a configuration diagram of a phase shift circuit of the present invention.
The phase shift circuit shown in FIG. 1 is mainly configured to obtain an output signal obtained by eliminating the frequency dependence of the signal amplitude by multiplying the output of the integrator and the differentiator, and then the signal amplitude. The output signal from which the frequency dependence is removed is square-rooted (outputs √) to output a signal whose phase is shifted (shifted) by 90 ° with respect to the input signal.
The shift phase circuit of FIG. 1 includes a frequency-dependent elimination circuit 2 that eliminates the frequency dependence (ω component) of the amplitude by multiplying the outputs of the integrator and the differentiator, and a square root circuit 3 that outputs √ of the input. It comprises a rectified waveform restoration circuit 4 for restoring the rectified waveform of the input signal.
The frequency dependence canceling circuit 2 is configured by connecting an integrator 5 and a differentiator 6 in parallel to input terminals, and connecting the outputs of the integrator 5 and the differentiator 6 to a multiplier 8 via a filter 7 respectively. To do.

The square root circuit 3 is configured by connecting the Log circuit 9 to the input terminal, dividing the output voltage of the Log circuit 9 by the resistor R10, and connecting the anti-Log circuit 11 to the resistance dividing point. The Log circuit 9 of the square root circuit 3 inputs the output of the multiplier 8 of the frequency dependence elimination circuit 2.
The rectified waveform restoration circuit 4 for restoring the rectified waveform of the input signal is configured by connecting a comparator 12 and a multiplier / inverter 13 in series. The comparator 12 receives the filter output of the differentiator 6 of the frequency dependence canceling circuit 2. The multiplier / inverter 13 of the square root circuit 3 inputs the output of the input anti-Log circuit 11.

(Integrator / differentiator)
As for the integrator and the differentiator, those having a general circuit configuration can be sufficiently used. However, in order to implement the present invention, it is necessary to exhibit integral and differential characteristics in a desired frequency band, and a full differential / complete integration circuit (see FIG. 3 to be described later) is used for widening the bandwidth. Yes. However, the integration circuit uses a configuration in which a resistor and a capacitor are further added between the feedbacks (see FIG. 3 (b) below), thereby forming a feedback for direct current and limiting the gain in the low frequency range to the output. The appearing DC (direct current) component is suppressed.
In addition, it is considered possible to suppress generation of a DC component by using, for example, a capacitor grounded integrator. In principle, since the gain in the low frequency range increases, it is also important to select an IC with a small offset.
On the other hand, the differentiator easily amplifies high frequency noise because the gain increases in the high frequency region, and the output may stick to the power source and clip depending on the amplitude and frequency of the input voltage. At the time of designing, attention should be paid to the relationship between the magnitude of the input voltage used in a desired frequency band, the gain at the maximum frequency, and the power supply voltage supplied to the IC (integrated circuit).

(filter)
The purpose of the filter used here is to remove the DC component (based on capacitance C) that appears at the output of the integrator. Therefore, although an HPF is basically used, it is preferable to use a broadband BPF (band pass filter) in which an LPF (low pass filter) is cascade-connected to an HPF (high pass filter) as a noise countermeasure. In addition, if the DC component is relatively small, it may be possible to cancel the DC component by adding an offset adjustment circuit (or level shift circuit) instead of a filter. This is limited to the case where the capacitance C is constant (or the fluctuation is very small).
As another means for cutting the DC component, there is a method using a transformer. In principle, since the DC component is not transmitted from the primary side to the secondary side in the transformer, C can be completely removed. On the other hand, there are disadvantages such as an increase in circuit scale and a phase shift due to poor frequency characteristics. However, if a small transformer with good frequency characteristics is available, it is sufficient for the present invention. It can be used.
A circuit for eliminating the capacitor C such as a filter (BPF or HPF), a transformer, and a level shift circuit is provided between the integrator and the multiplier. Basically, it is considered that the integrator / differentiator picks up noise and amplifies it more easily as the frequency band is wider. Therefore, an LPF is added between the output of the integrator and differentiator and the multiplier. desirable.

(Multiplier)
Since there are many commercial products regarding the multiplier, detailed description thereof is omitted. However, when multiplying the outputs of the integrator and differentiator, it is necessary to invert one of them and align the phases (the phase is shifted by 180 ° as it is). Many multipliers on the market have an inverting input terminal, and this terminal can be used to cope with it. However, if there is no inverting input terminal or if you do not want to use it, an inverting amplifier circuit is placed after the filter. May be added.

(Kaihei circuit (√))
As the name implies, the square root circuit is a circuit that outputs √ of the input signal. If the circuit configuration shown in FIG. 1 (Log → Partial pressure → Anti Log) is used, for example, by changing the voltage division ratio from 1: 2 to 1: 3, the output is
On the other hand, if the voltage division ratio is 2: 1, the output is the square of the input, so the circuit is highly applicable.
However, the output required in the present invention is only √, and this circuit configuration is not necessarily required. There are several commercially available ICs that are not as abundant as multipliers but have a √ output. Accordingly, a considerable number of modifications of this part are assumed, but any circuit that outputs √ of the input may be used.

(Full-wave rectified waveform demodulation circuit)
The output signal waveform V _A of the circuit 3 in FIG. 1 is as shown in FIG. The output signal waveform V _A, the phase has shifted 90 ° with respect to the input signal V _in, the amplitude does not have the frequency dependency. Therefore, a desired signal can be obtained by inverting every other peak in FIG. Therefore, in order to invert every other peak, a comparator is used to generate a signal in which High and Low are switched at the same timing (FIG. 2 (g)). The signal input to the comparator may in principle be the output of either an integrator or a differentiator, but this time, the output of a differentiator with a more stable DC level was used. FIG. 4 shows a circuit configuration that can be used in the final stage. In both (a) and (b), the switch (or FET) is turned ON / OFF by the comparators H and L, and the input is inverted / non-inverted by the inverting amplifier circuit in the subsequent stage. (C) is simpler, and by multiplying VM and Vc as they are, the result is inverted every other mountain.

However, in the case of (c), if the H and L levels of the comparators are different, there is a possibility that they will not be completely covered based on the GND level. In this case, therefore, attention must be paid to the power supply of the comparator. Further, in (a) and (b), if the switching speed is slow, the waveform may be greatly collapsed. Many other modifications exist for the circuit 4 portion.
In the present invention, the new and important part is the frequency dependent erasing circuit 2, and other circuit configurations can be applied to the square root circuit 3 and the rectified waveform restoring circuit 4 in addition to the circuit configuration shown in FIG. is there.

FIG. 2 shows a waveform example of a signal at each part in the circuit.
2 (a) is the input signal _{V in} of the signal waveform, FIG. 2 (b) the output signal V _diff waveform of the differentiator 6, FIG. 2 (c) the output signal V _int waveform of the integrator 5, FIG. 2 (d ) is an output signal waveform of the filter 7 or trans (not shown), FIG. 2 (e) is the output signal _{V M} waveform of the multiplier 8, FIG. 2 (f) is the output signal _{V a} waveform of the anti-Log circuit 11, FIG. 2 (g) shows the output signal _{V C} waveform of the comparator 12, FIG. 2 (h) is the output signal V _int waveform and the input signal _{V in} the signal waveform of the multiplier / inverter 13, respectively.

The operation of the shift phase circuit shown in FIG. 1 will be described with reference to signal waveforms at various parts in FIG.
First, the input signal Vin is input to the input terminal of the shift phase circuit of FIG.
If the input signal V _in (FIG. 2A) is a sine wave with an amplitude A and an angular velocity ω,
Therefore, the outputs V _int (FIG. 2 (c)) and V _diff (FIG. 2 (b)) of the integrator 5 and the differentiator 6 in the figure are respectively
It becomes.

Here, C represents an integral constant and corresponds to a DC component. So After the C is removed by the filter 7 (FIG. 2 (d)), if ask inverts one multiplies these, the output V _{M (see} FIG. 2 (e)) is
Therefore, the frequency dependency of the amplitude (component of ω) can be eliminated. If the input wherein _{V M} to a log amplifier, the output _{V log} is
So, divide this into half
In more input to antilog amplifier, the output _{V A} (FIG. 2 (f)) is
It becomes.

Therefore, a full-wave rectified signal whose phase is shifted (shifted) by 90 degrees with respect to the input signal is obtained. If this is multiplied by the signal Vc (FIG. 2 (g)) generated by the comparator or inverted at the timing of Vc, the final output V _out (FIG. 2 (h)) will be
Thus, a signal having the same amplitude as the input signal and a phase shift of 90 degrees is obtained.

FIG. 3 shows a second embodiment of the present invention, and shows another embodiment of the integrator 5 and the differentiator 6 of the frequency dependent cancellation circuit 2 of FIG.
FIG. 3A shows another embodiment of the differentiator 6. FIG. 3B shows another embodiment of the integrator 5. In the differentiator 21 in FIG. 3A, a capacitor C1 is connected between the inverting terminal (−) of the operational amplifier 23 and the ground, and a resistor R2 is connected between the non-inverting terminal (+) of the operational amplifier 23 and the ground. In this configuration, the capacitor C2 is connected between the non-inverting terminal (+) and the input terminal of the operational amplifier 23, and the feedback resistor R1 is connected between the inverting terminal (−) of the operational amplifier 23 and the output terminal of the operational amplifier 23. Take.
The integrator 22 in FIG. 3B connects the resistor R3 between the inverting terminal (−) of the operational amplifier 24 and the ground, and connects the capacitor C6 between the non-inverting terminal (+) of the operational amplifier 24 and the ground. The resistor R6 is connected between the non-inverting terminal (+) and the input terminal of the operational amplifier 24, the feedback resistors R4 and R5 are connected between the inverting terminal (−) of the operational amplifier 24 and the output terminal of the operational amplifier 24, and The feedback capacitor C5 is connected in parallel. A configuration is adopted in which a capacitor C4 is connected between the midpoint of the feedback resistors R4 and R5 and the ground.
In order to carry out the present invention, it is necessary to exhibit integral and differential characteristics in a desired frequency band, and a complete differentiation / complete integration circuit (FIG. 3) is used for widening the bandwidth. However, the integration circuit uses a configuration in which a resistor and a capacitor are further added between the feedbacks (FIG. 3 (b)), thereby forming a feedback for direct current, limiting the gain in the low frequency region, and appearing at the output. Ingredients are suppressed.

FIG. 4 shows Embodiment 3 of the present invention, and shows another embodiment of the rectified waveform restoration circuit 4 of FIG.
The rectified waveform restoration circuit 31 in FIG. 4A includes a comparator circuit part (Comparator) and an inverter circuit part (Invert).
The non-inverting input terminal (+) of the operational amplifier 32 constituting the comparator circuit portion is grounded, and the inverting input terminal (−) is a signal (Diff IN) input terminal. The output terminal of the operational amplifier 32 is connected to the FET gate in the inverter circuit portion.
The non-inverting input terminal (+) of the operational amplifier 33 constituting the inverter circuit portion is connected to the output _VA of the anti-Log circuit 11 via the resistor R12 and grounded via the source and drain of the FET. The inverting input terminal (−) of the operational amplifier 33 is connected to the output _VA of the anti-Log circuit 11 through the resistor R11, and is connected to the output of the operational amplifier 33 through the feedback resistor R13.

The rectified waveform restoration circuit 32 in FIG. 4B includes a comparator circuit part (Comparator) and an inverter circuit part (Invert).
The non-inverting input terminal (+) of the operational amplifier 34 constituting the comparator circuit portion is grounded, and the inverting input terminal (−) is a signal (Diff IN) input terminal. The output terminal of the operational amplifier 32 is output as a switching signal to the switch SW in the inverter circuit portion. The switch SW has a known configuration that is configured to switch between a conductive state and a ground state.
The non-inverting input terminal (+) of the operational amplifier 35 constituting the inverter circuit portion is connected to the output _VA of the anti-Log circuit 11 via SW and the resistor R15. The inverting input terminal (−) of the operational amplifier 35 is connected to the output _VA of the anti-Log circuit 11 through the resistor R14, and is connected to the output of the operational amplifier 35 through the feedback resistor R16.

In the rectified waveform restoration circuit 33 of FIG. 4C, the non-inverting input terminal (+) of the operational amplifier 36 is grounded, and the inverting input terminal (−) is a signal (Diff IN) input terminal. The output terminal of the operational amplifier 36 is connected to the multiplier 8a. The multiplier 8a multiplies the output of the operational amplifier 36 and the output _VA of the anti-log circuit 11 and outputs the result.
The phase shift circuit of the present invention can be configured by using arbitrary circuit elements as long as the frequency-dependent elimination circuit 2, the square root circuit 3, and the rectified waveform restoration circuit 4 have the intended functions.

DESCRIPTION OF SYMBOLS 1 Phase shift circuit 2 Frequency dependence elimination circuit 3 Square root extraction circuit 4 Rectification waveform restoration circuit 5 Integrator 6 Differentiator 7 Filter 8 Multiplier 9 Log circuit 10 Resistance 11 Anti-Log circuit 12 Comparator 13 Multiplier / inverter

Claims (2)

  Connect the integrator and differentiator to the input terminal respectively, connect the integrator and differentiator to the multiplier, and multiply the output of the integrator and differentiator by the multiplier to eliminate the frequency dependence of the signal amplitude And a frequency-dependent canceling circuit, wherein only the phase is shifted by 90 degrees.   The frequency dependent elimination circuit, a square root circuit that outputs √ of the input signal, and a rectification waveform restoration circuit that restores the rectified waveform of the input signal, and outputs the multiplier of the frequency dependence elimination circuit to the square root circuit. The output of the square root circuit is input to a rectification waveform restoration circuit, the output of the differentiator or the integrator of the frequency dependence elimination circuit is input to the rectification waveform restoration circuit, and the frequency dependence elimination circuit To cancel the amplitude frequency dependency of the input signal, and to output a full-wave rectified signal whose phase is shifted by 90 degrees with respect to the input signal by the square root circuit, and to have only the phase in phase with the input signal by the rectified waveform restoring circuit. A phase shift circuit characterized in that a signal shifted by 90 degrees is output.