JP2010211033A - Electrophoretic display and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent burn-in of a display section in an electrophoretic display. <P>SOLUTION: The electrophoretic display (1) has: the display section (3) which is configured with a plurality of pixels (20) where electrophoretic elements (23) including electrophoretic particles are provided between pixels electrodes (21) and common electrodes (22) which face each other; and a driving section that applies a drive voltage between the pixel electrodes and the common electrodes based on image data to display an image corresponding to the image data in the display section. The driving section has a first period for applying the drive voltage to make a second region (a) and a third region (c) in first gradation between the pixel electrodes and the common electrodes of the pixels respectively corresponding to the third region and the second region, the third region being a region adjacent to the second region and surrounding the second region, the second region being a region which is in second gradation while a first image is displayed, in a first region (b) which is a region in the first gradation while the first image is displayed, during a rewriting period for rewriting an image to be displayed at the display section from the first image to a second image. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an electrophoretic display device and a technical field of an electronic apparatus including the electrophoretic display device.

  This type of electrophoretic display device includes a display unit that performs display using a plurality of pixels as follows. In each pixel, after an image signal is written into the memory circuit via the pixel switching element, the pixel electrode is driven by a pixel potential corresponding to the written image signal, and a voltage is applied between the pixel electrode and the common electrode. Thus, display is performed by driving the electrophoretic element between the pixel electrode and the common electrode.

  For example, in Patent Document 1, when an image displayed on a display unit is rewritten from a first image to a second image, a pixel electrode corresponding to, for example, a white display region in a period during which the first image is displayed. In addition, an electrophoretic display device is disclosed in which a voltage is not applied between the common electrodes, and a period for applying a voltage only between the pixel electrode and the common electrode corresponding to a region where black display is performed to display all white is provided. Has been.

JP 2007-206267 A

  However, according to the above-described background art, when reversing and erasing when rewriting from the first image to the second image, the white display region and the black display region are displayed during the period during which the first image is displayed. There is a technical problem in that the black particles in the boundary portion are not inverted (that is, do not display white), and the burn-in of the boundary line may occur.

  The present invention has been made in view of the above problems, for example, and an object of the present invention is to provide an electrophoretic display device and an electronic apparatus that can prevent burn-in of a display unit in the electrophoretic display device.

  In order to solve the above problems, an electrophoretic display device of the present invention includes a display unit including a plurality of pixels each provided with an electrophoretic element including electrophoretic particles between a pixel electrode and a common electrode facing each other, and an image. A drive unit configured to display an image corresponding to the image data on the display unit by applying a drive voltage between the pixel electrode and the common electrode based on the data, and the drive unit includes the display unit In the rewriting period in which the image displayed on the first image is rewritten from the first image to the second image, the first image among the first regions that are the first gradation in the period during which the first image is displayed Pixels of pixels that are adjacent to the second region, which is the region of the second gradation during the period during which is displayed, and that respectively correspond to the second region and the third region that surrounds the second region Between electrode and common electrode The second region and the third region providing a first period for applying a driving voltage to the first gradation.

  According to the electrophoretic display device of the present invention, during the operation, the driving unit applies a driving voltage between the pixel electrode and the common electrode of each of the plurality of pixels based on the image data, so that the pixel electrode and When the electrophoretic element provided between the common electrodes is driven (that is, the electrophoretic particles contained in the electrophoretic element move between the pixel electrode and the common electrode), the display unit corresponds to the image data. An image is displayed.

  In the rewriting period in which the image displayed on the display unit is rewritten from the first image to the second image, the driving unit includes a first region that is a region having the first gradation during the period in which the first image is displayed. Pixels that are adjacent to the second region that is the region having the second gradation during the period in which the first image is displayed and that correspond to the third region that surrounds the second region and the second region, respectively. A first period for applying a driving voltage for setting the second region and the third region to the first gradation is provided between the pixel electrode and the common electrode.

  Here, the “region adjacent to the second region and surrounding the second region” is larger or smaller from the edge of the second region to the opposite side of the second region from the edge of the second region. It means the area defined by the shifted outline.

  Note that typically, a drive voltage is not applied between the pixel electrode and the common electrode of the pixel corresponding to the region that is not the third region in the first region. Here, “no drive voltage is applied” means that the pixel corresponding to the region that is not the third region in the first region and the pixel corresponding to the region that is not the third region in the first region This means that a drive voltage for updating is not applied. Accordingly, the pixels corresponding to the non-third region in the first region are maintained at the first gradation (that is, the pixel electrode and the common electrode of the pixel corresponding to the non-third region in the first region). In the meantime, the voltage for the first gradation is held.

  According to the research of the present inventor, the second region (that is, the second image is displayed in the period during which the first image is displayed) at the time of reverse erasing when the image displayed on the display unit is rewritten from the first image to the second image. When a drive voltage for making the first gradation is applied only between the pixel electrode and the common electrode of the pixel corresponding to the gradation), the entire display portion becomes the first gradation. Pixel electrodes corresponding to the pixel electrode corresponding to the end portion and the portion adjacent to the second region of the first region (that is, the region having the first gradation during the period when the first image is displayed) The potentials with the electrodes are different from each other.

  Therefore, not only between the pixel electrode and the common electrode of the pixel corresponding to the end portion of the second region, but also the pixel electrode of the pixel corresponding to the end portion of the second region and the portion adjacent to the second region of the first region An electric field is also generated between the pixel electrode corresponding to the pixel electrode and at least a part of the pixel corresponding to the end portion of the second region is not inverted (that is, the first gradation is not achieved).

  In particular, in an electrophoretic display device that alternately and repeatedly displays a first image and a second image, the first gradation area and the first image are displayed during the period in which the first image is displayed. The second floor during the period when the second image is displayed at the boundary portion with the area where the second gradation is displayed during the period when the second image is displayed or when the second image is displayed during the period when the second image is displayed. It has been found that there is a possibility that burn-in may occur at the boundary portion with the tone region.

However, in the present invention, the driving unit applies a driving voltage for setting the second region and the third region to the first gradation between the pixel electrode and the common electrode of the pixels corresponding to the second region and the third region, respectively. A first period is provided. Here, since the third area has the first gradation during the period in which the first image is displayed, the end of the third area and the portion of the first area adjacent to the third area The second gradation does not appear at the boundary portion. Accordingly, burn-in of the display portion of the electrophoretic display device can be prevented.
In one aspect of the electrophoretic display device of the present invention, the third region has a contour line shifted from the edge of the second region by a predetermined width on the side opposite to the second region.

  According to this aspect, the power consumption during inversion erasing can be made relatively small, which is very advantageous in practice.

  The “predetermined width” according to the present invention is, for example, a width corresponding to the size of one pixel, and the pixel electrode of the pixel corresponding to the end of the second region is located in a region that is not the third region in the first region. The width is set so as not to be affected by the pixel electrode of the corresponding pixel.

  In this aspect, the predetermined width may be a width corresponding to the size of one pixel.

  With this configuration, power consumption by applying a drive voltage between the pixel electrode and the common electrode of the pixel corresponding to the third region can be minimized, which is very advantageous in practice.

  In another aspect of the electrophoretic display device of the present invention, the driving unit provides a second period in which the entire display unit has the first gradation after the first period.

  According to this aspect, it is possible to reduce the display of the excessive first gradation during the rewriting period.

  In this aspect, in the second period, the driving unit may apply a driving voltage for the first gradation between the pixel electrode and the common electrode in the entire region of the display unit.

  If comprised in this way, electrophoretic particles will be stirred comparatively well and it can aim at reduction of an afterimage, and it is very advantageous practically.

  In order to solve the above problems, an electronic apparatus of the present invention includes the above-described electrophoretic display device of the present invention (including various aspects thereof).

  According to the electronic device of the present invention, since the electrophoretic display device of the present invention described above is provided, the display unit can be prevented from being burned and a high-quality image can be displayed. For example, a wristwatch, electronic paper, Various electronic devices such as electronic notebooks, mobile phones, and portable audio devices can be realized.

  The effect | action and other gain of this invention are clarified from the form for implementing demonstrated below.

1 is a block diagram illustrating an overall configuration of an electrophoretic display device according to a first embodiment. FIG. 3 is an equivalent circuit diagram illustrating an electrical configuration of a pixel according to the first embodiment. It is a figure which shows the rewriting operation | movement in the electrophoretic display device which concerns on 1st Embodiment. 6 is a timing chart showing voltages applied to a pixel electrode and a common electrode in a rewriting period according to the first embodiment. It is a figure which shows an example of the image displayed on the display part of the electrophoretic display device which concerns on 1st Embodiment. 6 is a timing chart showing voltages applied to a pixel electrode and a common electrode during a rewriting period according to a modification of the first embodiment. It is a block diagram which shows the whole structure of the electrophoretic display device which concerns on 2nd Embodiment. It is an equivalent circuit diagram which shows the electrical structure of the pixel which concerns on 2nd Embodiment. It is a figure which shows the rewriting operation | movement in the electrophoretic display apparatus which concerns on the comparative example of 1st Embodiment. It is a figure which shows the voltage applied to a pixel electrode and a common electrode with a line of electric force in the rewriting period which concerns on the comparative example of 1st Embodiment. It is a perspective view which shows the structure of the electronic paper as an example of the electronic device to which the electrophoretic display apparatus is applied. It is a perspective view which shows the structure of the electronic notebook as another example of the electronic device to which an electrophoretic display apparatus is applied.

  Hereinafter, embodiments of an electrophoretic display device according to the present invention and an electronic apparatus including the electrophoretic display device will be described with reference to the drawings.

<Electrophoretic display device>
<First Embodiment>
A first embodiment of an electrophoretic display device according to the present invention will be described with reference to FIGS.

(Configuration of electrophoretic display device)
First, the overall configuration of the electrophoretic display device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a block diagram showing the overall configuration of the electrophoretic display device according to this embodiment.

  In FIG. 1, the electrophoretic display device 1 according to the present embodiment includes a display unit 3, a controller 10, a scanning line driving circuit 60, a data line driving circuit 70, and a counter electrode modulation circuit 150.

  In the display unit 3, m rows × n columns of pixels 20 are arranged in a matrix (in a two-dimensional plane). The display unit 3 includes m scanning lines 40 (that is, scanning lines Y1, Y2,..., Ym) and n data lines 50 (that is, data lines X1, X2,..., Xn). It is provided so as to cross each other. Specifically, the m scanning lines 40 extend in the row direction (that is, the X direction), and the n data lines 50 extend in the column direction (that is, the Y direction). The pixels 20 are arranged corresponding to the intersections of the m scanning lines 40 and the n data lines 50.

  The controller 10 controls operations of the scanning line driving circuit 60, the data line driving circuit 70, and the counter electrode modulation circuit 150. The controller 10 supplies timing signals such as a clock signal and a start pulse to each circuit, for example.

  Based on the timing signal supplied from the controller 10, the scanning line driving circuit 60 sequentially supplies a scanning signal in a pulse manner to each of the scanning lines Y1, Y2,. The data line driving circuit 70 supplies image signals to the data lines X1, X2,..., Xn based on the timing signal supplied from the controller 10. The image signal takes a binary level of a high potential level (hereinafter referred to as “high level”, for example, 5 V) or a low potential level (hereinafter referred to as “low level”, for example, 0 V).

  The counter electrode modulation circuit supplies the common potential Vcom to the common potential line 93 and supplies the power supply potential Vs to the storage capacitor line 106. Here, the “common potential line 93” and the “retention capacitor line 106” according to the present embodiment constitute an example of the “driving unit” according to the present invention.

  Various signals are input to and output from the controller 10, the scanning line driving circuit 60, the data line driving circuit 70, and the counter electrode to the modulation circuit 150. However, those not particularly related to the present embodiment are not described here. To do.

  Next, the basic configuration of the pixel 20 of the electrophoretic display device 1 will be described with reference to FIG. FIG. 2 is an equivalent circuit diagram showing an electrical configuration of the pixel according to the present embodiment.

  In FIG. 2, the pixel 20 includes a pixel switching transistor 24, a pixel electrode 21, a common electrode 22, an electrophoretic element 23, and a storage capacitor 27.

  The pixel switching transistor 24 is composed of, for example, an N-type transistor. The pixel switching transistor 24 has a gate electrically connected to the scanning line 40, a source electrically connected to the data line 50, and a drain electrically connected to the pixel electrode 21 and the storage capacitor 27. It is connected to the.

  The pixel switching transistor 24 is configured to pulse the image signal supplied from the data line driving circuit 70 (see FIG. 1) via the data line 50 via the scanning line 40 from the scanning line driving circuit 60 (see FIG. 1). Are output to the pixel electrode 21 and the storage capacitor 27 at a timing corresponding to the scanning signal supplied to the pixel.

  An image signal is supplied to the pixel electrode 21 from the data line driving circuit 70 via the data line 50 and the pixel switching transistor 24. The pixel electrode 21 is disposed so as to face the common electrode 22 through the electrophoretic element 23.

  The common electrode 22 is electrically connected to a common potential line 93 to which a common potential Vcom is supplied.

  The electrophoretic element 23 is composed of a plurality of microcapsules each containing electrophoretic particles.

  The storage capacitor 27 is composed of a pair of electrodes opposed to each other via a dielectric film, one electrode is electrically connected to the pixel electrode 21 and the pixel switching transistor 24, and the other electrode is the storage capacitor line 106. Is electrically connected. The image signal can be maintained for a certain period by the holding capacitor 27.

(Operation of electrophoretic display device)
Next, an operation for updating a display image during the operation of the electrophoretic display device 1 will be described with reference to FIGS. 3 and 4. FIG. 3 is a diagram showing a rewrite operation in the electrophoretic display device according to the present embodiment, and FIG. 4 shows voltages applied to the pixel electrode and the common electrode in the rewrite period according to the present embodiment. It is a timing chart. The electrophoretic particles include negatively charged white electrophoretic particles and positively charged black electrophoretic particles. “White” is defined as “first gradation”, and “black” is defined as “second gradation”.

  In the state of FIG. 3A, a first graphic drawn in black on a white background is displayed on the display unit 3 as a first image. Here, in FIG. 3A, a black region is a region a, and a white region is a region b. Note that, immediately before the first image is written, the entire display unit 3 is displayed in white. When the first image is written, the common electrode 22 is at a low level as shown in FIG. Further, the pixel electrode 21 of the pixel 20 corresponding to the region a is set to the high level, and the pixel electrode 21 of the pixel 20 corresponding to the region b (including a region c described later) is set to the low level.

  As a result, the black electrophoretic particles move to the common electrode 22 side only in the region a, and a first image as shown in FIG. 3A is displayed. After writing the first image, the display content (that is, the first image) is held by setting the common electrode 22 and all the pixel electrodes 21 to the low level (see period (i) in FIG. 4).

  Next, before changing the display image from the first image to the second image (see FIG. 3D to be described later), as shown in FIG. The adjacent area and the area c surrounding the area a are displayed in white, and the first image is erased. At this time, the pixel electrode 21 of the pixel 20 corresponding to the common electrode 22 and the region b (excluding the region c) is set to the high level. Further, the pixel electrode 21 of the pixel 20 corresponding to each of the region a and the region c is set to the low level (see period (ii) in FIG. 4). As a result, the black electrophoretic particles move toward the pixel electrode 21 only in the region a, and the first figure is erased.

  Note that the width of the region c (that is, the distance between the outer edge of the region a and the outer edge of the region c) is desirably a width corresponding to the size of one pixel.

  Next, as shown in FIG. 3C, the entire display unit 3 is displayed in white. At this time, the common electrode 22 is set to a high level. On the other hand, the pixel electrodes 21 of all the pixels 20 are set to a low level (see period (iii) in FIG. 4).

  Next, as shown in FIG. 3D, a second graphic drawn in black on a white background is displayed on the display unit 3 as a second image. Here, in FIG. 3D, a black region is defined as a region d. When the second image is written, the common electrode 22 is at a low level. Further, the pixel electrode 21 of the pixel 20 corresponding to the region d is set to the high level. Note that the pixel electrode 21 of the pixel 20 corresponding to a region other than the region d in the display unit 3 is set to a low level. As a result, the black electrophoretic particles move toward the common electrode 22 only in the region d, and a second image as shown in FIG. 3D is displayed.

  Here, an operation for updating the display image during the operation of the electrophoretic display device according to the comparative example of the present embodiment will be described with reference to FIGS. 9 and 10. FIG. 9 is a diagram showing the rewriting operation in the electrophoretic display device according to the comparative example of the present embodiment having the same meaning as in FIG. 3, and FIG. 10 is a diagram illustrating the rewriting period according to the comparative example of the present embodiment. FIG. 4 is a diagram illustrating a voltage applied to a pixel electrode and a common electrode together with lines of electric force.

  First, as in the present embodiment, it is assumed that the first graphic drawn in black on the white background is displayed as the first image on the display unit 3 of the electrophoretic display device according to the comparative example ( FIG. 9 (a)). In the electrophoretic display device according to the comparative example, when the first graphic is inverted and erased, the common electrode 22 is set to the high level, and only the pixel electrode 21 of the pixel 20 corresponding to the region a is set to the low level. As a result, the black electrophoretic particles move toward the pixel electrode 21 only in the region a.

  However, as shown in FIG. 10, the potentials of the pixel electrode 21a of the pixel 20 corresponding to the end of the region a and the pixel electrode 21b of the pixel 20 corresponding to the portion adjacent to the region a of the region b are different from each other. Therefore, an electric field is also generated between the pixel electrode 21a and the pixel electrode 21b. Then, at least a part of the pixels 20 corresponding to the end of the region a does not display white (that is, is not inverted). As a result, burn-in as shown in FIG. 9B may occur at the boundary between the region a and the region b.

  However, in the electrophoretic display device 1 according to the present embodiment, as described above, when the first image is inverted and erased, the pixel electrode 21 of the pixel 20 corresponding to each of the region a and the region c is set to the low level, and the common electrode 22 is set to the high level. As a result, the potentials of the pixel electrode of the pixel 20 corresponding to the end of the region a and the pixel electrode of the pixel 20 corresponding to the portion adjacent to the region a of the region c become equal, and the boundary between the region a and the region c The portion is not black (that is, not inverted). Therefore, burn-in in the display unit 3 of the electrophoretic display device 1 can be prevented.

  3 exemplifies the case where the first graphic is a rectangle. However, when the graphic displayed on the display unit 3 is a ring shape as shown in FIG. a, a region c1 having a contour line shifted by a predetermined width from the outer edge of the region a to the side opposite to the region a side (ie, the outer side), and the region a side from the inner edge of the region a The pixel electrode 21 of the pixel 20 corresponding to the region c2 having the contour line shifted by a predetermined width on the opposite side (ie, the center side) is set to the low level, and the common electrode 22 is set to the high level. . FIG. 5 is a diagram showing an example of an image displayed on the display unit of the electrophoretic display device according to this embodiment.

  The “region a” and “region b” according to the present embodiment are examples of the “second region” and the “first region” according to the present invention, respectively, and the “region c” according to the present embodiment, The “region c1” and “region c2” are examples of the “third region” according to the present invention. In addition, the “inversion erasing period (see period (ii) in FIG. 4)” and the “all white erasing period (see period (iii) in FIG. 4)” according to the present embodiment are respectively “first” according to the present invention. It is an example of “period” and “second period”.

<Modification>
Next, an operation for updating a display image during the operation of the electrophoretic display device according to the modification of the present embodiment will be described with reference to FIG. FIG. 6 is a timing chart showing voltages applied to the pixel electrode and the common electrode during the rewriting period according to the modification of the present embodiment, which has the same meaning as FIG.

  In this modification, instead of the all white erasing period (see period (iii) in FIG. 4) after the inversion erasing period (see period (ii) in FIG. 6), all white display and all black are performed in a relatively short period. An erasing period (see period (iii) in FIG. 6) in which display is repeatedly performed is provided. It should be noted that it is desirable to repeat the all white display and the all black display with a period of 1 millisecond to 10 milliseconds.

  By repeating all white display and all black display in a relatively short period of time, the electrophoretic particles are stirred relatively well in the dispersion medium, so that the afterimage during image erasing and the afterimage over time can be reduced or reduced. Can be planned.

<Second Embodiment>
A second embodiment of the electrophoretic display device of the present invention will be described with reference to FIGS. The second embodiment is the same as the first embodiment except that the configuration of the display unit and the like is partially different. Therefore, in the second embodiment, the description overlapping with that of the first embodiment is omitted, and the common portions in the drawings are denoted by the same reference numerals, and only FIGS. 7 and 8 are basically different only. The description will be given with reference. FIG. 7 is a block diagram showing the overall configuration of the electrophoretic display device according to the present embodiment having the same concept as in FIG. 1, and FIG. 8 is a pixel according to the present embodiment having the same concept as in FIG. It is an equivalent circuit diagram showing the electrical configuration of

(Configuration of electrophoretic display device)
In FIG. 7, the electrophoretic display device 2 according to the present embodiment includes a display unit 3, a scanning line driving circuit 60, a data line driving circuit 70, a controller 10, and a power supply circuit 200.

  The controller 10 controls operations of the scanning line driving circuit 60, the data line driving circuit 70, and the power supply circuit 200.

  The power supply circuit 200 supplies the high potential power supply line Vdd to the high potential power supply line 91, supplies the low potential power supply line Vss to the low potential power supply line 92, supplies the common potential Vcom to the common potential line 93, and A first potential S1 is supplied to the control line 94, and a second potential S2 is supplied to the second control line 95. Although not shown here, each of the high potential power supply line 91, the low potential power supply line 92, the common potential line 93, the first control line 94, and the second control line 95 is connected via an electrical switch. The power supply circuit 200 is electrically connected.

  Each pixel 20 is electrically connected to a high potential power line 91, a low potential power line 92, a common potential line 93, a first control line 94, and a second control line 95. The high potential power supply line 91, the low potential power supply line 92, the common potential line 93, the first control line 94, and the second control line 95 are typically in the row direction (X direction) as shown in FIG. Each pixel column composed of the pixels 20 arranged along the line is wired in common to the pixels 20 belonging to the pixel column.

  The power supply circuit 200 includes a power supply unit 210, a common potential supply circuit 220, a DC-DC converter 230, and an oscillation circuit 240.

  The power supply unit 210 is a primary battery or a secondary battery, and supplies power to the common potential supply circuit 220, the DC-DC converter 230, and the oscillation circuit 240. The power supply unit 210 outputs a power supply voltage Vdc (for example, 3V). In the present embodiment, the power supply unit 210 supplies power only to the common potential supply circuit 220, the DC-DC converter 230, and the oscillation circuit 240. However, the present invention is not limited to this, and other circuits, for example, the controller 10 Or the like.

  The common potential supply circuit 220 is electrically connected to the common potential line 93 via a switch 93s (see FIG. 8), and outputs the common potential Vcom based on the voltage applied from the DC-DC converter 230. . In the present embodiment, the common potential supply circuit 220 is electrically connected to the first control line 94 via a switch 94s (see FIG. 8), and the common potential Vcom is set to the first potential S1 and the first potential Scom1 is set. Output to the control line 94. The “high potential power supply line 91”, “low potential power supply line 92”, “common potential line 93”, “first control line 94”, and “second control line 95” according to the present embodiment are Another example of the “drive unit” according to the invention is configured.

  The DC-DC converter 230 is electrically connected to the high-potential power supply line 91 via a switch 91s (see FIG. 8), and based on the power supply voltage Vdc (for example, 3V) applied from the power supply unit 210, the DC-DC converter 230 A potential VH (for example, 12V) is generated and output as a high potential power supply potential Vdd.

  The oscillation circuit 240 is an oscillation circuit including a ring oscillator, for example, and supplies a clock signal to the DC-DC converter 230. The oscillation circuit 240 is configured to be able to change the frequency of the output clock signal under the control of the controller 10.

  The power supply circuit 200 also includes a ground terminal (not shown) that is set to a low potential VL by being electrically connected to the ground. The low potential VL is applied to the low potential power line 92 from the ground terminal. It is output as the power supply potential Vss.

  In the present embodiment, the second control line 95 is configured to be electrically connectable to the DC-DC converter 230 and the above-described ground potential via the switch 95s (see FIG. 8). The control line 95 is switched between the high potential VH output from the DC-DC converter 230 and the low potential VL output from the ground terminal, and is output as the second potential S2.

  Next, the basic configuration of the pixel 20 of the electrophoretic display device 2 will be described with reference to FIG.

  In FIG. 8, the pixel 20 includes a pixel switching transistor 24, a memory circuit 25, a switch circuit 110, a pixel electrode 21, a common electrode 22, and an electrophoretic element 23.

  The pixel switching transistor 24 is composed of, for example, an N-type transistor. The pixel switching transistor 24 has its gate electrically connected to the scanning line 40, its source electrically connected to the data line 50, and its drain electrically connected to the input terminal N 1 of the memory circuit 25. It is connected to the. The pixel switching transistor 24 is configured to pulse the image signal supplied from the data line driving circuit 70 (see FIG. 7) via the data line 50 via the scanning line 40 from the scanning line driving circuit 60 (see FIG. 7). Is output to the input terminal N1 of the memory circuit 25 at a timing corresponding to the scanning signal supplied to the memory circuit 25.

  The memory circuit 25 includes inverter circuits 25a and 25b, and is configured as an SRAM (Static Random Access Memory).

  The inverter circuits 25a and 25b have a loop structure in which the other output terminal is electrically connected to the input terminals of each other. That is, the input terminal of the inverter circuit 25a and the output terminal of the inverter circuit 25b are electrically connected to each other, and the input terminal of the inverter circuit 25b and the output terminal of the inverter circuit 25a are electrically connected to each other. The input terminal of the inverter circuit 25a is configured as the input terminal N1 of the memory circuit 25, and the output terminal of the inverter circuit 25a is configured as the output terminal N2 of the memory circuit 25.

  The inverter circuit 25a has an N-type transistor 25a1 and a P-type transistor 25a2. The gates of the N-type transistor 25 a 1 and the P-type transistor 25 a 2 are electrically connected to the input terminal N 1 of the memory circuit 25. The source of the N-type transistor 25a1 is electrically connected to a low potential power supply line 92 to which a low potential power supply potential Vss is supplied. The source of the P-type transistor 25a2 is electrically connected to a high potential power supply line 91 to which a high potential power supply potential Vdd is supplied. The drains of the N-type transistor 25 a 1 and the P-type transistor 25 a 2 are electrically connected to the output terminal N 2 of the memory circuit 25.

  The inverter circuit 25b has an N-type transistor 25b1 and a P-type transistor 25b2. The gates of the N-type transistor 25 b 1 and the P-type transistor 25 b 2 are electrically connected to the output terminal N 2 of the memory circuit 25. The source of the N-type transistor 25b1 is electrically connected to a low potential power supply line 92 to which a low potential power supply potential Vss is supplied. The source of the P-type transistor 25b2 is electrically connected to a high potential power supply line 91 to which a high potential power supply potential Vdd is supplied. The drains of the N-type transistor 25 b 1 and the P-type transistor 25 b 2 are electrically connected to the input terminal N 1 of the memory circuit 25.

  When a high level image signal is input to the input terminal N1, the memory circuit 25 outputs a low potential power supply potential Vss from the output terminal N2, and when a low level image signal is input to the input terminal N1. The high potential power supply potential Vdd is output from the output terminal N2. That is, the memory circuit 25 outputs the low potential power supply potential Vss or the high potential power supply potential Vdd depending on whether the input image signal is at a high level or a low level. In other words, the memory circuit 25 is configured to be able to store the input image signal as the low potential power supply potential Vss or the high potential power supply potential Vdd.

  The switch circuit 110 includes a first transmission gate 111 and a second transmission gate 112.

  The first transmission gate 111 includes a P-type transistor 111p and an N-type transistor 111n. The sources of the P-type transistor 111p and the N-type transistor 111n are electrically connected to the first control line 94. The drains of the P-type transistor 111p and the N-type transistor 111n are electrically connected to the pixel electrode 21. The gate of the P-type transistor 111p is electrically connected to the input terminal N1 of the memory circuit 25, and the gate of the N-type transistor 111n is electrically connected to the output terminal N2 of the memory circuit 25.

  The second transmission gate 112 includes a P-type transistor 112p and an N-type transistor 112n. The sources of the P-type transistor 112p and the N-type transistor 112n are electrically connected to the second control line 95. The drains of the P-type transistor 112p and the N-type transistor 112n are electrically connected to the pixel electrode 21. The gate of the P-type transistor 112p is electrically connected to the output terminal N2 of the memory circuit 25, and the gate of the N-type transistor 112n is electrically connected to the input terminal N1 of the memory circuit 25.

  The switch circuit 110 selectively selects one of the first control line 94 and the second control line 95 in accordance with the image signal input to the memory circuit 25, and selects one of the control lines. The control line is electrically connected to the pixel electrode 21.

  Specifically, when a high-level image signal is input to the input terminal N1 of the memory circuit 25, the low-potential power supply potential Vss is output from the memory circuit 25 to the gates of the N-type transistor 111n and the P-type transistor 112p. Since the high potential power supply potential Vdd is output to the gates of the P-type transistor 111p and the N-type transistor 112n, only the P-type transistor 112p and the N-type transistor 112n constituting the second transmission gate 112 are turned on. The P-type transistor 111p and the N-type transistor 111n constituting one transmission gate 111 are turned off.

  On the other hand, when a low-level image signal is input to the input terminal N1 of the memory circuit 25, the high potential power supply potential Vdd is output from the memory circuit 25 to the gates of the N-type transistor 111n and the P-type transistor 112p, and the P-type Since the low-potential power supply potential Vss is output to the gates of the transistor 111p and the N-type transistor 112n, only the P-type transistor 111p and the N-type transistor 111n constituting the first transmission gate 111 are turned on, and the second transmission The P-type transistor 112p and the N-type transistor 112n constituting the gate 112 are turned off. That is, when a high-level image signal is input to the input terminal N1 of the memory circuit 25, only the second transmission gate 112 is turned on, while a low-level image signal is input to the input terminal N1 of the memory circuit 25. Is input, only the first transmission gate 111 is turned on.

  Each pixel electrode 21 of the plurality of pixels 20 is electrically connected to the first control line 94 or the second control line 95 that is alternatively selected according to the image signal by the switch circuit 110. At this time, the pixel electrode 21 of each of the plurality of pixels 20 is supplied with the first potential S1 or the second potential S2 or is in a high impedance state according to the on / off state of the switch 94s or 95s.

  More specifically, for the pixel 20 to which the low-level image signal is supplied, only the first transmission gate 111 is turned on, and the pixel electrode 21 of the pixel 20 is electrically connected to the first control line 94. The first potential S1 is supplied from the power supply circuit 200 in accordance with the on / off state of the switch 94s, or a high impedance state is established. On the other hand, for the pixel 20 to which the high-level image signal is supplied, only the second transmission gate 112 is turned on, and the pixel electrode 21 of the pixel 20 is electrically connected to the second control line 95, The second potential S2 is supplied from the power supply circuit 200 according to the on / off state of the switch 95s, or the high impedance state is set.

  The pixel electrode 21 is disposed so as to face the common electrode 22 through the electrophoretic element 23. The common electrode 22 is electrically connected to a common potential line 93 to which a common potential Vcom is supplied.

<Electronic equipment>
Next, electronic devices to which the above-described electrophoretic display device is applied will be described with reference to FIGS. Below, the case where the electrophoretic display device described above is applied to electronic paper and an electronic notebook is taken as an example.

  FIG. 11 is a perspective view illustrating a configuration of the electronic paper 1400.

  As illustrated in FIG. 11, the electronic paper 1400 includes the electrophoretic display device according to the above-described embodiment as a display unit 1401. The electronic paper 1400 has flexibility, and includes a main body 1402 formed of a rewritable sheet having the same texture and flexibility as conventional paper.

  FIG. 12 is a perspective view illustrating a configuration of the electronic notebook 1500.

  As shown in FIG. 12, an electronic notebook 1500 is one in which a plurality of electronic papers 1400 shown in FIG. 11 are bundled and sandwiched between covers 1501. The cover 1501 includes display data input means (not shown) for inputting display data sent from an external device, for example. Thereby, according to the display data, the display content can be changed or updated while the electronic paper is bundled.

  Since the electronic paper 1400 and the electronic notebook 1500 described above include the electrophoretic display device according to the above-described embodiment, it is possible to prevent image sticking and display a high-quality image.

  In addition to these, the electrophoretic display device according to the present embodiment described above can be applied to the display unit of an electronic device such as a wristwatch, a mobile phone, or a portable audio device.

  The present invention is not limited to the above-described embodiment, and can be appropriately changed without departing from the gist or concept of the invention that can be read from the claims and the entire specification, and an electrophoretic display device with such a change In addition, electronic devices are also included in the technical scope of the present invention.

  DESCRIPTION OF SYMBOLS 1, 2 ... Electrophoretic display apparatus, 3 ... Display part, 10 ... Controller, 20 ... Pixel, 21 ... Pixel electrode, 22 ... Common electrode, 23 ... Electrophoretic element

Claims (6)

A display unit composed of a plurality of pixels each provided with an electrophoretic element including electrophoretic particles between a pixel electrode and a common electrode facing each other;
A drive unit that displays an image corresponding to the image data on the display unit by applying a drive voltage between the pixel electrode and the common electrode based on image data;
The driving unit is a first region that is a first gradation in a period in which the first image is displayed in a rewriting period in which an image displayed on the display unit is rewritten from a first image to a second image. Of the regions, a third region that is adjacent to the second region that is the region having the second gradation during the period in which the first image is displayed and that surrounds the second region, and the second region A first period for applying a driving voltage for setting the second region and the third region to the first gradation is provided between a pixel electrode and a common electrode of each of the corresponding pixels. apparatus.   2. The electrophoretic display according to claim 1, wherein the third region has a contour line shifted by a predetermined width from an edge of the second region on a side opposite to the second region side. apparatus.   The electrophoretic display device according to claim 2, wherein the predetermined width is a width corresponding to a size of one pixel.   4. The electrophoretic display according to claim 1, wherein the driving unit includes a second period in which the entire display unit is set to the first gradation after the first period. 5. apparatus.   5. The electricity according to claim 4, wherein in the second period, the driving unit applies a driving voltage for the first gradation between the pixel electrode and the common electrode in the entire region of the display unit. Electrophoretic display device.   An electronic apparatus comprising the electrophoretic display device according to claim 1.

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