JP2010204674A - Liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display device which reduces leak of light in the oblique direction and whose display quality is further excellent in comparison with the conventional one. <P>SOLUTION: The liquid crystal display device has: a liquid crystal display panel 107 in which a plurality of pixels are arranged; a plurality of gate bus lines and a plurality of data bus lines 118 which are formed on the liquid crystal display panel 107 and connected to the pixels; a display controller which inputs video signals to output display signals; a gate driver which supplies scanning signals in order to the plurality of gate bus lines; a data driver which supplies the display signals to the plurality of data bus lines 118; and a wiring switching part which supplies signals output from the (4k+2)th and (4k+3)th output ends among the (4k+1)th, (4k+2)th, (4k+3)th, and (4k+4)th (provided that k is a natural number including zero) output ends of the data driver to the (4k+3)th and (4k+2)th data bus lines 118, respectively. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention suppresses a phenomenon in which the color reproducibility of an image is deteriorated as compared to the front when the gradation of a display signal supplied to each pixel of a liquid crystal display panel is changed with time and an image is viewed from an oblique direction. The present invention relates to a liquid crystal display device.

  The liquid crystal display device is advantageous in that it is thinner and lighter than a CRT (Cathode Ray Tube), can be driven at a low voltage, and consumes less power. Therefore, liquid crystal display devices are used in various electronic devices such as televisions, notebook PCs (personal computers), desktop PCs, PDAs (mobile terminals), and mobile phones. In particular, an active matrix liquid crystal display device in which a TFT (Thin Film Transistor) is provided as a switching element for each pixel (sub-pixel) exhibits excellent display characteristics comparable to a CRT because of its high driving capability. In addition, it has come to be widely used in fields where CRT has been conventionally used, such as desktop PCs and televisions.

  In general, as shown in FIG. 1, the liquid crystal display device includes two transparent substrates 10 and 20 that are arranged with a spacer 31 interposed therebetween and bonded together by a sealing material 32, and are enclosed between these substrates 10 and 20. And the liquid crystal 30 formed. A pixel electrode, a TFT, and the like are formed on one substrate 10 for each pixel, and a color filter facing the pixel electrode and a common electrode common to each pixel are formed on the other substrate 20. There are three types of color filters, red (R), green (G), and blue (B), and one color filter is arranged for each pixel. Three pixels of red (R), green (G) and blue (B) arranged adjacent to each other constitute one pixel (Pixel).

  Hereinafter, the substrate on which the pixel electrode and the TFT are formed is referred to as a TFT substrate, and the substrate disposed to face the TFT substrate is referred to as a counter substrate. A structure in which liquid crystal is sealed between a TFT substrate and a counter substrate is called a liquid crystal display panel.

  Usually, the TFT substrate 10 is formed larger than the counter substrate 20 by the amount of the connection terminal. Polarizing plates 41 and 42 are respectively disposed on both sides of the liquid crystal display panel 40 constituted by the TFT substrate 10 and the counter substrate 20. A backlight (not shown) is disposed below the liquid crystal display panel 40.

  Conventionally, a TN (Twisted Nematic) type liquid crystal display device in which a horizontal alignment type liquid crystal (liquid crystal having a positive dielectric anisotropy) is sealed between two substrates 10 and 20 and twisted alignment of liquid crystal molecules has been widely used. It was. However, the TN liquid crystal display device has a disadvantage that viewing angle characteristics are poor, and contrast and color tone change greatly when the screen is viewed from an oblique direction. For this reason, MVA (Multi-domain Vertical Alignment) type liquid crystal display devices with good viewing angle characteristics have been developed and put into practical use.

  2A and 2B are schematic cross-sectional views showing an example of an MVA type liquid crystal display device. The TFT substrate 10 and the counter substrate 20 are disposed with a spacer (not shown) interposed therebetween, and a vertical alignment type liquid crystal (liquid crystal having negative dielectric anisotropy) 30 is enclosed between the substrates 10 and 20. Has been. On the pixel electrode 12 of the TFT substrate 10, a plurality of bank-shaped protrusions 13 are formed as domain regulating structures. The surfaces of the pixel electrode 12 and the protrusion 13 are covered with a vertical alignment film 14 made of polyimide, for example.

  A plurality of bank-like projections 23 are also formed on the common electrode 22 of the counter substrate 20 as a domain regulating structure. These protrusions 23 are arranged at positions shifted in an oblique direction with respect to the protrusions 13 on the TFT substrate 10 side. The surfaces of the common electrode 22 and the protrusion 23 are also covered with a vertical alignment film 24 made of, for example, polyimide.

  In the MVA liquid crystal display device, in the state where no voltage is applied between the pixel electrode 12 and the common electrode 22, as shown in FIG. 2A, most liquid crystal molecules 30a are aligned perpendicular to the substrate surface. . However, the liquid crystal molecules 30 a in the vicinity of the protrusions 13 and 23 are aligned in a direction perpendicular to the inclined surfaces of the protrusions 13 and 23.

  When a predetermined voltage is applied between the pixel electrode 12 and the common electrode 22, the liquid crystal molecules 30a are oriented obliquely with respect to the substrate surface due to the influence of the electric field. In this case, as shown in FIG. 2B, the inclination directions of the liquid crystal molecules 30a are different on both sides of the protrusions 13 and 23, and so-called alignment division (multi-domain) is achieved.

  As shown in FIG. 2 (b), in the MVA type liquid crystal display device, the inclination direction of the liquid crystal molecules 30a when voltage is applied is different on both sides of the protrusions 13 and 23, so that light leakage in the oblique direction is suppressed. Excellent viewing angle characteristics can be obtained.

  In the above example, the case where the domain regulating structure is a protrusion has been described. However, a slit provided in the electrode or a depression (groove) on the substrate surface may be used as the domain regulating structure. 2A and 2B, the example in which the domain regulating structure is provided on both the TFT substrate 10 and the counter substrate 20 has been described. However, only one of the TFT substrate 10 and the counter substrate 20 is described. A domain regulating structure may be formed on the substrate.

  FIG. 3 shows an example in which a slit 12a is formed as a domain regulating structure on the pixel electrode 12 on the TFT substrate 10 side. At the edge of the slit 12a, lines of electric force are generated in an oblique direction toward the center of the slit 12a, so that the inclination directions of the liquid crystal molecules 30a are different on both sides of the slit 12a. This achieves alignment division and improves viewing angle characteristics.

  FIG. 4 is a plan view showing an example of an actual MVA type liquid crystal display device. FIG. 4 shows a region for one pixel of the TFT substrate of the MVA liquid crystal display device.

  On the TFT substrate, a plurality of gate bus lines 51 extending in the horizontal direction and a plurality of data bus lines 55 extending in the vertical direction are arranged at a predetermined pitch. Each rectangular area defined by the gate bus line 51 and the data bus line 55 is a pixel area. In addition, an auxiliary capacitor bus line 52 is formed on the TFT substrate in parallel with the gate bus line 51 and crosses the center of the pixel region. A first insulating film is formed between the gate bus line 51, the auxiliary capacity bus line 52, and the data bus line 55, and the first insulating film forms a gap between the gate bus line 51 and the data bus line 55. The auxiliary capacity bus line 52 and the data bus line 55 are electrically separated.

  In each pixel region, a TFT 54, a pixel electrode 56, and an auxiliary capacitance electrode 53 are formed. The TFT 54 uses a part of the gate bus line 51 as a gate electrode. The drain electrode 54d of the TFT 54 is connected to the data bus line 55, and the source electrode 54s is formed at a position facing the drain electrode 54d with the gate bus line 51 interposed therebetween. Further, the auxiliary capacitance electrode 53 is formed at a position facing the auxiliary capacitance bus line 52 with the first insulating film interposed therebetween.

  The auxiliary capacitance electrode 53, the TFT 54, and the data bus line 55 are covered with a second insulating film, and the pixel electrode 56 is disposed on the second insulating film. The pixel electrode 56 is made of a transparent conductor such as ITO (Indium-Tin Oxide), and is electrically connected to the source electrode 54s and the auxiliary capacitance electrode 53 of the TFT 54 through contact holes 62a and 62b formed in the second insulating film. Connected. The pixel electrode 56 is formed with two slits 56a extending in the oblique direction symmetrically. The surface of the pixel electrode 56 is covered with a vertical alignment film made of polyimide, for example.

  A black matrix, a color filter, and a common electrode are formed on the counter substrate disposed to face the TFT substrate. A bank-like protrusion 71 extending in parallel with the slit 56a is formed on the common electrode, as indicated by a one-dot chain line in FIG. These protrusions 71 are arranged at positions shifted in an oblique direction with respect to the slits 56 a of the pixel electrode 56. The surfaces of the common electrode and the protrusion 71 are covered with a vertical alignment film made of polyimide, for example.

  In the liquid crystal display device configured as described above, when a predetermined voltage is applied between the pixel electrode 56 of the TFT substrate and the common electrode of the counter substrate, four regions (domains) in which the alignment directions of the liquid crystal molecules are different from each other are obtained. It is formed. These regions are bordered by the protrusion 71 and the slit 56a. Thereby, a favorable viewing angle characteristic is obtained.

  By the way, although the conventional MVA type liquid crystal display device shows a better viewing angle characteristic as compared with the TN type liquid crystal display device, a phenomenon that the screen becomes whitish occurs when the screen is viewed from an oblique direction. In FIG. 5, the applied voltage (V) is taken on the horizontal axis, and the transmittance (T) is taken on the vertical axis, and the TV characteristic when viewed from the front and when viewed from the direction of 60 ° above. It is a figure which shows TV characteristic. As shown in FIG. 5, when a voltage slightly higher than the threshold voltage is applied to the pixel electrode (the circled portion in the figure), the transmittance when viewed from an oblique direction is viewed from the front. Becomes higher than the transmittance. When the applied voltage is increased to some extent, the transmittance when viewed from an oblique direction becomes lower than the transmittance when viewed from the front. For this reason, when viewed from an oblique direction, the luminance difference between the red pixel, the green pixel, and the blue pixel becomes small, and as a result, the phenomenon that the screen becomes whitish occurs as described above. This phenomenon is called discolor. White brown is generated not only in the MVA liquid crystal display device but also in the TN liquid crystal display device.

  US Pat. No. 4,840,460 proposes dividing one pixel into a plurality of sub-pixels and capacitively coupling those sub-pixels. In such a liquid crystal display device, since the potential is divided according to the capacitance ratio of each sub-pixel, different voltages can be applied to each sub-pixel. Therefore, apparently, a plurality of regions having different threshold values of TV characteristics exist in one pixel. Thus, when there are a plurality of regions having different threshold values of the TV characteristics in one pixel, the transmittance when viewed from an oblique direction is higher than the transmittance when viewed from the front as shown in FIG. The phenomenon that the image becomes higher is suppressed, and as a result, the phenomenon that the screen becomes whitish (white brown) is also suppressed.

  In the specification of Japanese Patent No. 3076938 (Japanese Patent Laid-Open No. 5-66412), as shown in FIG. 6, the pixel electrode is divided into a plurality (four in FIG. 6) of sub-pixel electrodes 81a to 81d. There is disclosed a liquid crystal display device in which control electrodes 82a to 82d are respectively disposed below pixel electrodes 81a to 81d via an insulating film. In this liquid crystal display device, the sizes of the control electrodes 82 a to 82 d are different from each other, and a display voltage is applied to the control electrodes 82 a to 82 d via the TFT 80. Further, in order to prevent light from leaking between the subpixel electrodes 81a to 81d, the control electrode 83 is also arranged between the subpixel electrodes 81a to 81d.

  As described in these publications, a method of improving display characteristics by dividing one pixel into a plurality of sub-pixels capacitively coupled is called an HT (halftone gray scale) method by capacitive coupling.

  On the other hand, in Japanese Patent Application Laid-Open No. 2001-75073, for example, the first voltage V1 is applied to the pixel electrode in an even frame, and 0.5 to 1.5 V is applied to the pixel electrode in the odd frame than the first electrode V1. It has been proposed to improve the viewing angle characteristics of a liquid crystal display device by applying a voltage V2 that is low enough. Hereinafter, the time when the first voltage V1 is applied to the pixel electrode is referred to as bright display, and the time when the second voltage V2 lower than the first voltage V1 is applied is referred to as dark display. A pattern indicating the arrangement of bright display pixels and dark display pixels is referred to as a bright / dark display pattern.

  In Japanese Patent Laid-Open No. 2001-75073, all pixels are darkly displayed in odd frames as shown in FIG. 7A, and all pixels are brightly displayed in even frames as shown in FIG. 7B. It is described that. In the odd frame, as shown in FIG. 8A, pixels connected to the odd-numbered (n, n + 2,...) Gate bus lines are darkly displayed, and the even-numbered (n + 1, n + 3,...) Gate bus lines. As shown in FIG. 8B, pixels connected to the odd-numbered gate bus lines are brightly displayed, and pixels connected to the even-numbered gate bus lines are displayed in the even frame. It is described that the display may be dark. In FIGS. 7A, 7B, 8A, and 8B, R, G, and B indicate red (R) pixels, green (G) pixels, and blue (B) pixels, respectively. ing.

  In the above-described HT method using capacitive coupling, one pixel is divided into a plurality of regions and different voltages are applied to each region to improve viewing angle characteristics (space division). In the liquid crystal display device described in Japanese Unexamined Patent Application Publication No. 2001-75073, an effect of the HT method is obtained by changing the voltage applied to the pixel electrode with time. Hereinafter, such a method is referred to as a time division HT method.

  By the way, in the liquid crystal display device, in order to prevent burn-in, the polarity of the voltage (display signal) applied to the pixel electrode is changed every frame. In this case, since the transmittance is slightly different between when a positive (+) voltage is applied and when a negative (−) voltage is applied, for example, a positive voltage is applied to all pixels in an odd frame. When a negative voltage is applied to all pixels in an even frame, flickering occurs. For this reason, normally, as shown in FIGS. 9A and 9B, voltages having different polarities are applied to adjacent pixels in the horizontal and vertical directions, and the polarity of the voltage applied to each pixel is set for each frame. It is changing.

  Hereinafter, a pattern indicating the polarity of the voltage applied to each pixel as shown in FIGS. 9A and 9B is referred to as a polarity pattern. For example, as shown in FIGS. 9A and 9B, voltages having different polarities are applied to pixels arranged in the horizontal direction for each pixel, and polarities are applied to the pixels arranged in the vertical direction for each pixel. The polarity patterns to which different voltages are applied are referred to as horizontal 1-dot inversion / vertical 1-dot inversion polarity patterns.

  Japanese Patent Application Laid-Open No. 8-171369 discloses a method for reducing display defects such as a horizontal (horizontal) luminance gradient, a horizontal crosstalk, and a vertical (vertical) luminance gradient. It has been proposed to alternately apply voltages having different polarities.

  Japanese Patent Laid-Open No. 2003-337777 discloses a one-dot inversion polarity pattern that inverts the polarity for each pixel and two-dot inversion that inverts the polarity every two pixels, for example, depending on the vertical frequency and the presence or absence of flicker. Liquid crystal display devices that switch between polar patterns have been proposed.

Specification of US Pat. No. 4,840,460 Specification of Japanese Patent No. 3076938 JP 2001-75073 A JP-A-8-171369 JP 2003-337577 A

  In the HT method using capacitive coupling, the liquid crystal molecules in the region between the subpixel electrodes cannot be oriented in a desired direction by the voltage applied to the subpixel electrode, so that the aperture ratio is reduced and sufficient luminance can be secured. There is a disadvantage that it is impossible. In addition, it is necessary to form a thin insulating film between the control electrode and the pixel electrode, or to form a narrow slit between the subpixel electrodes. There is also a drawback that short circuit between the sub-pixel electrodes that fit is likely to occur.

  The time-division HT method described in Japanese Patent Laid-Open No. 2001-75073 mentioned above does not have such a drawback. However, experiments and research by the inventors of the present application have revealed that sufficient effects cannot be obtained even when the technique disclosed in Japanese Patent Application Laid-Open No. 2001-75073 is applied to an MVA liquid crystal display device.

  That is, in Japanese Patent Application Laid-Open No. 2001-75073, the voltage V1 is defined as a voltage that achieves a desired luminance when only the voltage V1 is applied to the pixel electrode, and the voltage V2 is a constant value (0.5 to The voltage is defined as low by about 1.5V. When different voltages V1 and V2 are alternately applied to the pixel electrodes in this way, the luminance should be lower than when only the voltage V1 is applied. In Japanese Patent Laid-Open No. 2001-75073, since there is almost no difference between the luminance when the voltage V1 is applied to the pixel electrode and the luminance when the voltage V2 is applied to the pixel electrode, the voltages V1 and V2 are alternately applied to the pixel electrode. The luminance when applied to is substantially the same as the luminance when only the voltage V1 is applied to the pixel electrode.

  In FIG. 10, the horizontal axis indicates the gradation difference between the voltages V1 and V2, and the vertical axis indicates the luminance when viewed from an oblique direction. The voltage V1 when the intermediate gradation (127/255) is displayed. , V2 is a diagram showing the relationship between the gradation difference and the luminance in the oblique direction. Generally, the gradation difference that does not feel the luminance difference described in Japanese Patent Laid-Open No. 2001-75073 is approximately 1/255 to 4/255, and if there is a gradation difference larger than that, The brightness difference is fully recognized. However, as can be seen from FIG. 10, the luminance hardly changes at a gradation difference of about 1/255 to 4/255. In order to sufficiently reduce the luminance in the oblique direction while maintaining the luminance in the front direction, it is necessary to set a difference of at least 96 gradations. That is, as described in JP-A-2001-75073, if the difference between the voltages V1 and V2 is such that the luminance difference is not known, the effect of the HT method by time division cannot be obtained, and thus the viewing angle characteristics are It cannot be improved.

  In order to fully exhibit the effect of improving the viewing angle characteristics in the time division HT method, the luminance when the voltage V1 is applied is made higher than the desired luminance, and the luminance when the voltage V2 is applied is desired. Therefore, it is necessary to increase the luminance difference between the voltages V1 and V2.

  FIG. 11 is a diagram showing input / output gradation characteristics of the voltages V1 and V2 necessary for obtaining desired luminance, with the input gradation on the horizontal axis and the output gradation on the vertical axis. For example, in order to make the output gradation 125/255, the input gradation at the voltage V1 is 225/255, the input gradation at the voltage V2 is 100/255, and a difference of 125 gradations is possible. It is necessary to turn on. When the difference between the voltages V1 and V2 is increased in this way, when the liquid crystal display panel is driven with the light and dark display pattern shown in FIGS. 7A and 7B, flickering occurs on the entire screen, and FIG. When the liquid crystal display panel is driven with the light and dark display pattern shown in FIG. 5B, streaky flickers extending in the horizontal direction are generated violently.

That is, the technique disclosed in Japanese Patent Laid-Open No. 2001-75073 has at least the following three problems.
(1) The input signal and the output luminance do not match.
(2) When the gradation difference is small, there is no effect of improving the viewing angle characteristics.
(3) When the gradation difference is increased, the bright / dark display pattern becomes conspicuous.

  Japanese Patent Application No. 2003-93793 by the applicant of the present application describes that voltages V1 and V2 are alternately applied to pixels adjacent in the horizontal direction and the vertical direction, as shown in FIGS. ing. Such a light / dark display pattern (horizontal 1 dot inversion / vertical 1 dot inversion light / dark display pattern) is combined with the polarity patterns (horizontal 1 dot inversion / vertical 1 dot inversion polarity pattern) shown in FIGS. 12 (e) and 12 (f). That is, dark display pixels and bright display pixels are alternately arranged in the horizontal and vertical directions, and pixels to which a positive voltage is applied and pixels to which a negative voltage is applied are horizontal and vertical directions. Line up alternately.

  However, in this case, as can be seen from FIGS. 12E and 12F, only a negative voltage is applied to the bright display pixel, and only a positive voltage is applied to the dark display pixel. . For this reason, a direct current component is applied to the liquid crystal layer, and image sticking or flickering occurs.

  Japanese Patent Application No. 2003-93793 also describes driving a liquid crystal display panel with a polarity pattern (horizontal 1-dot inversion / vertical 2-dot inversion polarity pattern) as shown in FIGS. 13C and 13D. . When this polarity pattern is combined with the light / dark display pattern (horizontal 1 dot inversion / vertical 1 dot inversion light / dark display pattern) shown in FIGS. 13 (a) and 13 (b), as shown in FIGS. 13 (e) and 13 (f). Become. That is, bright display pixels and dark display pixels are alternately arranged in the horizontal and vertical directions, and pixels to which a positive voltage is applied and pixels to which a negative voltage is applied are alternately arranged in the horizontal direction. In the vertical direction, every two lines are arranged.

  However, in this case, as can be seen from FIGS. 13E and 13F, only the voltage of one polarity (positive polarity or negative polarity) is applied to the bright display pixel among the pixels arranged in the horizontal direction. Only the voltage of the other polarity (negative polarity or positive polarity) is applied to the dark display pixel.

  The pixel electrodes of the pixels arranged in the horizontal direction are connected to the same gate bus line via the TFT and are capacitively coupled to the same auxiliary capacitor bus line to form an auxiliary capacitor. Accordingly, as shown in FIGS. 13E and 13F, if the pixels connected to one gate bus line have a large bias in potential, the potentials of these gate bus lines and auxiliary capacitor bus lines change. End up. As a result, flickering occurs for each horizontal line.

  Further, in the above-mentioned patent application 2003-93793, a light / dark display pattern (horizontal 2 dot inversion / vertical 1 dot inversion light / dark display pattern) as shown in FIGS. 14 (a) and 14 (b), and FIGS. It has also been proposed to drive as shown in FIGS. 14E and 14F in combination with a polarity pattern (horizontal 1-dot inversion / vertical 2-dot inversion polarity pattern) as shown in FIG. In this method, as can be seen from FIGS. 14E and 14F, the spatial balance between bright display and dark display and the spatial balance between positive polarity and negative polarity are good, and attention is paid to one pixel. Then, every frame changes to a positive dark display, a positive bright display, a negative dark display, and a negative bright display, thereby preventing burn-in and flickering.

  However, the methods shown in FIGS. 14A to 14F have a disadvantage that the screen becomes rough because the bright display and the dark display change every two pixels in the horizontal direction.

  In view of the above, an object of the present invention is to provide a liquid crystal display device in which light leakage in an oblique direction is reduced and display quality is further improved as compared with the conventional one.

  A method of driving a liquid crystal display device having a plurality of pixels arranged in a horizontal direction and a vertical direction, and a display signal supply unit that inputs a video signal and supplies a display signal to each of the plurality of pixels, The display signal supply unit supplies a first display signal having a higher gradation than the gradation of the video signal to provide bright display pixels and a gradation lower than the gradation of the video signal. A bright and dark display pattern indicating an arrangement of dark display pixels that are darkly displayed by supplying a second display signal, a positive polarity pixel that supplies a positive display signal, and a negative polarity that supplies a negative display signal A gradation and polarity of a display signal supplied to each pixel is determined based on a polarity pattern indicating an arrangement with the pixel, and the bright and dark display pattern includes the bright display pixel and the dark display pixel in a horizontal direction and a vertical direction. Every pixel The pattern is alternately arranged, and the polarity pattern is arranged in such a manner that the positive polarity pixel and the negative polarity pixel are alternately arranged every 2 × n pixels (where n is an integer of n> 0) in the horizontal direction and the vertical direction. There is a method for driving a liquid crystal display device, which is characterized in that the pattern is a pattern.

  In the driving method described above, a bright / dark display pattern in which bright display pixels and dark display pixels are alternately arranged in the horizontal direction and the vertical direction for each pixel, and a positive pixel and a negative polarity pixel in the horizontal direction and the vertical direction. For example, the liquid crystal display device is driven by combining polar patterns alternately arranged every two pixels. By such a driving method, it is possible to suppress the effect of the HT method by time division, that is, the phenomenon of turning whitish when the screen is viewed from an oblique direction (white-brown) while preventing flickering and burn-in of the screen. In addition, since the bright display pixels and the dark display pixels are arranged for each pixel, a good display without roughness can be achieved.

  Further, in the above driving method, the video signal is input from a device such as a computer that outputs the video signal, and the bright display pixel is supplied with the first display signal having a gradation higher than the gradation of the video signal. Since the second display signal having a gradation lower than the gradation of the video signal is supplied to the dark display pixels, the gradation of the video signal can be improved.

  The above-described problems include a liquid crystal display panel in which a plurality of pixels are arranged, a plurality of gate bus lines and a plurality of data bus lines that are formed in the liquid crystal display panel and connected to the pixels, and a video signal is input and displayed. A display controller that outputs a signal; a gate driver that sequentially supplies a scanning signal to the plurality of gate bus lines; a data driver that supplies a display signal to the plurality of data bus lines; and 4k + 1, 4k + 2, Of the 4k + 3 and 4k + 4 (where k is a natural number including 0) output signals, the signals output from the 4k + 2 and 4k + 3 output terminals are supplied to the 4k + 3 and 4k + 2 data bus lines, respectively. The invention is solved by a liquid crystal display device having a wiring switching portion. In the liquid crystal display device described above, the wiring switching unit supplies the signals output from the 4k + 1 and 4k + 4th output terminals of the data driver to the 4k + 1th and 4k + 4th data bus lines, respectively. Also good.

  In addition, the above-described problems include a liquid crystal display panel in which a plurality of pixels are arranged, a plurality of gate bus lines and a plurality of data bus lines that are formed in the liquid crystal display panel and connected to the pixels, and input video signals. A display controller for outputting a display signal; a gate driver for sequentially supplying a scanning signal to the plurality of gate bus lines; a data driver for supplying a display signal to the plurality of data bus lines; and the plurality of data bus lines. Are provided in each of the groups divided into a plurality of lines, and at least two of the data bus lines of the group are connected to the output terminals of the data drivers in an order different from the order in which the groups are arranged. This is solved by a liquid crystal display device having a wiring switching portion connected to the liquid crystal display device. In the liquid crystal display device described above, the order of the data bus lines and the order of the output ends of the data drivers that are switched by the wiring switching unit of each group may be the same, and further, the order through the wiring switching unit The number of the data bus lines connected to the output terminal of the data driver may be the same as the number of the data bus lines connected to the output terminal of the data driver without going through the wiring switching unit.

  Further, the above-described problem is that a liquid crystal display panel in which a plurality of pixels are arranged, a plurality of gate bus lines and a plurality of data bus lines formed in the liquid crystal display panel and connected to the pixels, and video signals are input. A display controller for outputting a display signal, a gate driver for sequentially supplying a scanning signal to the plurality of gate bus lines, a first data driver for supplying a display signal to an odd-numbered data bus line, and an even-numbered data bus line A second data driver for supplying a display signal to the data bus line, and the display controller has a different polarity for each of the plurality of pixels via the first and second data drivers every two pixels; In addition, the problem is solved by a liquid crystal display device that supplies display signals having different gradations for each pixel.

  Currently, most commonly used driver ICs (Integrated Circuits) apply reverse polarity voltage to adjacent data bus lines, or apply the same polarity voltage to all data bus lines. One of the things to do. As in the present invention, two data drivers are used, the polarity of the display signal supplied to the odd-numbered data bus line is controlled by one data driver, and the even-numbered data bus line is supplied by the other data driver. If the above driving method is realized by controlling the polarity of the display signal, a general-purpose driver IC can be used, and an increase in manufacturing cost can be avoided.

  Also, wirings for supplying signals output from the 4k + 1, 4k + 2, 4k + 3 and 4k + 4 (where k is a natural number including 0) output terminals of the data driver to the 4k + 1, 4k + 3, 4k + 2 and 4k + 4th data bus lines, respectively. Providing the switching unit also makes it possible to use a general-purpose driver IC and avoids an increase in manufacturing cost.

FIG. 1 is a schematic diagram showing a configuration of a conventional liquid crystal display device. 2A and 2B are schematic cross-sectional views showing an example of an MVA type liquid crystal display device. FIG. 3 is a schematic cross-sectional view showing an example of a liquid crystal display device in which a slit is formed as a domain regulating structure in the pixel electrode on the TFT substrate side. FIG. 4 is a plan view showing a region for one pixel of a conventional MVA liquid crystal display device. FIG. 5 is a diagram showing a TV characteristic when the screen is viewed from the front and a TV characteristic when the screen is viewed from the upper 60 ° direction. FIG. 6 is a plan view showing an example of a conventional liquid crystal display device in which one pixel is divided into a plurality of sub-pixels. 7A and 7B are diagrams illustrating an example of a driving method of a conventional liquid crystal display device. 8A and 8B are diagrams showing another example of a method for driving a conventional liquid crystal display device. 9A and 9B are diagrams showing still another example of the driving method of the conventional liquid crystal display device. FIG. 10 is a diagram showing the relationship between the gradation difference between the voltages V1 and V2 and the luminance in the oblique direction when the intermediate gradation is displayed. FIG. 11 is a diagram showing input / output gradation characteristics of the voltages V1 and V2 necessary for obtaining a desired luminance. 12A to 12F are diagrams showing still another example of the driving method of the conventional liquid crystal display device. FIGS. 13A to 13F are diagrams showing still another example of the driving method of the conventional liquid crystal display device. 14A to 14F are diagrams showing still another example of the driving method of the conventional liquid crystal display device. FIG. 15 is a block diagram showing a configuration of the liquid crystal display device according to the embodiment of the present invention. FIG. 16 is a plan view showing a region for one pixel of the liquid crystal display panel of the embodiment. FIG. 17 is a schematic cross-sectional view taken along the line II in FIG. FIG. 18A is a diagram showing a light / dark display pattern in an odd frame, and FIG. 18B is a diagram showing a light / dark display pattern in an even frame. 19A shows a polarity pattern in the 4m + 1th frame, FIG. 19B shows a polarity pattern in the 4m + 2nd frame, and FIG. 19C shows a polarity pattern in the 4m + 3rd frame. FIG. 19D is a diagram showing a polarity pattern in the 4m + 4th frame. FIG. 20A is a diagram showing the light / dark display pattern and the polarity pattern in the 4m + 1 frame at the same time, FIG. 20B is a diagram showing the light / dark display pattern and the polarity pattern in the 4m + 2 frame at the same time, and FIG. ) Is a diagram showing a light / dark display pattern and a polarity pattern in the 4m + 3rd frame at the same time, and FIG. 20 (d) is a diagram showing a light / dark display pattern and a polarity pattern in the 4m + 4th frame at the same time. FIG. 21 is a schematic diagram illustrating a liquid crystal display device according to a first modification. FIG. 22 is a schematic diagram illustrating a liquid crystal display device according to a second modification. FIG. 23A is a plan view showing an example of the connection between the metal wiring and the data bus line, and FIG. 23B is a schematic sectional view of the same. FIG. 24A and FIG. 24B are plan views showing other examples of connections between metal wirings and data bus lines. FIGS. 25A and 25B are schematic diagrams showing the positions of the terminal replacement portions in the liquid crystal display device having the repair wiring.

  Embodiments of the present invention will be described below with reference to the drawings.

(Overall configuration of liquid crystal display device)
FIG. 15 is a block diagram showing the configuration of the liquid crystal display device according to the embodiment of the present invention.

  The liquid crystal display device 100 of this embodiment includes a timing controller 101, a polarity pattern generation unit 102, a light / dark display pattern generation unit 103, a liquid crystal display controller 104, a data driver 105, a gate driver 106, and a liquid crystal display panel 107. The liquid crystal display device 100 receives a video signal and a control signal from an external device (not shown) such as a personal computer.

  The liquid crystal display panel 107 has a plurality of pixels arranged in a matrix. One pixel includes a TFT (thin film transistor) 117, a display cell (liquid crystal cell) 125 and an auxiliary capacitor 126 connected to the source electrode of the TFT 117. The display cell 125 includes a pixel electrode described later, a common electrode, a liquid crystal therebetween, and a pair of polarizing plates. The auxiliary capacitor 126 includes an auxiliary capacitor bus line, an auxiliary capacitor electrode, and an insulating film between them.

  In the liquid crystal display panel 107, a plurality of gate bus lines 112 extending in the horizontal direction and a plurality of data bus lines 118 extending in the vertical direction are formed. The gate electrodes of the TFTs 117 of the pixels arranged in the horizontal direction are connected to the same gate bus line 112, and the drain electrodes of the TFTs 117 of the pixels arranged in the vertical direction are connected to the same data bus line 118.

  The timing controller 101 generates a polarity pattern generation timing signal, a light / dark display pattern generation timing signal, and a gate driver timing signal based on a control signal input from an external device. The data is output to the generation unit 103 and the gate driver 106.

  The polarity pattern generation unit 102 generates a polarity pattern signal, which will be described later, in accordance with the timing signal input from the timing controller 101 and outputs the signal to the liquid crystal display controller 104. The light / dark display pattern generation unit 103 generates a light / dark display pattern signal, which will be described later, in accordance with the timing signal input from the timing controller 101, and outputs the signal to the liquid crystal display controller 104.

  The liquid crystal display controller 104 receives a video signal from an external device and outputs a display signal to the data driver 105. At this time, the liquid crystal display controller 104 determines the voltage and polarity of the display signal for each data bus line 118 according to the video signal and the signals input from the polarity pattern generation unit 102 and the light / dark display pattern generation unit 103. .

  The data driver 105 converts the digital display signal input from the liquid crystal display controller 104 into an analog display signal and outputs the analog display signal to each data bus line 118 at a predetermined timing.

  On the other hand, the gate driver 106 sequentially outputs scanning signals to the gate bus lines 112 within one vertical synchronization period based on the timing signal input from the timing controller 101. The TFT 117 connected to the gate bus line 112 supplied with the scanning signal is turned on, and the display signal supplied to the data bus line 118 is written into the display cell 125. As a result, the liquid crystal molecules of the display cell 125 are inclined at an angle corresponding to the display signal, and the light transmittance of the display cell 125 changes. By controlling the light transmittance for each display cell 125, a desired image can be displayed on the liquid crystal display panel 107.

(LCD panel)
16 is a plan view showing one pixel of the liquid crystal display panel 107, and FIG. 17 is a schematic cross-sectional view taken along the line II in FIG.

  As shown in FIGS. 16 and 17, the liquid crystal display panel 107 includes a TFT substrate 110, a counter substrate 130, and a vertical alignment type liquid crystal (dielectric) sealed between the TFT substrate 110 and the counter substrate 130. Liquid crystal having negative anisotropy 140).

  As described above, a plurality of gate bus lines 112 extending in the horizontal direction (X-axis direction) and a plurality of data bus lines extending in the vertical direction (Y-axis direction) are provided on the glass substrate 111 serving as a base of the TFT substrate 110. 118 is formed. Each rectangular area defined by the gate bus line 112 and the data bus line 118 is a pixel area. Further, an auxiliary capacitor bus line 113 is formed on the glass substrate 111 so as to be parallel to the gate bus line 112 and cross the pixel region.

  In each pixel region, a TFT 117, a pixel electrode 121 made of a transparent conductor such as ITO (Indium-Tin Oxide), and an auxiliary capacitance electrode 119 are formed. In this embodiment, the TFT 117 uses a part of the gate bus line 112 as a gate electrode. Further, the drain electrode 117d of the TFT 117 is connected to the data bus line 118, and the source electrode 117s is disposed at a position facing the drain electrode 117d with the gate bus line 112 interposed therebetween.

  The pixel electrode 121 is electrically connected to the source electrode 117s and the auxiliary capacitance electrode 119 of the TFT 117 through contact holes 120a and 120b. Further, as the domain regulating structure, slits 121a extending in an oblique direction are formed in the pixel electrode 121 in a vertically symmetrical manner, and a bank-like protrusion 135 made of a dielectric resin or the like is formed in the counter substrate 130. .

  Hereinafter, the layer structure of the TFT substrate 110 and the counter substrate 130 will be described with reference to FIG.

  A gate bus line 112 and an auxiliary capacitance bus line 113 are formed on a glass substrate 111 that is a base of the TFT substrate 110. The gate bus line 112 and the auxiliary capacitor bus line 113 are formed by patterning a metal film (first metal film) such as a Cr (chromium) film or an Al (aluminum) -Ti (titanium) laminated film by a photolithography method. It is formed.

The gate bus line 112 and the auxiliary capacitor bus line 113 are covered with a first insulating film (gate insulating film) 114 made of SiO ₂ or SiN or the like formed on the glass substrate 111. In a predetermined region on the first insulating film 114, a silicon film (amorphous silicon film or polysilicon film) 115 serving as an active layer of the TFT 117 is formed.

  A channel protective film 116 made of SiN or the like is formed on the silicon film 115. On both sides of the channel protective film 116, a source electrode 117s and a drain electrode 117d of the TFT 117 are formed. The drain electrode 117d is connected to the drain bus line 118 as described above. In addition, an auxiliary capacitance electrode 119 is formed at a position facing the auxiliary capacitance bus line 113 with the first insulating film 114 interposed therebetween. The source electrode 117s, the drain electrode 117d, the data bus line 118, and the auxiliary capacitance electrode 119 are formed by patterning, for example, a Ti—Al—Ti three-layer metal film (second metal film) by photolithography. Is done.

The source electrode 117s, the drain electrode 117d, the data bus line 118, and the auxiliary capacitance electrode 119 are covered with a second insulating film 120 made of SiO ₂ or SiN. A pixel electrode 121 is formed on the second insulating film 120. As described above, the pixel electrode 121 is formed with the slit 121a extending in the oblique direction as the domain regulating structure. In addition, the pixel electrode 121 is electrically connected to the source electrode 117 s and the auxiliary capacitance electrode 119 through contact holes 120 a and 120 b formed in the second insulating film 120.

  The pixel electrode 121 is formed by forming a transparent conductor film made of ITO or the like on the second insulating film 120 and patterning the transparent conductor film by a photolithography method. The surface of the pixel electrode 121 is covered with a vertical alignment film (not shown) made of polyimide or the like.

  On the other hand, a black matrix (light-shielding film) 132, a color filter 133, a common electrode 134, and a bank for domain regulation are provided on one surface side (lower side in the figure) of the glass substrate 131 serving as the base of the counter substrate 130. A projection 135 is formed.

  The black matrix 132 is disposed at a position facing the gate bus line 112, the data bus line 118, the auxiliary capacitance bus line 113, and the TFT 117 on the TFT substrate 110 side. There are three types of color filters 133, red, green, and blue, and one color filter is arranged for each pixel region. One pixel is constituted by three pixels of the adjacent red pixel, green pixel, and blue pixel, and various colors can be displayed.

  The common electrode 134 is formed of a transparent conductor such as ITO, and is formed on the color filter 133 (lower side in FIG. 17). On the common electrode 134 (on the lower side in FIG. 17), as described above, a bank-shaped protrusion 135 made of a dielectric resin or the like is formed as a domain regulating structure. As shown in FIG. 16, these protrusions 135 are disposed at positions shifted obliquely with respect to the slits 121 a of the pixel electrode 121 on the TFT substrate 110 side. The surfaces of the common electrode 134 and the protrusions 135 are covered with a vertical alignment film (not shown) made of polyimide or the like.

  Although not shown in FIG. 17, a first polarizing plate and a backlight are disposed below the TFT substrate 110, and a second polarizing plate is disposed above the counter substrate 130.

(Driving method)
FIG. 18A is a diagram showing a light / dark display pattern in an odd frame, and FIG. 18B is a diagram showing a light / dark display pattern in an even frame. FIG. 19A shows a polarity pattern in the 4m + 1th frame (where m is a natural number including 0), FIG. 19B shows a polarity pattern in the 4m + 2th frame, and FIG. ) Is a diagram showing a polarity pattern in the 4m + 3rd frame, and FIG. 19D is a diagram showing a polarity pattern in the 4m + 4th frame. 20A is a diagram showing the light / dark display pattern and the polarity pattern in the 4m + 1th frame at the same time, and FIG. 20B is a diagram showing the light / dark display pattern and the polarity pattern in the 4m + 2th frame at the same time. FIG. 20C is a diagram showing the light / dark display pattern and the polarity pattern in the 4m + 3th frame at the same time, and FIG. 20D is a diagram showing the light / dark display pattern and the polarity pattern in the 4m + 4th frame at the same time.

  As shown in FIGS. 18A and 18B and FIGS. 19A to 19D, in this embodiment, the horizontal 1-dot inversion / vertical 1-dot inversion light / dark display pattern and the horizontal 2-dot inversion / vertical The liquid crystal display panel 107 is driven in combination with the 2-dot inversion polarity pattern. That is, bright display pixels and dark display pixels are alternately arranged in the horizontal and vertical directions, and every two positive and negative pixels are arranged in the horizontal and vertical directions. Then, as shown in FIGS. 20A to 20D, the combination of the light and dark display pattern and the polarity pattern changes every frame, and makes a round in 4 frames.

  The voltage of the display signal supplied to the bright display pixel is a voltage that is higher than the gradation of the video signal input from the external device, and the voltage of the display signal supplied to the dark display pixel is the level of the video signal. The voltage becomes a gradation lower than the tone. However, it is necessary that the substantial gradation becomes equal to the gradation of the video signal by performing the bright display and the dark display alternately. In the present embodiment, the gradation difference between the bright display and the dark display is set as shown in FIG. 11, for example, according to the gradation of the video signal (input signal).

  When the liquid crystal display panel 107 is driven in this way, as shown in FIGS. 20A to 20D, the bright display pixels and the dark display pixels are alternately arranged. The screen cannot be discriminated visually, and screen roughness is avoided. Also, since the positive dark display pixels, the positive bright display pixels, the negative dark display pixels, and the negative bright display pixels are alternately arranged in the horizontal direction and the vertical direction, flicker and liquid crystal for each line Flickering of the entire display panel is avoided.

  Further, if one pixel is focused on, it changes such as a positive dark display, a positive bright display, a negative dark display, and a negative bright display for each frame, so that no direct current component remains in the liquid crystal. The occurrence of burn-in is avoided.

  Furthermore, it is possible to set a large gradation difference between the bright display pixel and the dark display pixel (see FIG. 11), and the phenomenon that the viewing angle characteristic is improved and the screen becomes whitish when viewed from an oblique direction ( Can be suppressed.

(Modification 1)
In order to realize the driving method as shown in FIG. 20, it is necessary to prepare a driver IC (Integrated Circuit) for inverting the polarity every two lines with respect to the data bus line 118. However, most of the driver ICs currently used either apply a reverse polarity voltage to adjacent data bus lines or apply a same polarity voltage to all data bus lines. . It is also conceivable to newly design a driver IC that generates a polarity pattern as shown in FIG. However, in this case, the versatility of the driver IC is lost, and the manufacturing cost of the liquid crystal display device is increased.

  In the first modification, therefore, a conventional general-purpose driver IC is used, and driver ICs 151 and 152 are arranged on the upper side and the lower side of the liquid crystal display panel 107 as shown in FIG. The upper driver IC 151 drives the odd-numbered data bus lines 118, and the lower driver IC 152 drives the even-numbered data bus lines 118. These driver ICs 151 and 152 drive the liquid crystal display panel 107 with the bright and dark display patterns and the polarity patterns as shown in FIGS.

  As a result, a general-purpose driver IC that is currently available can be used, and an increase in the manufacturing cost of the liquid crystal display device can be avoided.

(Modification 2)
FIG. 22 is a schematic diagram illustrating a liquid crystal display device according to a second modification. Also in the second modification, a general-purpose driver IC 153 is used. In the second modification, the data bus lines 118 arranged in the horizontal direction are divided into four groups from the left end side to form groups, and the data bus lines 118 of each group are second from the left (4k + 2: where k is A natural number including 0) and the third (4k + 3) metal wiring 161 are crossed and connected to the data bus line 118. That is, the 4k + 1th metal wiring 161 is connected to the 4k + 1th data bus line 118, the 4k + 2nd metal wiring 161 is connected to the 4k + 3th data bus line 118, and the 4k + 3rd metal wiring 161 is 4k + 2nd data bus. The 4k + 4th metal wiring 161 is connected to the line 118 and is connected to the 4k + 4th data bus line 118. Hereinafter, when connecting the metal wirings arranged in this order and the data bus lines arranged in order, connecting the metal wirings and the data bus lines in different orders is referred to as replacement of wirings in the present specification. .

  Thus, using a general-purpose driver IC currently on the market, horizontal 1-dot inversion / vertical 1-dot inversion light / dark display pattern, horizontal 2-dot inversion / vertical 2 as shown in FIGS. The liquid crystal display panel 107 can be driven with a dot inversion polarity pattern.

  FIG. 23A is a plan view showing an example of the connection between the wiring on the driver IC side and the data bus line, and FIG. 23B is a schematic sectional view of the same. In this example, the metal wiring 161 connected to the output terminal of the driver IC is formed of the same layer (first metal film) as the gate bus line 112, and the ITO wiring 165 formed simultaneously with the pixel electrode makes the 4k + 1th. Metal wiring 161 and 4k + 1th data bus line 118, 4k + 2nd metal wiring 161 and 4k + 3rd data bus line 118, 4k + 3rd metal wiring 161 and 4k + 2nd data bus line 118, 4k + 4th metal wiring 161 and 4k + 4 The second data bus line 118 is electrically connected to each other. In this case, as shown in FIG. 23A, the 4k + 2th metal wiring 161 and the 4k + 2nd data bus line 118 intersect when viewed from above.

  FIG. 24A is a plan view showing another example of the connection between the metal wiring 161 and the data bus line 118. In this example, the ITO wiring 165 is formed side by side in the horizontal direction. The 4k + 2nd metal wiring 161 on the driver IC side is connected to the 4k + 3rd ITO wiring 165, the 4k + 3rd metal wiring 161 bypasses the 4k + 3rd ITO wiring 165, and the end of the 4k + 3rd data bus line 118. Is connected to the 4k + 2nd ITO wiring 165.

  FIG. 24B is a plan view showing still another example of the connection between the metal wiring 161 and the data bus line 118. In this example, an ITO wiring 165 connecting the 4k + 3rd metal wiring 161 and the 4k + 2th data bus line 118 is formed to extend in an oblique direction, and the k + 2th metal wiring 161 is formed below the ITO wiring 165. And is connected to the (k + 3) th data bus line 118.

  FIGS. 23A, 23B, 24A, and 24B show examples in which the wiring is exchanged using the metal wiring 161 and the ITO wiring 165 formed on the TFT substrate. However, the wiring may be replaced in a flexible substrate that connects the driver IC and the liquid crystal display panel 107.

Further, if the wiring is replaced as described above, the original order of signals and the order of signals inside the liquid crystal display panel are different. Therefore, for example, good display is possible by switching display signals in the driver IC. For example, when receiving data for 3 pixels of RGB in 1 clock, input data for 12 pixels in 4 clocks,
RGB, RGB, RGB, RGB, ...
RBG, RGR, BGB, GRB, ...
Thus, it is necessary to replace the second and third display signals, the sixth and seventh display signals, and the tenth and eleventh display signals.

  Also, for LCD panels, repair wiring that allows the upper and lower parts of the data bus line to be connected to repair the panel when a defect such as a disconnection occurs in the data bus line. Is provided. In the liquid crystal display panel thus provided with the pair wiring, as schematically shown in FIG. 25A, the terminal replacement unit 171 is arranged in a portion closer to the driver IC (upper side in the drawing) than the repair wiring 175. It is preferable. When the terminal replacement part is arranged between the repair wiring and the display part, as schematically shown in FIG. 25B, the upper repair wiring 175 and the display part, and the lower repair wiring 175 are arranged. It is preferable to arrange the terminal replacement part 171 between the display part and the display part. Thereby, correspondence with an upper repair part and a lower repair part becomes easy.

  Hereinafter, various aspects of the present invention will be collectively described as supplementary notes.

(Appendix 1) A plurality of pixels arranged in the horizontal direction and the vertical direction;
In a driving method of a liquid crystal display device having a display signal supply unit that inputs a video signal and supplies a display signal to each of the plurality of pixels,
The display signal supply unit supplies a first display signal having a higher gradation than the gradation of the video signal to provide a bright display pixel for bright display and a gradation lower than the gradation of the video signal. A light / dark display pattern indicating an arrangement of dark display pixels that are darkened by supplying a second display signal; a positive pixel that supplies a positive display signal; and a negative pixel that supplies a negative display signal; And determining the gradation and polarity of the display signal supplied to each pixel based on the polarity pattern indicating the arrangement of
The bright and dark display pattern is a pattern in which the bright display pixels and the dark display pixels are alternately arranged for each pixel in a horizontal direction and a vertical direction,
The polarity pattern is a pattern in which the positive polarity pixels and the negative polarity pixels are alternately arranged every 2 × n (where n is an integer of n> 0) in the horizontal direction and the vertical direction. For driving a liquid crystal display device.

  (Supplementary note 2) The method for driving a liquid crystal display device according to supplementary note 1, wherein the bright display pixel and the dark display pixel are switched every frame.

  (Supplementary note 3) The driving method of the liquid crystal display device according to supplementary note 1, wherein the positive polarity pixel and the negative polarity pixel are switched every frame.

  (Supplementary note 4) Each of the plurality of pixels has 2 × n (where n is n> 0) in four states of positive bright display, positive dark display, negative bright display, and negative dark display. The driving method of the liquid crystal display device according to appendix 1, wherein transition is performed in a certain order for each frame.

  (Supplementary note 5) The difference between the gradation of the first display signal and the gradation of the second display signal is determined according to the gradation of the video signal. A driving method of a liquid crystal display device.

  (Supplementary note 6) The liquid crystal display device according to supplementary note 1, wherein the pixel includes a pixel electrode, a counter electrode, and a vertical alignment type liquid crystal between the pixel electrode and the counter electrode. Driving method.

(Appendix 7) A liquid crystal display panel in which a plurality of pixels are arranged;
A plurality of gate bus lines and a plurality of data bus lines formed in the liquid crystal display panel and connected to the pixels;
A display controller that inputs video signals and outputs display signals;
A gate driver for sequentially supplying a scanning signal to the plurality of gate bus lines;
A first data driver for supplying a display signal to odd-numbered data bus lines;
A second data driver for supplying a display signal to the even-numbered data bus line, and the display controller applies the two or more pixels to the plurality of pixels via the first and second data drivers. A liquid crystal display device characterized by supplying display signals having different polarities and different gradations for each pixel.

  (Supplementary Note 8) One of the display signals supplied to pixels adjacent in the horizontal direction and the vertical direction is a signal having a higher gradation than the gradation of the video signal, and the other is a gradation higher than the gradation of the video signal. Item 8. The liquid crystal display device according to appendix 7, wherein the liquid crystal display device is a low gradation signal.

  (Supplementary note 9) The liquid crystal display device according to supplementary note 7, wherein the pixel includes a pixel electrode, a counter electrode, and a vertical alignment type liquid crystal between the pixel electrode and the counter electrode.

  (Supplementary note 10) The liquid crystal display device according to supplementary note 7, wherein the first and second data drivers are formed at positions sandwiching a display unit of the liquid crystal display panel.

(Appendix 11) A liquid crystal display panel in which a plurality of pixels are arranged;
A plurality of gate bus lines and a plurality of data bus lines formed in the liquid crystal display panel and connected to the pixels;
A display controller that inputs video signals and outputs display signals;
A gate driver for sequentially supplying a scanning signal to the plurality of gate bus lines;
A data driver for supplying a display signal to the plurality of data bus lines;
Wiring switching for supplying signals output from the 4k + 1, 4k + 2, 4k + 3 and 4k + 4 (where k is a natural number including 0) output terminals of the data driver to the 4k + 1, 4k + 3, 4k + 2 and 4k + 4th data bus lines, respectively. A liquid crystal display device.

  (Supplementary Note 12) A wiring connected to the output terminal of the data driver is formed in the same layer as the gate bus line, and the wiring switching unit is configured by a wiring of a transparent conductor formed in the same layer as the pixel electrode of the pixel. Item 12. The liquid crystal display device according to appendix 11, wherein

  (Additional remark 13) It has the repair wiring which can connect the both ends of the said data bus line electrically, and the said wiring switch part is formed between the output terminal of the said data driver, and the said repair wiring, It is characterized by the above-mentioned. The liquid crystal display device according to appendix 11.

  (Supplementary note 14) The liquid crystal display device according to supplementary note 11, wherein the pixel includes a pixel electrode, a counter electrode, and a vertical alignment type liquid crystal between the pixel electrode and the counter electrode.

10, 110 ... TFT substrates 12, 56, 121 ... pixel electrodes,
12a, 56a, 121a ... slit (domain regulating structure)
13, 23, 71, 135 ... projections (domain regulating structure),
14, 24 ... vertical alignment film,
20, 130 ... counter substrate,
22, 134 ... common electrode,
30, 140 ... Liquid crystal,
40, 107 ... liquid crystal display panel,
51, 112 ... gate bus lines,
52, 113 ... Auxiliary capacity bus line,
53, 119 ... Auxiliary capacitance electrode,
54, 117 ... TFT,
55, 118 ... data bus line,
81a to 81d ... subpixel electrodes,
82a-82d ... control electrode,
100 ... Liquid crystal display device,
101 ... Timing controller,
102 ... Polar pattern generator,
103. Light / dark display pattern generation unit,
104 ... Liquid crystal display controller,
105: Data driver,
106: gate driver,
111, 131 ... glass substrate,
114, 120 ... insulating film,
132: Black matrix (light-shielding film),
133 ... color filter,
151, 152, 153 ... driver ICs,
161: metal wiring,
165: ITO wiring.

Claims (6)

A liquid crystal display panel in which a plurality of pixels are arranged;
A plurality of gate bus lines and a plurality of data bus lines formed in the liquid crystal display panel and connected to the pixels;
A display controller that inputs video signals and outputs display signals;
A gate driver for sequentially supplying a scanning signal to the plurality of gate bus lines;
A data driver for supplying a display signal to the plurality of data bus lines;
Of the 4k + 1, 4k + 2, 4k + 3 and 4k + 4 (where k is a natural number including 0) output terminals of the data driver, the signals output from the 4k + 2 and 4k + 3 output terminals are 4k + 3 and 4k + 2 respectively. A liquid crystal display device comprising: a wiring switching portion for supplying a second data bus line.   The wiring switching unit supplies signals output from the 4k + 1th and 4k + 4th output terminals of the data driver to 4k + 1th and 4k + 4th data bus lines, respectively. Liquid crystal display device. A liquid crystal display panel in which a plurality of pixels are arranged;
A plurality of gate bus lines and a plurality of data bus lines formed in the liquid crystal display panel and connected to the pixels;
A display controller that inputs video signals and outputs display signals;
A gate driver for sequentially supplying a scanning signal to the plurality of gate bus lines;
A data driver for supplying a display signal to the plurality of data bus lines;
Each of the plurality of data bus lines is provided in each group divided into a plurality of lines, and at least two of the data bus lines of the group are arranged in an order different from the order in which the groups are arranged. A liquid crystal display device comprising: a wiring switching unit connected to an output terminal of the data driver.   4. The liquid crystal display device according to claim 3, wherein the order of the data bus lines and the order of the output ends of the data drivers exchanged by the wiring switching unit of each group are the same.   The number of the data bus lines connected to the output terminal of the data driver via the wiring switching unit is the number of the data bus lines connected to the output terminal of the data driver without going through the wiring switching unit. 5. The liquid crystal display device according to claim 3, wherein the liquid crystal display device is the same. A liquid crystal display panel in which a plurality of pixels are arranged;
A plurality of gate bus lines and a plurality of data bus lines formed in the liquid crystal display panel and connected to the pixels;
A display controller that inputs video signals and outputs display signals;
A gate driver for sequentially supplying a scanning signal to the plurality of gate bus lines;
A first data driver for supplying a display signal to odd-numbered data bus lines;
A second data driver that supplies a display signal to the even-numbered data bus line, and the display controller applies the two or more pixels to the plurality of pixels via the first and second data drivers. A liquid crystal display device characterized by supplying display signals having different polarities and different gradations for each pixel.

Images