JP2010197871A - Image display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image display device capable of quickly and visibly outputting image signals of a plurality of frames in accordance with the input of the image signals of the plurality of frames from the outside, and also capable of improving the image quality. <P>SOLUTION: The image display device includes a plurality of pixel circuits each of which has a light-emitting element, a potential setting part which sets a potential corresponding to an image signal to each pixel circuit, and a voltage supply part which supplies a power source voltage to the plurality of pixel circuits from one end side of a light-emitting region via a common power line to cause the plurality of light-emitting elements to emit light simultaneously. In this image display device, first-order terms and second-order terms relating to variables showing the positions of respective pixel circuits and terms of a trigonometric function corresponding to variations of the power source voltage due to difference of predictive currents are used to calculate an approximation formula showing predictive amounts of drop of the power source voltage in accordance with predictive currents in respective pixel circuits based on the image signal, and each image signal is corrected in accordance with each predictive amount of drop on the basis of the approximation formula. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an image display device.

  2. Description of the Related Art An image display device having a thin film transistor (TFT) formed of amorphous or polycrystalline silicon or the like and a current control type light emitting element such as an organic light emitting diode (OLED) in each pixel circuit is known. In this image display device, different currents corresponding to image signals flow through the pixel circuits, thereby realizing light emission with a desired luminance in each pixel circuit.

  In such an image display device, a plurality of pixel circuits each having a light emitting element are arranged in a matrix, and a power supply line is commonly connected to the pixel circuits for each row. Since each power supply line has an electric resistance, the voltage applied to each pixel circuit via the power supply line changes based on the electric resistance and the flowing current. For example, in a configuration in which a driver (power supply driver) that supplies a power supply voltage to each pixel circuit is connected to a plurality of pixel circuits via a common power supply line, the pixel circuit far from the power supply driver The more power is supplied, the lower the power supply voltage supplied. Accordingly, the farther away the pixel circuit is from the driver, the lower the emission brightness of the OLED from the desired emission brightness, causing problems such as uneven brightness and crosstalk in the displayed image, leading to a reduction in image quality.

  Therefore, a technique for correcting an image signal supplied to each image signal line so as to compensate for such a voltage drop due to electric resistance has been proposed (for example, Patent Documents 1 to 5).

  Here, a method for calculating the voltage drop amount according to the technique of Patent Document 1 will be described.

  Here, the first, second, third,..., Nth pixel circuits arranged in order from the left side of the display panel are electrically connected to a common power supply line in this order. And The horizontal X coordinate of the first pixel circuit arranged on the leftmost side of the display panel is 0, the horizontal X coordinate of the Nth pixel circuit arranged on the rightmost side of the display panel is 1, and each X Let i (x) be the current (current distribution) flowing according to the power supply voltage in the pixel circuit at the coordinate, and r be the electrical resistance of the power supply line in the pixel circuit at each X coordinate. Also, let R be the electrical resistance of the power supply line from the power supply driver to the pixel circuit whose X coordinate is 0.

  First, the drop rate (voltage drop rate) δV (x) of the power supply voltage generated in the pixel circuit whose X coordinate is x is the current that flows in accordance with the power supply voltage in each pixel circuit from the X coordinate from x to 1. Is multiplied by the electric resistance r, and is expressed by the following formula (1).

  The power supply voltage drop amount (voltage drop amount) V (x) generated in the power supply line from the pixel circuit having the X coordinate of 0 to the pixel circuit having the X coordinate of x is expressed by the following equation (2). Indicated.

  As shown in the above equation (2), the voltage drop amount V (x) is obtained by integrating the voltage drop rate δV (x) with respect to the section where the X coordinate is 0 to x and the current distribution i (x) as X It is shown as the sum of the value obtained by integrating the value obtained by integrating the electric resistance R with respect to the interval of coordinates 0 to 1.

JP 2005-10319 A JP 2004-109191 A JP 2004-245955 A JP 2006-301556 A JP 2005-62337 A

  However, in the technique of Patent Document 1 described above, the amount of calculation for calculating the voltage drop amount V (x) in each pixel circuit is very large with a double integration operation. For this reason, the image signal cannot be corrected in a short time according to the voltage drop amount, and the image signal of the plurality of frames is quickly output visually in response to the input of the image signal of the plurality of frames from the outside. I can't. Therefore, it is necessary to display a moving image after correcting a plurality of frames constituting the moving image in advance. Furthermore, in order to perform such a double integration operation, a relatively large capacity memory is also required. Also, in the techniques of Patent Documents 2 to 4, as in Patent Document 1, the amount of calculation for correcting the image signal related to each pixel is very large, causing the same problems as in Patent Document 1. . Furthermore, in the technique of Patent Document 5, the image signal related to each pixel circuit constituting each column of the pixel circuit is not finely corrected according to the degree of the voltage drop, and the problem of image quality deterioration remains.

  The present invention has been made in view of the above-described problems, and aims to quickly and visually output a plurality of frames of image signals in response to an input of a plurality of frames of image signals from the outside, and to improve image quality. An object of the present invention is to provide an image display device capable of performing the above.

  In order to solve the above problem, an image display device according to a first aspect includes a plurality of pixel circuits each having a light emitting element, a potential setting unit that sets a potential according to an image signal in each of the pixel circuits, By supplying a power supply voltage to the plurality of pixel circuits through a common power supply line from one end side of the light emitting region where the plurality of pixel circuits are arranged, the plurality of light emitting elements included in the plurality of pixel circuits are simultaneously connected. A voltage supply unit that emits light. Further, the image display device includes first and second order terms relating to a variable indicating a position of each pixel circuit according to a predicted current in each pixel circuit based on an image signal corresponding to each pixel circuit; An approximate expression for calculating an approximate expression indicating the predicted drop amount of the power supply voltage supplied to each of the pixel circuits, using a term of a trigonometric function corresponding to the fluctuation of the power supply voltage due to the magnitude of each predicted current. A calculation unit is provided. The image display device further includes a signal correction unit that performs correction on each of the image signals based on the estimated drop amount based on the approximate expression.

  According to the present invention, it is possible to compensate for a drop in the power supply voltage caused by the electrical resistance of the power supply line with a relatively small amount of computation. The signal can be output quickly and the image quality can be improved.

It is a figure which shows the functional structure of the image display apparatus which concerns on one Embodiment. It is a circuit diagram which shows the structure of one pixel circuit which concerns on one Embodiment. It is a circuit diagram of a pixel circuit in which parasitic capacitance and the capacitance of an organic EL element are clearly shown. 3 is a timing chart illustrating an operation of a pixel circuit. It is a circuit diagram which shows operation | movement of a pixel circuit. It is a circuit diagram which shows operation | movement of a pixel circuit. It is a circuit diagram which shows operation | movement of a pixel circuit. It is a circuit diagram which shows operation | movement of a pixel circuit. It is a figure which shows the electric power feeding method with respect to the pixel circuit which concerns on one Embodiment. It is a figure which illustrates the amount of power supply voltage fall for every horizontal line. It is a figure which shows the relationship between the drain voltage and drain current of a drive transistor. It is a figure which shows the functional structure of the signal processing part which concerns on one Embodiment. It is a figure which shows the functional structure of a constant and a coefficient derivation | leading-out part. It is a figure which shows the electric power feeding method with respect to the pixel circuit which concerns on one modification. It is a figure which shows the electric power feeding method with respect to the pixel circuit which concerns on one modification. It is a figure which shows the functional structure of the signal processing part which concerns on one modification. It is a circuit diagram which shows the structure of one pixel circuit which concerns on one modification.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

<Configuration of image display device>
An image display device 1 shown in FIG. 1 is a device (organic EL device) that uses light emission of an organic light emitting diode, and includes a control unit 2, a panel unit 3, and a power supply circuit 4. Here, an example will be described in which the image signal is composed of signals relating to the three primary colors of red (R), green (G), and blue (B).

  The control unit 2 includes a signal processing unit 20, a storage unit 21, and a timing generator (TG) 22.

  The signal processing unit 20 processes the input image signal and gives the processed image signal to the X driver circuit 32 as an output image signal. The storage unit 21 is configured by a non-volatile memory or the like, and stores data or the like necessary for processing in the signal processing unit 20. The TG 22 gives a signal for controlling the drive timing to the Y driver circuit 31 and the X driver circuit 32 in accordance with the vertical and vertical synchronization signals of the image signal. Part of the signal processing unit 20 and the TG 22 may be realized by a dedicated hardware configuration, or may be functionally realized by executing a program by a CPU or the like.

  The panel unit 3 includes an organic EL display unit 30, a Y driver circuit 31, and an X driver circuit 32.

  The organic EL display unit 30 is an organic EL display (organic electroluminescence display) having a substantially rectangular outline, and is a self-luminous light emitting element (here, an organic light emitting diode) that emits light by flowing current through the organic material. ) Is configured as a display unit (self-luminous display unit). In the organic EL display unit 30, a large number of pixel circuits 301 are arranged in a matrix.

  The pixel circuits 301 include a pixel circuit 301 having a light emitting element that emits red light, a pixel circuit 301 having a light emitting element that emits green light, and a pixel circuit 301 having a light emitting element that emits blue light. It is constituted by. Each color pixel circuit 301 corresponds to a so-called sub-pixel, and there is one pixel circuit group including one pixel circuit 301 related to red, one pixel circuit 301 related to green, and one pixel circuit 301 related to blue. Corresponds to a pixel.

  The organic EL display unit 30 is provided with a plurality of image signal lines L2 (see FIG. 2) for supplying an output image signal corresponding to the light emission luminance to each pixel circuit 301. The image signal line L2 is connected to each of a plurality of pixel circuits 301 arranged in the vertical direction. The organic EL display unit 30 is provided with a plurality of scanning signal lines L4 (see FIG. 2) that are substantially orthogonal to the plurality of image signal lines L2. Here, one scanning signal line L4 is provided for each pixel column (horizontal line) composed of a plurality of pixel circuits arranged in the horizontal direction, and a scanning signal is sequentially supplied to each scanning signal line L4. . Note that the scanning signal is a signal that controls the timing at which the potential corresponding to the output image signal is set in each pixel circuit 301 via the image signal line L2.

Further, the organic EL display unit 30 performs an operation (hereinafter referred to as “threshold voltage compensation operation”) for compensating for variations in the threshold voltage V _th of the drive transistor T _d (see FIG. 2) included in each pixel circuit 301. Therefore, a compensation control line L3 (see FIG. 2) for supplying a signal necessary for this is provided. Further, the organic EL display unit 30 is provided with a merge line L5 (see FIG. 2) for supplying a signal necessary for switching a state of a second switching transistor described later. Further, the organic EL display unit 30 is provided with a power supply line L1 (see FIG. 2) for supplying a voltage necessary for light emission between both electrodes of the organic light emitting diode OLED (see FIG. 2) included in each pixel circuit 301. Yes. One power line L1 is provided for each horizontal line.

  The Y driver circuit 31 is provided along one side (the left side in FIG. 1) along the vertical direction of the organic EL display unit 30, and in accordance with a signal from the TG 22, the power supply line L1, the compensation control line L3, and the scanning A potential is applied to the signal line L4 and the merge line L5. The Y driver circuit 31 is provided with a plurality of output circuits 311 for supplying a power supply voltage to the power supply line L1. Note that the power supply voltage is supplied from the power supply circuit 4 to the Y driver circuit 31, and the power supply voltage is supplied from each output circuit 311 to the plurality of pixel circuits 301 via the power supply line L1.

  The X driver circuit 32 is provided along one side (the upper side in FIG. 1) along the horizontal direction of the organic EL display unit 30, and outputs an output image signal to each image signal line L2 in accordance with a signal from the TG 22. Control the timing of supply. The X driver circuit 32 as a potential setting unit sets a potential corresponding to the output image signal in each pixel circuit 301.

<Configuration of pixel circuit>
As shown in FIG. 2, the pixel circuit 301 includes an organic light emitting diode OLED, a driving transistor T _d , a compensation transistor T _th , a first switching transistor T _s , a second switching transistor T _m , and a capacitor C1. Yes. Hereinafter, the driving transistor T _d , the compensation transistor T _th , the first switching transistor T _s , and the second switching transistor T _m are appropriately abbreviated as “transistors”, and here, the transistors T _d and T _th are referred to as “transistors”. , T _s , T _m will be described using an example in which NMOS transistors are used.

The organic light emitting diode OLED has an input terminal grounded and an output terminal electrically connected to the power supply line L1 via the transistor _Td .

As for the transistor T _d , the gate and the drain are electrically connected via the transistor T _th for compensating for the shift in the threshold voltage of the gate voltage of the transistor T _d . Further, the gate of the transistor _Td is electrically connected to one electrode of the capacitor C1. The other electrode of the capacitor C1, together are electrically connected to the image signal line L2 via the transistor T _s, and is electrically connected to the power supply line L1 via the transistor T _m. Note that the capacitor C1 accumulates electric charge through the transistor _Tth , so that a potential corresponding to the electric charge can be reflected in the gate voltage of the transistor _Td .

Further, the gate of the transistor T _th is electrically connected to the compensation control line L3, the gate of the transistor T _s is electrically connected to the scanning signal line L4, and the gate of the transistor T _m is merged. It is electrically connected to the line L5. Hereinafter, the power supply line L1, the image signal line L2, the compensation control line L3, the scanning signal line L4, and the merge line L5 are collectively referred to as “wiring” as appropriate.

FIG. 3 clearly shows the parasitic capacitance of the transistor (parasitic capacitor) and the capacitance of the organic light emitting diode OLED (OLED capacitor) with respect to the circuit diagram of the pixel circuit 301 shown in FIG. As shown in FIG. 3, in the organic light emitting diode OLED, when a voltage is applied in a direction opposite to that during light emission, an OLED capacitor C _oled is generated between the input terminal and the output terminal. In the transistor _Td , a parasitic capacitor C4 is generated between the gate and the drain, and a parasitic capacitor C5 is generated between the gate and the source. In the transistor T _th , a parasitic capacitor C2 is generated between the gate and the drain, and a parasitic capacitor C3 is generated between the gate and the source.

<Operation of pixel circuit>
FIG. 4 is a timing chart showing the operation of the pixel circuit 301. In FIG. 4, among the plurality of pixel circuits 301 included in the image display device 1, potentials applied from the wirings L1 to L5 to the nth (natural number) row and the (n + 1) th row (that is, adjacent to each other). The potential applied to each of the two rows of pixel circuits 301) is illustrated.

As shown in FIG. 4, an operation period (unit frame period) for visually outputting an image signal for one frame in the pixel circuit 301 in one row includes a preparation period T1 and a transistor _Td . It has a period T2 for detecting the threshold voltage _Vth , a period T3 for writing, and a period T4 for light emission. Further, in the pixel circuit 301 in the n-th row and the pixel circuit 301 in the (n + 1) -th row, the unit frame period is shifted by a period corresponding to the period T3. By repeating this unit frame period while changing the potential of the image signal (in other words, changing the potential of the image signal line L2), display of a moving image is realized.

  Hereinafter, the operation of the pixel circuit 301 in the periods T1 to T4 in FIG. 4 will be described with reference to FIGS. Note that at the start of the period T1, charge is accumulated in the capacitor C1 in the period T4 of the previous frame.

First, in the period T1, as shown in Figure 4, the transistor T _s, the gate of T _th is set to a low potential (e.g., 0V) V _gL, transistor T _s, T _th is no current state ( Non-conducting state). In addition, since the gate of the transistor T _m is set to the positive high potential V _gH , the transistor T _m enters a state in which current flows (conduction state). At this time, due to the electric charge accumulated in the capacitor C1, the gate potential with respect to the source potential in the transistor _Td , that is, the gate voltage _Vgs becomes higher than the threshold voltage _Vth , so that the transistor _Td becomes conductive. Therefore, as shown in FIG. 5, electric charge is supplied from the power supply line L1 set to the positive high potential V _p to the OLED capacitor C _oled through the transistor T _d in the conductive state, and the OLED capacitor C _oled The charge is accumulated in the.

Next, in the period T2, as shown in Figure 4, the gate of the transistor T _s is set to the low potential V _gL, the transistor T _s is set to a non-conductive state. Since the transistor T _m, the gate of T _th is set to a positive high potential V _gH, transistor T _m, T _th is respectively conducting state. At this time, the transistor _Td is electrically connected between the gate and the drain via the transistor _Tth which is in a conductive state. Therefore, as shown in FIG. 6, until the gate voltage V _gs of the transistor T _d reaches the threshold voltage V _th , the electric charge accumulated in the capacitor C1 and the OLED capacitor C _oled is the power line whose potential is set to 0V. Exit to L1. When the gate voltage V _gs of the transistor T _d reaches the threshold voltage V _th, the transistor T _d becomes non-conductive.

Next, in the period T3, as shown in Figure 4, the transistor T _s, the gate of T _th is set to a positive high potential V _gH, transistor T _s, T _th is turned. Meanwhile, since the gate of the transistor T _m is set to the low potential V _gL, transistor T _m is turned off. At this time, the other electrode of the capacitor C1 is electrically connected to the image signal line L2 set to the potential (−V _data ) through the transistor T _s which is in a conductive state, and thus is shown in FIG. As described above, the electric charge accumulated in the OLED capacitor C _oled moves to the capacitor C1. At this time, the transistor _Td is maintained in a non-conductive state. In this manner, in the period T3, in each pixel circuit 301, the electric charge according to the output image signal is accumulated in the capacitor C1, so that the potential according to the output image signal is set to the gate of the transistor _Td. The

Next, in period T4, the as shown in Figure 4, the transistor T _s, the gate of T _th is set to a low potential V _gL, transistor T _s, T _th is turned off. Meanwhile, since the gate of the transistor T _m is set to the high potential V _gH, transistor T _m becomes conductive. At this time, since the gate voltage V _gs of the transistor T _d becomes higher than the threshold voltage V _th, the transistor T _d becomes conductive. Therefore, as shown in FIG. 8, a current flows from the ground line to the power supply line L1 set to a negative potential (−V _DD , where V _DD > 0V) via the transistor T _d in the conductive state. The organic light emitting diode OLED emits light.

In this manner, in each pixel circuit 301, the potential according to the output image signal is applied to the gate of the transistor _Td , whereby the current flowing through the organic light emitting diode OLED is adjusted by the transistor _Td , The organic light emitting diode OLED emits light.

<Reduction in power supply voltage in image display device>
As shown in FIG. 9, the panel unit 3 is provided with one power supply line L1 for each horizontal line and an output circuit 311 for supplying a power supply voltage to the power supply line L1. Specifically, one output circuit 311 as a voltage supply unit is shared from one end side (herein, the left end side) of an area (hereinafter also referred to as “light emitting area”) in which a plurality of pixel circuits 301 are arranged. A power supply voltage is supplied to the plurality of pixel circuits 301 included in one horizontal line via the power supply line L1. In the plurality of pixel circuits 301 constituting one horizontal line, the organic light emitting diodes OLED included in the plurality of pixel circuits 301 simultaneously emit light in response to the supply of the power supply voltage from the output circuit 311.

By the way, since the power supply line L1 has a so-called electric resistance, the power supply voltage supplied to each pixel circuit 301 is reduced in each power supply line L1 based on the current flowing along with the light emission of each pixel circuit 301. That is, the potential applied from the power supply line L1 differs for each pixel circuit 301. In the present embodiment, the negative potential (−V _DD ) applied to the power supply line L1 decreases, so that the power supply voltage applied between the input terminal of the organic light emitting diode OLED and the source of the transistor _Td decreases. To do.

  FIG. 10 is a diagram illustrating the amount of power supply voltage drop for each horizontal line. In FIG. 10, the horizontal axis indicates the horizontal position with respect to one end (here, the left end) of the organic EL display unit 30, and the vertical axis indicates the power supply voltage supplied to one end side of the organic EL display unit 30. The amount of power supply voltage drop is shown. Here, the coordinate (X coordinate) indicating the position of the pixel circuit 301 arranged on the leftmost side of the horizontal line is 0, and the coordinate (X) indicating the position of the pixel circuit 301 arranged on the rightmost side of the horizontal line is shown. Coordinates) are set to 1. In FIG. 10, the relationship between the horizontal position of the pixel circuit 301 and the amount of power supply voltage drop is indicated by curves (here, solid line, broken line, one-dot chain line, two-dot chain line) for four horizontal lines. ing.

As shown in FIG. 10, in each horizontal line, the further away from the output circuit 311, that is, the farther away from the Y driver circuit 31, the lower the power supply voltage supplied to the pixel circuit 301. However, in the pixel circuit 301 shown in FIG. 2, in the period T4, the order the other electrode of the capacitor C1 is electrically connected to the power supply line L1 via the transistor T _m, the potential of the power supply line L1 varies Even so, the gate voltage V _gs of the transistor T _d does not change.

However, as the potential of the power supply line L1 increases, that is, as the power supply voltage supplied to the pixel circuit 301 decreases, the voltage between the source and drain with respect to the source of the transistor _Td (so-called drain voltage) decreases. To do. As the drain voltage decreases, the current (drain current) flowing through the transistor _Td decreases as shown in FIG. As a result, the light emission luminance of the organic light emitting diode OLED is lowered from the desired light emission luminance. Accordingly, in the period T4, the left side of the organic EL display unit 30 tends to be bright and the right side is dark, and luminance unevenness is visually recognized. Further, as shown in FIG. 10, the manner in which the power supply voltage decreases differs for each horizontal line depending on the output image signal.

  In response to such a problem, the image display device 1 corrects the image signal in accordance with the amount of power supply voltage drop described above, thereby reducing the influence of the power supply voltage drop. That is, compensation processing for a drop in power supply voltage is performed. This compensation process prevents problems such as luminance unevenness and crosstalk (a dark band appears in the horizontal direction of the high-luminance portion) in the displayed image. Hereinafter, a compensation process for a drop in the power supply voltage will be described.

<Compensation for power supply voltage drop>
In the present embodiment, the signal processing unit 20 derives an approximate expression indicating the amount of power supply voltage drop from the input image signal, and for each pixel circuit 301, the amplification factor μ of the transistor _Td according to the potential of the input image signal. Then, the correction value is determined by dividing the power supply voltage drop, and the correction value is added to the potential of the input image signal after so-called gamma conversion to generate an output image signal. By such processing, compensation processing for a drop in the power supply voltage is realized.

  Here, (A) a method of deriving an approximate expression indicating the predicted drop amount of the power supply voltage from the input image signal (a method of deriving an approximate expression of the predicted voltage drop amount), (B) a correction value determining method, and ( C) The functional configuration of the signal processing unit 20 will be described sequentially.

<(A) Method for Deriving Approximate Equation for Predicted Voltage Drop>
Here, each of the first, second, third,..., And Nth pixels arranged in order from one end side (here, the left end side) where the Y driver circuit 31 of the organic EL display unit 30 is provided. The corresponding pixel circuit groups are electrically connected to the common power supply line L1 in this order. The horizontal X coordinate of the first pixel circuit group arranged on the left end side of the organic EL display unit 30 is 0, and the Nth pixel circuit group arranged on the right end side of the organic EL display unit 30 is The horizontal X coordinate is 1, the current (current distribution) that flows in accordance with the power supply voltage during light emission in each X coordinate pixel circuit group is i (x), and the electric resistance of the power supply line L1 in each X coordinate pixel circuit group is Let r. Also, let R be the electrical resistance of the power supply line L1 from the Y driver circuit 31 to the pixel circuit group whose X coordinate is 0.

  First, the power supply voltage drop generated in the pixel circuit group whose X coordinate is x, that is, the voltage drop rate (voltage drop rate) δV (x) is the pixel circuit group from X to 1 in the X coordinate. The value obtained by integrating the electric current flowing according to the power supply voltage is multiplied by the electric resistance r, and is expressed by the following equation (1).

  Then, a power supply voltage drop amount (predicted voltage drop amount) V (x predicted to occur in the power supply line L1 from the pixel circuit group having the X coordinate of 0 to the pixel circuit group having the X coordinate of x. ) Is represented by the following formula (2).

  As shown in the above equation (2), the predicted voltage drop amount V (x) is obtained by integrating the voltage drop rate δV (x) with respect to the section where the X coordinate is 0 to x, and the current distribution i (x). And the value obtained by multiplying the value obtained by integrating the electric resistance R with respect to the section in which the X coordinate is 0 to 1 as a sum. The current distribution i (x) is approximately expressed by the following expression (3) using a Fourier series.

As shown in the above equation (3), the current distribution i (x) includes the DC component DC of the current distribution i (x) and the terms of the first, second, and third order sine functions relating to the variable x, , Approximately by the terms of the first, second and third order cosine functions for the variable x. In the above equation (3), the coefficients of the first, second, and third order sine function terms relating to the variable x are indicated by S ₁ , S ₂ , and S ₃ , respectively. The coefficients of the second and third order cosine function terms are denoted by C ₁ , C ₂ , and C ₃ , respectively. Here, by representing the current distribution i (x) approximately using a Fourier series, integration of the current distribution i (x) is facilitated, and the calculation is simplified.

  The direct current component DC of the above equation (3) is obtained by the sum of currents flowing through all the pixel circuits 301 included in one horizontal line. That is, as shown by the following equation (4), the direct current component DC is obtained by integrating the current distribution i (x) with respect to the section where the X coordinate is 0 to 1.

  By the way, for the pixel circuit group whose X coordinate is x, the current distribution i (x) is included in the pixel circuit group whose X coordinate is x as shown in the following equation (5). The sum of the currents flowing through the pixel circuits 301 for the three colors is obtained.

In the above equation (5), the current flowing through the pixel circuit 301 related to red whose X coordinate is x is indicated by I _r (x), and the current flowing through the pixel circuit 301 related to green whose X coordinate is x is I _g The current flowing through the blue pixel circuit 301 indicated by (x) and having an X coordinate of x is indicated by I _b (x). The currents I _r (x), I _g (x), and I _b (x) are predicted based on the input image signal, for example, by the following equations (6) to (8).

In the above formulas (6) to (8), the current luminous efficiencies of the respective organic light emitting diodes OLED of the pixel circuit 301 relating to the three colors of red, green, and blue are E _r , E _g , E _b [cd / A], The luminous intensity of the pixel circuit 301 related to the three colors of red, green, and blue at the maximum gradation is Y _r , Y _g , Y _b [cd], and the index for gamma conversion is γ (generally γ = 2.2). ), Gradations indicated by input image signals corresponding to the pixel circuits 301 of three colors of red, green, and blue whose X coordinate is x are L _r (x), L _g (x), and L _b (x), respectively. Each is represented.

Further, the coefficient S ₁ of the first-order term of the sine function expressed by the above equation (3) is obtained by the following equation (9), and the coefficient C ₁ of the first-order term of the cosine function is expressed by the following equation (10): Sought by.

Then, the coefficient S _n of the nth-order term (n is a natural number) of the sine function is obtained by the following equation (11), and the coefficient C _n of the _n-th term of the cosine function is obtained by the following equation (12). .

That is, the coefficients S ₁ , S ₂ , S ₃ , C ₁ , C ₂ , and C ₃ of the above equation ( ₃ ) are obtained by the above equations (11) and (12), respectively.

  Here, the voltage drop rate δV (x) is obtained by integrating the electric resistance r by integrating the current distribution i (x) in the section where the X coordinate is x to 1 as shown in the above equation (1). It is calculated by multiplying. Therefore, if the above equation (3) is first integrated, the following equation (13) is obtained.

  Then, the voltage drop rate δV (x) represented by the following equation (14) is obtained using the above equation (13).

  Further, here, the predicted voltage drop amount V (x) is obtained by integrating the voltage drop rate δV (x) in the section where the X coordinate is 0 to x, as shown in the above equation (2). It is obtained by adding the DC component DC multiplied by the electric resistance R. Therefore, when the above equation (14) is first integrated, the following equation (15) is obtained.

  Then, using the above equation (15), a predicted voltage drop amount V (x) represented by the following equation (16) is obtained.

Of the above equation (16), the electrical resistance r and electrical resistance R are determined by the design of the panel unit 3. Further, as indicated by the above equations (4) to (12), the current predicted to be supplied from the power supply line L1 to each pixel circuit 301 based on the input image signal corresponding to each pixel circuit 301. (Predicted current) is obtained, and DC component DC and coefficients S ₁ , S ₂ , S ₃ , C ₁ , C ₂ , C ₃ are derived according to the predicted current. That is, −r × {(C ₁ / 4π ² ) + (C ₂ / 16π ² ) + (C ₃ / 36π ² )} + (R × DC) is calculated as a constant, and the first order x and 2 of x The coefficients of the next term, the n-th term of the sine function, and the n-th term of the cosine function are calculated.

  Note that the approximate expression of the predicted voltage drop amount V (x) expressed by the above equation (16) is the primary and variable related to the variable x indicating the position of each pixel circuit 301 with respect to one end side of the organic EL display unit 30. It includes a quadratic term and a trigonometric term for the variable x. Here, the term of the trigonometric function indicates the fluctuation of the power supply voltage that is expected to be caused by the magnitude of the predicted current relating to each pixel circuit 301.

As indicated by the above equation (16), the first-order term relating to the variable x includes a term obtained by multiplying the variable x and the coefficient. More specifically, the first-order term relating to the variable x is shown in the form of (coefficient A) × x. The quadratic term relating to the variable x includes a term obtained by multiplying the square of the variable x by a coefficient. More specifically, a quadratic term relating to the variable x is shown in the form of (coefficient B) × x ² .

Further, as represented by the above equation (16), the trigonometric function term includes a sine function term obtained by multiplying a sine (sine) and a coefficient related to the variable x indicating the position of each pixel circuit 301, and the variable. A cosine function term obtained by multiplying the cosine (cosine) and the coefficient related to x is included. Specifically, the term of the trigonometric function is a term of a sine function obtained by multiplying a sine (sine) and a coefficient according to two or more natural number multiples (here, 1 to 3 times) different from the variable x, and the variable x. Including a cosine function term obtained by multiplying a cosine and a coefficient according to two or more natural number multiples (here, 1 to 3 times) different from each other. More specifically, assuming that the maximum value of the variable x is x _max (here, 1), the first-order sine function term related to the variable x is (coefficient C) × sin {2π × (x / x _max ). }, And the terms of the first-order cosine function relating to the variable x are shown in the form of (coefficient D) × cos {2π × (x / x _max )}. Then, an nth-order (n is a natural number of 1 to 3) sine function term relating to the variable x is shown in the form of (coefficient) × sin {2nπ × (x / x _max )}, and relating to the variable x An n-th order cosine function term is shown in the form of (coefficient) × cos {2nπ × (x / x _max )}.

  Thus, by expressing the predicted current i (x) approximately in the form using the Fourier series, as shown in the above equations (4), (9) to (12), the predicted current i (x ) Is calculated once, an approximate expression of the predicted voltage drop amount V (x) is derived. For this reason, the amount of calculation for obtaining the predicted voltage drop amount V (x) is reduced, and the predicted voltage drop amount V (x) can be quickly derived from the input image signal.

<(B) Correction Value Determination Method>
When attention is paid to one pixel circuit 301, as described above, the drain voltage V _d of the transistor T _d drops in accordance with the drop of the supplied power supply voltage. The drain current I _d of the transistor T _d is lowered in response to the drop of the drain voltage V _d. Therefore, here, drop amount of the drain voltage V _d (drain voltage drop amount) when dV _d, drop amount of the drain current I _d (drain current drop) is dI _d, emission time of the transistor T _d By increasing the gate voltage V _gs by dV _gs , a process for canceling the influence of the decrease in the drain voltage V _d is performed. Moreover, so-called mutual conductance gm of the transistor T _d has a relationship represented by the following formula (17), a so-called drain resistance r _d of the transistor T _d has a relationship represented by the following formula (18) . The drain resistor r _d is varied according to the gradation of the input image signal.

Here, with the formula of the drain current drop dI _d represented by the above formula (17) by the following equation (19) is derived, drain current drop represented by the following formula from the above equation (18) (20) dI The formula for _d is derived.

Then, the drain current drop dI _d in the equation (19), is substituted drain current drop dI _d in the equation (20), calculating that is done, the gate voltage of the following formula (21) Increase amount (gate voltage increase amount) dV _gs is obtained. In the calculation of the following equation (21), it is used that the amplification factor μ of the transistor T _d is obtained by multiplying the drain resistance r _d and the mutual conductance gm.

As shown in the above equation (21), the gate voltage increase dV _gs is obtained by dividing the drain voltage decrease dV _d by the amplification factor μ. In the present embodiment, the drain voltage drop amount dV _d in a certain pixel circuit 301 is equal to the predicted voltage drop amount V (x) in the pixel circuit 301. Therefore, the gate voltage increase dV _gs is obtained by dividing the predicted voltage drop V (x) by the amplification factor μ. Therefore, the voltage V _data of the output image signal is increased according to the gate voltage increase amount dV _gs , thereby canceling the influence due to the decrease in the drain voltage V _d . The degree to which the increase in the voltage V _data of the output image signal contributes to the increase in the gate voltage V _gs during light emission is determined by so-called writing efficiency α. In the following description, it is assumed that the writing efficiency α is 1, that is, the increase amount of the voltage V _data of the output image signal is directly reflected in the gate voltage increase amount dV _gs during light emission.

<(C) Functional configuration of signal processing unit>
FIG. 12 is a diagram illustrating a functional configuration of the signal processing unit 20. The signal processing unit 20 includes a line buffer 201, a constant / coefficient derivation unit 202, an approximate expression derivation unit 203, a multiplicand calculation unit 204, a multiplier determination unit 205, a gamma (γ) conversion unit 206, a correction value determination unit 207, and a correction value. An adder 208 is included.

  The line buffer 201 receives input image signals sequentially input from the outside and stores them temporarily. Here, an example in which the input image signal expresses a 6-bit gradation (64 levels of gradation) will be described.

The constant / coefficient deriving unit 202 derives constants and coefficients related to the approximate expression of the predicted voltage drop amount V (x) expressed by the above equation (16) based on the input image signals sequentially input from the outside. More specifically, the constant / coefficient deriving unit 202 performs a calculation from the power supply line L1 to each pixel circuit 301 based on the input image signal corresponding to each pixel circuit 301 by performing calculations according to the above equations (4) to (12). A current predicted to be supplied (predicted current) is obtained, and a DC component DC and coefficients S ₁ , S ₂ , S ₃ , C ₁ , C ₂ , C ₃ are calculated based on the predicted current. Is done. Specifically, as shown in FIG. 13, the constant / coefficient derivation unit 202 includes current prediction units 2021R, 2021G, 2021B, a summation unit 2022, and a constant / coefficient calculation unit 2023.

The current predicting unit 2021R predicts the current flowing through the red pixel circuit 301 based on the gradation indicated by the input image signal corresponding to the red pixel circuit 301 corresponding to the coordinate x by the calculation according to the above equation (6). A value (predicted current) I _r (x) is derived. The current prediction unit 2021G predicts the current flowing through the green pixel circuit 301 based on the gradation indicated by the input image signal corresponding to the green pixel circuit 301 corresponding to the coordinate x by the calculation according to the above equation (7). A value (predicted current) I _g (x) is derived. The current prediction unit 2021B predicts the current flowing through the blue pixel circuit 301 based on the gradation indicated by the input image signal corresponding to the blue pixel circuit 301 corresponding to the coordinate x by the calculation according to the above equation (8). A value (predicted current) I _b (x) is derived.

The summation unit 2022 sums the predicted currents I _r (x), I _g (x), and I _b (x) output from the current prediction units 2021R, 2021G, and 2021B by the calculation according to the above equation (5). Thus, a current (predicted current) i (x) that is predicted to flow during light emission in the pixel circuit group at the coordinate x is calculated. The constant / coefficient calculation unit 2023 uses the predicted current i (x) of each pixel circuit group sequentially calculated by the summation unit 2022 by the calculation according to the above equations (4) and (9) to (12). The DC component DC and the coefficients S ₁ , S ₂ , S ₃ , C ₁ , C ₂ , C ₃ are calculated by integration calculation.

The approximate expression deriving unit 203 derives an approximate expression of the predicted voltage drop amount V (x) from the constants and coefficients derived by the constant / coefficient deriving unit 202. Specifically, the DC component DC derived by the constant / coefficient deriving unit 202 and the values of the coefficients S ₁ , S ₂ , S ₃ , C ₁ , C ₂ , and C ₃ are substituted into the above equation (16). By performing such calculation, an approximate expression of the predicted voltage drop amount V (x) is derived. Therefore, in this embodiment, the constant / coefficient deriving unit 202 and the approximate expression deriving unit 203 calculate an approximate expression indicating the predicted voltage drop amount V (x) related to the power supply voltage supplied to each pixel circuit 301. It corresponds to (approximate equation calculation unit).

  The multiplicand calculation unit 204 refers to the trigonometric function table 211 stored in the storage unit 21 or the like, and calculates the estimated voltage drop amount V (x) derived by the approximate expression deriving unit 203 from each approximated pixel circuit group. The corresponding predicted voltage drop amount is calculated as a multiplicand. Here, in the trigonometric function table 211, for example, the value of sin (2πx), which is a linear sine function, is stored in association with each value of the variable x. Therefore, the multiplicand calculation unit 204 approximates the predicted voltage drop amount V (x) from the X-coordinate value of the pixel circuit group (correction target pixel circuit group) whose image signal is to be corrected and the trigonometric function table 211. A value of a trigonometric function term in the equation is derived, and a predicted voltage drop amount (that is, a multiplicand) corresponding to each correction target pixel circuit group is sequentially calculated.

  The multiplier determining unit 205 refers to the multiplier table 212 stored in the storage unit 21 or the like, and determines the amplification factor μ according to the potential of the input image signal corresponding to each pixel circuit 301 input from the line buffer 201. The reciprocal 1 / μ is determined as a multiplier. Here, the multiplier table 212 stores 1 / μ, which is the inverse of the amplification factor, for each potential of the input image signal for each of red, green, and blue. In other words, the multiplier determining unit 205 refers to the multiplier table 212 and sets the corresponding amplification factor according to the potential of the input image signal corresponding to the pixel circuit (correction target pixel circuit) to be corrected. The inverse 1 / μ is determined.

  The amplification factor μ and its inverse 1 / μ vary depending on the environmental temperature. For this reason, the multiplier table 212 stores the reciprocal 1 / μ of the amplification factor μ in association with each potential of the input image signal for each of the red, green, and blue colors for a plurality of temperatures. The multiplier (1 / μ) determined by the multiplier determining unit 205 is preferably changed according to the temperature.

  The γ conversion unit 206 performs so-called γ conversion on the input image signal corresponding to each pixel circuit 301. For example, the γ conversion unit 206 performs conversion such that the gradation indicated by the input image signal is raised to the power of 2.2. At this time, an input image signal expressing 6-bit gradation is converted into an image signal (image signal after γ conversion) expressing 8-bit gradation.

The correction value determination unit 207 multiplies the predicted voltage drop amount (that is, the multiplicand) calculated by the multiplicand calculation unit 204 by the inverse 1 / μ (multiplier) of the amplification factor μ determined by the multiplier determination unit 205. Determine the correction value. In other words, the correction value is derived by dividing the predicted voltage drop amount by the amplification factor μ of the transistor _Td corresponding to the input image signal.

  The correction value adding unit 208 corrects the image signal by adding the correction value determined by the correction value determining unit 207 to the potential of the image signal after γ conversion. In this way, the correction value addition unit 208 as a signal correction unit corrects the image signal after the γ conversion is performed, thereby generating an output image signal. This output image signal is output to the X driver circuit 32.

  For an input image signal corresponding to a certain pixel circuit 301, the time required from the input image signal being input to the signal processing unit 20 until the correction value is determined by the correction value determination unit 207 is greater than the γ conversion unit. In 206, the time required for the γ conversion is longer. For this reason, by adjusting the difference in the processing time by holding the input image signal in the line buffer 201, the timing is adjusted between the input of the input image signal and the correction of the image signal. Correction is performed correctly.

  As described above, in the image display device 1 according to this embodiment, the predicted current i (x) in each pixel circuit group is approximately expressed in a form using the Fourier series, thereby reducing the predicted voltage drop with a small amount of calculation. An approximate expression of the quantity V (x) can be obtained. Therefore, the predicted voltage drop amount V (x) can be quickly derived from the input image signal. As a result, in response to the input of a plurality of frame image signals from the outside, it is possible to quickly output the plurality of frame image signals visually. Therefore, it is possible to achieve a rapid visual output of the image signals of the plurality of frames according to the input of the image signals of the plurality of frames from the outside and an improvement in the image quality.

  In addition, in order to temporarily hold the image signal, it is possible to quickly correct and output the image signal of the plurality of frames in response to the input of the image signal of the plurality of frames from the outside. The buffer memory capacity is small. Therefore, it is possible to reduce the size of the image display apparatus 1 and to save resources and reduce costs in manufacturing.

<Modification>
The present invention is not limited to the above-described embodiments, and various changes and improvements can be made without departing from the scope of the present invention.

  For example, in the above embodiment, as shown in FIG. 9, one power supply line L1 and an output circuit 311 for supplying a power supply voltage to the power supply line L1 are provided for each horizontal line. The supply mode of the power supply voltage to the pixel circuit 301 is not limited to this. For example, as shown in FIG. 14, one power supply line L1 is provided for each horizontal line, and an output circuit 311 that collectively supplies power supply voltage to a plurality of (for example, four) power supply lines L1. May be provided. Specifically, the power supply voltage may be supplied from one output circuit 311 to a plurality of (for example, four) power supply lines L1 via the wiring L1A.

  Further, as shown in FIG. 15, a plurality of (for example, four) power supply lines L1 may be electrically connected by wiring L1B every several pixels (for example, four pixels). However, in such an aspect, it is assumed that a plurality of (for example, four) horizontal lines that are electrically connected by the wiring L1B have approximately the same degree of decrease in the power supply voltage. It is preferable to derive an approximate expression of the voltage drop amount V (x).

In the above embodiment, the correction value of the image signal is determined by dividing the predicted voltage drop amount by the amplification factor μ corresponding to the input image signal for each pixel circuit 301. However, the present invention is not limited to this. Absent. For example, the drain current drop in the transistor T _d is an amount by which the drain current I _d of the transistor T _d changes every time the data gradation changes by one gradation with respect to the gradation (data gradation) indicated by the input image signal. along the idea that dividing the amount dI _d, may determine the correction value for the input image signal. Note that the method for deriving the approximate expression of the predicted voltage drop amount V (x) may be the same method as in the above-described embodiment. Hereinafter, the correction value determination method according to this modification, and the signal processing unit 20A The functional configuration will be described sequentially.

Here, the gradation of the input image signal L _inData, the correction value of the input image signal as dL _inData, the use of drain resistance r _d represented by the above formula (18), the correction value dL _inData is the following formula (22 ).

As shown in the above equation (22), the drain voltage drop amount dV _d is divided by the drain resistance r _d and the drain current drop amount dI _d divided by the data gradation change amount dL _INdata. The correction value dL _INdata is obtained. Here, the drain current drop dI _d and divided by the amount of change dL _inData gray scale (dI _d / dL _INdata) corresponds to the slope of the change in the drain current I _d with respect to the change in the gray scale. The drain resistance r _d and the slope (dI _d / dL _INdata ) are uniquely determined with respect to the gradation indicated by the input image signal in the design of the pixel circuit 301. For this reason, for example, a numerical value obtained by multiplying the reciprocal of the drain resistance r _d and the slope (dI _d / dL _INdata ) is stored in a table for each gradation indicated by the input image signal, whereby the input image signal is input. The product of the reciprocal of the corresponding drain resistance r _d and the slope (dI _d / dL _INdata ) can be obtained.

  FIG. 16 is a diagram illustrating a functional configuration of a signal processing unit 20A included in the control unit 2A of the image display apparatus 1A according to the present modification. The image display device 1A is a signal processing unit 20A in which a part of the configuration of the signal processing unit 20 is changed to a configuration having a different function as compared with the image display device 1 of the above-described embodiment. . Below, about the structure similar to the signal processing part 20, the same code | symbol is attached | subjected, duplication description is abbreviate | omitted, and a different structure is demonstrated.

  As shown in FIG. 16, the signal processing unit 20A includes a line buffer 201, a constant / coefficient derivation unit 202, an approximate expression derivation unit 203, a multiplicand calculation unit 204, a multiplier determination unit 205A, a γ conversion unit 206A, and a correction value determination unit. 207A and a correction value adding unit 208A.

Multiplier determining section 205A refers to the multiplier table 212A stored in the storage unit 21 or the like, from the gray scale of the input image signal input from the line buffer 201, and the inverse of the drain resistor r _d, the slope (dI _d / dL _inData) and the multiplied value of _{{(dI d / dL iNdata)} / r d} is determined as a multiplier. Storing Here, the multiplier table 212A, the red, green, with respect to each gradation of the input image signal for each color of blue, the values of the candidate of the multiplier _{{(dI d / dL INdata)} / r d} is associated Has been. That is, the multiplier determining section 205A, while referring to the multiplier table 212A, determined according to the gradation of an input image signal corresponding to the correction target pixel circuit, the corresponding multiplier _{{(dI d / dL INdata)} / r d} To do.

The value of the candidate of the multiplier _{{(dI d / dL INdata)} / r d} varies depending on the environment temperature. Therefore, the multiplier table 212A, a plurality of temperature, associated red, green, the value of the multiplier with respect to each gradation of the input image signal for each color of blue candidate _{{(dI d / dL INdata)} / r d} The multiplier {(dI _d / dL _INdata ) / r _d } determined by the multiplier determining unit 205A is preferably changed according to the environmental temperature.

Correction value determination unit 207A multiplies the predicted voltage drop amount calculated by the multiplicand calculator 204 with respect to (i.e. multiplicand), a multiplier determined by the multiplier determining section _{205A {(dI d / dL INdata} ) / r d} Thus, the correction value is determined.

  The correction value adding unit 208A corrects the image signal by adding the correction value determined by the correction value determining unit 207A to the potential of the image signal (input image signal) before γ conversion. In this way, the correction value adding unit 208A as a signal correcting unit corrects the image signal before the γ conversion is performed. At this time, an input image signal expressing 6-bit gradation becomes an image signal expressing 8-bit gradation.

  The γ conversion unit 206A performs so-called γ conversion on the image signal related to each pixel circuit 301 corrected by the correction value addition unit 208A. For example, the γ conversion unit 206A performs conversion such that the gradation indicated by the corrected image signal is raised to the power of 2.2. At this time, the corrected image signal expressing the 8-bit gradation is converted into an output image signal (image signal after γ conversion) expressing the 10-bit gradation. This output image signal is output to the X driver circuit 32.

  In addition, compared with the image display device 1A according to the first modification, the image display device 1 according to the one embodiment has a smaller number of gradation bits represented by the image signal before the γ conversion, and therefore, the γ conversion is performed. The required hardware configuration and the amount of data can be reduced.

  In the above embodiment, a term obtained by multiplying a trigonometric term of the approximate expression of the predicted voltage drop V (x) by a sine and a coefficient corresponding to 1 to 3 times the variable x, and A term multiplied by a cosine and a coefficient corresponding to 1 to 3 times the variable x was included. That is, the term of the trigonometric function includes a term of a 1-3 order sine function related to the variable x and a term of a 1-3 order cosine function related to the variable x. However, it is not limited to this. For example, it is sufficient that the term of the trigonometric function includes at least a first-order sine function term related to the variable x and a first-order cosine function term related to the variable x. However, from the viewpoint of the accuracy of approximation of the predicted voltage drop V (x), the term of the trigonometric function includes the terms of the first to third order sine functions related to the variable x, and the first to third orders of the variable x. Preferably, a cosine function term is included.

In the above embodiment, the gate voltage V _gs of the transistor _Td does not change even when the potential of the power supply line L1 changes due to the configuration of the pixel circuit 301 (FIG. 2). Absent. For example, the present invention can also be applied to the pixel circuit 301A in which the gate voltage V _gs of the transistor T _d changes according to the fluctuation of the potential of the power supply lines L1 _s and L1 _d as shown in FIG. .

The pixel circuit 301A includes an organic light emitting diode OLED, a transistor T _d , a transistor T _th , and a capacitor C _s , and a power line L1 _d that has a relatively high potential during light emission and a relatively low voltage during light emission. The organic light emitting diode OLED and the transistor _Td are connected in series between the power supply line L1 _s that becomes a potential. A transistor T _th is provided between the drain and gate of the transistor T _d , and the transistor T _th is switched between a conductive state and a non-conductive state by the potential of the compensation control line L3. Further, the gate and the image signal line L2 of the transistor T _d is connected through a capacitor C _s.

In the pixel circuit 301A having such a configuration, at the time of light emission, with the gate voltage V _gs of the transistor T _d is changed in accordance with change in the potential of the power supply line L1 _s, the power supply line L1 _d and the power supply line L1 _s The drain voltage V _d of the transistor T _d decreases due to a decrease in the potential difference (that is, the power supply voltage). Accordingly, in the pixel circuit 301A, the drain current I _d of the transistor T _d during light emission decreases due to the decrease in both the gate voltage V _gs and the drain voltage V _d . With such a configuration, it is possible to suppress a decrease in the drain current I _d caused by a decrease in the drain voltage V _d by a method similar to the image signal correction method described in the above embodiment. That is, the present invention can be applied to various image display devices including a pixel circuit in which the drain current I _d is reduced due to a decrease in the drain voltage V _d during light emission in the driving transistor connected in series with the light emitting element. it can. Note that the decrease in the drain current I _d caused by the decrease in the gate voltage V _gs may be dealt with by separately correcting the image signal or the like.

  In the above embodiment, the power supply voltage drop, that is, the predicted voltage drop amount is obtained for each pixel circuit group. However, the present invention is not limited to this. For example, the predicted voltage drop amount may be obtained for each pixel circuit.

  In the above embodiment, for the input image signal corresponding to each horizontal line, the corresponding input image signal may be sequentially input from the pixel circuit 301 closest to the Y driver circuit 31. Corresponding input image signals may be sequentially input from the pixel circuit 301 side farthest from the Y driver circuit 31.

  In the above embodiment, the case where the light emitting element is an organic light emitting diode OLED has been described. However, the present invention is not limited to this, and the light emitting element may be a light emitting diode made of an inorganic material or the like.

  In addition, all or a part of the one embodiment and each of the modifications may be combined within a consistent range.

DESCRIPTION OF SYMBOLS 1,1A Image display apparatus 2,2A Control part 3 Panel part 4 Power supply circuit 20, 20A Signal processing part 21 Memory | storage part 22 Timing generator (TG)
30 Organic EL Display Unit 31 Y Driver Circuit 32 X Driver Circuit 201 Line Buffer 202 Constant / Coefficient Deriving Unit 203 Approximation Formula Deriving Unit 204 Multiplicand Calculation Unit 205, 205A Multiplier Determination Unit 206, 206A γ Conversion Unit 207, 207A Correction Value Determination Unit 208, 208A Correction value addition unit 211 Trigonometric function table 212, 212A Multiplier table 301, 301A Pixel circuit 311 Output circuit L1, L1 _d , L1 _s Power supply line OLED Organic light emitting diode T _d Drive transistor

Claims (9)

A plurality of pixel circuits each having a light emitting element;
A potential setting unit that sets a potential according to an image signal in each of the pixel circuits;
By supplying a power supply voltage to the plurality of pixel circuits through a common power supply line from one end side of the light emitting region where the plurality of pixel circuits are arranged, the plurality of light emitting elements included in the plurality of pixel circuits are A voltage supply unit that simultaneously emits light;
Depending on the predicted current in each pixel circuit based on the image signal corresponding to each pixel circuit, the first and second order terms relating to the variable indicating the position of each pixel circuit, and the magnitude of each predicted current An approximate expression calculation unit that calculates an approximate expression indicating an estimated drop amount of the power supply voltage supplied to each of the pixel circuits using a term of a trigonometric function corresponding to the fluctuation of the power supply voltage.
A signal correction unit that performs correction on each of the image signals based on the estimated fall amount based on the approximate expression;
An image display device comprising: The image display device according to claim 1,
The trigonometric term is
An image display device comprising: a term obtained by multiplying a sine and a coefficient related to the variable; and a term obtained by multiplying a cosine and a coefficient related to the variable. The image display device according to claim 2,
The trigonometric term is
Including a term obtained by multiplying a sine and a coefficient relating to two or more natural number multiples with different variables, and a term obtained by multiplying a cosine and a coefficient relating to two or more natural number multiples different in the variable, respectively. An image display device. The image display device according to any one of claims 1 to 3, wherein
The first order term is
Including a term multiplied by the variable and the coefficient,
The quadratic term is
An image display device comprising a term obtained by multiplying the square of the variable and a coefficient. An image display device according to any one of claims 2 to 4,
The approximate expression calculation unit,
Each of the coefficients is calculated based on the predicted current. The image display device according to any one of claims 1 to 5,
The coordinate indicating the position of each pixel circuit from the one end side is x, the predicted drop amount in the pixel circuit located at the coordinate x is V (x), the maximum value of the coordinate x is x _max , and each of the predictions When the coefficients calculated according to the current are A, B, C, and D, the first-order term is shown in the form of A × x, and the second-order term is in the form of B × x ² . And the trigonometric function term includes a term of C × sin {2π × (x / x _max )} + D × cos {2π × (x / x _max )}. The image display device according to any one of claims 1 to 6,
The signal correction unit is
An image display device that corrects the image signal after gamma conversion. The image display device according to claim 7,
Each of the pixel circuits
Having a transistor that adjusts a current flowing through the light emitting element by setting a potential corresponding to the image signal to the gate;
The signal correction unit is
An image display device, wherein the image signal is corrected by a correction value derived by dividing the predicted drop amount by an amplification factor of the transistor according to the image signal. The image display device according to any one of claims 1 to 6,
The signal correction unit is
An image display device for correcting the image signal before gamma conversion.

Images