JP2010193453A5 - - Google Patents

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JP2010193453A5
JP2010193453A5 JP2010030088A JP2010030088A JP2010193453A5 JP 2010193453 A5 JP2010193453 A5 JP 2010193453A5 JP 2010030088 A JP2010030088 A JP 2010030088A JP 2010030088 A JP2010030088 A JP 2010030088A JP 2010193453 A5 JP2010193453 A5 JP 2010193453A5
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Prior art keywords
signal
reference voltage
difference
difference signal
receiving
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JP2010030088A
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Japanese (ja)
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JP2010193453A (en
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Priority claimed from DE200910000876 external-priority patent/DE102009000876A1/en
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Publication of JP2010193453A publication Critical patent/JP2010193453A/en
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Claims (14)

少なくとも接続装置(8)と基準電圧源(10)と受信コンパレータ(9)とを有する、電流インターフェース(6,6a,6b)に接続するための受信装置であって、
前記接続装置(8)は、前記電流インターフェース(6,6a,6b)を介して電流信号(S0)を受信し、かつ電圧信号としての受信信号(S1)を出力し、
前記基準電圧源(10)は、基準電圧(UR)を出力し、
前記受信コンパレータ(9)は、前記受信信号(S1)と前基準電圧(UR)を受信し、かつ差信号(S)を出力する、
信装置において、
前記基準電圧源(10)は、前記基準電圧(UR)を、前記差信号(S2)の評価に基づいて調整する、
ことを特徴とする受信装置。
A receiving device for connecting to a current interface (6, 6a, 6b) comprising at least a connecting device (8), a reference voltage source (10) and a receiving comparator (9),
The connection device (8) receives a current signal (S0) via the current interface (6, 6a, 6b) and outputs a reception signal (S1) as a voltage signal;
The reference voltage source (10) outputs a reference voltage (UR),
The receiving comparator (9) receives the reception signal (S1) and before Symbol reference voltage (UR), and outputs the difference signal (S 2),
In receiving apparatus,
The reference voltage source (10) adjusts the reference voltage (UR) based on the evaluation of the difference signal (S2).
A receiving apparatus.
前記受信装置は、前記差信号(S2)を前記基準電圧(UR)の変化によって調整するための制御回路(9,15,10)を有する、
ことを特徴とする請求項1記載の受信装置。
The receiving device comprises a control circuit (9,15,10) for adjusting the difference signal (S2) by a change in the reference voltage (UR),
The receiving apparatus according to claim 1.
前記受信信号(S1)は位相位置変調されている、
ことを特徴とする請求項1または2記載の受信装置。
The received signal (S1) is phase-position modulated.
The receiving apparatus according to claim 1 or 2, wherein
前記受信装置は差評価装置(15)を有しており、該差評価装置(15)は、
前記差信号(S2)を受信し、
測定期間(Δt)における該差信号(S2)のハイビット(H)およびロービット(L)の数から、および/または、測定期間(Δt)における差信号(S2)のハイ電圧レベルの総期間およびロー電圧レベルの総期間から、現在調整されている基準電圧(UR)を評価し、
この評価に基づいて制御信号(S3)を、基準電圧(UR)を出力するための前記基準電圧源(10)に出力する、
ことを特徴とする請求項1〜3のいずれか一項記載の受信装置。
The receiver has a difference evaluation device (15), and the difference evaluation device (15)
Receiving the difference signal (S2);
From the number of high bits of the difference signal in the measurement period (Δt) (S2) (H ) and B Bitto (L), and / or, the total of the high voltage level of the difference signal in the measurement period (Δt) (S2) From the duration and total duration of the low voltage level, evaluate the currently adjusted reference voltage (UR),
Based on this evaluation, a control signal (S3) is output to the reference voltage source (10) for outputting a reference voltage (UR).
The receiving device according to any one of claims 1 to 3, wherein
前記測定期間(Δt)における前記ハイビット(H)の数が前記ロービット(L)の数よりも多い場合、および/または、前記ハイ電圧レベルの総期間が前記ロー電圧レベルの総期間よりも長い場合には、前記差評価装置(15)が、前記基準電圧(UR)を上昇させるための制御信号(S3)を出力し、
前記測定期間(Δt)における前記ロービット(L)の数が前記ハイビット(H)の数よりも多い場合、または、前記ロー電圧レベルの総期間が前記ハイ電圧レベルの総期間よりも長い場合には、前記差評価装置(15)が、前記基準電圧(UR)を低減させるための制御信号(S3)を出力する、
ことを特徴とする請求項4記載の受信装置。
When the number of high bits (H) in the measurement period (Δt) is larger than the number of low bits (L), and / or when the total period of the high voltage level is longer than the total period of the low voltage level The difference evaluation device (15) outputs a control signal (S3) for increasing the reference voltage (UR),
If the number of the low bit (L) in the measurement period (Delta] t) is greater than the number of the high bit (H), it was or, where the total duration of the low voltage level is longer than the total duration of the high voltage level The difference evaluation device (15) outputs a control signal (S3) for reducing the reference voltage (UR).
The receiving apparatus according to claim 4.
前記電流インターフェース(6,6a,6b)は、複数のバス接続(5)を備えるバスシステム(6,6a,6b)として構成されており、
前記接続装置(8)は、前記バスシステム(6,6a,6b)の少なくとも2つの送信機(2)に接続するために設けられている、
ことを特徴とする請求項1〜5のいずれか一項記載の受信装置。
The current interface (6, 6a, 6b) is configured as a bus system (6, 6a, 6b) comprising a plurality of bus connections (5),
The connection device (8) is provided for connecting to at least two transmitters (2) of the bus system (6, 6a, 6b),
The receiving apparatus according to claim 1, wherein the receiving apparatus includes:
請求項1〜6のいずれか一項記載の受信装置(3)と、前記差信号(S2)をデータ信号(S4)に変換するための符号化装置(12)と、前記データ信号(S4)を処理するための別の装置(14)とを有する制御装置。   The receiving device (3) according to any one of claims 1 to 6, an encoding device (12) for converting the difference signal (S2) into a data signal (S4), and the data signal (S4) Control device with another device (14) for processing. 請求項1〜6のいずれか一項記載の受信装置(3)と、少なくとも1つの送信機(2)とを有する回路装置において、
前記送信機(2)は、前記電流インターフェース(6,6a,6b)を介して前記受信装置(3)と接続されており、前記電流インターフェース(6,6a,6b)を介して電流信号(S0)を前記受信装置(3)に出力する、
ことを特徴とする回路装置。
In a circuit device comprising the receiving device (3) according to any one of claims 1 to 6 and at least one transmitter (2),
The transmitter (2) is connected to the receiver (3) via the current interface (6, 6a, 6b), and a current signal (S0) via the current interface (6, 6a, 6b). ) To the receiver (3),
A circuit device.
前記少なくとも1つの送信機(2)はエネルギー源を備えておらず、伝送路符号化された信号を、前記受信装置(3)に出力する、
ことを特徴とする請求項8記載の回路装置。
The at least one transmitter (2) does not include an energy source, and outputs a channel-coded signal to the receiver (3).
The circuit device according to claim 8.
前記回路装置は、少なくとも2つの送信機(2)を有し、
前記電流インターフェース(6,6a,6b)はバスシステムとして構成されており、
該バスシステムは、前記受信装置(3)と前記少なくとも2つの送信機(2)とを接続している、
ことを特徴とする請求項8または9記載の回路装置。
Said circuit arrangement comprises at least two transmitters (2);
The current interface (6, 6a, 6b) is configured as a bus system,
The bus system connects the receiving device (3) and the at least two transmitters (2).
The circuit device according to claim 8 or 9, wherein
前記少なくとも1つの送信機(2)はセンサ(2)であり、前記受信装置(3)は、中央制御装置(4)の一部である、
ことを特徴とする請求項8〜10のいずれか一項記載の回路装置。
The at least one transmitter (2) is a sensor (2) and the receiver (3) is part of a central controller (4);
The circuit device according to any one of claims 8 to 10, wherein:
電流信号(S0)からデータ信号(S4)を検出する方法において、少なくとも、
少なくとも1つの電流信号(S0)を、電圧信号として形成された受信信号(S1)に変換し、
該受信信号(S1)を基準電圧(UR)と比較して差信号(S2)を出力し、
該差信号(S2)からデータ信号(S4)を検出し、
この際前記基準電圧(UR)は、前記差信号(S2)の評価によって形成される、
ことを特徴とする方法。
In the method for detecting the data signal (S4) from the current signal (S0), at least,
Converting at least one current signal (S0) into a received signal (S1) formed as a voltage signal;
The received signal (S1) is compared with a reference voltage (UR) and a difference signal (S2) is output,
A data signal (S4) is detected from the difference signal (S2);
At this time, the reference voltage (UR) is formed by evaluating the difference signal (S2).
A method characterized by that.
前記電流信号(S0)および前記受信信号(S1)は位相位置変調されており、
測定期間(Δt)において前記差信号(S2)に含まれるハイビット(H)の数および前記ロービット(L)の数、および/または、測定期間(Δt)における前記差信号(S2)のハイ電圧レベルとロー電圧レベルの総期間を検出することによって、現在調整されている基準電圧(UR)が評価され、前記評価の結果に応じて前記基準電圧(UR)が変化される、
ことを特徴とする請求項12記載の方法。
The current signal (S0) and the reception signal (S1) are phase-position modulated,
The number of high bits (H) and the number of low bits (L) included in the difference signal (S2) in the measurement period (Δt) and / or the high voltage level of the difference signal (S2) in the measurement period (Δt) By detecting the total period of the low voltage level, the currently adjusted reference voltage (UR) is evaluated, and the reference voltage (UR) is changed according to the result of the evaluation .
13. The method of claim 12, wherein:
定期間(Δt)において前記差信号(S2)に含まれるハイビット(H)の数および前記ロービット(L)の数が同じになるように、または、測定期間(Δt)における前記ハイ電圧レベルの総期間とロー電圧レベルの総期間が同じになるように基準電圧(UR)を調整することによって、前記差信号(S2)が調整される、
ことを特徴とする請求項12または13記載の方法。
As the number of the number and the low bit of the high bit contained in said difference signal (S2) between measuring periodically (Δt) (H) (L ) is the same, or, before KIHA Lee voltage in the measurement period (Delta] t) The difference signal (S2) is adjusted by adjusting the reference voltage (UR) so that the total period of the level and the total period of the low voltage level are the same.
14. A method according to claim 12 or 13, characterized in that
JP2010030088A 2009-02-16 2010-02-15 Receiver for connecting to current interface, and method for detecting data signal from current signal Pending JP2010193453A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE200910000876 DE102009000876A1 (en) 2009-02-16 2009-02-16 Receiver for use in e.g. switching arrangement, for connection to bus system utilized to receive current signal from sensor in vehicle, has reference voltage source adjusting reference voltage based on evaluation of difference signal

Publications (2)

Publication Number Publication Date
JP2010193453A JP2010193453A (en) 2010-09-02
JP2010193453A5 true JP2010193453A5 (en) 2013-03-21

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IT (1) IT1398303B1 (en)

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JP2012227813A (en) * 2011-04-21 2012-11-15 Azbil Corp Hysteresis comparator
US11643122B2 (en) * 2019-12-18 2023-05-09 Alstom Transport Technologies Wayside to railway vehicle communication method and device

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DE102004013597A1 (en) 2004-03-19 2005-10-06 Robert Bosch Gmbh Controller for use in vehicle, has resistors in wires of two-wire line, where controller is connected with sensor by line and voltage measured at resistors is supplied to operational amplifiers and linked for evaluation of data
JP4791185B2 (en) * 2006-01-04 2011-10-12 富士通セミコンダクター株式会社 Correction circuit

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