JP2010193330A - Oscillator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an oscillator of low-power-consumption which secures a constant output voltage amplitude against temperature variation while suppressing power consumption low. <P>SOLUTION: The oscillator includes: a piezoelectric oscillator 10; an oscillation circuit 20 for oscillating the piezoelectric oscillator 10 to output an oscillation signal 22; a buffer circuit 30 for inputting an oscillation signal (a) thereto; a push-pull type output circuit 40 including an Nch transistor N1 and a Pch transistor P1 for outputting an output signal b of the buffer circuit 30; an Nch current mirror circuit 50 connected to a gate terminal of the Nch transistor N1; and a Pch current mirror circuit 60 connected to a gate terminal of the Pch transistor P1. A first current mirror circuit compensates the temperature characteristic of the Nch transistor N1, and a second current mirror circuit compensates the temperature characteristic of the Pch transistor P1, whereby the temperature characteristic possessed by the push-pull type output circuit 40 is canceled, and generally-constant voltage amplitude is output regardless of temperature variation. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an oscillator, and more particularly to an oscillator that is reduced in size while preventing deterioration of phase noise characteristics due to power supply noise.

  In recent years, there has been a strong demand for downsizing and weight reduction of portable devices in mobile communication such as mobile phones, and there is also a demand for downsizing of crystal oscillators used as frequency standards for these portable devices. If the bypass capacitor inserted in the output circuit of the stabilized power supply of the crystal oscillator is omitted to meet the demand for miniaturization, unnecessary high frequency spectrum components appear in the oscillation output, and the oscillation output signal is generated by the noise component generated by the stabilized power supply. However, there is a problem that the noise floor in the phase noise characteristic is deteriorated because of being susceptible to phase modulation.

  In order to solve this problem, for example, in Patent Document 1, a depletion type Nch type MOS transistor is arranged at the source of a Pch type MOS transistor of an inverter in the previous stage of a CMOS push-pull output circuit, and the drive current of the previous stage inverter is supplied as a power source. A method of supplying from a terminal is described.

Japanese Patent Laying-Open No. 2006-74416 (FIG. 1)

  However, in the conventional method, due to the temperature characteristics of the MOS transistors constituting the final stage CMOS push-pull output circuit, the voltage amplitude level of the output varies depending on the temperature, and accordingly, the power consumption also varies greatly. Therefore, there is a problem that it is difficult to further reduce power consumption. For example, at high temperatures, MOS transistors have a characteristic that their driving ability increases. For this reason, even if the voltage amplitude or DC bias potential on the gate side of the CMOS push-pull output circuit is stabilized, the voltage amplitude on the OUT terminal side may be larger than necessary as compared with the low temperature state. Along with this, the current consumption of the crystal oscillator also increases, and as a result, it has been difficult to stably keep the current consumption low over a wide temperature range.

  The present invention has been made to solve the above-described problems, and can be realized as the following forms or application examples.

[Application Example 1]
A piezoelectric vibrator; an oscillation circuit that oscillates the piezoelectric vibrator and outputs an oscillation signal; a buffer circuit that inputs the oscillation signal; and a first transistor that outputs a signal obtained by impedance conversion of the signal output from the buffer circuit And a second transistor connected to the gate terminal of the second transistor, a first current mirror circuit connected to the gate terminal of the first transistor, and a second current transistor circuit connected to the gate terminal of the second transistor. An oscillator comprising: a current mirror circuit;

  According to this configuration, the first current mirror circuit cancels the temperature characteristic of the first transistor constituting the push-pull output circuit, and the second current mirror circuit constitutes the second transistor constituting the push-pull output circuit. Since the output voltage amplitude level of the push-pull type output circuit is almost constant regardless of temperature fluctuations, the fluctuation of current consumption can be suppressed and the power consumption can be kept low even at high temperatures. An oscillator with low power consumption can be realized.

[Application Example 2]
In the oscillator described above, the first transistor and the first current mirror circuit are configured by Nch transistors, and the second transistor and the second current mirror circuit are configured by Pch transistors. Features an oscillator.

  According to this configuration, the first current mirror circuit cancels the temperature characteristic of the first transistor constituting the push-pull output circuit, and the second current mirror circuit constitutes the second transistor constituting the push-pull output circuit. Since the voltage amplitude level of the push-pull type output circuit becomes almost constant regardless of temperature fluctuations by working to cancel out the temperature characteristics, the fluctuations in the current consumption can be suppressed, and the power consumption can be kept low even at high temperatures. A power consumption oscillator can be realized.

1 is a circuit diagram showing a configuration of an oscillator according to a first embodiment. The graph which shows operation | movement of the oscillator which concerns on 1st Embodiment. FIG. 6 is a circuit diagram showing a configuration of an oscillator according to Modification 1;

  Hereinafter, embodiments of an oscillator will be described with reference to the drawings.

(First embodiment)
<Configuration of oscillator>
First, the configuration of the oscillator according to the first embodiment will be described with reference to FIG. FIG. 1 is a circuit diagram showing a configuration of an oscillator according to the first embodiment.

  As shown in FIG. 1, the oscillator 1 includes a piezoelectric vibrator 10, an oscillation circuit 20, a buffer circuit 30, a push-pull output circuit 40, an Nch current mirror circuit 50 that is a first current mirror circuit, The second current mirror circuit is a Pch current mirror circuit 60 and a capacitor C5. The oscillation circuit 20 outputs an oscillation signal a obtained by oscillating the piezoelectric vibrator 10 from the output line 22. The buffer circuit 30 has an input terminal connected to the output line 22, receives the oscillation signal a, and outputs the output signal b from the output line 31. The push-pull type output circuit 40 is connected to the output line 31, inputs the output signal b, impedance-converts it, and outputs it as an output signal OUT via the capacitor C5.

  The oscillation circuit 20 includes an oscillation amplification inverter 21, a feedback resistor R1, and capacitors C1 and C2. The feedback resistor R1 and the piezoelectric vibrator 10 are connected in parallel to an inverter 21 for oscillation amplification. The capacitor C1 is connected between the input terminal of the oscillation amplification inverter 21 and the ground potential. The capacitor C2 is connected between the output terminal of the oscillation amplification inverter 21 and the ground potential. The oscillation amplification inverter 21 is driven by a stabilized power supply voltage Vreg which is a constant voltage. Similarly, the buffer circuit 30 is also driven by the stabilized power supply voltage Vreg that is a constant voltage.

  The push-pull output circuit 40 includes an Nch transistor N1 that is a first transistor, a Pch transistor P1 that is a second transistor, capacitors C3 and C4, and resistors R8 and R9. The Nch transistor N1 and the Pch transistor P1 are connected in series between the power supply potential Vcc and the ground potential. The source terminal of the Nch transistor N1 and the source terminal of the Pch transistor P1 are connected to one terminal of the capacitor C5.

  The capacitor C3 is connected between the output line 31 and the gate terminal of the Nch transistor N1. The capacitor C4 is connected between the output line 31 and the gate terminal of the Pch transistor P1. The resistor R8 is connected between the output line 51 of the Nch current mirror circuit 50 and the gate terminal of the Nch transistor N1. The resistor R9 is connected between the output line 61 of the Pch current mirror circuit 60 and the gate terminal of the Pch transistor P1.

  The Nch current mirror circuit 50 includes Nch transistors N2 and N3 and resistors R5, R6 and R7. The Nch transistor N2 has a source terminal connected to the ground potential, a gate terminal connected to the drain terminal and the gate terminal of the Nch transistor N3, and a drain terminal connected to the stabilized power supply voltage Vreg via the resistor R5. The Nch transistor N3 has a source terminal connected to the ground potential, a gate terminal connected to the gate terminal of the Nch transistor N2, and a drain terminal connected to the stabilized power supply voltage Vreg via resistors R6 and R7. A connection line between the resistor R6 and the resistor R7 is an output line 51. The Nch current mirror circuit 50 forms a current mirror circuit by Nch transistors N2 and N3, and a voltage c divided by resistors R6 and R7 is output from the output line 51.

  The Pch current mirror circuit 60 includes Pch transistors P2 and P3 and resistors R2, R3 and R4. The Pch transistor P2 has a source terminal connected to the stabilized power supply voltage Vreg, a gate terminal connected to the drain terminal and the gate terminal of the Pch transistor P3, and a drain terminal connected to the ground potential via the resistor R2. The Pch transistor P3 has a source terminal connected to the stabilized power supply voltage Vreg, a gate terminal connected to the gate terminal of the Pch transistor P2, and a drain terminal connected to the ground potential via resistors R3 and R4. A connection line between the resistor R3 and the resistor R4 is an output line 61. The Pch current mirror circuit 60 forms a current mirror circuit by Pch transistors P2 and P3, and a voltage d divided by resistors R3 and R4 is output from the output line 61.

<Oscillator operation>
Next, the operation of the oscillator according to the first embodiment will be described with reference to FIG. FIG. 2 is a graph showing the operation of the oscillator according to the first embodiment.

  FIG. 2A is a graph showing the relationship between the current IS flowing through the Nch current mirror circuit 50 and the temperature. As shown in FIG. 2A, the current IS flowing through the Nch current mirror circuit 50 increases as the temperature rises.

  FIG. 2B is a graph showing the relationship between the gate voltage Vg of the Nch transistor N1 of the push-pull type output circuit 40 and the temperature. As shown in FIG. 2B, the gate voltage Vg of the Nch transistor N1 decreases as the temperature increases.

  FIG. 2C is a graph showing the relationship between the voltage amplitude level of the output signal OUT and the temperature. As shown in FIG. 2C, the output signal OUT cancels the characteristic that the current IS increases as the temperature rises and the characteristic that the gate voltage Vg decreases as the temperature rises. And stable.

  The same effect can be obtained with respect to the Pch transistor P1 of the Pch current mirror circuit 60 and the push-pull type output circuit 40.

  According to the present embodiment described above, the following effects can be obtained.

  In this embodiment, the Nch current mirror circuit 50 cancels the temperature characteristic of the Nch transistor N1 constituting the push-pull type output circuit 40, and the Pch current mirror circuit 60 cancels the temperature characteristic of the Pch transistor P1 constituting the push-pull type output circuit 40. Since the voltage amplitude level of the output signal OUT of the push-pull type output circuit 40 becomes almost constant regardless of the temperature fluctuation, the fluctuation of the current consumption can be suppressed and the power consumption can be kept low even at a high temperature. In addition, a low power consumption oscillator 1 can be realized.

  Although the embodiments of the oscillator have been described above, the present invention is not limited to these embodiments, and can be implemented in various forms without departing from the spirit. Hereinafter, a modification will be described.

  (Modification 1) Modification 1 of the oscillator will be described. FIG. 3 is a circuit diagram showing a configuration of the oscillator 3 according to the first modification. As shown in FIG. 3, the Nch current mirror circuit 150 uses variable resistors VR6 and VR7 in place of the resistors R6 and R7 of the Nch current mirror circuit 50 of the first embodiment. The Pch current mirror circuit 160 uses variable resistors VR3 and VR4 instead of the resistors R3 and R4 of the Pch current mirror circuit 60 of the first embodiment. The resistance values of the variable resistors VR3, VR4, VR6, and VR7 can be set based on the data DA stored in the storage circuit 170.

  According to this configuration, it is possible to adjust the drive capability of the push-pull type output circuit 40 even when the threshold value of the transistor fluctuates due to process variation during the manufacture of the semiconductor, and the stable output signal OUT Can be obtained.

  DESCRIPTION OF SYMBOLS 1 ... Oscillator 10 ... Piezoelectric vibrator, 20 ... Oscillator circuit, 21 ... Inverter, 22 ... Output line, 30 ... Buffer circuit, 31 ... Output line, 40 ... Push-pull type output circuit, 50 ... Nch current mirror circuit, 51 ... output line, 60 ... Pch current mirror circuit, 61 ... output line, 150 ... Nch current mirror circuit, 160 ... Pch current mirror circuit, 170 ... memory circuit.

Claims (2)

A piezoelectric vibrator;
An oscillation circuit that oscillates the piezoelectric vibrator and outputs an oscillation signal;
A buffer circuit for inputting the oscillation signal;
A push-pull output circuit including a first transistor and a second transistor that output a signal obtained by impedance-converting the signal output from the buffer circuit;
A first current mirror circuit connected to the gate terminal of the first transistor;
A second current mirror circuit connected to the gate terminal of the second transistor;
including,
An oscillator characterized by that.   2. The oscillator according to claim 1, wherein the first transistor and the first current mirror circuit are configured by Nch transistors, and the second transistor and the second current mirror circuit are configured by Pch transistors. An oscillator characterized by that.

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