JP2010193114A - Solid-state imaging apparatus, method of driving the same, and electronic information apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To accelerate the transfer of signal charges in a VCCD part without inviting image quality degradation due to leaving the signal charges behind, to improve the transfer efficiency of a CCD and to reduce image defects such as vertical lines. <P>SOLUTION: Behind a VCCD transfer packet TPa for transferring the signal-read signal charges, a VCCD recovery packet TBa for recovering remaining charges left behind when transferring the signal charges by the VCCD transfer packet at an optional interval is generated. When the signal charge is left behind from the VCCD transfer packet of the transfer destination of the signal charges, it is recovered by the VCCD recovery packet behind and merged with the signal charges stored in the original VCCD transfer packet in an HCCD part 1b. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device, a driving method thereof, and an electronic information device, and more particularly to a solid-state imaging device having high VCCD transfer efficiency, a driving method for improving VCCD transfer efficiency in a solid-state imaging device, and such a solid-state imaging device. The present invention relates to an electronic information device such as a digital still camera (DSC).

  A general high-pixel DSC camera uses an interlaced CCD image sensor (hereinafter also referred to as a CCD element) as a solid-state imaging device (for example, Patent Document 1).

  In recent years, there has been a further demand for higher resolution and smaller size of cameras, and in order to meet this demand, the number of pixels of the CCD element itself and the size of unit pixel cells have been reduced.

  In order to realize such an increase in the number of pixels and a reduction in unit pixel cells, an element design and driving method with high area efficiency that can more effectively use the area of the CCD element has been required. In response to demands, CCD image sensors that perform charge transfer by a large number of field drives have been developed.

  That is, in the CCD element, most of the surface area is occupied by the light receiving part (photodiode part) and the vertical charge transfer part (VCCD part), and these occupied parts are efficiently distributed in the surface area of the CCD element. This makes it possible to realize a more efficient element design.

  As for the CCD image sensor for DSC, since the number of pixels was small and the unit cell area was large at the beginning of development, the two-field readout method was mainly used.

  In this two-field readout type CCD image sensor, one charge storage region of the VCCD unit, that is, a charge transfer packet for transferring a signal charge, is a transfer gate electrode (hereinafter simply referred to as a transfer gate) adjacent to two light receiving pixels. ). In this case, the signal charges of the two light-receiving pixels are read twice from the light-receiving pixel to the VCCD unit and the signal charge is transferred from the VCCD unit, and each element operation is performed twice. Is read out. That is, the signal charges of all the light-receiving pixels for one screen are read out as pixel signals by this two-cycle element operation.

  Thereafter, when the unit cell area needs to be reduced as the camera becomes smaller and the number of pixels is increased, the light receiving pixel region (that is, the region occupied by the photodiode) is as much as possible in order to maintain the sensitivity performance of the CCD element. It has become necessary to secure a large area and set the transfer area (area occupied by the VCCD portion) as thin as possible.

  However, if the width of the VCCD unit is simply narrowed, the amount of charge handled by the VCCD unit is reduced, so that there is a problem that the saturation output level is lowered as the camera performance, that is, the dynamic range is lowered. .

  As a countermeasure against such a problem, a method of effectively utilizing the size allocated in the length direction of the VCCD portion, that is, the space in the length direction of the VCCD portion is considered.

  In other words, in place of the above-described two-field reading method, a method called a three-field reading method that can effectively use the space in the length direction of the VCCD unit has come to be used.

  In this three-field readout method, one charge storage part (charge transfer packet) of the VCCD part is formed by using adjacent gates for three pixels of the light receiving pixels. In this case, the pixel signals of three adjacent light receiving pixels are read out in three element operations.

  Similarly, as the number of pixels is further increased and the unit cell size is further reduced, the driving method of the CCD image sensor for DSC has shifted to a four-field reading method, a five-field reading method, and a six-field reading method (for example, Patent Documents 2 and 3).

  FIG. 14 is a diagram illustrating a conventional 6-field readout type CCD element (solid-state imaging device).

  In the imaging region 20a of the CCD element 20 shown in FIG. 14, light receiving pixel columns 50a to 50d in which light receiving pixels that photoelectrically convert incident light from a subject are arranged, and signal charges read from the light receiving pixels are vertically aligned. Vertical charge transfer units (VCCD units) 500a to 500d for transfer are alternately arranged.

  Here, each of the light receiving pixel columns 50a to 50d includes light receiving pixels PD1 to PD12 arranged in a line along the vertical direction of the imaging screen, and each of the VCCD units 500a to 500d includes the light receiving pixel PD1 of the corresponding light receiving pixel column. ~ Having a transfer gate electrode (vertical transfer gate) for reading out signal charges from the PD 12 and transferring them in the vertical direction. These vertical transfer gates form charge transfer packets for transferring the signal charges read from the light receiving pixels in the vertical direction.

  Further, a horizontal charge transfer unit (HCCD unit) 20b that transfers the signal charges transferred from the VCCD units 500a to 500d in the horizontal direction is disposed on one end side of the imaging region 20a.

  Specifically, the light receiving pixels PD1 to PD12 of each of the light receiving pixel rows 50a to 50d are configured by photodiodes, and each of the light receiving pixels PD1, PD3, PD5, PD7, PD9, and PD11 in the light receiving pixel row 50a includes , G (green) pixels are arranged on the green color filter. In addition, a blue color filter is disposed on each of the light receiving pixels PD2, PD4, PD6, PD8, PD10, and PD12 in the light receiving pixel row 50a so as to constitute a B (blue) pixel.

  In addition, a red color filter is disposed on each of the light receiving pixels PD1, PD3, PD5, PD7, PD9, and PD11 in the light receiving pixel row 50b so as to constitute an R (red) pixel. Further, a green color filter is disposed on each of the light receiving pixels PD2, PD4, PD6, PD8, PD10, and PD12 in the light receiving pixel row 50b so as to constitute a G (green) pixel.

  The arrangement of the color filters in the light receiving pixel column 50c shown in FIG. 14 is the same as that in the light receiving pixel column 50a. The arrangement of the color filters in the light receiving pixel column 50d shown in FIG. Is the same.

  FIG. 15 is a diagram for explaining the arrangement of transfer gates in the VCCD unit corresponding to the light receiving pixel column in the imaging region 20a. Together with the arrangement of transfer gates, signal charges are transferred by the charge transfer packet in the VCCD unit 500a. Shows the state of being transferred.

  Here, two transfer gates are provided for each of the light receiving pixels PD1 to PD12 of the light receiving pixel row 50a.

  For example, first and second transfer gates 501 and 502 are provided for the light receiving pixel PD1, and similarly, the third and fourth transfer gates are provided for the light receiving pixels PD2, PD3, PD4, PD5, and PD6. Transfer gates 503 and 504, fifth and sixth transfer gates 505 and 506, seventh and eighth transfer gates 507 and 508, ninth and tenth transfer gates 509 and 510, eleventh and twelfth transfer gates 511 and 512 are provided.

  Further, for the light receiving elements PD7, PD8, PD9, PD10, PD11, PD12 of the light receiving pixel column 50a, the first and second transfer gates 513 and 514, the third and fourth transfer gates 515 and 516, the first 5th and 6th transfer gates 517 and 518, 7th and 8th transfer gates 519 and 520, 9th and 10th transfer gates 521 and 522, 11th and 12th transfer gates 523 and 524 are provided. Yes.

  Similarly to the light receiving elements PD1 to PD12 of the light receiving pixel column 50a, the first to twelfth transfers to the light receiving pixels PD1 to PD6 are performed for the light receiving pixels PD1 to PD12 of the other light receiving pixel columns 50b to 50d. Gates 501 to 512 and first to twelfth transfer gates 513 to 524 for the light receiving elements PD7 to PD12 are provided.

  Further, at the HCCD side end of the VCCD unit 500a, there are a state in which signal charges can be transferred from the VCCD unit 500a to the HCCD unit 20b and a state in which signal charges cannot be transferred from the VCCD unit 500a to the HCCD unit 20b. A barrier gate 501a for switching is provided.

  Here, the first to twelfth transfer gates 501 to 512 for the light receiving pixels PD1 to PD6 are applied with the first to twelfth drive signals (hereinafter also referred to as CCD drive signals) ΦV1 to ΦV12. The first to twelfth transfer gates 513 to 524 for the light receiving pixels PD7 to PD12 are applied with the first to twelfth drive signals ΦV1 to ΦV12, and the barrier gate 501a is applied with the twelfth drive signal ΦV12. It is like that.

  Next, the operation of the solid-state imaging device will be described.

  When the CCD drive signals ΦV1 to ΦV12 are applied to the transfer gates of the VCCD units 500a to 500d, one of six adjacent light receiving pixels between timings t′0 to t′23 is as follows. The signal charge, for example, the signal charge of the light receiving pixel PD1 among the light receiving pixels PD1 to PD6 is transferred from the respective VCCD units 500a to 500d to the HCCD unit 20b, and in the subsequent period, from the VCCD units 500a to 500d to the HCCD unit 20b. The signal charges transferred in this way are transferred in the horizontal direction by the HCCD unit 20b. In the same timing period thereafter, one signal charge of the six adjacent light receiving pixels, for example, the signal charge of the light receiving pixel PD7 of the light receiving pixels PD7 to PD12 is transferred from each VCCD 500a to 500d to the HCCD unit 20b. Further, signal charges from the VCCD units 500a to 500d are transferred in the horizontal direction by the HCCD unit 20b.

  Specifically, as shown in FIG. 15, in the case of a 6-field readout gate configuration (12-phase drive), the transfer gates 501 to 524 are configured to transfer 12 transfer gates in units of one cycle (by a drive signal ΦV1 to ΦV12). As one vertical transfer cycle), the charge under the transfer gate is formed so that one charge transfer packet (charge storage region) TP and transfer packet barrier (charge barrier region) TB are formed across six light receiving pixels. A potential distribution is formed in the transfer region.

  At this time, for example, the potential state of the transfer gate of the VCCD unit 500a is, as shown in FIG. 15, a charge transfer packet (colored region) TP as a region for storing signal charges and an adjacent storage region. A barrier region (a non-colored region) TB separating the gaps is formed.

  Here, the initial state is indicated by timing t′0. At this time, the potential under the transfer gate of the VCCD unit includes the regions under the first to sixth transfer gates to which the drive signals ΦV1 to ΦV6 are applied. , A charge transfer packet (accumulation region) TR, and regions under the seventh to twelfth transfer gates to which the drive signals ΦV7 to ΦV12 are applied are barrier regions TB.

  Next, at the timing t′1, the potential under the transfer gate of the VCCD portion is that the regions under the first to sixth and twelfth transfer gates to which the drive signals ΦV1 to ΦV6 and ΦV12 are applied are charge transfer packets. (Accumulation region), and regions under the seventh to eleventh transfer gates to which the drive signals ΦV7 to ΦV11 are applied are barrier regions.

  Thereafter, as time elapses, that is, at timings t′2, t′3,... T′23, the first to twelfth transfer gates 501 to 512 drive pulses (drives) that control the gate voltage. When the potential under the gate is controlled by applying the signals ΦV1 to ΦV12, the charge transfer packet (accumulation region) TP is moved toward the HCCD unit 20b.

  With this operation, when signal charges for one field are output from the solid-state imaging device 20, the signal charges for the remaining five fields are successively output from the solid-state imaging device in the same manner. When the signal charges for six fields are read in this way, all the signal charges for one screen are read.

JP 10-327354 A JP-A-10-136244 Japanese Patent No. 4078741

  By the way, as described above, the merit of the multi-field readout method is that the area efficiency of the VCCD unit (vertical transfer unit), that is, the ratio of the area used for charge transfer to the occupied area of the VCCD unit can be improved. However, as a disadvantage, it takes time to read out signal charges (pixel signals) for all pixels of one screen.

  Specifically, in a CCD device that performs a six-field read operation by driving the transfer gate of the VCCD section using a 12-phase drive signal, a series of these charge transfer in one vertical direction and charge transfer in one horizontal direction. By the operation, the pixel signal of 1/6 of the light receiving pixels out of all the light receiving pixels is read out. Therefore, in order to read out the pixel signals of all the light receiving pixels, it is necessary to repeat the same operation six times by changing the light receiving pixels from which the signal charges are read.

  Therefore, in order to shorten the time required for reading all the light receiving pixels, it is necessary to increase the speed of the transfer operation itself in the VCCD unit. As a result, the remaining amount of signal charges from the charge transfer packet formed in the portion increases, and there is a problem that image quality deterioration such as vertical lines occurs as transfer deterioration.

  In particular, when capturing a dark image with a small total amount of signal charge, the ratio of the total amount of signal charge generated by photoelectric conversion to the amount of signal charge left in the middle of transfer increases, and image quality degradation becomes significant. .

  The present invention has been made to solve the above-described problems, and is capable of speeding up the transfer of signal charges in the VCCD unit without incurring image quality deterioration due to leaving of signal charges. It is an object of the present invention to obtain an apparatus, a driving method thereof, and an electronic information device equipped with such a solid-state imaging device.

  The solid-state imaging device according to the present invention generates a plurality of light receiving pixels that generate signal charges by photoelectric conversion of incident light, and generates a charge transfer packet that stores signal charges read from the light receiving pixels, and transfers the charges. A charge transfer unit that transfers the signal charge by movement of a packet; and a drive control unit that drives and controls the charge transfer unit. The drive control unit follows the charge transfer packet in the charge transfer unit. At least one or more charge recovery packet that moves and recovers the remaining charge left during the transfer of the signal charge by the charge transfer packet is generated and stored in the charge transfer packet at a predetermined timing The charge transfer unit is driven and controlled so that the signal charge and the signal charge collected by the charge collection packet are merged, thereby achieving the above object.

  According to the present invention, in the solid-state imaging device, the plurality of light receiving pixels are arranged in a matrix, and the charge transfer unit is provided corresponding to each light receiving pixel column, and the light receiving pixels of the corresponding light receiving pixel column A vertical charge transfer unit that stores the signal charge read from the packet in the charge transfer packet and transfers it in the vertical direction, and a horizontal charge transfer unit that transfers the signal charge transferred from the vertical charge transfer unit in the horizontal direction And the drive control unit moves in the vertical charge transfer unit following the charge transfer packet, and collects the remaining charge left when the signal charge is transferred by the charge transfer packet. It is preferable to drive and control the vertical charge transfer unit so that the above charge collection packet is generated.

  In the solid-state imaging device according to the aspect of the invention, the drive control unit may include the signal charge stored in the charge transfer packet generated by the vertical charge transfer unit and the remaining charge collected by the subsequent charge collection packet. It is preferable to drive and control the vertical charge transfer unit so that the horizontal charge transfer unit merges.

  In the solid-state imaging device according to the aspect of the invention, the drive control unit may include the signal charge stored in the charge transfer packet generated by the vertical charge transfer unit and the remaining charge collected by the subsequent charge collection packet. It is preferable to drive and control the vertical charge transfer unit so that the vertical charge transfer unit merges.

  In the solid-state imaging device according to the present invention, the drive control unit is configured to perform a certain period of time so that the charge recovery packet following the charge transfer packet catches up with the charge transfer packet by driving control of the vertical charge transfer unit. It is preferable to maintain the relative movement speed between the charge transfer packet and the charge collection packet at a specific speed.

  In the solid-state imaging device according to the present invention, the drive control unit is configured to perform a certain period of time so that the charge recovery packet following the charge transfer packet catches up with the charge transfer packet by driving control of the vertical charge transfer unit. It is preferable to stop the movement of the charge transfer packet.

  In the solid-state imaging device according to the present invention, the drive control unit is configured to perform a certain period of time so that the charge recovery packet following the charge transfer packet catches up with the charge transfer packet by driving control of the vertical charge transfer unit. It is preferable to keep the movement speed of the charge collection packet at a speed larger than the movement speed of the charge transfer packet.

  According to the present invention, in the solid-state imaging device, the charge transfer unit is provided between the vertical charge transfer unit and the horizontal charge transfer unit, and temporarily receives a signal charge transferred from the vertical charge transfer unit. A charge transfer buffer unit for accumulating, the drive control unit comprising: a signal charge stored in a charge transfer packet generated by the vertical charge transfer unit; and a remaining charge recovered by a subsequent charge recovery packet; However, it is preferable to drive and control the charge transfer unit so that the charge transfer buffer unit merges.

  In the solid-state imaging device according to the present invention, the charge transfer unit transfers the signal charge of the light receiving pixel in the vertical direction once, and transfers the signal charge of the light receiving pixel in the horizontal direction once. The horizontal transfer operation is a single read operation, and the read operation is performed six times or more to perform a six-field read operation for reading the signal charges of all the light receiving pixels, and the vertical charges constituting the charge transfer unit The transfer unit assigns two transfer gate electrodes to each light receiving pixel, and sets the 12 transfer gate electrodes corresponding to the six adjacent light receiving pixels as one vertical transfer period, and transfers the charge within the one vertical transfer period. Preferably, the packet and subsequent charge recovery packet are configured to be generated.

  In the solid-state imaging device according to the aspect of the invention, the drive control unit may include the signal charge stored in the charge transfer packet generated by the vertical charge transfer unit and the remaining charge recovered by the subsequent charge recovery packet. It is preferable to drive and control the vertical charge transfer unit so that the vertical charge transfer unit merges in the last one vertical transfer period.

  In the solid-state imaging device according to the aspect of the invention, the solid-state imaging device includes an output unit that converts the signal charge transferred from the horizontal transfer unit into a pixel signal that is a voltage signal and outputs the pixel signal. Charge transfer for transferring the signal charge read from the light receiving pixel when the operation mode of the vertical charge transfer unit is large in the amount of signal charge generated in the light receiving pixel based on the output pixel signal A second transfer mode for generating a charge recovery packet for recovering the remaining charge together with the charge transfer packet when the amount of signal charge generated by the light receiving pixel is small. It is preferable to control the vertical charge transfer unit so that

  In the solid-state imaging device according to the aspect of the invention, it is preferable that the solid-state imaging device includes a signal charge adjusting unit that adjusts the amount of signal charge generated by the light receiving pixels.

  According to the present invention, in the solid-state imaging device, the light receiving pixel is formed on a surface of a semiconductor substrate, includes a photodiode that photoelectrically converts incident light, and the signal charge adjusting unit is formed on a back surface side of the semiconductor substrate. And an overflow drain portion for extracting signal charges generated by the photodiodes, and the drive control portion applies a control voltage applied to the overflow drain portion to a pixel signal output from the output portion. It is preferable to adjust based on this.

  According to the present invention, in the solid-state imaging device, the drive control unit moves behind the charge transfer packet in the vertical charge transfer unit, and is left behind when the signal charge is transferred by the charge transfer packet. It is preferable to drive and control the vertical charge transfer unit so that two adjacent charge collection packets for collecting the remaining charges are generated.

  A driving method of a solid-state imaging device according to the present invention generates a plurality of light receiving pixels that generate signal charges by photoelectric conversion of incident light, and a charge transfer packet that stores signal charges read from each light receiving pixel, A solid-state imaging device including a charge transfer unit that transfers the signal charge by movement of a charge transfer packet, wherein the charge transfer unit moves behind the charge transfer packet, and At least one or more charge recovery packets for recovering the remaining charges left during the transfer of the signal charges by the charge transfer packets are generated, and at a determined timing, the signal charges stored in the charge transfer packets, The charge transfer unit is driven so that the signal charge stored in the charge recovery packet is merged, thereby achieving the above object.

  An electronic information device according to the present invention is an electronic information device including an imaging unit that captures an image of a subject, and the imaging unit is the above-described solid-state imaging device according to the present invention. Is done.

  The operation of the present invention will be described below.

  In the present invention, after the charge transfer packet for transferring the signal read-out charge, a charge recovery packet for collecting the signal charge left in the previous charge transfer packet is generated at an arbitrary interval. If signal charge is left behind during signal charge transfer, it is recovered by the back charge recovery packet and the signal charges of both packets are merged, thereby suppressing deterioration in transfer efficiency due to signal charge leftover. it can.

  In the present invention, the signal charge accumulated in the charge transfer packet and the signal charge collected by the charge collection packet are merged by the charge transfer buffer unit formed at the end of the vertical charge transfer unit. The signal charges corresponding to one vertical transfer period transferred separately in the transfer packet and the charge recovery packet can be collectively transferred to the HCCD unit by the charge transfer buffer unit, and the transfer operation in the HCCD unit can be performed vertically. This can be done independently of the transfer timing.

  In the present invention, the signal charge stored in the charge transfer packet and the signal charge collected by the charge collection packet are merged in the transfer final stage region of the vertical charge transfer unit. Signal charges corresponding to one vertical transfer cycle transferred separately in charge collection packets can be transferred to the HCCD unit collectively in the transfer final stage region of the vertical charge transfer unit, and the transfer operation in the HCCD unit Can be afforded.

  In the present invention, the first transfer operation mode for generating the charge transfer packet and the subsequent charge recovery packet according to the generation amount of the signal charge, and the second transfer operation for generating only the charge transfer packet. Since the mode is switched, a charge transfer packet and a subsequent charge recovery packet are generated when the exposure amount is small, and only the charge transfer packet is generated when the exposure amount is large. While suppressing image quality degradation due to significant charge retention, when the amount of exposure is large, the size of the transfer packet in the transfer direction can be increased so that a large amount of charge can be transferred, and the dynamic range can be expanded. High quality image quality can be obtained by transferring the corresponding signal charges.

  According to the present invention, a plurality of light receiving pixels that generate a signal charge by photoelectric conversion of incident light, a charge transfer packet that stores a signal charge read from each light receiving pixel, and a movement of the charge transfer packet are generated. In the solid-state imaging device including the charge transfer unit that transfers the signal charge, the charge transfer unit moves following the charge transfer packet and is left behind when the signal charge is transferred by the charge transfer packet. At least one or more charge recovery packet for collecting the remaining charge is generated, and the signal charge stored in the charge transfer packet and the signal charge recovered by the charge recovery packet are merged at a predetermined timing. The charge transfer unit is driven and controlled so that, for example, in the multi-field drive CCD, the signal charge of the VCCD is transferred more efficiently. Bets can be, without causing deterioration of image quality, such as vertical line defects due to VCCD transfer deterioration, it is possible to shorten the time required to read all of the pixels (= frame rate faster). That is, it is possible to easily realize high performance (high image quality / high speed) of the camera without complicating the element configuration.

FIG. 1 is a diagram for explaining a solid-state imaging device according to Embodiment 1 of the present invention, and shows a schematic configuration of a CCD image sensor which is the solid-state imaging device of Embodiment 1. FIG. FIG. 2 is a diagram for explaining the CCD image sensor according to the first embodiment of the present invention, and shows the arrangement of each light receiving pixel and the corresponding transfer gate in the imaging region of this CCD image sensor. FIG. 3 is a diagram for explaining the CCD image sensor according to the first embodiment of the present invention. In addition to the arrangement of the transfer gates in the VCCD unit corresponding to the light receiving pixel column, the signal charges are transferred in the VCCD unit. Show. FIG. 4 is a diagram for explaining a solid-state imaging device according to Embodiment 2 of the present invention, and shows a schematic configuration of a CCD image sensor which is the solid-state imaging device of Embodiment 2. FIG. 5 is a diagram for explaining a CCD image sensor according to Embodiment 2 of the present invention. In this CCD image sensor, each light receiving pixel in the imaging region, an array of transfer electrodes corresponding thereto, and signals in the VCCD unit The charge transfer operation is shown by comparing the case where the charge recovery packet is used (FIG. (A)) and the case where this is not used (FIG. (B)). FIG. 6 is a diagram for explaining a solid-state imaging device according to Embodiment 3 of the present invention, and shows a schematic configuration of a CCD image sensor which is the solid-state imaging device of Embodiment 3. FIG. 7 is a diagram for explaining a CCD image sensor according to Embodiment 3 of the present invention, and shows an arrangement of each light receiving pixel and a corresponding transfer electrode in an imaging region in this CCD image sensor. FIG. 8 is a diagram for explaining a CCD image sensor according to the third embodiment of the present invention. In addition to the arrangement of transfer gates in the VCCD unit corresponding to the light-receiving pixel column, how signal charges are transferred in the VCCD unit. Show. FIG. 9 is a diagram for explaining a solid-state imaging device according to Embodiment 4 of the present invention, and shows a schematic configuration of a CCD image sensor which is the solid-state imaging device of Embodiment 4. FIG. 10 is a diagram for explaining a CCD image sensor according to Embodiment 4 of the present invention, and shows an array of light receiving pixels and corresponding transfer electrodes in an imaging region of the CCD image sensor. FIG. 11 is a diagram for explaining a CCD image sensor according to the fourth embodiment of the present invention. In addition to the arrangement of transfer gates in the VCCD unit corresponding to the light-receiving pixel column, how signal charges are transferred in the VCCD unit. Show. FIG. 12 is a diagram for explaining a solid-state imaging device according to Embodiment 5 of the present invention, and shows a schematic configuration of a CCD image sensor which is the solid-state imaging device of Embodiment 5. FIG. 13 is a block diagram illustrating a schematic configuration example of an electronic information device using the solid-state imaging device according to any one of Embodiments 1 to 5 as an imaging unit as Embodiment 6 of the present invention. FIG. 14 is a diagram for explaining a conventional 6-field readout type CCD element (solid-state imaging device), and shows the arrangement of each light receiving pixel and its corresponding transfer electrode in the imaging region of this CCD image sensor. . FIG. 15 is a diagram for explaining the operation of the conventional CCD image sensor shown in FIG. 14, in which the signal charges are transferred in the VCCD section together with the arrangement of transfer gates in the VCCD section corresponding to the light receiving pixel column. Is shown.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
1-3 is a figure explaining the solid-state imaging device by Embodiment 1 of this invention. FIG. 1 shows a schematic configuration of a CCD image sensor which is a solid-state imaging device of the first embodiment, and FIG. 2 shows an arrangement of light receiving pixels in an imaging region and corresponding transfer gates in the CCD image sensor. Yes.

  The CCD image sensor 1 according to the first embodiment is formed on a semiconductor substrate (not shown) and has an imaging area 1a for imaging a subject, and incident light from the subject is input to the imaging area 1a. The light receiving pixels PD that perform photoelectric conversion are arranged in a matrix, and a vertical transfer unit (VCCD unit) 100 that transfers signal charges read from the light receiving pixels in the vertical direction is arranged along each light receiving pixel column. Here, a readout gate Rg is arranged between the VCCD unit 100 and each of the light receiving pixels PD of the corresponding light receiving pixel row 10, and the signal charge generated by the light receiving pixel PD passes through the readout gate Rg. The data is read out to the VCCD unit 100 via the interface.

  The CCD image sensor 100 is disposed on one end side of the imaging region 1a, and a horizontal charge transfer unit (HCCD unit) 1b that horizontally transfers signal charges transferred from the VCCD unit 100, and the HCCD unit. 1b, an output unit 1c that converts a signal charge from the HCCD unit 1b into a voltage signal and outputs a pixel signal Sp, a drive signal ΦV1 to ΦV12 of the VCCD unit 100, and a drive signal ΦH1 of the HCCD unit 1b And ΦH2 are generated on the back side of the semiconductor substrate constituting the CCD image sensor 1 and the signal charge generated by the light receiving pixels is discharged to the outside of the image sensor 100. Based on an overflow drain (not shown) and the pixel signal Sp from the output unit 1c, the timing generator 1 a and an overflow drain (hereinafter, also referred to as OFD portion.), and has a control unit 11b for controlling the respective control signals Ctg and Cofd. That is, here, the overflow drain portion draws out the signal charges generated in each light receiving pixel PD to the outside of the substrate by the control voltage Cofd applied thereto.

  Next, the configuration of the imaging region 1a will be specifically described with reference to FIG.

  As described above, in the imaging region 1a, the light receiving pixel arrays 10a to 10d in which light receiving pixels that photoelectrically convert incident light from the subject are arranged, and the VCCD unit that transfers the signal charges read from the light receiving pixels in the vertical direction. 100a to 100d are alternately arranged.

  Here, for simplification of description, four light receiving pixel columns 10a to 10d as light receiving pixel columns and four VCCD units 100a to 100d as vertical transfer units will be described. The odd-numbered light receiving pixel columns 10a and 10c and the even-numbered light receiving pixel columns 10b and 10d differ only in the arrangement of the colors of the arranged color filters, and the other points have the same configuration. Yes. The VCCD units 100a to 100d all have the same configuration.

  Each of the light receiving pixel columns 10a to 10d includes light receiving pixels PD1 to PD12 arranged in a line along the vertical direction of the imaging screen, and each vertical CCD 100a to 100d receives a signal from the light receiving pixels PD1 to PD12 of the corresponding light receiving pixel column. It has a transfer gate (hereinafter also referred to as a vertical transfer gate) that reads out charges and transfers them in the vertical direction. These vertical transfer gates move in the charge transfer packet (hereinafter also referred to as VCCD packet) for transferring the signal charge read from the light receiving pixel in the vertical direction, and move to the charge transfer packet by the charge transfer packet. The charge collection packet for collecting the remaining charge, which is the signal charge left behind, is formed.

  Specifically, in the light receiving pixels PD1, PD3, PD5, PD7, PD9, and PD11 in the odd-numbered light receiving pixel rows 10a and 10c, color filters are arranged so that G (green) pixels are configured. In the light receiving pixels PD2, PD4, PD6, PD8, PD10, and PD12 in the light receiving pixel rows 10a and 10c, color filters are arranged so that B (blue) pixels are formed.

  Further, in the light receiving pixels PD1, PD3, PD5, PD7, PD9, and PD11 in the light receiving pixel columns 10b and 10d of the even number columns, color filters are arranged so as to configure R (red) pixels. In the light receiving pixels PD2, PD4, PD6, PD8, PD10, and PD12 in the light receiving pixel rows 10b and 10d, color filters are arranged so that G (brown) pixels are formed.

  For the light receiving pixels PD1 to PD6 of each light receiving pixel column, first to twelfth transfer gates 101 to 112 are provided so that two adjacent transfer gates correspond to each light receiving pixel, Similarly, the first to twelfth transfer gates 113 to 124 are provided for the light receiving pixels PD7 to PD12 of each light receiving pixel column so that two adjacent transfer gates correspond to each light receiving pixel. .

  Further, at the end of the VCCD unit 100a on the side of the HCCD unit, a signal charge can be transferred from the VCCD unit 100a to the HCCD unit 1b, and a signal charge cannot be transferred from the VCCD unit 100a to the HCCD unit 1b. A barrier gate 101a is provided for switching between the two.

  Here, one of the two transfer gates corresponding to each light receiving pixel also serves as a read gate Rg (see FIG. 1) for reading the signal charges generated by the corresponding light receiving pixels PD1 to PD12 to the VCCD unit 10. .

  Further, the first to twelfth transfer gates 101 to 112 for the light receiving pixels PD1 to PD6 are applied with first to twelfth drive signals (hereinafter also referred to as CCD drive signals) ΦV1 to ΦV12, respectively. The first to twelfth transfer gates 113 to 124 for the PD 12 are applied with the first to twelfth drive signals ΦV1 to ΦV12, and the barrier gate 101a is applied with the twelfth drive signal ΦV12. Yes.

  In the solid-state imaging device 1 of the first embodiment, the timing generation unit 11a that generates the drive signals ΦV1 to ΦV12 is controlled by the timing control signal Ctg from the control unit 11b, and the VCCD units 100a to 100d are CCDs. In response to the drive signals ΦV1 to ΦV12 from the drive unit 11a, together with the charge transfer packets TPa and TPb for transferring the signal charges read from the light receiving pixels, immediately after that, the remaining charges left by the charge transfer packets TPa and TPb are collected. The charge recovery packets RPa and RPb to be generated are driven.

  Next, the operation will be described.

  In the CCD image sensor 1 of the first embodiment, when the imaging operation starts, the timing generation unit 11a drives the driving signals ΦV1 to ΦV12 of the VCCD unit 100 and the driving of the HCCD unit 1b based on the control signal Ctg from the control unit 11b. Signals ΦH1 and ΦH2 are generated and output to VCCD unit 100 and HCCD unit 1b.

  In each light receiving pixel PD, signal charges are generated by photoelectric conversion of incident light, and the signal charges read from the light receiving pixels PD through the read gate Rg to the VCCD unit 100 are transferred by the VCCD unit 100 to the HCCD unit 1b. The signal charge from the VCCD unit 100 is transferred in the horizontal direction in the HCCD unit 1b. The output unit 1 converts the signal charge transferred from the HCCD unit 1b into a voltage signal and outputs it as a pixel signal Sp.

  For example, as shown in FIG. 3, in the VCCD unit 100a, for example, between the timings t0 to t23, one signal charge of six adjacent light receiving pixels, for example, the signal charge of PD1 of the light receiving pixels PD1 to PD6. Is transferred to the HCCD unit 1b, and signal charges transferred from the VCCD unit 100a by the HCCD unit 1b are transferred in the horizontal direction by the HCCD unit 1b in the subsequent period. In the same timing period thereafter, one signal charge of the six adjacent light receiving pixels, for example, the signal charge of PD7 of the light receiving pixels PD7 to PD12 is transferred from each VCCD unit 100a to the HCCD unit 1b. The signal charge from the VCCD unit 100a is transferred in the horizontal direction by the HCCD unit 1b.

  For convenience of explanation, FIG. 3 shows only the VCCD unit 100a among the VCCD units 100a to 100d.

  Specifically, as shown in FIG. 3, in the six-field readout gate configuration, the potential state under the transfer gate of the VCCD unit is applied to vertical transfer gates (hereinafter also referred to as VCCD gates) 101 to 124. Drive signals [Phi] V1 to [Phi] V12, twelve VCCD gates in one cycle unit, spanning six pixels of light receiving pixels, charge transfer packets (charge storage regions), transfer packet barriers in an area corresponding to one vertical transfer period The charge collection packet (collection area) and the collection packet barrier are formed. In FIG. 3, a colored region is shown as a charge accumulation region where a charge transfer packet is formed, and a non-colored region is shown as a barrier region where a barrier is formed, and is further hatched. This area is shown as a charge collection packet forming area.

  Here, the initial state is shown at timing t0. At this time, in the region extending from the first to sixth light receiving pixels PD1 to PD6, the potential under the VCCD gate is determined by the drive signals ΦV1 to ΦV12 of the VCCD gate. As described below, a charge transfer packet and a charge recovery packet are formed.

  That is, regions corresponding to the first to sixth gates to which the drive signals ΦV1 to ΦV6 are applied become storage regions in which the charge transfer packets TPa are formed, and the seventh to eighth gates to which the drive signals ΦV7 to ΦV8 are applied. A region corresponding to the transfer packet barrier TBa is formed as a barrier region, and regions corresponding to the ninth to tenth gates to which the drive signals φV9 to φV10 are applied are recovery regions RPa in which the charge recovery packets are formed. Thus, the region corresponding to the 11th to 12th gates to which the drive signals φV11 to φV12 are applied becomes the barrier region RBa in which the barrier of the charge recovery packet is formed.

  Further, in the region extending from the seventh to the twelfth light receiving pixels PD7 to PD12, the VCCD gate drive signals ΦV1 to ΦV12 form the charge transfer packet and the charge recovery packet as follows. It has been made.

  That is, the regions corresponding to the first to sixth gates to which the drive signals ΦV1 to ΦV6 are applied become storage regions in which the charge transfer packets TPb are formed, and the seventh to eighth gates to which the drive signals ΦV7 to ΦV8 are applied. The region corresponding to the transfer packet barrier TBb is formed as a barrier region, and the region corresponding to the ninth to tenth gates to which the drive signals φV9 to φV10 are applied is the recovery region in which the charge recovery packet RPb is formed. Thus, the areas corresponding to the 11th to 12th gates to which the drive signals ΦV11 to ΦV12 are applied are the barrier areas where the barrier RBb of the collection packet is formed.

  Next, at the timing t1, the charge transfer packet is formed in the regions corresponding to the twelfth and first to sixth gates to which the drive signals ΦV12 and ΦV1 to ΦV6 are applied due to the potential under the VCCD gate. A region corresponding to the seventh to eighth gates adjacent to which the drive signals ΦV7 to ΦV8 are applied becomes a barrier region in which a barrier for the charge transfer packet is formed, and the drive signals φV8 to φV10 are applied. A region corresponding to the adjacent eighth to tenth gates is a recovery region where the charge recovery packet is formed, and a region corresponding to the eleventh gate to which the drive signal φV11 is applied is formed as a barrier for the charge recovery packet. This is a barrier area.

  Thereafter, with the passage of time, that is, at timings t2, t3,..., T23, the gate potential is controlled by the drive signals (drive pulses) ΦV1 to ΦV12. As a result, the charge transfer packets TPa and TPb and the charge recovery packets RPa and RPb move to the HCCD unit 1b so that the charge recovery packet follows immediately after the charge transfer packet.

  Thus, the charge collection packet moves following the charge transfer packet, so that the remaining charge left in the charge transfer packets TPa and TPb is collected in the charge collection packets RPa and RPb and transferred to the HCCD unit 1b.

  In the HCCD unit 1b, the charge transfer packets (packets for transferring the original signal charges) TPa and TPb and the charge recovery packets (packets containing the remaining charges from the front) RPa and RPb are received at timings t17 to t22. Merged.

  As a result, the amount of charge remaining in the VCCD unit can be greatly reduced.

For example, in the conventional driving method, the ratio of the charge remaining amount per cycle of 12-phase driving (that is, per vertical transfer period in 12-phase driving) to the total transfer charge amount per cycle of 12-phase driving is (1 / If N), in the driving method of the present invention, charge transfer is performed by two packets per cycle of 12-phase driving, so the amount of charge remaining is (1 / N) ² .

  Therefore, as shown in the equation (1), the remaining amount of transfer charge is reduced.

(1 / N)> (1 / N) ² (1)
Charge remaining amount when using the conventional driving method = (1 / N)
Charge remaining amount when using the driving method of the present invention = (1 / N) ²
In other words, in a CCD image sensor having 12 transfer gates as transfer gates corresponding to one vertical transfer period, the transfer gates (storage gates) forming the charge transfer packet change from 6 sheets → 7 sheets → 6 sheets → 7 sheets. Then, the barrier gate forming the barrier of the charge transfer packet changes from 2 → 1 → 2 → 1 and the transfer gate forming the charge collection packet changes from 2 → 3 → 2 → 3 Then, by driving the VCCD section so that the barrier gate forming the barrier of the charge collection packet changes from 2 sheets → 1 sheet → 2 sheets → 1 sheet, the signal charge and the charge collection of the charge transfer packet in the HCCD section The signal charge of the packet is merged. In this case, the drive of the transfer gate that forms the charge transfer packet and the barrier gate that forms the barrier of the charge transfer packet are driven in eight phases, and the transfer gate that forms the charge collection packet and the barrier gate that forms the barrier of the charge collection packet Driving is four-phase driving.

  As described above, the first embodiment includes the timing generation unit (CCD driving unit) 11a that generates the drive signals ΦV1 to ΦV12 of the VCCD units 100a to 100d, and the control unit 11b that controls the timing generation unit 11a, and is CCD driven. The VCCD units 100a to 100d are driven by the drive signals ΦV1 to ΦV12 from the unit 11a, and the VCCD units 100a to 100d receive the remaining charges left by the charge transfer packets together with the charge transfer packets TPa and TPb that transfer the signal charges. Since the charge collection packets RPa and RPb to be collected are moved, it is possible to reduce the remaining charges left from the transfer by the charge transfer packet in the VCCD unit, thereby improving the transfer efficiency and improving the vertical line and the like. Image deterioration can be reduced.

In the first embodiment, the case where there is one charge recovery packet following the charge transfer packet is shown. However, two charge recovery packets following the charge transfer packet are generated, or three or more are generated. In this case, it is possible to further reduce untransferred data in the VCCD unit.
(Embodiment 2)
4 and 5 are diagrams illustrating a solid-state imaging device according to Embodiment 2 of the present invention.

  FIG. 4 shows a schematic configuration of a CCD image sensor which is a solid-state imaging device of the second embodiment, and FIG. 5 shows an arrangement of each light receiving pixel and a corresponding transfer gate in an imaging region in the CCD image sensor. A signal charge is transferred together with the VCCD unit.

  The CCD image sensor 2 according to the second embodiment includes a control unit 12b and a timing generation unit 12a in place of the control unit 11b and the timing generation unit 11a in the CCD image sensor 1 according to the first embodiment. In the CCD image sensor 2, the control unit 12 b and the timing generation unit 12 a not only move the charge collection packet following the charge transfer packet, but also move the charge transfer packet for a certain period in the vertical transfer operation. It stops, and it is comprised so that only the charge collection | recovery packet following this may be moved so that it may join a charge transfer packet. Therefore, in the second embodiment, unlike the first embodiment, the HCCD unit 1b does not perform the operation of combining the signal charge stored in the charge transfer packet and the signal charge recovered by the charge recovery packet. Other configurations are the same as those of the CCD image sensor of the first embodiment.

  Next, the operation will be described.

  In the CCD image sensor 2 of the second embodiment, when the imaging operation is started, in the timing generation unit 12a, the timing generation unit 12a generates the drive signals ΦV1 to ΦV12 of the VCCD unit 100 based on the control signal Ctg from the control unit 12b. The drive signals ΦH1 and ΦH2 of the HCCD unit 1b are generated and output to the VCCD unit 100 and the HCCD unit 1b.

  In each light receiving pixel PD, signal charges are generated by photoelectric conversion of incident light, and the signal charges read from the light receiving pixels PD through the read gate Rg to the VCCD unit 100 are transferred by the VCCD unit 100 to the HCCD unit 1b. The signal charge from the VCCD unit 100 is transferred in the horizontal direction in the HCCD unit 1b.

  For example, as shown in FIG. 3, during the vertical transfer of signal charges, in the VCCD units 100a to 100d, the charge transfer packets TPa and TPb and the charge recovery packets RPa and RPb are respectively separated by a predetermined interval. Move to 1b.

  In the second embodiment, the movement of the charge transfer packets TPa and TPb is stopped during a predetermined period timing t ″ 0 to t ″ 8 during such a vertical transfer operation, and the subsequent charge recovery packets RPa and Only RPb moves so as to be coupled to the charge transfer packets TPa and TPb.

  Specifically, as shown in FIG. 5A, in the six-field readout gate configuration, the potential state under the transfer gate of the VCCD unit is applied to the transfer gates (hereinafter also referred to as VCCD gates) 101-124. Drive signals [Phi] V1 to [Phi] V12, twelve VCCD gates in one cycle unit, spanning six pixels of light receiving pixels, charge transfer packets (charge storage regions), transfer packet barriers in an area corresponding to one vertical transfer period The charge collection packet (collection area) and the collection packet barrier are formed.

  In FIG. 5, a colored region is shown as a charge storage region where a charge transfer packet is formed, and a non-colored region is shown as a barrier region where a barrier is formed, and is further hatched. This area is shown as a charge collection packet forming area.

  Here, the initial state is indicated by the timing t ″ 0. At this time, in the region straddling the first to sixth light receiving pixels PD1 to PD6, the drive signals ΦV1 to ΦV6 are applied by the potential under the VCCD gate. The region under the transfer gate is the charge storage region TPa in which the charge transfer packet is formed, and the region under the transfer gate to which the drive signals ΦV7 to ΦV8 are applied is the barrier region TBa in which the barrier TBa of the transfer packet is formed. Thus, the region under the transfer gate to which the drive signals φV9 to φV10 are applied becomes the recovery region RPa in which the charge recovery packet RPa is formed, and the region under the transfer gate to which the drive signals φV11 to φV12 is applied is the charge recovery packet. The barrier region RBa is formed in a region straddling the seventh to twelfth light receiving pixels PD7 to PD12. Similarly, a charge transfer packet (charge storage region) TPb, a transfer packet barrier TBb, a charge recovery packet (recovery region) RPb, and a recovery packet barrier RBb are formed.

  Next, at timing t ″ 1, due to the potential under the VCCD gate, the regions corresponding to the transfer gates to which the drive signals ΦV1 to ΦV6 are applied become the storage regions TPa and TPb and correspond to the transfer gates to which the drive signal ΦV7 is applied. The area corresponding to the transfer gate to which the drive signals φV8 to φV9 are applied becomes the recovery packet area, and the area corresponding to the transfer gate to which the drive signals φV10 to φV12 is applied becomes the recovery barrier area. ing.

  Thereafter, with the passage of time, the potential under the gate is controlled at timings t ″ 2, t ″ 3... T ″ 8.

  In FIG. 5B, the CCD image sensor according to the second embodiment shown in FIG. 5A stops the movement of the charge transfer packet for a predetermined period of the vertical transfer period, and subsequently recovers the charge. In contrast to the operation of moving only the packet, in the conventional CCD image sensor, the movement of the charge transfer packet is stopped for a certain period in the vertical transfer operation.

  As a result, the recovered packet that follows the stopped transfer packet moves so as to approach the transfer packet and is coupled to the transfer packet.

  As described above, in the second embodiment, the VCCD units 100a to 100d collect the remaining charge left by the charge transfer packet together with the charge transfer packet for transferring the signal charge by the drive signals ΦV1 to ΦV12 from the CCD drive unit 11a. The charge transfer packet is generated, and the charge transfer packet and the charge recovery packet are moved within the charge transfer channel of the VCCD unit so that the charge recovery packet immediately follows the charge transfer packet. During this period, the movement of the charge transfer packet is stopped, and only the subsequent charge recovery packet is moved so as to join the charge transfer packet, so that the signal charge is not left in the charge transfer packet during the VCCD transfer. Even if it occurs, the remaining signal charge is recovered by the charge recovery packet. Thus, it is possible to return to the charge transfer packet and to reduce the remaining transfer.

In the second embodiment, as the CCD image sensor, the charge transfer packet and the charge recovery packet are moved within the VCCD unit so that the charge recovery packet follows immediately after the charge transfer packet, and further, in the vertical transfer operation, the charge transfer packet and the charge recovery packet are constant. In this period, the movement of the charge transfer packet is stopped, and the subsequent charge recovery packet is moved so as to join the charge transfer packet. However, it is not always necessary to stop the movement of the charge transfer packet. Absent. For example, the movement speed of the charge collection packet may be made larger than the movement speed of the charge transfer packet at regular intervals in the vertical transfer operation so that the charge collection packet following the charge transfer packet catches up with the charge transfer packet. In this case, since the charge collection packet disappears when it catches up with the charge transfer packet, a charge collection packet is newly generated after the charge transfer packet.
(Embodiment 3)
6 to 8 are diagrams illustrating a solid-state imaging device according to Embodiment 3 of the present invention.

  FIG. 6 shows a schematic configuration of a CCD image sensor which is a solid-state imaging device of the third embodiment, and FIG. 7 shows an arrangement of light receiving pixels in the imaging region and a transfer gate corresponding to the CCD image sensor. Yes.

  The CCD image sensor 3 of the third embodiment is formed on a semiconductor substrate (not shown) and has an imaging area 3a for imaging a subject, and incident light from the subject is input to the imaging area 3a. The light receiving pixels PD for photoelectric conversion are arranged in a matrix, and a vertical CCD (VCCD unit) 300 for transferring the signal charges read from the light receiving pixels PD in the vertical direction is arranged along each light receiving pixel column 30. Here, a readout gate Rg is arranged between the VCCD section 300 and each of the light receiving pixels PD of the corresponding light receiving pixel row 30, and the signal charge generated by the light receiving pixel PD passes through the readout gate Rg. The data is read out to the VCCD unit 300 via the interface.

  The CCD image sensor 3 is disposed on one end side of the imaging region 1a, and a horizontal CCD (HCCD unit) 1b that horizontally transfers signal charges transferred from the VCCD unit 300, and the HCCD unit 1b An output unit 1c that is arranged on one end side and converts a signal charge from the HCCD unit 1b into a voltage signal and outputs a pixel signal Sp, drive signals VΦ1 to VΦ12, SCCD1, and SCCD2, and an HCCD unit 1b of the VCCD unit 300 The timing generator (CCD driver) 13a for generating the drive signals ΦH1 and ΦH2 and the signal charges generated by the light receiving pixels PD are provided on the back side of the semiconductor substrate constituting the CCD image sensor 3. Based on the overflow drain (not shown) discharged to the outside of the pixel and the pixel signal Sp from the output unit 1c The timing generator 13a, and an overflow drain (hereinafter, also referred to as OFD portion.), And has a control unit 13b for controlling the respective control signals Ctg and Cofd. The overflow drain part is the same as that of the first embodiment.

  In the CCD image sensor 3 according to the third embodiment, the control unit 13b and the timing generation unit 13a form the charge transfer packet and the charge recovery packet as in the CCD image sensor 1 according to the first embodiment. In addition to driving the transfer gate so that the packet moves immediately after the charge transfer packet, the CCD buffer unit provided on the terminal side of the VCCD 300 adds the signal charge of the charge transfer packet and the signal charge of the charge recovery packet. It is to match.

  Next, the configuration of the imaging region 3a and the CCD buffer unit 3c will be specifically described with reference to FIGS.

  In the imaging region 3a, light receiving pixel rows 30a to 30d in which light receiving pixels that photoelectrically convert incident light from a subject are arranged, and VCCD units 300a to 300d that transfer signal charges read from the light receiving pixels in the vertical direction, and Are arranged alternately.

  Here, for simplification of description, four light receiving pixel columns 30a to 30d as light receiving pixel columns and four VCCD units 300a to 300d as vertical transfer units will be described. In FIG. 8, only the VCCD unit 300a is shown for convenience of explanation.

  Also in this embodiment, the odd-numbered light receiving element arrays 30a and 30c and the even-numbered light receiving element arrays 30b and 30d differ only in the color arrangement of the arranged color filters, and the other points are the same. It has a configuration. The VCCD units 300a to 300d all have the same configuration.

  Each of the light receiving pixel columns 30a to 30d includes light receiving pixels PD1 to 12 arranged in a line along the vertical direction of the imaging screen, and each vertical CCD 300a to 300d receives a signal from the light receiving pixels PD1 to PD12 of the corresponding light receiving pixel column. It has a transfer gate electrode (hereinafter simply referred to as a transfer gate) for reading out charges and transferring them in the vertical direction. These transfer gates form a vertical transfer packet (hereinafter also referred to as a VCCD packet) for transferring the signal charges read from the light receiving pixels in the vertical direction.

  Specifically, the odd-numbered light-receiving pixel rows 30a and 30c are the same as the light-receiving pixel rows 10a and 10c in the first embodiment, and the even-numbered light-receiving pixel rows 30b and 30d are the light-receiving pixels in the first embodiment. It is the same as the columns 10b and 10d.

  For the light receiving pixels PD1 to PD6 in each light receiving pixel column, first to twelfth transfer gates 301 to 312 are provided so that two transfer gates adjacent to each light receiving pixel correspond to each other. In addition, the first to twelfth transfer gates 313 to 324 are also provided for the light receiving pixels PD7 to PD12 of each light receiving pixel column so as to correspond to the two transfer gates adjacent to each light receiving pixel.

  Further, at the end of the VCCD unit 300a on the side of the HCCD unit, a signal charge can be transferred from the VCCD unit 300a to the HCCD unit 1b, and a signal charge cannot be transferred from the VCCD unit 300a to the HCCD unit 1b. The barrier gate 301a for switching between the charge transfer packet and the charge collection packet is formed between the barrier gate 301a and the HCCD unit 1b. Charge holding gates 301s and 302s are provided.

  Here, one of the two transfer gates corresponding to each light receiving pixel also serves as a read gate Rg for reading the signal charges generated by the corresponding light receiving pixels PD1 to PD12 to the VCCD unit 30.

  Further, the first to twelfth transfer gates 301 to 312 for the light receiving pixels PD1 to PD6 are applied with first to twelfth drive signals (hereinafter also referred to as CCD drive signals) ΦV1 to ΦV12, respectively. The first to twelfth transfer gates 313 to 324 for the PD 12 are applied with the first to twelfth drive signals ΦV1 to ΦV12, the twelfth drive signal ΦV12 is applied to the barrier gate 301a, and the charge holding gate 301s. And 302s are applied with drive signals SCCD1 and SCCD2.

  In the solid-state imaging device 3 according to the third embodiment, the VCCD units 300a to 300d are immediately after the charge transfer packet for transferring the read signal charges by the drive signals ΦV1 to ΦV12 from the CCD drive unit 13a. The charge transfer packet is recovered so as to collect the remaining charge left by the charge transfer packet.

  Next, the operation will be described.

  In the CCD image sensor 3 of the third embodiment, when the imaging operation is started, the timing generation unit 13a performs driving signals ΦV1 to ΦV12 of the VCCD unit 300, SCCD1 and SCCD2, and the like based on the control signal Ctg from the control unit 13b. Drive signals ΦH1 and ΦH2 of the HCCD unit 1b are generated and output to the VCCD unit 300 and the HCCD unit 1b.

  In each light receiving pixel PD, signal charge is generated by photoelectric conversion of incident light, and the signal charge read from the light receiving pixel PD to the VCCD unit 300 via the read gate Rg is transferred to the HCCD unit 1b by the VCCD unit 300. The signal charge from the VCCD unit 100 is transferred in the horizontal direction in the HCCD unit 1b.

  For example, as shown in FIG. 8, in the VCCD unit 300a, six adjacent light receiving pixels are included in a repetition cycle of timings t ′ ″ 0 to t ′ ″ 23, that is, in one vertical transfer cycle in the VCCD unit. One of the signal charges, for example, the signal charge of PD1 among the light receiving pixels PD1 to PD6, is transferred in the vertical direction by a distance corresponding to six light receiving pixels.

  The operation of reading the signal charge of the first light receiving pixel among the six adjacent light receiving pixels is repeatedly performed within one field period, and the signal charge for one field sequentially passes from the VCCD part to the HCCD part. Then, it is output to the outside of the CCD image sensor as a pixel signal. Further, the signal charge reading operation for one field is repeated for six fields, so that the signal charge for one screen of the captured image is output.

  In the CCD image sensor 3 of the third embodiment, similarly to the CCD image sensor 1 of the first embodiment, the signal charges read from the light receiving pixels are transferred by the charge transfer packets TPa and TPb, and the charge transfer packets are used. The remaining signal charge transferred during signal charge transfer is recovered and transferred by the charge recovery packets RPa and RPb immediately after the charge transfer packet.

  In the CCD image sensor 3 of the third embodiment, a combined packet for combining the charge transfer packet and the signal charge of the charge recovery packet is connected to the CCD buffer unit 3c provided at the end of the VCCD unit on the HCCD unit side. CP is formed, and during the predetermined timing t ′ ″ 0 to t ′ ″ 23 during the vertical transfer operation, the combined packet CP includes a signal charge transferred by the charge transfer packet in the vertical direction. Then, the remaining charge transferred by the charge collection packet immediately after that is mixed and added. The barrier region CB is a region that electrically separates the combined packet CP and the charge transfer packet TPa.

  Specifically, as shown in FIG. 8, in the 6-field readout gate configuration, the potential state under the transfer gate of the VCCD unit is the drive signals ΦV1 to ΦV12 applied to the VCCD transfer gates 301 to 324 (see FIG. 8). Thus, charge transfer packets (accumulation regions) TPa and TPb, their barrier regions TBa and TBb, and charge recovery are provided in an area corresponding to one vertical transfer period across 6 light receiving pixels, with 12 gates as one cycle unit. Packets (collection areas) RPa and RPb and their barrier areas RBa and RBb are formed.

  In the CCD buffer unit 3c, the combined packet CP and its barrier region CB are formed by the drive signals SCCD1 and SCCD2, and a separation barrier SB is formed between the combined packet CP and the VCCD unit. .

  In FIG. 8, a colored region is shown as a charge accumulation region where a charge transfer packet is formed, and a non-colored region is shown as a barrier region where a barrier is formed, and is further hatched. This area is shown as a charge collection packet forming area.

  Here, the initial state is indicated by the timing t ″ ′ 0. At this time, in the region extending from the first to the sixth light receiving pixels PD1 to PD6, the VCCD gate potential is expressed by the drive signals ΦV1 to ΦV6. The regions corresponding to the applied transfer gates are the charge storage regions TPa and TPb in which the charge transfer packet is formed, and the transfer barriers TBa and TBb are formed in the region corresponding to the transfer gate to which the drive signals ΦV7 to ΦV8 are applied. The charge recovery packets RPa and RPb are formed in the region corresponding to the transfer gate to which the drive signals φV9 to φV10 are applied, and the recovery packet barrier RBa is formed in the region corresponding to the transfer gate to which the drive signals φV11 to φV12 are applied. , RBb is formed.

  Next, at the timing t ′ ″ 1, the potential under the VCCD gate is such that the charge transfer packet is formed in the region corresponding to the transfer gate to which the drive signals ΦV12 and ΦV1 to ΦV6 are applied, and the transfer to which the drive signal ΦV7 is applied. A transfer region barrier is formed in a region corresponding to the gate, and a charge recovery packet is formed in a region corresponding to the transfer gate to which the drive signals φV8 to φV10 are applied, and corresponds to the transfer gate to which the drive signal φV11 is applied. A collection packet barrier is formed in the area to be used.

  Thereafter, as the time elapses, the under-gate potential is controlled at timings t ″ ″ 2, t ″ ″ 3... T ″ ″ 23.

  As a result, the charge transfer packet and the charge recovery packet under the VCCD transfer gate move toward the CCD buffer unit 3c formed between the VCCD unit 300 and the HCCD unit 1b.

  In the holding packet CP formed in the CCD buffer unit 1c, the signal charge stored in the charge transfer packet (packet for transferring the original signal charge) and the charge recovery packet (remaining charge from the front) However, the signal charge stored in the packet) merges.

  Further, the combined signal charges are moved from the holding packet CP of the CCD buffer unit 3c to the HCCD unit 1b at an arbitrary time in accordance with the driving in the VCCD unit. That is, it is possible to transfer the signal charge in which the remaining charge during transfer is reduced to the HCCD unit.

  As described above, in the third embodiment, the VCCD units 300a to 300d, together with the charge transfer packets TPa and TPb for transferring the signal charges read by the drive signals ΦV1 to ΦV12, SCCD1, and SCCD2 from the CCD drive unit 13a, The charge transfer packets RPa and RPb for collecting the remaining charge left by the charge transfer packet are generated, and the charge transfer packet and the charge recovery packet are set to follow the charge transfer packet immediately after the charge transfer packet. The signal charge accumulated in the charge transfer packet is moved in the transfer channel, and is further combined by a combined packet (holding packet) CP formed in the CCD buffer unit 3c disposed at the end of the VCCD unit 300 on the HCCD unit 1b side. And the signal charge recovered in the subsequent charge recovery packet. In addition, since the signal charges are transferred to the HCCD unit 1b, even if the signal charges are left behind by the charge transfer packet during the VCCD transfer, the charge collection packet collects and transfers the remaining charges left from the transfer by the charge transfer packet. As a result, it is possible to reduce untransferred data in the VCCD unit. As a result, transfer efficiency can be improved and image defects such as vertical lines can be reduced.

Further, in this embodiment, the addition of the signal charge accumulated in the charge transfer packet and the signal charge collected by the charge collection packet is performed not by the HCCD unit but by the combined packet formed at the end of the VCCD unit. The signal charges corresponding to one vertical transfer period transferred separately into the charge transfer packet and the charge recovery packet can be collectively transferred to the HCCD unit by the combined packet, and the transfer operation in the HCCD unit can be performed vertically. This can be done independently of the transfer timing.
(Embodiment 4)
9 to 11 are diagrams illustrating a solid-state imaging device according to Embodiment 4 of the present invention.

  FIG. 9 shows a schematic configuration of a CCD image sensor which is a solid-state imaging device of the fourth embodiment, and FIG. 10 shows an arrangement of light receiving pixels and transfer electrodes corresponding thereto in an imaging region in the CCD image sensor. ing. FIG. 11 shows an arrangement of transfer gates in the VCCD section corresponding to the light-receiving pixel row in this CCD image sensor and how signal charges are transferred in the VCCD section.

  The CCD image sensor 4 of the fourth embodiment is formed on a semiconductor substrate (not shown), and has an imaging area 4a for imaging a subject, and incident light from the subject is input to the imaging area 4a. The light receiving pixels PD for photoelectric conversion are arranged in a matrix, and a vertical charge transfer unit (VCCD unit) 400 for transferring the signal charges read from the light receiving pixels PD in the vertical direction is arranged along each light receiving pixel column 40. Yes. Here, a readout gate Rg is disposed between the VCCD section 400 and each of the light receiving pixels PD of the corresponding light receiving pixel row 40, and the signal charge generated in the light receiving pixel PD is transferred to the readout gate Rg. The data is read out to the VCCD unit 400 via the interface.

  The CCD image sensor 4 is disposed on one end side of the imaging region 1a, and a horizontal charge transfer unit (HCCD unit) 1b that horizontally transfers signal charges transferred from the VCCD unit 400, and the HCCD unit. 1b, an output unit 1c that converts a signal charge from the HCCD unit 1b into a voltage signal and outputs a pixel signal Sp, drive signals ΦV1 to ΦV12, ΦV1a to ΦV12a of the VCCD unit 400, and HCCD A timing generation unit (CCD driving unit) 14a that generates the driving signals ΦH1 and ΦH2 of the unit 1b and a signal charge generated by the light receiving pixel PD provided on the back side of the semiconductor substrate constituting the CCD image sensor 4 are imaged. Based on an overflow drain (not shown) discharged to the outside of the sensor 1 and the pixel signal Sp from the output unit 1c. The timing generation unit 14a and the overflow drain (hereinafter, also referred to as OFD portion.), And has a control unit 14b for controlling the respective control signals Ctg and Cofd.

  In the CCD image sensor 4 of the fourth embodiment, the light receiving pixels PD, the HCCD unit 1b, the output unit 1c, and the overflow drain are the same as those in the CCD image sensor of the first embodiment.

  In the fourth embodiment, in the VCCD unit 400, the transfer gates 401 to 412 corresponding to one vertical transfer period adjacent to the HCCD unit 1b are connected to the drive signals ΦV1 to ΦV12 applied to the other transfer gates 413 to 424. Independent drive signals ΦV1a to ΦV12a are applied, and the control unit 14b and the timing generation unit 14a receive the charge transfer packet and the charge recovery packet as in the CCD image sensor 1 of the first embodiment. In addition to driving the transfer gate so that the charge recovery packet is moved immediately after the charge transfer packet, the charge recovery packet RPa of the VCCD part is transferred in a transfer region corresponding to one vertical transfer period adjacent to the HCCD part. The movement speed is made higher than the movement speed of the charge transfer packet TPa so that these packets are stored. In which adding the signal charges and left behind charge that is.

  Next, the configuration of the imaging region 4a and the CCD buffer unit 4c will be specifically described with reference to FIG.

  As described above, in the imaging region 4a, the light receiving pixel rows 40a to 40d in which the light receiving pixels for photoelectrically converting the incident light from the subject are arranged, and the VCCD unit for transferring the signal charges read from the light receiving pixels in the vertical direction. 400a to 400d are alternately arranged.

  Here, for simplification of description, four light receiving pixel columns 40a to 40d as light receiving pixel columns and four VCCD units 400a to 400d as vertical transfer units will be described. The light receiving element arrays 40a to 40d and the VCCD sections 400a to 400d have the same structure as that in the first embodiment. However, in addition to the drive signals ΦV1 to ΦV12, drive signals ΦV1a to ΦV12a independent of these drive signals are supplied to the VCCD units 400a to 400 of the fourth embodiment.

  For example, taking the VCCD unit 400a as an example, the first to twelfth charge addition drive signals ΦV1a are supplied to the first to twelfth transfer gates 401 to 412 for the light receiving pixels PD1 to PD6 adjacent to the HCCD unit 1b. To ΦV12a are applied, the first to twelfth pixel transfer drive signals ΦV1 to ΦV12 are applied to the first to twelfth transfer gates 413 to 424 for the light receiving pixels PD7 to PD12, and the twelfth to the barrier gate 401a. The pixel transfer drive signal ΦV12 is applied.

  The first to twelfth pixel transfer drive signals ΦV1 to ΦV12 in the fourth embodiment are the same as the first to twelfth drive signals ΦV1 to ΦV12 in the first embodiment.

  Next, the operation will be described.

  In the CCD image sensor 4 of the fourth embodiment, when the imaging operation is started, the timing generation unit 14a generates the drive signals ΦV1 to ΦV12, ΦV1a to ΦV12a of the VCCD unit 400 based on the control signal Ctg from the control unit 14b. Drive signals ΦH1 and ΦH2 of the HCCD unit 1b are generated and output to the VCCD unit 400 and the HCCD unit 1b.

  In each light receiving pixel PD, signal charge is generated by photoelectric conversion of incident light, and the signal charge read from the light receiving pixel PD to the VCCD unit 400 via the read gate Rg is transferred by the VCCD unit 400 to the HCCD unit 1b. The signal charge from the VCCD unit 400 is transferred in the horizontal direction in the HCCD unit 1b.

  For example, as shown in FIG. 11, in the VCCD unit 400a, within one cycle of timing t0 to t23, that is, one vertical transfer cycle in the VCCD unit, one signal charge of six adjacent light receiving pixels, for example, The signal charges of PD1 among the light receiving pixels PD1 to PD6 are transferred in the vertical direction by a distance corresponding to the six light receiving pixels.

  The operation of reading the signal charge of the first light receiving pixel among the six adjacent light receiving pixels is repeatedly performed within one field period, and the signal charge for one field sequentially passes from the VCCD part to the HCCD part. Then, it is output to the outside of the CCD image sensor as a pixel signal. Further, the signal charge reading operation for one field is repeated for six fields, so that the signal charge for one screen of the captured image is output.

  Further, in the CCD image sensor 4 of the fourth embodiment, similarly to the CCD image sensor 1 of the first embodiment, the signal charges read from the light receiving pixels are transferred by the charge transfer packets TPa and TPb, and the charge transfer packets are used. The remaining signal charge transferred during signal charge transfer is recovered and transferred by the charge recovery packets RPa and RPb immediately after the charge transfer packet.

  In the CCD image sensor 4 of the fourth embodiment, when the charge transfer packet TPa and the charge recovery packet RPa move to the final transfer area corresponding to one vertical transfer cycle at the end of the VCCD side of the HCCD unit, Due to the drive signals ΦV1a to ΦV12a applied to the gate electrodes provided in the region, the movement speed of the charge recovery packet RPa is increased from the movement speed of the charge transfer packet RPa preceding this, and in this final transfer area, the charge The collection packet RPa catches up with the charge transfer packet TPa, and the signal charge and the remaining charge are added (timing t3). Thereafter, the added signal charge and the remaining charge are transferred to the HCCD unit 1b by one transfer packet (timing t4 to t12).

  During subsequent timings t13 to t23, the next set of charge transfer packet TPb and charge recovery packet RPb moves to the transfer final stage region.

  As described above, in the fourth embodiment, the VCCD units 400a to 400d, together with the charge transfer packets TPa and TPb for transferring the read signal charges by the drive signals ΦV1 to ΦV12 and ΦV1a to ΦV12a from the CCD drive unit 14a, Charge collection packets RPa and RPb for collecting the remaining charges left by the charge transfer packet are generated, and in the transfer area corresponding to one vertical transfer period adjacent to the HCCD unit in the VCCD unit, the charge collection packets RPa and RPb are generated. Of the charge transfer packets TPa and TPb and the signal charges stored in these packets are added together with the remaining charges, so that the signal charges are left behind during the VCCD transfer. Even if left out of transfer by charge transfer packet Was left behind charge, it will be charge collecting packet and transfers the recovered, thereby reducing the leftover transfer in VCCD portion. As a result, transfer efficiency can be improved and image defects such as vertical lines can be reduced.

In this embodiment, the addition of the signal charge stored in the charge transfer packet and the signal charge recovered by the charge recovery packet is performed not in the HCCD unit but in the final transfer region of the VCCD unit. Signal charges corresponding to one vertical transfer period transferred separately in transfer packets and charge recovery packets can be transferred together to the HCCD unit in the final transfer region of the VCCD unit, and transferred in the HCCD unit. A margin can be given to operation.
(Embodiment 5)
FIG. 12 is a diagram for explaining a solid-state imaging device according to Embodiment 5 of the present invention, and shows a schematic configuration of a CCD image sensor which is the solid-state imaging device of Embodiment 5.

  The CCD image sensor 5 according to the fifth embodiment includes a control unit 15b and a timing generation unit 15a in place of the control unit 11b and the timing generation unit 11a in the CCD image sensor 1 according to the first embodiment. In the CCD image sensor 5, the control unit 15b and the timing generation unit 15a generate a charge transfer packet and a subsequent charge recovery packet in accordance with the amount of signal charge generated in the light receiving pixel. And the second transfer operation mode for generating only the charge transfer packet.

  Here, in the first transfer operation mode, the charge transfer packet is left together with the charge transfer packets TPa and TPb for transferring signal charges in the VCCD units 100a to 100d of the CCD image sensor 1 described in the first embodiment. This is the same as the transfer operation for moving the charge collection packets RPa and RPb for collecting the remaining charges.

  The second transfer operation mode is the same as the signal charge transfer operation using only the vertical charge transfer packet in the conventional CCD image sensor described with reference to FIG.

  The timing generation unit 15a includes a first drive signal generation circuit 151 that generates a drive signal for driving the VCCD unit 100 so that a vertical transfer operation is performed in the first transfer operation mode, and a second transfer operation mode. A second drive signal generation circuit 152 that generates a drive signal for driving the VCCD unit 100 so that the vertical transfer operation is performed, and generates one of the drive signals based on the control signal Ctg from the control unit 15b. A drive signal is supplied from the circuit to the VCCD unit.

  Specifically, the control unit 15b causes the timing generation unit 15a to generate a charge transfer packet and a subsequent charge recovery packet when the amount of signal charge generated by the light receiving pixels in the imaging region is small. The VCCD unit 100 is driven in the vertical transfer mode, and when the amount of the signal charge is large, the VCCD unit 100 is controlled to be driven in the second vertical transfer mode in which only the charge transfer packet is generated. Yes.

  Other configurations are the same as those of the CCD image sensor 1 of the first embodiment.

  In the CCD image sensor 5 according to the fifth embodiment having such a configuration, only the charge transfer packet and the first transfer operation mode in which the charge transfer packet and the subsequent charge recovery packet are generated according to the generation amount of the signal charge. Is switched to the second transfer operation mode for generating. Specifically, the VCCD unit 100 is driven in the first vertical transfer mode that generates a charge transfer packet and a subsequent charge recovery packet when the amount of signal charge generated by the light receiving pixels in the imaging region is small. When the amount of the signal charge is large, the signal is driven in the second vertical transfer mode in which only the charge transfer packet is generated.

  As a result, the image quality deterioration due to charge remaining that becomes noticeable when the exposure amount is small is suppressed, and the size of the transfer packet in the transfer direction is increased so that a large amount of charge can be transferred when the exposure amount is large. And high-quality image quality can be obtained by transferring signal charges according to the exposure amount.

Furthermore, although not specifically described in the first to fifth embodiments, a digital camera such as a digital video camera or a digital still camera using at least one of the solid-state imaging devices of the first to fifth embodiments as an imaging unit. An electronic information device having an image input device, such as an image input camera, a scanner, a facsimile machine, or a camera-equipped mobile phone, will be briefly described below.
(Embodiment 6)
FIG. 13 is a block diagram illustrating a schematic configuration example of an electronic information device using the solid-state imaging device according to any one of Embodiments 1 to 5 as an imaging unit as Embodiment 6 of the present invention.

  An electronic information device 90 according to Embodiment 6 of the present invention illustrated in FIG. 13 includes the solid-state imaging device according to any of Embodiments 1 to 5 of the present invention as an imaging unit 91 that captures a subject. The electronic information device 90 further includes a memory unit 92 such as a recording medium for recording data after high-quality image data obtained by photographing by such an imaging unit is subjected to predetermined signal processing for recording, and the image data. A display unit 93 such as a liquid crystal display device that displays a predetermined signal processing for display on a display screen such as a liquid crystal display screen, and a transmission / reception device that performs communication processing after performing predetermined signal processing of the image data for communication Communication unit 94 and image output unit 95 for printing (printing) and outputting (printing out) the image data.

  As mentioned above, although this invention has been illustrated using preferable embodiment of this invention, this invention should not be limited and limited to this embodiment. It is understood that the scope of the present invention should be construed only by the claims. It is understood that those skilled in the art can implement an equivalent range based on the description of the present invention and the common general technical knowledge from the description of specific preferred embodiments of the present invention. It is understood that the patent documents cited in the present specification should be incorporated by reference into the present specification in the same manner as the content itself is specifically described in the present specification.

  In the field of solid-state imaging device, driving method thereof, and electronic information equipment, the present invention provides signal charges left by charge transfer packets at arbitrary intervals behind charge transfer packets for transferring signal charges from light receiving pixels. If a charge collection packet is generated and signal charge is left behind by the preceding charge transfer packet, it is collected by the back charge collection packet and merged with the signal charge stored in the original charge transfer packet. Thus, vertical charge transfer efficiency can be improved and image defects such as vertical lines can be reduced. This is useful when high-speed transfer of signal charges in the vertical charge transfer unit is required.

1-5 Solid-state imaging device (CCD image sensor)
1a, 3a, 4a Imaging region 1b Horizontal charge transfer unit (HCCD unit)
1c Output unit 3c CCD buffer unit 10, 10a to 10d, 30, 30a to 30d, 40, 40a to 40d Light receiving pixel row 11a, 12a, 13a, 14a, 15a Timing generation unit (CCD driving unit)
11b, 12b, 13b, 14b, 15b Control unit 90 Electronic information device 91 Imaging unit 92 Memory unit 93 Display unit 94 Communication unit 95 Image output unit 100, 100a to 100d, 300, 300a to 300d, 400, 400a to 400d Vertical charge Transfer part (VCCD part)
101-124, 101a, 301-324, 301a, 401-424, 401a Transfer gates 151, 152 First and second timing generation circuits 301s, 302s Storage gate CP Charge storage packet CB Storage packet barrier Ctg Timing control signal Cofd OFD Control signal PD, PD1 to PD12 Light receiving pixel Rg Read gate RBa, RBb Recovery packet barrier RPa, Rpb Charge recovery packet SB Separation barrier Sp Pixel signal TBa, TBb Transfer packet barrier TPa, TPb Charge transfer packet SCCD1, SCCD2 Buffer gate drive signal ΦH1 , ΦH2 Horizontal drive signal (Horizontal drive pulse)
ΦV1 to ΦV12, ΦV1a to ΦV12a Vertical drive signal (vertical drive pulse)

Claims (16)

A plurality of light receiving pixels that generate signal charges by photoelectric conversion of incident light; and
Generating a charge transfer packet for storing the signal charge read from each light receiving pixel, and transferring the signal charge by movement of the charge transfer packet; and
A drive control unit for driving and controlling the charge transfer unit,
The drive control unit
In the charge transfer unit, at least one charge recovery packet is generated, which moves following the charge transfer packet and recovers a remaining charge left when the signal charge is transferred by the charge transfer packet. A solid-state imaging device that drives and controls the charge transfer unit so that the signal charge stored in the charge transfer packet and the signal charge collected by the charge collection packet merge at a given timing. The solid-state imaging device according to claim 1,
The plurality of light receiving pixels are arranged in a matrix.
The charge transfer unit
A vertical charge transfer unit that is provided corresponding to each of the light receiving pixel columns and stores the signal charges read from the light receiving pixels of the corresponding light receiving pixel columns in the charge transfer packet and transfers them in the vertical direction;
A horizontal charge transfer unit that horizontally transfers the signal charge transferred from the vertical charge transfer unit,
The drive control unit
In the vertical charge transfer unit, at least one charge recovery packet is generated that moves following the charge transfer packet and recovers the remaining charge left when the signal charge is transferred by the charge transfer packet. A solid-state imaging device that drives and controls the vertical charge transfer unit. The solid-state imaging device according to claim 2,
The drive control unit
The signal charge stored in the charge transfer packet generated by the vertical charge transfer unit and the remaining charge collected by the subsequent charge collection packet are merged in the vertical charge transfer unit so as to merge. A solid-state imaging device that drives and controls a charge transfer unit. The solid-state imaging device according to claim 2,
The drive control unit
The vertical charge transfer unit is configured so that the signal charge stored in the charge transfer packet generated by the vertical charge transfer unit and the remaining charge collected by the subsequent charge collection packet merge at the vertical charge transfer unit. A solid-state imaging device that drives and controls a charge transfer unit. The solid-state imaging device according to claim 4,
The drive control unit
By controlling the driving of the vertical charge transfer unit, the relative movement speed of the charge transfer packet and the charge recovery packet is specified for a certain period so that the charge recovery packet following the charge transfer packet catches up with the charge transfer packet. Solid-state imaging device that maintains the speed of The solid-state imaging device according to claim 5,
The drive control unit
A solid-state imaging device that stops movement of the charge transfer packet for a certain period so that the charge recovery packet following the charge transfer packet catches up with the charge transfer packet by driving control of the vertical charge transfer unit. The solid-state imaging device according to claim 5,
The drive control unit
Due to the drive control of the vertical charge transfer unit, the charge collection packet following the charge transfer packet catches up with the charge transfer packet. A solid-state imaging device that maintains a high speed. The solid-state imaging device according to claim 2,
The charge transfer unit
A charge transfer buffer unit that is provided between the vertical charge transfer unit and the horizontal charge transfer unit and temporarily accumulates signal charges transferred from the vertical charge transfer unit;
The drive control unit
The charge is stored so that the signal charge stored in the charge transfer packet generated by the vertical charge transfer unit and the remaining charge collected by the subsequent charge collection packet merge at the charge transfer buffer unit. A solid-state imaging device that drives and controls the transfer unit. The solid-state imaging device according to claim 2,
The charge transfer unit
The readout operation includes one vertical transfer operation for transferring the signal charge of the light receiving pixel in the vertical direction and one horizontal transfer operation for transferring the signal charge of the light receiving pixel in the horizontal direction as one readout operation. Is performed 6 times or more to perform a 6-field read operation for reading the signal charges of all the light receiving pixels.
The vertical charge transfer unit constituting the charge transfer unit is:
Two transfer gate electrodes are assigned to each light receiving pixel, and 12 transfer gate electrodes corresponding to six adjacent light receiving pixels are defined as one vertical transfer period, and the charge transfer packet and the subsequent packets are included in the one vertical transfer period. A solid-state imaging device configured to generate a charge recovery packet. The solid-state imaging device according to claim 9,
The drive control unit
The signal charge stored in the charge transfer packet generated by the vertical charge transfer unit and the remaining charge collected by the subsequent charge collection packet are transferred to the last one vertical transfer by the vertical charge transfer unit. A solid-state imaging device that drives and controls the vertical charge transfer unit so as to merge within a cycle. The solid-state imaging device according to claim 2,
An output unit that converts the signal charge transferred from the horizontal transfer unit into a pixel signal that is a voltage signal and outputs the pixel signal;
Based on the pixel signal output from the output unit, the drive control unit reads from the light receiving pixel when the operation mode of the vertical charge transfer unit is large in the amount of signal charge generated in the light receiving pixel. Charge for recovering the remaining charge together with the charge transfer packet when the amount of signal charge generated in the light receiving pixel is small and the first transfer mode generates only the charge transfer packet for transferring the issued signal charge. A solid-state imaging device that controls the vertical charge transfer unit to be in a second transfer mode for generating a collection packet. The solid-state imaging device according to claim 11,
A solid-state imaging device including a signal charge adjusting unit that adjusts the amount of signal charge generated by the light receiving pixels. The solid-state imaging device according to claim 12,
The light receiving pixel includes a photodiode formed on a surface of a semiconductor substrate and photoelectrically converting incident light;
The signal charge adjusting unit is formed on the back surface side of the semiconductor substrate, and has an overflow drain unit for extracting signal charges generated by the photodiodes,
The solid-state imaging device, wherein the drive control unit adjusts a control voltage applied to the overflow drain unit based on a pixel signal output from the output unit. The solid-state imaging device according to claim 2,
The drive control unit
In the vertical charge transfer unit, two adjacent charge recovery packets are generated that move behind the charge transfer packet and collect the remaining charge left when the signal charge is transferred by the charge transfer packet. A solid-state imaging device that drives and controls the vertical charge transfer unit. A plurality of light receiving pixels that generate signal charges by photoelectric conversion of incident light and a charge transfer packet that stores signal charges read from each light receiving pixel are generated, and the signal charges are transferred by movement of the charge transfer packets A method of driving a solid-state imaging device including a charge transfer unit,
In the charge transfer unit, at least one charge recovery packet is generated that moves behind the charge transfer packet and recovers the remaining charge left when the signal charge is transferred by the charge transfer packet. The solid-state imaging device driving method for driving the charge transfer unit so that the signal charge stored in the charge transfer packet and the signal charge stored in the charge recovery packet merge at a determined timing . An electronic information device having an imaging unit for imaging a subject,
The electronic information device is the solid-state imaging device according to any one of claims 1 to 14.