JP2010192698A - Manufacturing method of ion implantation group iii nitride semiconductor substrate, group iii nitride semiconductor layer junction substrate, and group iii nitride semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method or the like of an ion implantation group III nitride semiconductor substrate with a small warp and a group III nitride semiconductor layer junction substrate using the ion implantation group III nitride semiconductor substrate. <P>SOLUTION: This ion implantation group III nitride semiconductor substrate 20 includes an ion implantation region 20i which resides at one principal plane 20m side and is formed by a predetermined depth D from the principal plane 20, and has a thickness T of 500 μm or larger. Moreover, the manufacturing method of the group III nitride semiconductor layer junction substrate comprises steps of: injecting an ion I into the one principal plane 20m side of the group III nitride semiconductor substrate 20 with a thickness of 500 to 5 cm at a predetermined depth D from the principal plane 20m; connecting a different kind of a substrate 10 to the principal plane 20m of the group III nitride semiconductor substrate 20; and obtaining a group III nitride semiconductor layer junction substrate 1 by separating the group III nitride semiconductor substrate 20 in a region to which the ion I is injected and by forming a group III nitride semiconductor layer 20a connected to the different kind of substrate 10. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a group III nitride semiconductor substrate into which ions are implanted, a group III nitride semiconductor layer junction substrate using such an ion implanted group III nitride semiconductor substrate, and a method for manufacturing a group III nitride semiconductor device.

A group III nitride semiconductor substrate such as an Al _1-x Ga _x N (0 ≦ x ≦ 1) substrate is suitably used for a semiconductor device, but its manufacturing cost is extremely high. Thereby, the manufacturing cost of the semiconductor device in which the group III nitride semiconductor substrate is used becomes extremely high. This is considered to be derived from the manufacturing method of the group III nitride crystal semiconductor substrate.

  That is, the group III nitride semiconductor substrate is crystal-grown by a vapor phase method such as HVPE (hydride vapor phase epitaxy), MOCVD (metal organic chemical vapor deposition), MBE (molecular beam growth), or sublimation. Therefore, the crystal growth rate is low, and for example, only a group III nitride semiconductor crystal having a thickness of about 10 mm can be obtained even in a crystal growth time of about 100 hours. Only a small amount (for example, about 10) of a group III nitride semiconductor free-standing substrate having a thickness of about 200 μm to 400 μm can be cut out from the crystal having such a thickness.

  However, if the thickness of the group III nitride semiconductor layer cut out from the group III nitride semiconductor crystal is reduced in order to increase the number of cutouts of the group III nitride semiconductor substrate, the mechanical strength is lowered and the substrate cannot be a self-supporting substrate. Therefore, a method for reinforcing a thin group III nitride semiconductor layer cut from the group III nitride semiconductor crystal is required.

  As a method for reinforcing a group III nitride semiconductor layer, a substrate in which a group III nitride semiconductor layer is bonded to a dissimilar substrate having a chemical composition different from that of the group III nitride semiconductor layer (hereinafter referred to as a group III nitride semiconductor layer bonded substrate) is manufactured. There is a way to do it. As a method for manufacturing such a group III nitride semiconductor layer bonded substrate, Japanese Patent Laid-Open No. 2006-210660 (hereinafter referred to as Patent Document 1) includes a step of implanting ions in the vicinity of the surface of the first nitride semiconductor substrate, A step of superimposing the surface side of the first nitride semiconductor substrate on the second substrate, a step of heat-treating the two superimposed substrates, and the first nitride semiconductor with the ion-implanted layer as a boundary A method for manufacturing a semiconductor substrate is disclosed which includes a step of peeling most of the substrate from the second substrate.

  JP 2007-220899 A (hereinafter referred to as Patent Document 2) discloses a first step of forming a hydrogen ion implanted layer on the surface side of a nitride-based semiconductor crystal epitaxially grown on a first substrate; A second step of subjecting at least one of the surface of the second substrate and the nitride-based semiconductor crystal to a surface activation treatment; and a third step of bonding the surface of the nitride-based semiconductor crystal and the surface of the second substrate together And a fourth step of peeling the nitride-based semiconductor crystal along the hydrogen ion implanted layer to form a nitride-based semiconductor layer on the second substrate. Is disclosed.

JP 2006-210660 A JP 2007-220899 A

  However, in the manufacturing method of Patent Document 1, since a GaN substrate having a thickness of about 400 μm is used, a large warp is generated in the substrate by ion implantation, and the substrate into which ions are implanted is joined to another substrate. In some cases, the GaN substrate is broken or the GaN substrate cannot be bonded to another substrate uniformly.

  In addition, in the manufacturing method of Patent Document 2, a nitride semiconductor crystal epitaxially grown by the MOCVED method on a first substrate which is a different type substrate having a crystal structure and composition different from that of the nitride semiconductor crystal is used. Therefore, even if ions are implanted, the crystal does not warp greatly, but such epitaxial crystals have problems such as low crystallinity compared to bulk crystals and cracks in the crystals after ion implantation.

  Therefore, an object of the present invention is to provide an ion-implanted group III nitride semiconductor substrate having a small warp, a group III nitride semiconductor layer junction substrate using such a substrate, and a method for manufacturing a group III nitride semiconductor device.

  The present invention is an ion-implanted group III nitride semiconductor substrate including an ion-implanted region formed on one main surface side at a predetermined depth from the main surface and having a thickness of 500 μm or more. Here, the c-axis lattice constant of the ion implantation region can be increased by 0.02０．０ (0.002 nm) or more compared to the c-axis lattice constant of the region other than the ion implantation region. Further, the ion implantation region can be colored.

  The present invention also relates to a method for producing a group III nitride semiconductor layer bonded substrate in which a group III nitride semiconductor layer and a heterogeneous substrate having a chemical composition different from that of the group III nitride semiconductor layer are bonded. A step of implanting ions to a predetermined depth from one main surface side of a group III nitride semiconductor substrate having a thickness of, and bonding a heterogeneous substrate to the main surface of the group III nitride semiconductor substrate And a step of obtaining a group III nitride semiconductor layer bonded substrate by forming a group III nitride semiconductor layer in which the group III nitride semiconductor substrate is separated in a region where ions are implanted and bonded to a different substrate. And a method for manufacturing a group III nitride semiconductor layer bonded substrate.

  Further, the present invention provides a step of preparing a group III nitride semiconductor layer bonded substrate obtained by the above manufacturing method, and at least 1 on the main surface of the group III nitride semiconductor layer of the group III nitride semiconductor layer bonded substrate Forming a group III nitride semiconductor epitaxial layer. A method for manufacturing a group III nitride semiconductor device.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the ion implantation group III nitride semiconductor substrate with small curvature, a group III nitride semiconductor layer joining substrate using such a substrate, and a group III nitride semiconductor device can be provided.

It is a schematic sectional drawing which shows one Embodiment of the ion implantation nitride semiconductor substrate concerning this invention. It is a schematic sectional drawing which shows one Embodiment of the manufacturing method of the group III nitride semiconductor layer joining substrate concerning this invention. Here, (a) shows the step of implanting ions into the group III nitride semiconductor substrate, (b) shows the step of bonding a heterogeneous substrate to the group III nitride semiconductor substrate, and (c) shows the group III nitride. The process of obtaining a semiconductor layer joining substrate is shown. It is a schematic sectional drawing which shows an example of the group III nitride semiconductor device manufactured in this invention. It is a schematic sectional drawing which shows the other example of the group III nitride semiconductor device manufactured in this invention. It is a graph which shows the relationship between the thickness of the board | substrate in the ion implantation group III nitride semiconductor substrate, and the curvature of a board | substrate. It is a graph which shows the change of the light absorption coefficient of the ion implantation group III nitride semiconductor substrate regarding the light of the wavelength of the range of 370-500 nm.

(Embodiment 1)
Referring to FIG. 1, one embodiment of an ion-implanted group III nitride semiconductor substrate according to the present invention is an ion implantation formed on one main surface 20m side and at a predetermined depth D from main surface 20m. The region 20i is included and has a thickness T of 500 μm or more.

  The group III nitride semiconductor substrate 20 of the present embodiment includes an ion implantation region 20i formed on the one main surface 20m side and at a predetermined depth D from the main surface 20m. By forming such an ion implantation region 20i, the ion implantation group III nitride semiconductor substrate 20 can be separated in the ion implantation region 20i. Here, the ion implantation region 20i refers to a region where ions having a dose amount or more contributing to the above-described separation exist, and is a region having a depth D−ΔD to D + ΔD from the main surface 20m, and having a depth from the main surface 20m. In the region D, the ion dose is maximized. The depth D into which ions are implanted is not particularly limited, but is preferably 0.03 μm or more and 100 μm or less, more preferably 0.03 μm or more and 50 μm or less, and 0.03 μm or more and 10 μm or less from the viewpoint of controlling separation. Further preferred. When the depth D is smaller than 0.03 μm, it becomes easy to break when separating the substrate and it is difficult to flatten the surface, and when it is larger than 100 μm, the distribution of ions becomes wide and it is difficult to control the separation depth. It becomes. The depth ΔD is approximately 0.02D to 0.5D, although it varies depending on the type of ion and the implantation method.

  The group III nitride semiconductor substrate 20 of this embodiment has a thickness T of 500 μm or more. Since the thickness of group III nitride semiconductor substrate 20 is 500 μm or more, the rigidity of the substrate is increased, and the warpage W of the substrate due to ion implantation is reduced. Here, referring to FIG. 1, warp W of the group III nitride semiconductor substrate is defined by a difference in height between the most convex portion and the most concave portion of main surface 20 m in a substrate having a predetermined diameter. Therefore, when the main surface 20m of the substrate is curved and warped in a spherical shape, the warpage of the substrate is a difference in height between the central portion and the circumferential portion of the main surface. The warpage of the substrate can be measured using a stylus type surface roughness measuring machine, an optical interference type flatness tester, or the like.

  For example, an ordinary group III nitride semiconductor substrate 20 having a thickness of about 100 to 300 μm that is not ion-implanted has a (0001) plane as a concave (that is, the (000-1) plane is convex) and is slightly spherical. Often along. Such a normal group III nitride semiconductor substrate 20 warps when ions are implanted at a predetermined depth (for example, about 0.7 μm) from the main surface 20m on the main surface side of the main surface 20m having a (0001) plane orientation. Becomes significantly larger. On the other hand, by setting the thickness of the group III nitride semiconductor substrate 20 on which ion implantation is performed to 500 μm or more, the rigidity of the substrate is increased, and the warpage W of the substrate due to ion implantation can be reduced.

  Therefore, a group III nitride semiconductor substrate 20 into which ions are implanted (also referred to as an ion-implanted group III nitride semiconductor substrate, hereinafter the same) is referred to as a heterogeneous substrate (a substrate having a chemical composition different from that of the group III nitride semiconductor substrate 20). The ion-implanted group III nitride semiconductor substrate is not cracked during bonding to the same), and the ion-implanted group III nitride semiconductor substrate and the dissimilar substrate can be bonded uniformly.

  From the above viewpoint, the thickness of the group III nitride semiconductor substrate 20 is preferably 750 μm or more, and more preferably 1000 μm or more. In addition, from the viewpoint of improving workability in ion implantation or in subsequent processing, the thickness of group III nitride semiconductor substrate 20 is preferably 5 cm or less.

From the viewpoint that the group III nitride semiconductor substrate 20 of this embodiment can be easily separated in the ion implantation region 20i, the c-axis lattice constant kc _I of the ion implantation region is c-axis of the region other than the ion implantation region. It is preferable that it is 0.02０．０ (0.002 nm) or more larger than the lattice constant kc. When the c-axis lattice constant difference Δkc _I by ion implantation obtained by subtracting the c-axis lattice constant kc of the region other than the ion implantation region from the c-axis lattice constant kc _I of the ion implantation region is less than 0.02 領域, the group III The embrittlement of the ion implantation region 20i of the nitride semiconductor substrate 20 is small, and it becomes difficult to separate the group III nitride semiconductor substrate 20 in the ion implantation region 20i. Here, the c-axis lattice constant difference Δkc _I by ion implantation increases as the ion dose in the ion implantation region 20 _i increases. That is, in the group III nitride semiconductor substrate 20, as the ion dose in the ion implantation region 20i increases, the c-axis lattice constant difference Δkc _{I due} to ion implantation increases, and the ion implantation region 20i becomes more fragile. The separation in the ion implantation region 20i is facilitated.

For example, in the hydrogen ion implantation region (ion implantation region 20i) of the GaN semiconductor substrate (group III nitride semiconductor substrate 20), when the c-axis lattice constant difference Δkc _I is 0.02Å or more, the ion dose is 1 × 10. It corresponds to ¹⁷ cm ^-2 or more. That is, from the viewpoint of embrittlement of the substrate to the extent that separation is facilitated, the dose amount of ions in the ion implantation region 20i is preferably 1 × 10 ¹⁷ cm ⁻² or more.

  The group III nitride semiconductor substrate 20 of this embodiment can color the ion implantation region 20i. The color of the ion-implanted region 20i (that is, the wavelength region that absorbs light) is determined by the group III nitride semiconductor substrate and the type of ions to be implanted. For example, when hydrogen ions (implanted ions I) are implanted into a GaN semiconductor substrate (group III nitride semiconductor substrate 20) whose both main surfaces are mirror-polished, the ion implantation region 20i is colored yellow brown. Here, since the color density of the ion implantation region 20i increases as the ion dose in the ion implantation region 20i increases, it is a measure for knowing the ion dose in the ion implantation region 20i.

(Embodiment 2)
Referring to FIG. 2, one embodiment of a method for manufacturing a group III nitride semiconductor layer bonded substrate according to the present invention includes a group III nitride semiconductor layer 20a and a different type of chemical composition different from group III nitride semiconductor layer 20a. A method for manufacturing a group III nitride semiconductor layer bonded substrate 1 bonded to a substrate 10, which is on the side of one main surface 20 m of a group III nitride semiconductor substrate 20 having a thickness of 500 μm or more and 5 cm or less, A step of implanting ions I from the main surface 20m to a predetermined depth D, a step of bonding the dissimilar substrate 10 to the main surface 20m of the group III nitride semiconductor substrate 20, and a group III nitride semiconductor substrate 20 of the ion I By forming a group III nitride semiconductor layer 20a that is separated and bonded to the heterogeneous substrate 10 in the region where ions are implanted (ion implantation region 20i), the group III nitride semiconductor layer bonded substrate 1 is formed. And a step of obtaining, a.

  According to the method for manufacturing a group III nitride semiconductor layer bonded substrate of the present embodiment, by providing the above steps, ions are implanted without causing cracks in the group III nitride semiconductor substrate 20 into which ions are implanted. Further, the group III nitride semiconductor substrate 20 and the heterogeneous substrate 10 can be bonded, and the group III nitride semiconductor layer bonded substrate 1 can be manufactured with a high yield. Hereinafter, each step will be described in detail.

(Step of implanting ions into group III nitride semiconductor substrate)
Referring to FIG. 2A, in the manufacturing method of group III nitride semiconductor layer bonded substrate 1 of this embodiment, one main surface 20m of group III nitride semiconductor substrate 20 having a thickness of 500 μm or more and 5 cm or less. A step of implanting ions I to a predetermined depth D from the main surface 20m.

  The group III nitride semiconductor substrate 20 used in the ion implantation process has a thickness of 500 μm or more and 5 cm or less, and thus the rigidity of the substrate is high. Therefore, an ion-implanted group III nitride semiconductor substrate with little or almost no warpage can be obtained by the step of implanting ions I. In FIG. 2, the substrate is drawn with a small or almost no warpage.

  In the step of implanting ions, a group III nitride semiconductor substrate is formed by implanting ions I to the predetermined depth D from the main surface 20m on the one main surface 20m side of the group III nitride semiconductor substrate 20 described above. An ion implantation region 20i is formed in a region of depth D−ΔD to D + ΔD from the main surface 20m on the main surface 20m side. Since the substrate is embrittled in the ion implantation region 20i, the group III nitride semiconductor substrate 20 can be separated in the ion implantation region 20i. The depth D for implanting the ions I is not particularly limited, but is preferably 0.03 μm or more and 100 μm or less, more preferably 0.03 μm or more and 50 μm or less, and more preferably 0.03 μm or more and 10 μm or less from the viewpoint of controlling separation. preferable. When the depth D is smaller than 0.03 μm, it becomes easy to break when separating the substrate and it is difficult to flatten the surface, and when it is larger than 100 μm, the distribution of ions becomes wide and it is difficult to control the separation depth. It becomes. The depth ΔD varies depending on the type of ion I and the implantation method, but is generally about 0.02D to 0.5D.

  In the step of implanting ions, the ions implanted into the group III nitride semiconductor substrate 20 are not particularly limited, but from the viewpoint of suppressing the decrease in crystallinity of the substrate, ions with low mass such as hydrogen and helium are used. preferable.

The dose amount of ions is not particularly limited, but is preferably 1 × 10 ¹⁷ cm ⁻² or more from the viewpoint of embrittlement of the substrate to the extent that separation is facilitated.

(Step of bonding a heterogeneous substrate to the main surface of the group III nitride semiconductor substrate)
Referring to FIG. 2B, in the method for manufacturing group III nitride semiconductor layer bonded substrate 1 of this embodiment, heterogeneous substrate 10 is bonded to main surface 20m of group III nitride semiconductor substrate 20 into which ions have been implanted. The process of carrying out is provided.

  The group III nitride semiconductor substrate 20 implanted with ions used in the step of bonding the heterogeneous substrate 10 has little or almost no warping, so that the group III nitride semiconductor substrate 20 is not cracked. The heterogeneous substrate 10 can be bonded to the main surface 20 m of the physical semiconductor substrate 20.

  Although there is no particular limitation on the method of bonding the different substrate 10 to the main surface 20m of the group III nitride semiconductor substrate 20, the surface of the surface to be bonded is directly cleaned by being able to maintain the bonding strength at a high temperature after bonding. After bonding, the surfaces to be joined are activated by a direct joining method in which the temperature is raised to about 600 ° C. to 1200 ° C. for joining, plasma or ions, etc., and at a low temperature of room temperature (for example, 10 ° C. to 30 ° C.) to about 400 ° C. A surface activation method by bonding is preferably used.

The heterogeneous substrate 10 bonded to the main surface 20m of the group III nitride semiconductor substrate 20 is not particularly limited, but on the group III nitride semiconductor layer 20a of the manufactured group III nitride semiconductor layer bonded substrate 1, From the viewpoint of withstanding the environment in which the group III nitride semiconductor epitaxial layer is grown, the heat resistant temperature is preferably 1200 ° C. or higher, and preferably has corrosion resistance even at 1200 ° C. or higher. Here, the corrosion resistance, hydrogen chloride (HCl) gas, ammonia (NH ₃₎ means that it is not corroded by a corrosive crystal growth atmosphere gas such as a gas. From this point of view, as a preferred heterogeneous substrate, sapphire substrate, alumina substrate, spinel substrate, AlN substrate, Si ₃ N ₄ substrate, TiN substrate, SiC substrate, AlSiC substrate, AlTiC substrate, ZnSe substrate, Si substrate, SiO ₂ layer formed Si Examples include a substrate, a ZnO substrate, a ZnS substrate, a quartz substrate, a Mo substrate, a carbon substrate, a diamond substrate, a Ga ₂ O ₃ substrate, and a ZrB ₂ substrate. Further, a metal film such as Pt, Ti, Au, Ni, Mo, W, or an alloy film of these metals may be attached as a protective film on these substrates. A GaAs substrate, InP substrate, GaP substrate, etc. are inferior in heat resistance and corrosion resistance to the above substrate, but can be used if the above protective film is attached to the substrate surface.

(Step of obtaining a group III nitride semiconductor layer bonded substrate)
Referring to FIG. 2C, in the method for manufacturing group III nitride semiconductor layer bonded substrate 1 of this embodiment, group III nitride semiconductor substrate 20 is separated in a region where ions are implanted (ion implantation region 20i). Then, a group III nitride semiconductor layer bonded substrate 1 is obtained by forming the group III nitride semiconductor layer 20a bonded to the dissimilar substrate 10.

Through this process, the group III nitride semiconductor substrate 20 is separated into a group III nitride semiconductor layer 20a and a remaining group III nitride semiconductor substrate 20b bonded to the different substrate 10. Thus, III-nitride semiconductor layer bonded substrate 1 III nitride semiconductor layer 20a having a thickness of T _D to a heterologous substrate 10 are bonded can be obtained.

  The method of separating the group III nitride semiconductor substrate 20 in the ion implantation region 20i is not particularly limited as long as it is a method of applying some energy, and even if the method is to apply stress to the ion implantation region 20i, the ion implantation region 20i. It may be a method of applying heat to. Moreover, the method of irradiating light to the ion implantation area | region 20i, or the method of applying an ultrasonic wave may be sufficient. Since the ion implantation region 20i is embrittled, it is easily separated by receiving energy from stress, heat, light, or ultrasonic waves.

Here, the ion implantation region 20 i has a depth D−ΔD to a depth D + ΔD from one main surface 20 m of the group III nitride semiconductor substrate 20, but a region (surface region) from the main surface 20 m to the depth D. ), The ion dose is maximized and is most fragile. Therefore, group III nitride semiconductor substrate 20 is usually separated from one main surface 20m of group III nitride semiconductor substrate 20 in a region (plane region) having a depth D or in the vicinity thereof. Accordingly, the thickness T _D of the depth ions are implanted, D and Group III nitride semiconductor layer 20a is substantially the same.

(Embodiment 3)
Referring to FIG. 3, one embodiment of a method for manufacturing a group III nitride semiconductor device according to the present invention includes a step of preparing group III nitride semiconductor layer bonded substrate 1 obtained by the method for manufacturing according to embodiment 2. Forming at least one group III nitride semiconductor epitaxial layer 30 on the main surface of the group III nitride semiconductor layer 20a of the group III nitride semiconductor layer bonding substrate 1.

  With this process, one or more Group III nitride semiconductor epitaxial layers 30 with high crystallinity can be grown on the main surface of the Group III nitride semiconductor layer 20a of the Group III nitride semiconductor layer bonded substrate 1, The group III nitride semiconductor device 3 having high characteristics is obtained.

  A method for growing at least one group III nitride semiconductor epitaxial layer 30 is not particularly limited, but a vapor phase method such as MOCVD method, HVPE method, and MBE method is preferably used from the viewpoint of good workability. A high pressure melting method, a liquid phase method such as an ammonothermal method or a flux method, or a sublimation method is also possible.

Specifically, referring to FIG. 3, at least one group III nitride semiconductor is formed on the main surface of group III nitride semiconductor layer 20a of group III nitride semiconductor layer bonded substrate 1 using MOCVD. As the epitaxial layer 30, six pairs of an n-type Al _0.1 Ga _0.9 N intermediate layer 31, an n-type GaN cladding layer 32, an In _0.01 Ga _0.99 N barrier layer 33b and an In _0.1 Ga _0.9 N well layer 33w are stacked to form the uppermost layer. A light emitting layer 33 having a multiple quantum well structure in which an In _0.01 Ga _0.99 N barrier layer 33b is further formed on an In _0.1 Ga _0.9 N well layer 33w, a p-type Al _0.12 Ga _0.88 N cladding layer 34, and a p-type GaN contact layer 35 Grow sequentially. Next, a Ni / Au electrode is formed as the p-side electrode 36 on the central portion of the main surface of the p-type GaN contact layer 35 by EB (electron beam) vapor deposition. Next, a Ti / Al / Ti / Au electrode is formed as the n-side electrode 37 on the main surface of the heterogeneous substrate 10 of the group III nitride semiconductor layer bonded substrate 1 by EB vapor deposition. In this manner, a light emitting device having high characteristics (specifically, an LED (light emitting diode)) is obtained as the group III nitride semiconductor device 3.

(Embodiment 4)
Referring to FIG. 4, in another embodiment of the method for manufacturing a group III nitride semiconductor device according to the present invention, the step of preparing group III nitride semiconductor layer bonded substrate 1 obtained by the method for manufacturing of embodiment 2 is provided. And a step of forming at least one group III nitride semiconductor epitaxial layer 40 on the main surface of the group III nitride semiconductor layer 20a of the group III nitride semiconductor layer bonded substrate 1.

  By such a process, one or more Group III nitride semiconductor epitaxial layers 40 having high crystallinity can be grown on the main surface of the Group III nitride semiconductor layer 20a of the Group III nitride semiconductor layer bonded substrate 1. A semiconductor device having high characteristics can be obtained.

  The method for growing at least one group III nitride semiconductor epitaxial layer 40 is not particularly limited, but a vapor phase method such as MOCVD method, HVPE method, MBE method is preferably used from the viewpoint of good workability.

Specifically, referring to FIG. 4, at least one group III nitride semiconductor epitaxial layer is formed on the main surface of group III nitride semiconductor layer 20a of group III nitride semiconductor layer bonded substrate 1 by MOCVD. 40, an n ⁺ -type GaN barrier layer 41 and an n ⁻ -type GaN drift layer 42 are sequentially grown. Next, a Pt electrode is formed as a Schottky electrode 43 on the main surface of the n ⁻ -type GaN drift layer 42 by EB vapor deposition. Next, a Ti / Al / Ti / Au electrode is formed as the ohmic electrode 44 on the main surface of the heterogeneous substrate 10 of the group III nitride semiconductor layer bonded substrate 1 by EB vapor deposition. In this way, a characteristic electronic device is obtained as the group III nitride semiconductor device 4.

(Examples 1-6, Comparative Examples 1-3)
[Production of ion-implanted group III nitride semiconductor substrate]
1. Preparation of GaN substrate A GaN mother crystal having a diameter of 2 inches (5.08 cm) grown by the HVPE method is sliced to a predetermined thickness, a plurality of GaN wafers are cut out, and the main surface of each GaN wafer is planarized by polishing. Thus, a plurality of GaN substrates were obtained. Here, the thickness of the GaN substrate is 100 μm in Comparative Example 1, 200 μm in Comparative Example 2, 300 μm in Comparative Example 3, 500 μm in Example 1, 750 μm in Example 2, 1000 μm in Example 3, and 1000 μm in Example 4. It was 1200 μm, in Example 5, 1500 μm, and in Example 6, 2000 μm. Note that each of the above GaN substrates has a surface roughness Ra (an arithmetic average roughness Ra defined in JIS B0601; the same shall apply hereinafter) of 1 nm or less and a total thickness variation variation TTV (one main surface of the substrate is vacuumed). A flat surface formed by adsorption was used as a reference surface, and the difference between the highest and lowest locations of the other main surface from the reference surface, the same shall apply hereinafter) was 10 μm or less. Here, the surface roughness Ra of the GaN substrate was measured within a range of 80 μm square using a micromap manufactured by Ryoka System, and the total thickness variation variation TTV was measured using a flat tester manufactured by Nidec.

2. Cleaning of main surface of GaN substrate The following cleaning was performed on a plurality of GaN substrates. First, for the purpose of removing organic substances such as oil adhering to the main surface of the substrate, ultrasonic cleaning of the substrate using ethanol as the solvent and ultrasonic cleaning of the substrate using acetone as the solvent were performed (No. 1). 1 wash). Next, for the purpose of removing metal ions adhering to the main surface of the substrate, the substrate was subjected to immersion cleaning using a mixed solution of hydrofluoric acid and hydrogen peroxide as a solvent (second cleaning). Next, in order to make the main surface of the substrate hydrophilic and remove impurities adhering to the main surface, the substrate was subjected to immersion cleaning using ammonia water as a solvent (third cleaning).

3. Ion Implantation into GaN Substrate With reference to FIGS. 1 and 2A, ions are implanted into one main surface 20m side of the plurality of GaN substrates (group III nitride semiconductor substrate 20) obtained above. A plurality of ion-implanted GaN substrates were obtained. The main surface 20 m into which ions were implanted was a (000-1) N surface. The implanted ions were hydrogen ions. The dose of hydrogen ions was 5 × 10 ¹⁷ cm ⁻¹ . The ion implantation energy was 90 keV, the substrate temperature during ion implantation was 80 ° C., and the ion implantation angle was 0 ° (that is, parallel to the <0001> direction (c-axis direction)). The depth D of ions implanted into a plurality of GaN substrates was about 0.7 μm for any ion-implanted GaN substrate when the cross section of the ion-implanted GaN substrate was observed with a TEM (transmission electron microscope).

In the present example and comparative example, a protective film for reducing damage caused by implanted ions is formed on the (000-1) N surface (main surface 20 m) into which ions are implanted in the GaN substrate. However, ions may be implanted into the GaN substrate after such a protective film is formed. As such a protective film, an oxide film such as SiO ₂ , SiON, or TiO ₂ , a nitride film such as Si ₃ N ₄ or TiN, a metal film such as Mo, W, Ti, or Pt is preferably used.

Further, as described above, a protective film such as a SiO ₂ film or a Si ₃ N ₄ film is formed on the (000-1) N surface (main surface 20 m) of the GaN substrate in order to reduce damage to the substrate due to ion implantation. In the case of the above, it is necessary to use aqua regia instead of hydrofluoric acid in order to prevent these films from being removed during the second cleaning in the main surface cleaning of the GaN substrate before ion implantation. (In other words, it is necessary to use a mixture of aqua regia and hydrogen peroxide as a cleaning solvent).

  In this example and comparative example, hydrogen ions are used as implanted ions, but helium, neon, or argon alone or ions, and a mixture of two or more of these may be used. Further, simple substances such as oxygen or hydrogen, or ions, and a mixture of two or more of these may be used.

4). Measurement of warpage of ion-implanted GaN substrate Referring to FIG. 1, the majority of the plurality of ion-implanted GaN substrates obtained above are all main surfaces 20m on the side where ions are implanted (000-1). The N surface was convex and curved in a spherical shape about 1 to 10 μm. The warpage W of a plurality of ion-implanted GaN substrates having a diameter of 2 inches (5.08 cm) and different thicknesses was measured using an optical interference flatness tester. The warpage of a substrate having a thickness of 100 μm was 121 μm (comparison). Example 1), warp of a 200 μm thick substrate is 87 μm (Comparative Example 2), warp of a 300 μm thick substrate is 65 μm (Comparative Example 3), warp of a 500 μm thick substrate is 35 μm (Example 1), thickness A substrate having a thickness of 750 μm is 15 μm (Example 2), a substrate having a thickness of 1000 μm is 5 μm (Example 3), a substrate having a thickness of 1200 μm is 3.5 μm (Example 4), and a thickness is 1500 μm. The warpage of the substrate was 2 μm (Example 5), and the warpage of the substrate having a thickness of 2000 μm was 0 μm (Example 6). The results are summarized in Table 1.

  FIG. 5 shows the relationship between the thickness and warpage of the ion-implanted GaN substrate having a diameter of 2 inches (5.08 cm) in Examples 1 to 6 and Comparative Examples 1 to 3.

  As is clear from Table 1 and FIG. 5, the ion-implanted GaN substrate having a thickness of 100 μm, 200 μm, or 300 μm was greatly warped. The ion-implanted GaN substrate has a thickness of 500 μm or more and a small warp of 35 μm or less, a thickness of 750 μm or more and a warp of 15 μm or less, and a thickness of 1000 μm or more and a warp of 5 μm or less. When the thickness is 1500 μm or more, the warpage is further reduced to 2 μm or less, and when the thickness is 2000 μm or more, the warpage is almost 0 μm or less. When the warp was larger than about 80 μm, a defect that cracks occurred during ion implantation occurred.

[Junction of Ion Implanted Group III Nitride Semiconductor Substrate and Dissimilar Substrate]
1. Cleaning of the main surface of the ion-implanted GaN substrate The following main surface ((000-1) N surface) was cleaned for the plurality of ion-implanted GaN substrates obtained as described above. First, for the purpose of removing organic substances such as oil adhering to the main surface of the substrate, ultrasonic cleaning of the substrate using ethanol as the solvent and ultrasonic cleaning of the substrate using acetone as the solvent were performed (No. 1). 1 wash). Next, for the purpose of removing metal ions adhering to the main surface of the substrate, the substrate was subjected to immersion cleaning using a mixed solution of hydrofluoric acid and hydrogen peroxide as a solvent (second cleaning). Next, in order to make the main surface of the substrate hydrophilic and remove impurities adhering to the main surface, the substrate was subjected to immersion cleaning using ammonia water as a solvent (third cleaning).

2. Activation of main surface of ion-implanted GaN substrate Activation of surface at atomic level by removing oxide film adhering to main surface ((000-1) N surface) of ion-implanted GaN substrate after cleaning In order to perform the above, the surface of the main surface of the substrate was modified using RIE (reactive ion etching). Argon (Ar) gas was used as the gas. Specifically, the (000-1) N surface of the ion-implanted GaN substrate was activated by irradiating argon plasma for 5 minutes under an atmospheric pressure of 1 Pa. Here, the (000-1) N surface is a surface to be bonded to the dissimilar substrate.

In this example and comparative example, argon plasma was used, but helium (He) gas, neon (Ne) gas (both are rare gases), nitrogen (N ₂ ) gas (inert) instead of argon gas. Gas), or ammonia (NH ₃ ) gas reactive with GaN, chlorine (Cl ₂ ) gas, boron chloride (BCl ₄ ) gas, silicon chloride (SiCl ₄ ) gas, or the like.

3. Bonding of Ion Implanted GaN Substrate and Dissimilar Substrate Referring to FIG. 2B, each of the above ion implanted GaN substrates (ion-implanted group III nitride semiconductor substrate 20) and a 350 μm thick Si substrate (dissimilar substrate) 10) were bonded to the activated (000-1) N surface (main surface 20 m) of the GaN substrate and the surface of the Si substrate (heterogeneous substrate). Specifically, the ion-implanted GaN substrate and the Si substrate are contacted so that the activated (000-1) N surface (main surface 20 m) of the ion-implanted GaN substrate is in contact with the surface of the Si substrate (heterogeneous substrate). Was placed at a pressure of 1000 N / cm ² for 5 minutes under an atmospheric temperature of 25 ° C., thereby bonding the ion-implanted GaN substrate and the Si substrate (different substrate). At this time, the pressure difference between both substrates was such that the pressure difference between the maximum pressure and the minimum pressure was 5 N / cm ² or less.

  When the ion-implanted GaN substrate and the Si substrate are bonded, if the thickness of the ion-implanted GaN substrate is 100 μm (Comparative Example 1), the ion-implanted GaN substrate is cracked, and the thickness of the ion-implanted GaN substrate is 200 μm ( In the case of Comparative Example 2), since a crack occurred in a part of the ion-implanted Group III nitride semiconductor substrate, it cannot be bonded, and the thickness of the ion-implanted GaN substrate is 300 μm or more (Comparative Example 3, Examples 1-6). In this case, a bonded substrate was obtained in which the ion-implanted GaN substrate and the Si substrate were bonded to at least a part of their main surfaces without causing cracks in either the ion-implanted group III nitride semiconductor substrate or the Si substrate. .

  The bonding area ratio between the ion-implanted GaN substrate and the Si substrate was calculated by image analysis of the color tone of the main surface of the bonded substrate viewed from the ion-implanted GaN substrate side. The results are summarized in Table 1. Here, the junction area ratio refers to the ratio of the area of the junction substrate to the area where the two substrates are bonded to the total area of the main surface to which the two substrates of the ion-implanted GaN substrate and the heterogeneous substrate can be bonded. . Further, in the main surface of the bonded substrate viewed from the ion-implanted GaN substrate side, the Si color of the Si substrate appears in the portion where the two substrates are bonded, and the Si color appears in the portion where the two substrates are not bonded. Interference fringes appear when different colors appear.

[Production of Group III Nitride Semiconductor Layer Bonded Substrate]
Referring to FIGS. 2B and 2C, the bonded substrates (Comparative Example 3 and Examples 1 to 6) obtained as described above were subjected to room temperature (in a nitrogen atmosphere reduced to about 100 Pa, at room temperature ( After heating to 400 ° C. at a rate of 1-50 ° C./minute from about 25 ° C. and holding for 20 minutes, cool from 400 ° C. to room temperature (about 25 ° C.) at a rate of 1-50 ° C./minute. Thus, thermal stress was applied to the ion implanted region 20i of the ion implanted GaN substrate (ion-implanted group III nitride semiconductor substrate 20), and the ion implanted GaN substrate was separated in the ion implanted region 20i. As a result, a GaN layer bonded substrate (Group III nitride semiconductor layer bonded substrate 1) in which the GaN layer (Group III nitride semiconductor layer 20a) and the Si substrate (heterogeneous substrate 10) are bonded was obtained. Although the examples and comparative examples were performed in a nitrogen gas atmosphere, they may be performed in a rare gas atmosphere such as argon gas or neon gas.

  The separation area ratio between the ion-implanted GaN substrate and the Si substrate was calculated by image analysis of the color tone of the main surface viewed from the GaN layer side of the GaN layer bonded substrate. The results are summarized in Table 1. Here, the separation area ratio refers to the area ratio of the main surface of the portion of the GaN layer that is separated from the GaN substrate and is present on the heterogeneous substrate with respect to the total area of the main surface of the GaN layer bonded substrate. Also, in the main surface of the GaN layer bonded substrate viewed from the GaN layer side, a color tone different from the Si color of the Si substrate appears in the portion where the GaN layer exists, and interference fringes appear in some cases, and in the portion where the GaN layer does not exist The Si substrate is exposed and a Si color appears.

  Further, in the method for producing a group III nitride semiconductor layer bonded substrate, the separation area ratio is not acceptable if it is less than 0.85, acceptable if it is 0.85 or more, acceptable if it is 0.9 or more, 0.95 The above were evaluated as excellent, and those above 0.97 were rated as excellent. The results are summarized in Table 1.

  Referring to Table 1, since the ion-implanted group III nitride semiconductor substrate having a thickness of 500 μm or more has small warpage, it could be uniformly bonded to a different substrate without causing cracks (Examples 1 to 6). ). For this reason, the group III nitride semiconductor layer bonded substrate can be obtained with high yield by separating the ion implanted group III nitride semiconductor substrate in the ion implanted region and forming the group III nitride semiconductor layer bonded to the heterogeneous substrate.

(Examples 7 to 12, Comparative Example 4)
[Production of ion-implanted group III nitride semiconductor substrate]
1. Preparation of GaN substrate In the same manner as in Example 2, a plurality of GaN substrates having a thickness of 750 μm were prepared.

2. Cleaning of main surface of GaN substrate In the same manner as in Example 2, for a plurality of GaN substrates, ultrasonic cleaning of a substrate using ethanol as a solvent and ultrasonic cleaning of the substrate using acetone as a solvent (first cleaning), Substrate immersion cleaning (second cleaning) using a mixed solution of hydrofluoric acid and hydrogen peroxide as a solvent, and substrate cleaning (third cleaning) using ammonia water as a solvent were sequentially performed.

3. Ion Implantation into GaN Substrate With reference to FIG. 1 and FIG. 2 (a), a plurality of GaN obtained as described above in the same manner as in Example 2 except that the dose amount of ions was changed as follows. Hydrogen ions were implanted into one main surface 20m ((000-1) N surface) side of the substrate (Group III nitride semiconductor substrate 20) to obtain a plurality of ion-implanted GaN substrates. The ion implantation energy was 120 keV, the ion implantation temperature was 150 ° C., and the ion implantation angle was 0 ° (that is, parallel to the <0001> direction (c-axis direction)). The depth D of ions implanted into a plurality of GaN substrates was about 1 μm for any ion implanted GaN substrate. Here, the dose amount of hydrogen ions is 0 cm ⁻² (ie, ion implantation is not performed, Comparative Example 4), 0.6 × 10 ¹⁷ cm ⁻² (Example 7), and 0.8 × 10 ¹⁷ cm ^−2. (Example 8) 1 × 10 ¹⁷ cm ⁻² (Example 9), 3 × 10 ¹⁷ cm ⁻² (Example 10), 5 × 10 ¹⁷ cm ⁻² (Example 11), 7 × 10 ¹⁷ cm ^-2 (Example 12). The ion dose was measured by SIMS (secondary ion mass spectrometry).

4). Measurement of the c-axis lattice constant of the ion-implanted group III nitride semiconductor substrate The c-axis lattice constant in the ion-implanted region 20i of the plurality of ion-implanted GaN substrates is determined using the two-crystal X-ray diffractometer. It was calculated from the measurement of the spacing of the X-ray diffracting plane with respect to the (0004) plane, and 5.185 mm (Comparative Example 4), 5.193 mm (Example 7), 5.198 mm (Example 8), and 5.205 mm, respectively. (Example 9) It was 5.218 inches (Example 10), 5.224 inches (Example 11), and 5.231 inches (Example 12). The results are summarized in Table 2.

5). Measurement of Warpage of Ion Implanted Group III Nitride Semiconductor Substrate With reference to FIG. 1, each of the plurality of ion implanted GaN substrates is a main surface 20m on the side where ions are implanted (000-1) N surface Was curved into a spherical shape with a convex shape. The warpage W of the plurality of ion-implanted GaN substrates was measured using an optical interference flatness tester (manufactured by Nidec Co., Ltd.), and was 3 μm (Comparative Example 4), 10 μm (Example 7), and 11 μm (Example 8), respectively. ), 15 μm (Example 9), 16 μm (Example 10), 15 μm (Example 11), and 18 μm (Example 12). The results are summarized in Table 2.

[Junction of Ion Implanted Group III Nitride Semiconductor Substrate and Dissimilar Substrate]
1. Cleaning the main surface of the ion-implanted GaN substrate For the plurality of ion-implanted GaN substrates, as in Example 2, ultrasonic cleaning of the substrate using ethanol as the solvent and ultrasonic cleaning of the substrate using acetone as the solvent (First cleaning), substrate immersion cleaning (second cleaning) using a mixed solution of hydrofluoric acid and hydrogen peroxide as a solvent, and substrate immersion cleaning (third cleaning) using ammonia water as a solvent in order. went.

2. Activation of main surface of ion-implanted GaN substrate The surface of the main surface ((000-1) N surface) of the ion-implanted GaN substrate after the cleaning was activated in the same manner as in Example 2. Here, the (000-1) N surface is a surface to be bonded to the dissimilar substrate.

3. Bonding of Ion Implanted GaN Substrate and Dissimilar Substrate Referring to FIG. 2B, each of the above ion implanted GaN substrates (ion-implanted group III nitride semiconductor substrate 20) and a 350 μm thick Si substrate (dissimilar substrate) 10) were joined in the same manner as in Example 2. Any of the ion-implanted GaN substrates (Examples 6 to 11) and the Si-implanted GaN substrate and the Si substrate were bonded to each other at least at a part of their main surfaces without causing any cracks in the Si substrate. A bonded substrate was obtained. The junction area ratio between the ion-implanted GaN substrate and the Si substrate was calculated in the same manner as in Example 2. The results are summarized in Table 2.

[Production of Group III Nitride Semiconductor Layer Bonded Substrate]
Referring to FIGS. 2B and 2C, the above-described bonding substrate (Examples 7 to 12) is made into an ion-implanted GaN substrate (an ion-implanted group III nitride semiconductor substrate) in the same manner as in Example 2. Thermal stress was applied to the ion implantation region 20i of 20), and the ion-implanted GaN substrate was separated in the ion implantation region 20i. As a result, a GaN layer bonded substrate (Group III nitride semiconductor layer bonded substrate 1) in which the GaN layer (Group III nitride semiconductor layer 20a) and the Si substrate (heterogeneous substrate 10) are bonded was obtained. The separation area ratio between the ion-implanted GaN substrate and the Si substrate was calculated in the same manner as in Example 2. The results are summarized in Table 2.

Referring to Table 2, it can be seen that the greater the ion dose in the ion-implanted region of the ion-implanted group III nitride semiconductor substrate, the greater the c-axis lattice constant and the easier the substrate is separated in the ion-implanted region. (Examples 7 to 12). Further, the c-axis lattice constant of the ion implantation region having an ion dose of 1 × 10 ¹⁷ cm ² or more that facilitates the separation of the substrate is 0 as compared with the c-axis lattice constant of the region other than the ion implantation region. It was found to be larger than 0.02 cm (Examples 9 to 12).

  In Examples 7 and 8 in Table 2, since the ion-implanted GaN substrate could not be separated, a GaN layer bonded substrate could not be produced. This is because the ion-implanted GaN substrate could not be separated by the thermal stress applied in this example because the ion dose was small, and depending on the type or degree of stress applied to the ion-implanted GaN substrate, It is considered possible to do. From this viewpoint, Examples 7 and 8 were not evaluated together with Comparative Example 4.

(Examples 13 to 16, Comparative Example 5)
1. Preparation of GaN substrate In the same manner as in Example 3, a plurality of GaN substrates having a thickness of 1000 μm were prepared.

2. Cleaning of main surface of GaN substrate In the same manner as in Example 3, for a plurality of GaN substrates, ultrasonic cleaning of a substrate using ethanol as a solvent and ultrasonic cleaning of the substrate using acetone as a solvent (first cleaning), Substrate immersion cleaning (second cleaning) using a mixed solution of hydrofluoric acid and hydrogen peroxide as a solvent, and substrate cleaning (third cleaning) using ammonia water as a solvent were sequentially performed.

3. Ion Implantation into GaN Substrate Referring to FIGS. 1 and 2 (a), a plurality of GaN obtained as described above was obtained in the same manner as in Example 3 except that the dose amount of ions was changed as follows. Hydrogen ions were implanted into one main surface 20m ((000-1) N surface) side of the substrate (Group III nitride semiconductor substrate 20) to obtain a plurality of ion-implanted GaN substrates. The ion implantation energy was 120 keV, the ion implantation temperature was 150 ° C., and the ion implantation angle was 0 ° (that is, parallel to the <0001> direction). The depth D of ions implanted into a plurality of GaN substrates was about 1 μm for any ion implanted GaN substrate. Here, the dose amount of hydrogen ions is 0 cm ⁻² (ie, ion implantation is not performed, Comparative Example 5), 0.8 × 10 ¹⁷ cm ⁻² (Example 13), 1 × 10 ¹⁷ cm ⁻² (implementation) Example 14) 5 × 10 ¹⁷ cm ⁻² (Example 15) and 7 × 10 ¹⁷ cm ⁻² (Example 16). The ion dose was measured by SIMS (secondary ion mass spectrometry).

4). Measurement of light absorption coefficient of ion-implanted GaN substrate The ion-implanted GaN substrate of Comparative Example 5 was almost colorless and transparent. In contrast, the ion-implanted GaN substrates of Examples 13 to 16 were yellowish brown. The light absorption coefficient of these substrates was measured using a double beam type spectrophotometer. The light absorption coefficient of the ion-implanted GaN substrate was measured by irradiating light in the thickness direction of 1000 μm, thereby measuring the light absorption coefficient of the region including the ion-implanted region and other regions.

The results are shown in FIG. FIG. 6 shows the absorption characteristics of the ion-implanted GaN substrate with respect to light having a wavelength in the range of 370 to 500 nm of the ion-implanted GaN substrate, and the curve L0 shows the light absorption of the substrate having a hydrogen ion dose of 0 cm ⁻² (Comparative Example 5). The curve L1 shows the change of the light absorption coefficient of the substrate (Example 13) with the hydrogen ion dose of 0.8 × 10 ¹⁷ cm ⁻² , and the curve L2 shows the hydrogen ion dose of 1 The change of the light absorption coefficient of the substrate (Example 14) of × 10 ¹⁷ cm ^-2 is shown, and the curve L3 shows the light absorption coefficient of the substrate (Example 15) of 5 × 10 ¹⁷ cm ^-2 dose of hydrogen ions. The curve L4 shows the change of the light absorption coefficient of the substrate (Example 16) having a hydrogen ion dose of 7 × 10 ¹⁷ cm ⁻² .

Referring to FIG. 6, it was found that the light absorption coefficient of the ion-implanted GaN substrate increases as the dose of hydrogen ions in the ion-implanted region increases (Comparative Example 5, Examples 13-16). Further, the absorption coefficient for light having a wavelength of 400 nm of an ion-implanted GaN substrate including an ion-implanted region having an ion dose of 1 × 10 ¹⁷ cm ⁻² or more that facilitates separation of the substrate is 1 × 10 ⁴ cm ^−1. It turns out that it is above.

(Example 17)
[Production of Group III Nitride Semiconductor Device]
1. Production of Light-Emitting Device Referring to FIG. 3, on the main surface of the GaN layer (Group III nitride semiconductor layer 20a) of the GaN layer bonded substrate (Group III nitride semiconductor layer bonded substrate 1) obtained in Example 4. At least one group III nitride semiconductor epitaxial layer 30 was grown by MOCVD. The raw material for a group III nitride semiconductor epitaxial layer 30 grown, trimethyl gallium (TMG), trimethyl aluminum (TMA), trimethylindium (TMI), ammonia (NH _3), monosilane (SiH _4), cyclopentadienyl Magnesium (Cp ₂ Mg) or the like was used.

Specifically, first, a GaN layer bonded substrate was placed on a susceptor placed in a reaction chamber of an MOCVD furnace. Next, by supplying a source gas (TMG, TMA, NH ₃ , SiH ₄ ) into the reaction chamber having a substrate temperature of 1050 ° C. and an atmospheric pressure of 101 kPa, a GaN layer (Group III nitride semiconductor layer) of the GaN layer bonded substrate An n-type Al _0.1 Ga _0.9 N intermediate layer 31 having a thickness of 50 nm was grown on the main surface 20a). Next, after maintaining the atmospheric pressure in the reaction chamber at 101 kPa and setting the substrate temperature to 1100 ° C., a source gas (TMG, NH ₃ , SiH ₄ ) is supplied into the reaction chamber, whereby n-type Al _0.1 Ga _0.9 N intermediate An n-type GaN cladding layer 32 having a thickness of 2 μm was grown on the layer 31.

Next, six pairs of In _0.01 Ga _0.99 N barrier layer 33b and In _0.1 Ga _0.9 N well layer 33w are stacked on the n-type GaN clad layer 32 in the following manner, and the uppermost In _0.1 Ga _0.9 N well is formed. The light emitting layer 33 having a multiple quantum well structure in which an In _0.01 Ga _0.99 N barrier layer 33b was further stacked on the layer 33w was formed. In the formation of the barrier layer, the atmospheric pressure in the reaction chamber is maintained at 101 kPa and the substrate temperature is set to 900 ° C., and then a raw material gas (TMG, TMI, NH ₃ ) is supplied into the reaction chamber to obtain a thickness of 15 nm. A non-doped In _0.01 Ga _0.99 N barrier layer 33b was grown. In the formation of the well layer, the atmospheric pressure in the reaction chamber is maintained at 101 kPa, the substrate temperature is set to 800 ° C., and then a raw material gas (TMG, TMI, NH ₃ ) is supplied into the reaction chamber to obtain a thickness of 50 nm. A non-doped In _0.1 Ga _0.9 N well layer 33w is formed. The growth of such well layers and barrier layers is repeated as many times as necessary.

Thereafter, the atmospheric pressure in the reaction chamber is maintained at 101 kPa and the substrate temperature is set to 1050 ° C., and then source gases (TMG, TMA, NH ₃ , Cp ₂ Mg) are supplied into the reaction chamber, A p-type Al _0.12 Ga _0.88 N cladding layer 34 having a thickness of 20 nm was grown. Next, the atmospheric pressure in the reaction chamber is maintained at 101 kPa, the substrate temperature is maintained at 1050 ° C., and source gases (TMG, NH ₃ , Cp ₂ Mg) are supplied into the reaction chamber, and p-type Al _0.12 Ga _0.88 N A p-type GaN contact layer 35 having a thickness of 150 nm was grown on the cladding layer 34.

  Next, a Ni / Au electrode was formed as the p-side electrode 36 on the central portion of the main surface of the p-type GaN contact layer 35 by EB (electron beam) evaporation. Next, a Ti / Al / Ti / Au electrode as an n-side electrode 37 is formed on the main surface of the Si substrate (different substrate 10) of the GaN layer bonded substrate (Group III nitride semiconductor layer bonded substrate 1) by EB vapor deposition. Formed. In this way, a light-emitting device (more specifically, an LED (light-emitting diode)) that is the group III nitride semiconductor device 3 was obtained.

A current was applied to the LED obtained as described above so that the current density was 100 A / cm ² to cause the LED to emit light, and the variation in emission wavelength was measured together with the emission intensity at a wavelength of 450 nm. The variation in the emission intensity and emission wavelength of the LED of this example is that of a typical LED having the same structure as this example, except that the GaN layer bonded substrate is replaced with a GaN free-standing substrate having the same thickness as the substrate. It was equivalent to the variation in emission intensity and emission wavelength. That is, the LED of this example had sufficient LED characteristics.

(Example 18)
[Production of Group III Nitride Semiconductor Device]
1. Production of Electronic Device Referring to FIG. 4, on the main surface of the GaN layer (Group III nitride semiconductor layer 20a) of the GaN layer bonded substrate (Group III nitride semiconductor layer bonded substrate 1) obtained in Example 4 At least one group III nitride semiconductor epitaxial layer 40 was grown by MOCVD. The same raw material as in Example 17 was used as a raw material for the growth of group III nitride semiconductor epitaxial layer 40.

Specifically, first, a GaN layer bonded substrate was placed on a susceptor placed in a reaction chamber of an MOCVD furnace. Next, by supplying a source gas (TMG, TMA, NH ₃ , SiH ₄ ) into the reaction chamber having a substrate temperature of 1100 ° C. and an atmospheric pressure of 101 kPa, a GaN layer (Group III nitride semiconductor layer) of the GaN layer bonded substrate An n ⁺ -type GaN barrier layer 41 (carrier concentration 2 × 10 ¹⁸ cm ⁻³ ) doped with Si having a thickness of 2 μm was grown on the main surface of 20a). Subsequently, the atmospheric pressure and the substrate temperature in the reaction chamber are maintained at 101 kPa and 1100 ° C., respectively, and a source gas (TMG, NH ₃ , SiH ₄ ) is supplied into the reaction chamber, whereby the n ⁺ -type GaN barrier layer 41 is formed. An n ⁻ -type GaN drift layer 42 (carrier concentration is 2 × 10 ¹⁶ cm ⁻³ ) having a thickness of 12 μm was grown.

The electronic device obtained as described above had excellent characteristics, with a withstand voltage of 960 V and an on-resistance of ² mΩ · cm ⁻² .

  It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

1 Group III nitride semiconductor layer bonded substrate, 3,4 Group III nitride semiconductor device, 10 Heterogeneous substrate, 20 Group III nitride semiconductor substrate, 20a Group III nitride semiconductor layer, 20b Remaining group III nitride semiconductor substrate, 20i Ion implantation region, 20 m main surface, 30,40 group III nitride semiconductor epitaxial layer, 31 n-type Al _0.1 Ga _0.9 N intermediate layer, 32 n-type GaN cladding layer, 33 light emitting layer, 33b In _0.01 Ga _0.99 N barrier layer, 33w In _0.1 Ga _0.9 n well layer, 34 p-type Al _0.12 Ga _0.88 n cladding layer, 35 p-type GaN contact layer, 36 p-side electrode, 37 n-side electrode, 41 n ⁺ -type GaN barrier layer, 42 n ^- -type GaN Drift layer, 43 Schottky electrode, 44 ohmic electrode.

Claims (5)

  An ion-implanted group III nitride semiconductor substrate having a thickness of 500 μm or more, including an ion-implanted region formed at a predetermined depth on one main surface side from the main surface.   2. The ion-implanted group III nitride semiconductor substrate according to claim 1, wherein the c-axis lattice constant of the ion-implanted region is 0.02０．０ or more larger than the c-axis lattice constant of a region other than the ion-implanted region.   The ion-implanted group III nitride semiconductor substrate according to claim 1, wherein the ion-implanted region is colored. A method for producing a group III nitride semiconductor layer bonded substrate in which a group III nitride semiconductor layer and a heterogeneous substrate having a different chemical composition from the group III nitride semiconductor layer are bonded,
A step of implanting ions to a predetermined depth from one main surface side of the group III nitride semiconductor substrate having a thickness of 500 μm or more and 5 cm or less;
Bonding the heterogeneous substrate to the main surface of the group III nitride semiconductor substrate;
A step of obtaining the group III nitride semiconductor layer bonded substrate by forming the group III nitride semiconductor layer in which the group III nitride semiconductor substrate is separated in the region where the ions are implanted and bonded to the heterogeneous substrate. And a method for manufacturing a group III nitride semiconductor layer bonded substrate. Preparing a group III nitride semiconductor layer bonded substrate obtained by the manufacturing method of claim 4;
Forming at least one group III nitride semiconductor epitaxial layer on a main surface of the group III nitride semiconductor layer of the group III nitride semiconductor layer bonded substrate, and a method of manufacturing a group III nitride semiconductor device .

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