JP2010192597A - Semiconductor device, switching device, and method of controlling semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having an IGBT which has a low ON voltage and a diode which has low reverse recovery loss. <P>SOLUTION: The semiconductor device includes a semiconductor substrate which has an upper electrode formed on an upper surface and a lower electrode formed on a lower surface, and also has a vertical IGBT and a vertical diode formed. The IGBT has an n-type emitter region, a p-type body region, an n-type drift region, a p-type collector region, and a gate electrode opposed to the body region, within a range wherein the emitter region and drift region are isolated, with an insulating film interposed. The diode has a p-type anode region, an n-type cathode region continuous with the drift region, and a control electrode opposed to the cathode region with the insulating film interposed. Within a range wherein the cathode region comes into contact with the insulating film, a high-concentration region is formed, which has a higher n-type impurity concentration than the cathode region at the periphery thereof. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device including a semiconductor substrate on which an IGBT and a diode are formed.

  Patent Document 1 discloses a semiconductor device including a semiconductor substrate on which an IGBT and a diode are formed. In this semiconductor device, the emitter and body regions of the IGBT and the anode region of the diode are electrically connected to the upper electrode, and the collector region of the IGBT and the cathode region of the diode are electrically connected to the lower electrode. That is, the IGBT and the diode are connected in parallel in the reverse direction. This semiconductor device is used for an inverter circuit or the like. The IGBT controls the current of the motor by switching. The diode protects the IGBT by circulating current when the IGBT is off.

JP 2008-53648 A JP 2008-192737 A

When the voltage applied to the diode is switched from the forward voltage to the reverse voltage, the forward current flowing through the diode decreases, and then the reverse current flows through the diode. That is, as the forward voltage decreases, the forward current of the diode decreases. Thereafter, when a reverse voltage is applied, the holes present in the cathode region of the diode are discharged to the upper electrode by the application of the reverse voltage. As a result, a reverse current flows through the diode. The reverse current decays as the discharge of holes proceeds and eventually becomes zero. The reverse current instantaneously becomes a large current, and the reverse voltage applied to the diode when the reverse current flows becomes extremely high, so that a high loss occurs in the diode when the reverse current flows. The loss caused by the reverse current is called reverse recovery loss.
As a technique for reducing reverse recovery loss, a technique is known in which light ions or electron beams are implanted into a cathode region of a diode to form crystal defects in the cathode region. Crystal defects act as recombination centers for carriers. For this reason, when a crystal defect is formed in the cathode region, holes in the cathode region recombine with electrons near the crystal defect when a reverse current flows. As a result, holes disappear and the reverse current can be attenuated quickly. However, when this technique is applied to a semiconductor device having an IGBT and a diode, crystal defects are also formed in the drift region of the IGBT. Then, when the IGBT is turned on, holes are easily recombined in the drift region, and the on-voltage of the IGBT is increased. Patent Document 2 discloses a technology that has an IGBT and a diode, and reduces the reverse recovery loss of the diode without increasing the on-voltage of the IGBT by forming a crystal defect only in the cathode region of the diode. ing. However, it is difficult to accurately control the implantation range of light ions and electron beams, and it is actually difficult to form crystal defects only in the cathode region of the diode. For this reason, the technique of Patent Document 2 has a problem that the characteristics of the semiconductor device are not stable during mass production.
As described above, in a conventional semiconductor device having an IGBT and a diode, it is difficult to reduce the reverse recovery loss of the diode without increasing the on-voltage of the IGBT.

  The present invention has been created in view of the above-described circumstances, and an object thereof is to provide a semiconductor device having an IGBT with a low on-voltage and a diode with a low reverse recovery loss.

  The semiconductor device of the present invention includes a semiconductor substrate in which an upper electrode is formed on an upper surface, a lower electrode is formed on a lower surface, and a vertical IGBT and a vertical diode are formed. The IGBT has an n-type emitter region that is electrically connected to the upper electrode, a p-type body region that is electrically connected to the upper electrode, is adjacent to the emitter region, and is adjacent to the body region. An n-type drift region isolated from the emitter region, a p-type collector region adjacent to the drift region, separated from the body region by the drift region, and in conduction with the lower electrode; It has a gate electrode facing the body region in a range separating the drift region through an insulating film. The diode includes a p-type anode region that is electrically connected to the upper electrode, an n-type cathode region that is adjacent to the anode region, is electrically connected to the lower electrode, and is continuous with the drift region of the IGBT, and a cathode It has a control electrode facing the region through an insulating film. A high concentration region having an n-type impurity concentration higher than that of the surrounding cathode region is formed in a range where the cathode region is in contact with the insulating film.

In this semiconductor device, when the voltage applied to the diode is switched from the forward voltage to the reverse voltage, the forward current of the diode decreases, then, the reverse current flows through the diode, and then the reverse current of the diode attenuates. When using this semiconductor device, a negative potential (on the upper electrode) is applied to the control electrode during at least a part of the period from when the forward current of the diode starts to decrease until the reverse current of the diode decays. A potential lower than the potential) can be applied. This generates an electric field in the cathode region. Then, holes present in the cathode region are attracted to the control electrode side by the electric field. A high-concentration region containing n-type impurities at a high concentration (that is, having electrons at a high concentration) is formed in a range in contact with the insulating film around the control electrode. For this reason, the holes attracted to the control electrode side flow into the high concentration region, and recombine with electrons in the high concentration region to disappear. As a result, holes in the cathode region are reduced, and the reverse current can be attenuated in a short time. Therefore, in this semiconductor device, reverse recovery loss caused by the diode is small.
Further, according to the structure of this semiconductor device, the high concentration region can be formed only in the cathode region of the diode without forming the high concentration region in the drift region of the IGBT. For example, a trench reaching the cathode region is formed in the diode region of the semiconductor substrate, a high concentration region is formed near the bottom of the trench, and then a control electrode is formed in the trench, whereby a high concentration is formed on the IGBT side. A high concentration region can be formed only on the diode side without forming a region. If the high-concentration region is formed only on the diode side in this way, holes are prevented from recombining in the drift region when the IGBT is turned on, and the on-voltage of the IGBT is not increased. As described above, in this semiconductor device, the IGBT and the diode can be easily formed separately, and the on-voltage of the IGBT can be reduced.
In addition, the diode and the IGBT can be formed adjacent to each other without providing a gap on the semiconductor substrate. In this case, a high-concentration region of the diode is formed in the vicinity of the IGBT drift region, but also in this case, an increase in the on-voltage of the IGBT can be suppressed. That is, in this case, a potential equal to or higher than the potential of the upper electrode is applied to the control electrode of the diode when the IGBT is energized. Then, an electric field is generated in the cathode region due to the potential applied to the control electrode, and this electric field suppresses holes from flowing into the high concentration region. That is, recombination of holes is suppressed. Thereby, the on-voltage of the IGBT can be reduced.
The body region of the IGBT and the anode region of the diode can be shared. Moreover, the drift region of the IGBT and the cathode region of the diode can be shared. The gate electrode of the IGBT and the control electrode of the diode can be shared. As described above, even when each part is shared, the on-voltage of the IGBT can be reduced by applying a potential higher than that of the upper electrode to the control electrode when the IGBT is energized.

The present invention also provides a switching device having the above-described semiconductor device. This switching device includes the semiconductor device and the potential control device described above. When the voltage applied to the diode is switched from the forward voltage to the reverse voltage, the potential control device has at least a part of a period from when the forward current of the diode starts to decrease until the reverse current of the diode decays. In this period, a potential lower than that of the upper electrode is applied to the control electrode.
According to this switching device, the on-voltage of the IGBT can be reduced and the reverse recovery loss of the diode can be reduced.

In the switching device described above, when the forward current flows through the diode in a period other than the above period from when the forward current of the diode starts to decrease until the reverse current of the diode decays, the potential control device It is preferable to apply a potential equal to or higher than that of the upper electrode.
When recombination of holes occurs in the cathode region when a forward current flows through the diode to recirculate the current, the forward voltage of the diode increases and the loss of the diode increases. In this switching device, when the forward current flows through the diode in a period excluding the period from when the forward current of the diode starts to decrease until the reverse current of the diode decays (that is, in order to recirculate the current). When current is flowing, the potential control device applies a potential equal to or higher than the potential of the upper electrode to the control electrode of the diode. For this reason, the holes in the cathode region are not attracted to the control electrode, and the holes are prevented from flowing into the high concentration region and disappearing due to recombination. Therefore, it is possible to suppress loss in the diode during forward current conduction.

In the switching device described above, it is preferable that the potential control device applies a potential equal to or higher than the potential of the upper electrode to the control electrode when the IGBT is energized.
By applying a potential higher than that of the upper electrode to the diode control electrode when the IGBT is energized, holes in the IGBT drift region are not attracted to the high concentration region of the diode, and the holes flow into the high concentration region. It is possible to further suppress disappearance due to recombination. Therefore, according to this switching device, the on-voltage of the IGBT can be further reduced.

The present invention also provides a method for controlling the semiconductor device described above. In this control method, when the voltage applied to the diode is switched from the forward voltage to the reverse voltage, at least a part of the period from when the forward current of the diode starts to decrease until the reverse current of the diode decays. In this period, a potential lower than that of the upper electrode is applied to the control electrode of the diode.
According to this control method, the reverse recovery loss of the diode can be reduced.

In the above control method, the potential of the upper electrode is applied to the control electrode when the forward current flows through the diode in the period excluding the above period from when the forward current of the diode starts to decrease until the reverse current of the diode decays. It is preferable to apply the above potential.
According to this control method, it is possible to reduce the loss of the diode during forward current conduction.

In the control method described above, it is preferable to apply a potential higher than the potential of the upper electrode to the control electrode of the diode when the IGBT is energized.
According to this control method, the on-voltage of the IGBT can be further reduced.

  According to the present invention, it is possible to provide a semiconductor device having an IGBT with a low on-voltage and a diode with a low reverse recovery loss.

Sectional drawing of the semiconductor device 10 of 1st Example. The circuit diagram of the inverter circuit 70. FIG. The circuit diagram of the inverter circuit 70. FIG. The graph of each value at the time of reverse recovery of the diode 40. FIG. Sectional drawing of the semiconductor device 110 of 2nd Example. Sectional drawing of the semiconductor device 210 of 3rd Example. Sectional drawing of the semiconductor device 310 of 4th Example.

The structure of the Example described in detail below is listed first.
(Feature 1) The high concentration region is formed in the vicinity of the boundary between the cathode layer and the anode layer.
(Feature 2) In the diode, a trench is formed from the upper surface of the semiconductor substrate to reach the cathode layer through the anode layer, an insulating film is formed on the inner surface of the trench, and a control electrode is formed in the trench Has been. The high concentration region is formed in a range in contact with the insulating film at the bottom of the trench.

  A semiconductor device according to a first embodiment will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view of a semiconductor device 10 according to the first embodiment. As shown in FIG. 1, the semiconductor device 10 includes a semiconductor substrate 12 mainly made of silicon. An IGBT region 20 and a diode region 40 are formed in the semiconductor substrate 12.

  A plurality of trenches 30 are formed in the upper surface 12 a of the semiconductor substrate 12 in the IGBT region 20. An insulating film 32 is formed on the wall surface of the trench 30. A gate electrode 34 is formed in the trench 30. A cap insulating film 36 is formed on the gate electrode 34. In the region of the IGBT region 20 facing the upper surface 12a of the semiconductor substrate 12, an n-type emitter region 22 and a p-type body region 24 are selectively formed. The emitter region 22 is formed in contact with the insulating film 32. The body region 24 is formed so as to cover the emitter region 22. The body region 24 includes a body contact region 24a having a high p-type impurity concentration and a low-concentration body region 24b having a low p-type impurity concentration. The body contact region 24a is formed in a region of the body region 24 that faces the upper surface 12a. The low concentration body region 24b is formed below the emitter region 22 and the body contact region 24a. The low-concentration body region 24b is formed to be in contact with the insulating film 32 below the emitter region 22. The low concentration body region 24 b is formed to a position shallower than the lower end of the trench 30. An n-type drift layer 26 is formed below the body region 24. The drift layer 26 is separated from the emitter region 22 by the body region 24. The drift layer 26 includes a low concentration drift layer 26a having a low n-type impurity concentration and a buffer layer 26b having a high n-type impurity concentration. The low concentration drift layer 26 a is formed below the body region 24. The buffer layer 26b is formed below the low concentration drift layer 26a. A p-type collector layer 28 is formed in a region below the drift layer 26 and facing the lower surface 12 b of the semiconductor substrate 12. The collector layer 28 is separated from the body region 24 by the drift layer 26. A number of IGBTs are formed in the IGBT region 20 by the emitter region 22, the body region 24, the drift layer 26, the collector layer 28, and the gate electrode 34. Hereinafter, the IGBT formed in the IGBT region 20 is referred to as an IGBT 20.

  A plurality of trenches 50 are formed in the upper surface 12 a of the semiconductor substrate 12 in the diode region 40. The trench 50 extends to substantially the same depth as the trench 30. An insulating film 52 is formed on the wall surface of the trench 50. A trench electrode 54 is formed in the trench 50. A cap insulating film 56 is formed on the trench electrode 54. A p-type anode layer 42 is formed in a region of the diode region 40 facing the upper surface 12 a of the semiconductor substrate 12. The anode layer 42 includes an anode contact region 42a having a high p-type impurity concentration and a low-concentration anode layer 42b having a low p-type impurity concentration. The anode contact region 42 a is formed in a region located in the middle of the two trenches 50 in the region facing the upper surface 12 a of the semiconductor substrate 12. The low concentration anode layer 42b is formed to cover the anode contact region 42a. The low concentration anode layer 42b is formed to substantially the same depth as the low concentration body region 24b of the IGBT region 20. An n-type cathode layer 44 is formed below the anode layer 42. The cathode layer 44 includes a cathode drift layer 46, a high concentration region 47, and a cathode contact layer 48. The cathode drift layer 46 is formed below the anode layer 42. The cathode drift layer 46 is continuous with the low concentration drift layer 26a of the IGBT 20, and the n type impurity concentration of the cathode drift layer 46 is substantially equal to the n type impurity concentration of the low concentration drift layer 26a. The cathode contact layer 48 is formed in a region facing the lower surface 12 b of the semiconductor substrate 12 below the cathode drift layer 46. The cathode contact layer 48 is continuous with the buffer layer 26b of the IGBT 20, and the n-type impurity concentration of the cathode contact layer 48 is substantially equal to the n-type impurity concentration of the buffer layer 26b. The high concentration region 47 is formed in the cathode drift layer 46 (region in contact with the insulating film 52) near the lower end of the trench 50. The n-type impurity concentration of the high concentration region 47 is higher than the n-type impurity concentration of the cathode drift layer 46. A diode is formed in the diode region 40 by the anode layer 42 and the cathode layer 44. Hereinafter, the diode formed in the diode region 40 is referred to as a diode 40.

On the lower surface 12b of the semiconductor substrate 12, a lower electrode 60 is formed over the entire surface. The lower electrode 60 is in ohmic contact with the collector layer 28 and the cathode contact layer 48.
An upper electrode 64 is formed on the upper surface 12 a of the semiconductor substrate 12. The upper electrode 64 is formed so as to cover the cap insulating films 36 and 56. The upper electrode 64 is insulated from the gate electrode 34 and the trench electrode 54. The upper electrode 64 is in ohmic contact with the emitter region 22, the body contact region 24a, and the anode contact region 42a.
Each gate electrode 34 is connected to an electrode formed on the upper surface 12a of the semiconductor substrate 12 at a position not shown. Each trench electrode 54 is connected to an electrode formed on the upper surface 12a of the semiconductor substrate 12 at a position not shown. The gate electrode 34 and the trench electrode 54 are not conductive.

  FIG. 2 shows an inverter circuit 70 having the semiconductor device 10. The inverter circuit 70 includes six semiconductor devices 10 (that is, semiconductor devices 10a to 10f). 2, the upper terminal of each semiconductor device 10 is the lower electrode 60 in FIG. 1, and the lower terminal is the upper electrode 64 in FIG. The semiconductor device 10 a is connected between a power supply line 74 (a line connected to the power supply potential Vcc) and the first phase line 71 of the motor 80. The semiconductor device 10 b is connected between the power supply line 74 and the second phase line 72 of the motor 80. The semiconductor device 10 c is connected between the power supply line 74 and the third phase line 73 of the motor 80. The semiconductor device 10 d is connected between the ground line 75 (a grounded line) and the first phase line 71 of the motor 80. The semiconductor device 10 e is connected between the ground line 75 and the second phase line 72 of the motor 80. The semiconductor device 10 f is connected between the ground line 75 and the third phase line 73 of the motor 80. The gate electrode 34 of each IGBT 20 is connected to the potential control device 82. The potential control device 82 controls the potential of the gate electrode 34 of each IGBT 20, and thereby the on / off of each IGBT 20 is controlled. When each IGBT 20 is turned on and off at an appropriate timing, a three-phase alternating current is supplied to the motor 80 and the motor 80 rotates. The trench electrode 54 of each diode 40 is connected to the potential control device 82. The potential control device 82 also controls the potential of the trench electrode 54 of each diode 40.

An arrow 90 in FIG. 2 indicates a current path when the IGBTs 20a, 20e, and 20f are on and the IGBTs 20b, 20c, and 20d are off. As indicated by an arrow 90, in this state, a current is supplied from the power supply line 74 to the motor 80 via the first phase line 71 (that is, the IGBT 20a). The current input to the motor 80 flows to the ground line 75 via the second phase line 72 (ie, the IGBT 20e) and the third phase line 73 (ie, the IGBT 20f).
In the state of FIG. 2, when the IGBT 20a is switched from on to off, a current flows as shown by an arrow 92 in FIG. That is, when the IGBT 20a is turned off, the supply of current to the motor 80 is stopped. Then, an induced electromotive force is generated between the terminals of the motor 80. Since the IGBTs 20e and 20f are on, a forward voltage is applied to the diode 40d by the induced electromotive force of the motor 80. Thereby, as shown by the arrow 92, the second phase line 72 (ie, IGBT 20e) and the third phase line 73 (ie, IGBT 20f), the ground line 75, the diode 40d, and the first phase line from the motor 80. The current flows back to the motor 80 via 71.
When the IGBT 20a is turned on from the state of FIG. 3, a current flows again as indicated by an arrow 90 in FIG. By appropriately turning on and off the IGBT 20a, the state of FIG. 2 and the state of FIG. 3 are appropriately switched. As a result, the current supplied to the motor 80 is controlled. When switching from the state of FIG. 3 to the state of FIG. 2, the voltage applied to the diode 40d is switched from the forward voltage to the reverse voltage. At this time, a reverse current flows through the diode 40d.

Next, the operation of the semiconductor device 10 when the voltage applied to the diode 40 is switched from the forward voltage to the reverse voltage will be described. Since each semiconductor device 10 is controlled in substantially the same manner, the operation of the semiconductor device 10d will be described below.
4 shows a graph of each value when switching from the state shown in FIG. 3 to the state shown in FIG. 2 (that is, when switching the IGBT 20a from OFF to ON in the state shown in FIG. 3). A graph A1 shows the potential VGI applied to the gate electrode 34 of the IGBT 20a. Graph A2 shows current ID flowing through diode 40d. A graph A3 shows the potential VGD applied to the trench electrode 54 of the diode 40d.

  In a period before the timing T1, the potential VGI is set to 0V, so that the IGBT 20a is turned off, and the inverter circuit 70 operates as shown in FIG. In this state, a forward current flows through the diode 40d. In this state (at the time of forward current application for current return), the potential control device 82 sets the potential VGD to 0V.

When the potential VGI rises to the on potential at timing T1, the IGBT 20a is turned on. When the IGBT 20a is turned on, the potential of the first phase line 71 gradually increases, and the current ID flowing through the diode 40d starts to decrease at the timing T2. At timing T4, discharge of holes present in the cathode drift layer 46 of the diode 40d to the upper electrode 64 is started, and a reverse current starts to flow through the diode 40d. The reverse current gradually rises to a peak value, and thereafter decays as the holes in the cathode drift layer 46 are discharged and becomes zero at timing T5.
The potential control device 82 controls the potential VGD to a negative potential (a potential lower than the ground potential) at a timing T3 after a predetermined time has elapsed from the timing T1 at which the potential VGI becomes 0V. The timing T3 is set to a timing slightly later than the timing T2 at which the current ID starts to decrease. The potential control device 82 controls the potential VGD to a negative potential until timing T5 when the reverse current decays to 0, and then switches the potential VGD to 0V.
If a negative potential is applied to the trench electrode 54 in the period between the timing T2 at which the current ID starts decreasing and the timing T5 at which the reverse current decays, the following decrease occurs. That is, when a negative potential is applied to the trench electrode 54, holes present in the cathode drift layer 46 are attracted to the trench electrode 54. As described above, the high concentration region 47 is formed near the lower end of the trench 50 in the cathode drift layer 46. For this reason, the holes drawn to the trench electrode 54 flow into the high concentration region 47. Since the high concentration region 47 contains n-type impurities at a high concentration, a large number of electrons exist in the high concentration region 47. For this reason, the holes flowing into the high concentration region 47 are recombined with electrons and disappear. As a result, the number of holes in the cathode drift layer 46 is reduced, and the reverse current generated by discharging the holes is reduced. In the example of FIG. 4, a negative potential is applied to the trench electrode 54 in a period between the timing T3 and the timing T5 substantially equal to the timing T2, thereby reducing the reverse current. As a result, the peak value of the reverse current is reduced, and the time from the occurrence of the reverse current to the decay (time from timing T4 to T5) is shortened. This reduces the reverse recovery loss of the diode 40d.

Further, the potential control device 82 sets the applied potential VGD to the trench electrode 54 to 0 V (that is, the upper electrode 64) in the period before the timing T1 (that is, the period in which the forward current flows through the diode 40d for current circulation). The same potential). For this reason, when the diode 40d is energized in the forward direction, holes in the cathode drift layer 46 are not attracted to the trench electrode 54 side. This suppresses holes from flowing into the high concentration region 47 and recombining during forward energization. Thereby, the loss generated in the diode 40d during forward energization is reduced.
In the first embodiment, the potential VGD applied to the trench electrode 54 is set to 0 V during a period in which a forward current flows through the diode 40d for current return. However, the applied potential VGD at this time may be any value as long as it is 0 V or more (that is, the potential of the upper electrode 64 or more). By setting the potential VGD to 0 V or higher, inflow of holes into the high concentration region 47 can be suppressed.

On the other hand, in the semiconductor device 10d, the ON voltage of the IGBT 10d is reduced. That is, in the semiconductor device 10d, the high concentration region 47 is formed only in the cathode drift layer 46 of the diode 40d, and the high concentration region 47 is not formed in the drift layer 26 of the IGBT 20d. Therefore, it is difficult for holes in the drift layer 26 to flow into the high concentration region 47 of the diode 40d when the IGBT 20d is energized. As a result, when the IGBT 20d is energized, the holes in the drift layer 26 are suppressed from disappearing due to recombination, and the on-voltage of the IGBT 20d is reduced.
Further, the potential control device 82 sets the applied potential VGD to the trench electrode 54 of the diode 40d to 0 V (that is, the same potential as the upper electrode 64) when the IGBT 20d is energized. By controlling the potential of the trench electrode 54 in this manner, it is possible to prevent the holes in the drift layer 26 of the IGBT 20d from approaching the high concentration region 47 of the diode 40d when the IGBT 20d is energized. This can further suppress the disappearance of holes in the drift layer 26 due to recombination, and can further reduce the on-voltage of the IGBT 20d.
In the first embodiment, the applied potential VGD to the trench electrode 54 of the diode 40d is set to 0 V when the IGBT 20d is energized. However, the applied potential VGD at this time may be any value as long as it is 0 V or more (that is, the potential of the upper electrode 64 or more). By setting the potential VGD to 0 V or higher, inflow of holes into the high concentration region 47 can be suppressed.

Next, a method for manufacturing the semiconductor device 10 will be described.
The semiconductor device 10 is manufactured from a silicon wafer containing n-type impurities having substantially the same concentration as the low concentration drift layer 26a and the cathode drift layer 46.
First, the body region 24, the emitter region 22, and the anode layer 42 are formed on the upper surface of the silicon wafer by ion implantation and thermal diffusion.
Next, a mask having a pattern corresponding to the trench 30 is formed on the silicon wafer by CVD or the like. Then, the upper surface of the silicon wafer is etched by the RIE method to form the trench 30 on the IGBT 20 side. After the trench 30 is formed, a thermal oxide film is formed on the inner surface of the trench 30, and the thermal oxide film is removed by wet etching, whereby the inner surface of the trench 30 is surface-treated. During this wet etching, the mask is also removed.
Next, a thermal oxide film is grown on the inner surface of the trench 30 to form an insulating film 32. Then, the trench 30 is filled with polysilicon by the CVD method. Thereafter, the polysilicon is etched back to leave the polysilicon only in the trenches 30, thereby forming the gate electrode 34. After the formation of the gate electrode 34, a cap insulating film 36 is formed on the gate electrode 34 by a thermal oxide film.
Next, a mask having a pattern corresponding to the trench 50 is formed on the silicon wafer by CVD or the like. Then, the upper surface of the silicon wafer is etched by RIE to form a trench 50 on the diode 40 side. When the trench 50 is formed, a thin thermal oxide film is formed on the inner surface of the trench 50.
Next, phosphorus ions are implanted toward the upper surface of the silicon wafer. The bottom surface of the trench 50 is covered with a thin oxide film, but phosphorus ions are implanted into the semiconductor layer through the oxide film. On the other hand, since the ion implantation direction and the side surface of the trench 50 are substantially parallel and the side surface of the trench 50 is covered with the thermal oxide film, all phosphorus ions stop on the side surface of the trench 50 in the thermal oxide film. Further, since the region other than the trench 50 in the upper surface of the silicon wafer is covered with the mask, phosphorus ions stop in the mask in this region. Accordingly, phosphorus ions are implanted into the semiconductor layer only near the bottom surface of the trench 50. When phosphorus ions are implanted, the phosphorus ions implanted by heat treatment are thermally diffused. As a result, the high concentration region 47 is formed only near the lower end of the trench 50. During this heat treatment, a thermal oxide film is grown on the inner surface of the trench 50 to form an insulating film 52. Thereafter, the mask on the upper surface of the silicon wafer is removed by wet etching.
Next, the trench 50 is filled with polysilicon by the CVD method. Thereafter, the polysilicon is etched back to leave the polysilicon only in the trench 50, thereby forming the trench electrode 54. After the trench electrode 54 is formed, a cap insulating film 56 is formed on the trench electrode 54 by a thermal oxide film.
Thereafter, the buffer layer 26b, the collector layer 28, the cathode contact layer 48, the upper electrode 64, and the lower electrode 60 are formed by a conventionally known method, thereby completing the semiconductor device 10 of FIG.

  As described above, the structure in which the high concentration region 47 is not formed in the drift layer 26 of the IGBT 20 and the high concentration region 47 is formed only in the cathode drift layer 46 of the diode 40 is easily formed. can do. In this way, the semiconductor device 10 with a low reverse recovery loss of the diode 40 and a low ON voltage of the IGBT 20 is manufactured.

  FIG. 5 shows a semiconductor device 110 according to the second embodiment. In the semiconductor device 110, the high concentration region 47 is also formed near the lower end of the gate electrode 34 of the IGBT 20 (that is, in the drift layer 26). Other structures are the same as those of the semiconductor device 10 of the first embodiment.

In the semiconductor device 110, the potential applied to the trench electrode 54 is controlled in the same manner as in the semiconductor device 10 of the first embodiment. Therefore, the reverse recovery loss of the diode 40 is reduced.
Further, when the IGBT 20 is on, an on-potential (potential higher than the potential of the upper electrode 64) is applied to the gate electrode. A channel is formed in the body region 24 by applying an on-potential to the gate electrode 34. As a result, electrons flow from the emitter region 22 to the collector layer 28 via the channel and the drift layer 26. Further, holes flow from the collector layer 28 into the drift layer 26. As a result, a conductivity modulation phenomenon occurs in the drift layer 26, and a current flows through the IGBT 20 with low loss. At this time, an electric field is generated in the drift layer 26 by applying an ON potential to the gate electrode 34. This electric field prevents holes in the drift layer 26 from flowing toward the vicinity of the gate electrode 34. That is, holes are prevented from flowing into the high concentration region 47 in the drift layer 26 and recombining. Therefore, also in the semiconductor device 110, the holes in the drift layer 26 are prevented from disappearing due to recombination when the IGBT 20 is turned on. Also in the semiconductor device 110, the on-voltage of the IGBT 20 is reduced.

  Thus, even if the high concentration region 47 is formed in the vicinity of the lower end of the gate electrode 34, the on-voltage of the IGBT 20 is reduced. Further, when the high concentration region 47 is also formed in the vicinity of the lower end of the gate electrode 34 in this way, the gate electrode 34 and the trench electrode 54 can be manufactured in the same process, and the manufacturing of the semiconductor device 110 becomes easier.

  FIG. 6 shows a semiconductor device 210 of the third embodiment. In the semiconductor device 210, the IGBTs 20 and the diodes 40 are alternately formed. The gate electrode 34 of the IGBT 20 and the trench electrode 54 of the diode 40 are shared. A high concentration region 47 is formed near the lower end of all the gate electrodes 34.

In the semiconductor device 210, when the IGBT 20 is off, the potential applied to the gate electrode 34 is controlled in the same manner as the trench electrode 54 of the first embodiment. Therefore, the reverse recovery loss of the diode 40 is reduced.
Further, when the IGBT 20 is on, an on potential is applied to the gate electrode 34. Therefore, the holes in the drift layer 26 are prevented from disappearing due to recombination, as in the second embodiment. Also in the semiconductor device 210, the on-voltage of the IGBT 20 is reduced.

  FIG. 7 shows a semiconductor device 310 of the fourth embodiment. In the semiconductor device 310, the structure on the upper surface side is an IGBT structure. Other structures are the same as those of the semiconductor device 210 of the third embodiment. In this semiconductor device 310, the body region 24 of the IGBT 20 and the anode layer 42 of the diode 40 are shared. Further, the low concentration drift layer 26 a of the IGBT 20 and the cathode drift layer 46 of the diode 40 are shared.

In the semiconductor device 310, when the IGBT 20 is off, the potential applied to the gate electrode 34 is controlled in the same manner as the trench electrode 54 of the first embodiment. Therefore, the reverse recovery loss of the diode 40 is reduced.
Further, when the IGBT 20 is on, an on potential is applied to the gate electrode 34. Therefore, the holes in the drift layer 26 are prevented from disappearing due to recombination, as in the second embodiment. Also in the semiconductor device 310, the on-voltage of the IGBT 20 is reduced.

Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology illustrated in the present specification or the drawings achieves a plurality of objects at the same time, and has technical utility by achieving one of the objects.

10: Semiconductor device 12: Semiconductor substrate 12a: Upper surface 12b: Lower surface 20: IGBT
22: emitter region 24: body region 24a: body contact region 24b: low concentration body region 26: drift layer 26a: low concentration drift layer 26b: buffer layer 28: collector layer 30: trench 32: insulating film 34: gate electrode 36: Cap insulating film 40: Diode 42: Anode layer 42a: Anode contact region 42b: Low concentration anode layer 44: Cathode layer 46: Cathode drift layer 47: High concentration region 48: Cathode contact layer 50: Trench 52: Insulating film 54: Trench Electrode 56: Cap insulating film 60: Lower electrode 64: Upper electrode 70: Inverter circuit 71: First phase line 72: Second phase line 73: Third phase line 74: Power supply line 75: Ground line 80: Motor 82: Potential Control device 110: Semiconductor device 210: Semiconductor device 310: Conductor device

Claims (7)

An upper electrode is formed on an upper surface, a lower electrode is formed on a lower surface, and a semiconductor device including a semiconductor substrate on which a vertical IGBT and a vertical diode are formed,
IGBT is
An n-type emitter region in conduction with the upper electrode;
A p-type body region in electrical communication with the upper electrode and adjacent to the emitter region;
An n-type drift region adjacent to the body region and separated from the emitter region by the body region;
A p-type collector region adjacent to the drift region, separated from the body region by the drift region, and in conduction with the lower electrode;
A gate electrode facing the body region in a range separating the emitter region and the drift region through an insulating film;
Have
Diode is
A p-type anode region in conduction with the upper electrode;
An n-type cathode region that is adjacent to the anode region, is in conduction with the lower electrode, and is continuous with the drift region of the IGBT;
A control electrode facing the cathode region via an insulating film,
Have
A semiconductor device, wherein a high concentration region having an n-type impurity concentration higher than that of a surrounding cathode region is formed in a range of the cathode region in contact with the insulating film. A semiconductor device according to claim 1;
When the voltage applied to the diode is switched from the forward voltage to the reverse voltage, during the period at least part of the period from when the diode forward current starts to decrease until the diode reverse current decays, A switching device comprising a potential control device that applies a potential lower than that of the upper electrode to the control electrode.   When the forward current flows through the diode in a period excluding the above period from when the diode forward current starts to decrease until the diode reverse current decays, the potential control device connects the upper electrode to the diode control electrode. The switching device according to claim 2, wherein a potential higher than the potential is applied.   4. The switching device according to claim 2, wherein the potential control device applies a potential equal to or higher than the potential of the upper electrode to the control electrode of the diode when the IGBT is energized. A method for controlling a semiconductor device according to claim 1, comprising:
When the voltage applied to the diode is switched from the forward voltage to the reverse voltage, during the period at least part of the period from when the diode forward current starts to decrease until the diode reverse current decays, And applying a potential lower than that of the upper electrode to the control electrode.   When forward current flows through the diode during the period excluding the above period from when the diode forward current starts to decrease until the diode reverse current decays, a potential higher than the potential of the upper electrode is applied to the diode control electrode. The control method according to claim 5, wherein the control method is applied.   7. The control method according to claim 5, wherein a potential equal to or higher than the potential of the upper electrode is applied to the control electrode of the diode when the IGBT is energized.

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