JP2010185737A - Magnetic sensor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a magnetic sensor improving the noiseproof characteristics and reducing the manufacturing dispersion. <P>SOLUTION: The magnetic sensor (100) includes a magnetoelectric transducer (110), a constant-current circuit (120), a clamp (130), and an amplification part (140). The magnetoelectric transducer (110) includes a pair of input terminals (110a, 110b) and a pair of output terminals (110c, 110d). The constant-current circuit (120) is configured by a pair of PMOS transistors (PMOS1, PMOS2), and supplies a constant-current (id1) from the drain side of the PMOS transistor PMOS1 to the input terminal (110a). The clamp circuit (130) sucks the constant current (id1a) flowing from the input terminal (110b). The input part of the clamp circuit (130) and the input stage of the amplification part (140) are configured by a differential amplifier of the PMOS transistors, respectively. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a magnetic sensor.

A magnetic sensor is mounted on a small electronic device such as a digital still camera, a single-lens reflex camera, a digital video camera, a mobile phone, or a notebook personal computer, and is used for a position sensor such as an open / close detection device or a rotation detection device.

The magnetic sensor includes a magnetoelectric conversion element that generates an output voltage proportional to a magnetic field or magnetic flux density, a drive circuit that drives the magnetoelectric conversion element, an amplification unit that amplifies the output voltage of the magnetoelectric conversion element, and an output voltage of the amplifier. It comprises a comparator for comparison with a predetermined reference voltage. As the magnetoelectric conversion element, a Hall element that outputs a signal corresponding to the strength of the magnetic field passing through the element or the magnetic flux density, or a magnetoresistance whose resistance value changes depending on the strength of the magnetic field is used.

A Hall element used as a magnetoelectric conversion element generally has a pair of input terminals and a pair of output terminals, that is, four terminals. As a drive circuit for driving the Hall element, a constant current drive type and a constant voltage drive type are known.

  FIG. 4 is a partially simplified Hall voltage amplifier circuit disclosed in FIG. 1 of Patent Document 1 (Japanese Patent Laid-Open No. 7-236085), and only the circuit portion related to the present invention is extracted. The Hall voltage amplifier circuit disclosed in Patent Document 1 includes a Hall element 1 that detects the magnitude of magnetic flux density, a constant current circuit 2 that supplies a constant current to one bias terminal 1 a of the Hall element 1, and a Hall element 1. The clamp circuit 3 that fixes one Hall voltage terminal 1d of the Hall element 1 to the reference voltage while sucking a constant current flowing out from the other bias terminal 1b of the first and second terminals, and amplifies the signal from the other Hall voltage terminal 1c of the Hall element 1 The amplifier 8 is provided.

  The (+) side input terminal of the operational amplifier 3 having a circuit function as a clamp circuit is grounded, the output terminal of the operational amplifier 3 is connected to the bias (−) terminal 1b of the Hall element 1, and the (−) side input terminal is connected. The Hall element 1 is connected to the Hall (-) terminal 1d.

  Thus, by connecting the clamp circuit constituted by the operational amplifier 3 to the Hall element 1, the Hall (−) terminal 1d is clamped to the ground potential. Then, the hall terminal 1c that extracts the hall voltage Vh from the hall element 1 is connected to the (+) side input terminal of the operational amplifier 8 for amplifying the hall voltage. A predetermined voltage V5 is supplied to the (−) side input terminal of the operational amplifier 8 via the resistor R20. The predetermined voltage V5 is a voltage for adding an offset to the Hall voltage.

The (−) side input terminal of the operational amplifier 8 is grounded via the resistor R18, and the resistor R19 is connected between the (−) side input terminal and the output terminal of the operational amplifier 8, and further the resistor R19. In parallel with the capacitor C11.

  Resistors R18 and R19 determine the gain amplified by the operational amplifier 8, and the capacitor C11 forms a low-pass filter. The noise component is suppressed by the capacitor C11 constituting the low-pass filter. Then, the amplified Hall voltage Vhout is taken out from the output terminal of the operational amplifier 8.

FIG. 5 shows a current sensor having a magnetoelectric conversion element disclosed in FIG. 4 of Patent Document 2 (Japanese Patent Laid-Open No. 2000-97972). In FIG. 5, the Hall element 12 is driven with a constant current by the temperature compensation circuit 11, and the output differential voltage of the Hall element 12 is amplified by differential amplification. The differential amplifier 30 </ b> A includes an operational amplifier 30, resistors 31 to 35, and a variable resistor 36.

Further, control is made by a control means constituted by an operational amplifier 45 and resistors 46 and 48 so that the midpoint voltage of the Hall element 12 becomes a predetermined voltage. The midpoint voltage refers to the Hall element output voltage when there is no magnetic field, and the midpoint voltage Vm is Vm = ((the voltage at one input terminal of the Hall element 12) + (the other input terminal of the Hall element 12). Voltage)) / 2.

The voltage of one output terminal of the Hall element 12 is input to the inverting terminal (−) of the operational amplifier 45 via the resistor 46, and the non-inverting terminal (+) is connected to the ground GND via the bias current compensation resistor 48. The output terminal of the operational amplifier 45 is connected to the other input terminal of the Hall element 12.

Since the current sensor shown in Patent Document 2 is configured as described above, one output terminal of the Hall element 12 is controlled by the operational amplifier 45 so as to be always at the ground voltage, and is connected to the other output terminal of the Hall element. Indicates that an output voltage proportional to the strength of the magnetic field received by the Hall element 12 appears.

Patent Document 3 (Japanese Patent Laid-Open No. 2006-79471) also discloses a constant current type driving method. With reference to FIG. 3 of Patent Document 3, a system is disclosed in which the Hall element 16 is driven by a constant current source composed of PMOS transistors 12 and 13, an operational amplifier 14, a DAC 15, and a resistor R11. Japanese Patent Application Laid-Open No. H10-228561 shows a device in which the drain of a P-channel MOS transistor is connected to one of a pair of input terminals of the Hall element 16 and the other terminal is grounded. Note that Patent Document 3 refers to the pair of input terminal sides of the Hall element 16 and does not refer to the pair of output terminal sides.

  Patent Document 4 (Japanese Patent Laid-Open No. 2008-9277) does not directly relate to a magnetic sensor, but discloses a voltage-current conversion method, a voltage-current conversion circuit, and an active matrix display device. Patent Document 4 aims to suppress drive current fluctuations due to variations in characteristics of current drive transistors for generating column currents, reduce vertical streak noise on the display area, and improve image quality. What should be particularly noted is that, for example, paragraphs 0029 to 0034 refer to the voltage-current conversion characteristics and variations of the current-driven transistors. According to the description of paragraph 0019, the column current generating circuit used in the display device of the conventional example uses an NMOS transistor as a current driving transistor for generating a column current. In the worst case, the current value supplied to the EL (electroluminescence) element varies for each column of the pixel circuit, and the emission luminance of the EL element varies for each column. This appears as vertical streak noise on the display area, which causes image quality degradation.

Therefore, Patent Document 4 proposes to use a PMOS transistor instead of an NMOS transistor as a current driving transistor for generating a column current. The reason is that the fluctuation variation of the driving current Id of the PMOS transistor, that is, the fluctuation variation of the driving current Id between the source and the drain is smaller than that of the NMOS transistor, and the voltage-current conversion characteristic is excellent. . Assuming that the mobility variation of the NMOS transistor is Δ1, the hole movement which is the carrier of the PMOS transistor is achieved by the participation of the mobility of a plurality of (N) electrons, and one electron mobility variation in the hole movement of the PMOS transistor. Is the same, square measurement is applied, and the mobility variation of the PMOS transistor is 1 / √N with respect to the NMOS transistor. Note that variations in voltage-current conversion between the NMOS transistor and the PMOS transistor are shown in Patent Document 4, FIG. 9, and FIG.

Japanese Patent Laid-Open No. 7-236085 JP 2000-97972 A JP 2006-79471 A JP 2008-9277 A

An object of the present invention is to provide a magnetic sensor capable of improving the noise resistance, that is, the SN ratio, in consideration of the technical ideas disclosed in the above patent documents.

The magnetic sensor of the present invention is
(A) a magnetoelectric conversion element (110) having an input terminal (110a, 110b) and an output terminal (110c, 110d);
(B) a constant current circuit (120) for supplying a constant current (id1) for driving the magnetoelectric conversion element (110);
(C) A clamp circuit (130) that sucks the constant current (id1a) after flowing into the magnetoelectric conversion element (110) and clamps the output voltage of the output terminal (110c) of the magnetoelectric conversion element (110) to a predetermined voltage (Vref). )When,
(D) an amplifying unit (140) for amplifying the output voltage output to the output terminals (110c, 110d) of the magnetoelectric conversion element (110);
(E) Supply of the constant current (id1) to the magnetoelectric conversion element (110) and input of the clamp circuit (130) to which the output voltage output to the output terminals (110c, 110d) of the magnetoelectric conversion element (110) is supplied This is a magnetic sensor (100) in which the input stage (142, 144) of the unit and the amplifying unit (140) is composed of PMOS transistors.

The magnetoelectric conversion element of the present invention has excellent voltage-current conversion characteristics, is driven at a constant current by a PMOS transistor having a small variation in drain current variation, and amplifies the output voltage output to the output terminal of the magnetoelectric conversion element by the PMOS transistor. Therefore, it is possible to provide a magnetic sensor that can improve noise resistance, that is, an S / N ratio and can reduce variations in manufacturing of a semiconductor integrated circuit.

Another magnetic sensor of the present invention is:
(A) a magnetoelectric transducer (110) having first and second input terminals (110a, 110b) and first and second output terminals (110c, 110d);
(B) a constant current circuit (120) for supplying a constant current (id1) to the first input terminal (110a);
(C) The current flowing out from the second input terminal (110b) is sucked in a constant current (id1a) equal to the constant current (id1), and the output voltage of the first output terminal (110c) is fixed to a predetermined voltage (Vref). A clamp circuit (130);
(D) an amplification unit (140) that amplifies at least one of the first and second output voltages;
(E) The constant current (id1) is supplied from the drain side (HC) of the PMOS transistor (PMOS1) constituting the constant current circuit (120).
(F) The input part of the clamp circuit (130) is composed of a PMOS transistor differential amplifier,
(G) The first output terminal (110c) and the predetermined voltage (Vref) are magnetic sensors that are separately supplied to the gate sides of the PMOS transistors constituting the differential amplifier.

According to such a configuration, the input side of the magnetoelectric conversion element is driven by a PMOS transistor having excellent voltage-current conversion characteristics, and the output voltage is also processed and amplified by the PMOS transistor having excellent voltage-current conversion characteristics on the output side of the magnetoelectric conversion element. Therefore, it is possible to provide a magnetic sensor that can reduce variations in manufacturing especially in a semiconductor integrated circuit and can further improve the SN ratio.

  The magnetoelectric conversion element is driven by a PMOS transistor, and the output voltage output from the magnetoelectric conversion element is amplified by a PMOS transistor having a small voltage-current conversion variation, so that the manufacturing variation in the semiconductor integrated circuit is reduced, and further the SN A magnetic sensor with an improved ratio can be obtained.

It is a magnetic sensor which shows 1st Embodiment concerning this invention. It is a magnetic sensor which shows 2nd Embodiment concerning this invention. It is a specific circuit diagram of the clamp circuit concerning the present invention. It is a conventional magnetic sensor. It is another conventional magnetic sensor.

(First embodiment)
FIG. 1 shows a first embodiment of the magnetic sensor of the present invention. The magnetic sensor 100 is roughly composed of a magnetoelectric conversion element 110, a constant current circuit 120, a clamp circuit 130, and an amplification circuit unit 140. The constant current circuit 120, the clamp circuit 130, and the amplifier circuit unit 140 are formed in the same semiconductor integrated circuit.

The magnetoelectric conversion element 110 is constituted by a Hall element, for example, and has a pair of input terminals and a pair of output terminals. In other words, the first input terminal 110a and the second input terminal 110b and the first output terminal 110c and the second output terminal 110d are provided.

As the magnetoelectric conversion element, an indium arsenide hall element utilizing the Hall effect, an indium antimony hall element, a gallium arsenide hall element, a silicon hall element, or the like can be used. Further, a magnetic resistance or the like may be used.

The constant current id1 supplied to the input terminal 110a of the magnetoelectric conversion element 110 is set as a constant current, and is input to the output unit of the operational amplifier 130a via the input terminal 110b of the magnetoelectric conversion element 110 and the external terminal HV provided in the clamp circuit 130. Inhaled. The constant current id1 is equal to the drain current of the PMOS transistor PMOS1, and the constant current id1 supplied to the magnetoelectric conversion element 110 and the constant current id1a sucked in can be ignored if the inflow current or outflow current from the operational amplifier 130a is ignored. Almost equal.

The output voltage of the magnetoelectric conversion element 110 is taken out from the pair of output terminals 110c and 110d. The output voltage output from the terminal 110c is supplied to the first input terminal VIN1 of the operational amplifier 130a constituting the clamp circuit 130 and the non-inverting input terminal (+) of the operational amplifier 142 constituting the amplification unit 140 via the external terminal HN. Entered. A predetermined reference voltage Vref is applied to the second input terminal VIN2 of the operational amplifier 130a. As a result, the output voltage of the output terminal 110c input to the first input terminal VIN1 is maintained at the reference voltage Vref. The output voltage output from the terminal 110d is input to the non-inverting input terminal (+) of the operational amplifier 144 constituting the amplifying unit 140 via the external terminal HP. A predetermined voltage Vref is applied to the inverting input terminal (−) of the operational amplifier 144. As a result, the DC voltage at the non-inverting input terminal (+) of the operational amplifier 144 is maintained at the predetermined voltage Vref.

The constant current circuit 120 includes first and second PMOS transistors PMOS1 and PMOS2, an operational amplifier 122, a DAC 124 that converts a digital signal into an analog signal, and a reference resistor RX. The constant current circuit 120 is provided with external terminals HC and HIR. The external terminal HC is prepared for supplying a constant current id1 for driving the magnetoelectric conversion element 110, and the external terminal HIR is prepared for connecting a reference resistor RX for setting the magnitude of the constant current id1. . To be precise, the reference resistor RX is a part of the constant current circuit 120. The constant current circuit 120 is usually configured by a semiconductor integrated circuit, but the reference resistor RX is configured as an external resistor.

The DAC 124 has a function as a bias voltage adjustment unit of the constant current circuit 120. The bias voltage adjustment unit is prepared for fine adjustment of the drain current (constant current id2) of the PMOS transistor PMOS2, and the voltage of the external terminal HIR to which the reference resistor RX for setting the constant current id2 is connected is adjusted. What is necessary is just to comprise so that it can do. In the embodiment of the present invention, the bias voltage adjustment unit is configured by a DAC, that is, a digital-analog converter, but is not limited thereto. For example, a variable resistor may be connected to the inverting input terminal (−) of the operational amplifier 122 to adjust the voltage at the non-inverting input terminal (+). Further, the inverting input terminal (−) and the non-inverting input terminal (+) of the operational amplifier 122 may be interchanged.

The reason why the reference resistor RX is provided outside the semiconductor integrated circuit is to make it possible to adjust the magnitude of the constant current id1, and to eliminate temperature dependency. For this reason, a reference resistor RX having a small resistance value variation and a small temperature coefficient is selected. Further, when the constant current circuit 120 formed of a semiconductor integrated circuit exhibits a temperature characteristic having a certain gradient, it is preferable to select a reference resistor RX that compensates for the gradient. For example, when the voltage at the external terminal HIR fluctuates with a positive temperature coefficient, a resistor having a positive temperature coefficient can be selected as the reference resistor RX.

The constant current id1 generated by the constant current circuit 120 is supplied to the first input terminal 110a of the magnetoelectric conversion element 110 via the external terminal HC. The constant current id1 is supplied from the drain side of the PMOS transistor PMOS1. It is known that the P-channel type MOS transistor has better voltage-current conversion characteristics of the current drive transistor than the N-channel type transistor, and the drive current variation is small. This is also apparent from Patent Document 4. In the process of examining various electrical characteristics of this type of magnetic sensor, the present inventor has determined from the P-channel type MOS transistor to the magnetoelectric conversion element 110 as one requirement for improving the noise resistance of the magnetic sensor, that is, the SN ratio. It has been found that it is preferable to supply current.

The sources of the pair of P-channel transistors PMOS1 and PMOS2 constituting the constant current circuit 120 are connected in common, and the common connection point is connected to the power supply voltage VDD. The power supply voltage VDD is selected in the range of 3V to 5V, for example. The gates of the pair of PMOS transistors are also connected in common, and this common connection point is connected to the output of the operational amplifier 122. The DAC 124 is connected to the inverting input terminal (−) of the operational amplifier 122. The operational amplifier 122 and the DAC 124 are not essential constituent elements, and the constant current circuit according to the present invention may be configured by a well-known constant current circuit. However, by using the operational amplifier 122 and the DAC 124, the bias voltage Va of the inverting input terminal (−) of the operational amplifier 122 can be finely adjusted. For example, in the case of a 10-bit DAC, the bias voltage Va can be adjusted in the second power of 10, that is, in 1024 stages. Thereby, the constant current id1 can be finely adjusted.

When the power supply voltage VDD is 3V, the bias voltage Va of the operational amplifier 122 is set in the range of 2V ± 0.5V, that is, 1.5V to 2.5V, for example. The bias voltage Va is set by the DAC 124. As described above, the DAC 124 has a function as a so-called bias voltage adjusting unit that adjusts the voltage of the external terminal HIR. When the bias voltage Va of the inverting input terminal (−) of the operational amplifier 122 is set, the bias voltage Vb of the non-inverting input terminal (+) is set substantially equal to the bias voltage va, that is, Vb≈Va. The

The drain of the PMOS transistor PMOS 2 is connected to the non-inverting input terminal (+) of the operational amplifier 122. As a result, the drain is maintained at the bias voltage Vb. The non-inverting input terminal (+) of the operational amplifier 122 and the drain of the PMOS transistor PMOS2 are connected to the external terminal HIR, and the reference resistor RX is connected to the external terminal HIR. Therefore, the drain current (constant current id2) flowing through the PMOS transistor PMOS2 can be expressed by id2 = Va / RX. Here, if Va = 2V and RX = 10 KΩ, the constant current id2 = 200 μA. The drain current of the PMOS transistor PMOS2 (constant current id2) determines the drain current of the PMOS1, that is, the constant current id1 that drives the magnetoelectric conversion element 110.

The constant current id1 of the PMOS transistor PMOS1 is equal to the constant current that drives the magnetoelectric conversion element 110. The constant current id1 is determined by the constant current id2. Here, if the sizes of the PMOS transistors PMOS1 and PMOS2 are selected to be equal, the constant current id2 = id1 can be set. If the constant current Id2 is set to 200 μA, the constant current id1 is also set to 200 μA. If, for example, the gate sizes of PMOS1 and PMOS2 are set to a predetermined ratio, the constant currents id1 and id2 can be set to a predetermined ratio.

The clamp circuit 130 sucks the constant current id1a after the constant current id1 supplied from the constant current circuit 120 flows through the magnetoelectric conversion element 110, and sets the voltage of the output terminal 110c of the magnetoelectric change element 110, that is, the voltage of the external terminal HN to a predetermined value. It has a so-called clamping function for fixing to the voltage Vref. Although the clamp circuit 130 is substantially composed of only the operational amplifier 130a, a resistor or an inverter (not shown) may be connected to the input side or the output side of the operational amplifier 130a. Although a specific circuit configuration of the operational amplifier 130a will be described later, a differential amplifier composed of PMOS transistors is connected to the input terminals VIN1 and VIN2. Since the differential amplifier is composed of two PMOS transistors having excellent voltage-current conversion characteristics, variation in drain current fluctuation can be suppressed smaller than that composed of NMOS transistors.

The clamp circuit 130 corresponds to the operational amplifier 3 shown in FIG. This also corresponds to the operational amplifier 45 shown in FIG.

The amplifying unit 140 is prepared for amplifying output voltages from the two output terminals 110 c and 110 d of the magnetoelectric conversion element 110. The amplifier 140 includes two operational amplifiers, an operational amplifier 142 and an operational amplifier 144. The operational amplifier 142 and the operational amplifier 144 correspond to the input stage of the amplification unit 140. That is, the output voltage output from the magnetoelectric conversion element 110 is first amplified and processed by the operational amplifiers 142 and 144.

The operational amplifier 142 outputs the unipolar Hall output voltage output to the output terminal 110c of the magnetoelectric conversion element 110 via the external terminal HN, and the operational amplifier 144 outputs the unipolar Hall output output to the output terminal 110d of the magnetoelectric conversion element 110. Each voltage is amplified via the external terminal HP. Note that it is not necessary to provide two operational amplifiers in the amplification unit 140. For example, an operational amplifier 144 may be provided to amplify the unipolar Hall voltage output to the output terminal 110d.

In any case, the input stage of the amplification unit 140, that is, the open-up 142 and the operational amplifier 144 to which the output voltage output from the magnetoelectric conversion element 110 is supplied are configured by PMOS transistors. The reason why the PMOS transistor is employed is that the current-voltage conversion characteristic is superior to the NMOS transistor as described above.

(Second Embodiment)
FIG. 2 shows a second embodiment according to the magnetic sensor of the present invention. The magnetic sensor 100 according to the second embodiment includes a magnetoelectric conversion element 110, a constant current circuit 120, a clamp circuit 130, an amplification unit 140, and a voltage generation circuit 150. This embodiment is different from the first embodiment shown in FIG. 1 in that the circuit configuration of the amplification unit 140 is shown in detail and the voltage generation circuit 150 is shown. Therefore, only the amplification unit 140 and the voltage generation circuit 150 will be described here.

The amplifying unit 140 includes operational amplifiers 142 and 144. Further, a DAC 146 which is a digital-analog converter and an ADC 148 which is an analog-digital converter are included. Further, resistors R141 and R143 are provided. Further, a variable resistor R145 is provided.

The amplifying unit 140 is electrically connected to the magnetoelectric conversion element 110 via external terminals HN and HP. The non-inverting input terminal (+) of the operational amplifier 144 is connected to the external terminal HP. With such a circuit configuration, the Hall output voltage of the magnetoelectric conversion element 110 is supplied to the amplification unit 140.

A circuit portion connected to the input side of the operational amplifier 144, that is, the non-inverting input terminal (+) and the inverting input terminal (−) is configured by a differential amplifier of a PMOS transistor. The reason why the PMOS transistor is employed is that the current-voltage conversion characteristic is superior to that of the NMOS transistor as described above. Usually, the amplifying unit 140 is built in the semiconductor integrated circuit together with the constant current circuit 120 and the clamp circuit 130. When such a circuit portion is constituted by a semiconductor integrated circuit, as suggested in Patent Document 4, the voltage-current conversion characteristic varies depending on the position of the chip. Such a variation in the electrical characteristic is caused by the PMOS transistor rather than the NMOS transistor. Can be kept small. In particular, the differential amplifier is advantageous because it requires a small variation in drain current fluctuation.

The Hall output voltage output to the output terminal 110d of the magnetoelectric conversion element 110 is input to the non-inverting input terminal (+) of the operational amplifier 144 via the external terminal HP. A predetermined voltage Vref is applied to the inverting input terminal (−) of the operational amplifier 144 via the resistor R141. An analog voltage is input from the DAC 146, which is a digital-analog converter, via a resistor R143. The DAC 146 is prepared to adjust the output voltage from the output terminal 110d of the magnetoelectric conversion element 110 and the offset voltage on the input side of the operational amplifier 144, and the resolution is set to 10 bits, for example.

The variable resistor R145 is prepared for adjusting the gain of the operational amplifier 144. The gain can also be adjusted by the resistors R141 and R143. The gain of the operational amplifier 144 is one of the design matters, and is set to, for example, 100 times, that is, 40 db.

The hall output voltage amplified by the operational amplifier 144 is converted into a digital signal by an ADC 148 that converts an analog signal into a digital signal.

The voltage generation circuit 150 includes resistors R152 and 154, a capacitor C156, and an operational amplifier 158. The resistors 152 and 154 are, for example, in the range of 50 KΩ to 100 KΩ, and the capacitance value of the capacitor C156 is about 0.1 μF.

The voltage generation circuit 150 supplies a predetermined voltage Vref to the clamp circuit 130 and the amplification unit 140. One end of the resistor R152 is connected to the power supply voltage terminal AVDD. The other end of the resistor R152 and one end of the resistor R154 are connected in common, and the other end of the resistor R154 is connected to the ground terminal AVSS. A capacitor C156 is connected in parallel to the resistor R154. Capacitor C156 serves as a low-pass filter. As a result, the ripple component included in the power supply voltage VDD is removed. The power supply voltage VDD supplied to the power supply voltage terminal AVDD is, for example, in the range of 3V to 5V.

The common connection point of the resistors R152 and R154 is connected to the inverting input terminal (−) of the operational amplifier 158. The operational amplifier 158 is prepared as a voltage follower, the inverting input terminal (−) and the output terminal are commonly connected, and a predetermined voltage Vref is taken out from this common connection point. The extracted predetermined voltage Vref is supplied to the input terminal VIN2 of the operational amplifier 130a and the inverting input terminal (−) side of the operational amplifier 144. The magnitude of the predetermined voltage Vref can be set to almost half the power supply voltage VDD. For example, when the power supply voltage VDD = 3V, the predetermined voltage Vref is 1.5V.

(Third embodiment)
FIG. 3 showing the third embodiment shows a specific circuit configuration of the operational amplifier 130a shown in FIGS. The operational amplifier 130a forms a differential amplifier with a pair of PMOS transistors PMOS3 and PMOS4. The differential amplifier composed of the PMOS transistors PMOS 3 and PMOS 4 has a circuit function as an input part of the clamp circuit 130. The gates of the PMOS transistors PMOS3 and PMOS4 are connected to the input terminals VIN1 and VIN2, respectively. The output voltage output from the output terminal 110c of the magnetoelectric conversion element 110 is supplied to the input terminal VIN1 via the external terminal HN of the clamp circuit 130. A predetermined voltage Vref is applied to the input terminal VIN2. With such a circuit configuration, the output voltage of the magnetoelectric conversion element is amplified by a differential amplifier composed of PMOS transistors.

The sources of the PMOS transistors PMOS3 and PMOS4 are connected in common, and a constant current source CC1 is connected between the common connection point and the power supply voltage terminal AVDD.

The drain of the PMOS transistor PMOS3 is connected to a common connection point between the drain and gate of the NMOS transistor NMOS1. The source of the NMOS transistor NMOS1 is connected to the ground potential GND.

The drain of the PMOS transistor PMOS4 is connected to the drain of the NMOS transistor NMOS2. The gate and source of the NMOS transistor NMOS2 are individually connected to the gate of the NMOS transistor NMOS1 and the ground potential.

The gate, source, and drain of the NMOS transistor NMOS3 are individually connected to the drain of the NMOS transistor NMOS2, the ground potential GND, and one end of the constant current CC2. A phase compensation capacitor C3 is connected between the gate and drain of the NMOS transistor NMOS3. The other end of the constant current source CC2 is connected to the power supply voltage terminal AVDD. The drain of the NMOS transistor NMOS3 is taken out to the external terminal HV.

The configuration of the operational amplifier 130a shown in FIG. 3 is shown very simply. The operational amplifier 130a of the present invention is characterized in that the input terminals VIN1 and VIN2 connected to the magnetoelectric conversion element 110 are connected to a differential amplifier composed of PMOS transistors PMOS3 and PMOS4. The PMOS transistors PMOS3 and PMOS4 are formed in the same semiconductor integrated circuit as the PMOS transistors PMOS1 and PMOS2 constituting the constant current circuit 120. Preferably, the PMOS transistors PMOS1 and PMOS2 are arranged on the semiconductor substrate in close proximity to each other. The PMOS transistors PMOS3 and PMOS4 are disposed on the semiconductor substrate in close proximity to each other. As a result, various characteristics of the transistor such as voltage-current conversion characteristics can be aligned, and variations in manufacturing of the magnetic sensor can be suppressed, and electrical characteristics of the magnetic sensor can be improved.

3 shows the operational amplifier 130a used in the clamp circuit 130, this circuit configuration can also be applied to the operational amplifiers 142 and 144 constituting the input stage of the amplification unit 140. That is. The inverting input terminal (−) and the non-inverting input terminal (+) of the operational amplifiers 142 and 144 are connected to the gates of differential amplifiers composed of PMOS transistors.

As described above, in the magnetic sensor according to the present invention, the magnetoelectric conversion element is driven by the PMOS transistor, and the output voltage output from the output terminal of the magnetoelectric conversion element is also received and amplified by the PMOS transistor. In other words, the SN ratio can be improved, and variations in manufacturing of the semiconductor integrated circuit can be reduced.

The present invention can provide a magnetic sensor with improved S / N ratio, that is, improved noise characteristics, and reduced variations in manufacturing of semiconductor integrated circuits, and therefore, its industrial applicability is extremely high. .

DESCRIPTION OF SYMBOLS 100 Magnetic sensor 110 Magnetoelectric conversion element 110a, 110b Input terminal 110c, 110d Output terminal 120 Constant current circuit 122,142,144,158 Operational amplifier 124,146 DAC (digital-analog converter)
130 Clamp Circuit 140 Amplifier 148 ADC (Analog-to-Digital Converter)
150 Voltage generation circuit C3, C156 Capacitors HC, HIR, HN, HP, HV External terminals id1, id2 Constant current (drain current)
NMOS1, NMOS2 NMOS transistor PMOS1, PMOS2, PMOS3, PMOS4 PMOS transistor RX Reference resistor R141, R143, R152, R154 Resistor R145 Variable resistor

Claims (11)

A magnetoelectric conversion element having an input terminal and an output terminal, a constant current circuit for supplying a constant current for driving the magnetoelectric conversion element, and a suction of the constant current after flowing through the magnetoelectric conversion element A clamp circuit that clamps the output voltage of the output terminal to a predetermined voltage; and an amplifying unit that amplifies the output voltage output to the output terminal of the magnetoelectric conversion element, and supplies the constant current to the magnetoelectric conversion element and the magnetoelectric A magnetic sensor in which an input section of the clamp circuit and an input stage of the amplifying section to which an output voltage output to the output terminal of the conversion element is supplied are configured by PMOS transistors. 2. The magnetic sensor according to claim 1, wherein an input part of the clamp circuit and an input stage of the amplifying part are differential amplifiers each composed of a PMOS transistor.   A magnetoelectric conversion element having first and second input terminals and first and second output terminals, a constant current circuit for supplying a constant current to the first input terminal, and a second current flowing through the magnetoelectric conversion element A clamp circuit that sucks in the constant current flowing out from the input terminal and fixes the output voltage of the first output terminal to a predetermined voltage; and an amplifier that amplifies at least one of the first and second output voltages; The constant current is supplied from the drain side of the PMOS transistor constituting the constant current circuit, and the input part of the clamp circuit is constituted by a differential amplifier of the PMOS transistor, and the output voltage of the first output terminal and The predetermined voltage is separately supplied to each gate side of the PMOS transistor constituting the differential amplifier of the clamp circuit, and the input stage of the amplifying unit is composed of a PMOS transistor. A magnetic sensor configured in dynamic amplifier. The magnetic sensor according to claim 1, wherein the amplifying unit includes a digital-analog converter for adjusting an output voltage from an output terminal of the magnetoelectric conversion element and an offset voltage on an input side of the operational amplifier.   The constant current circuit includes a first PMOS transistor and a second PMOS transistor, the gates of the first PMOS transistor and the second PMOS transistor are connected in common, and the drain of the second PMOS transistor 5. The magnetic sensor according to claim 4, wherein a side of the second PMOS transistor is maintained at a predetermined bias voltage, and a reference resistor for setting the magnitude of the constant current is connected to the drain side of the second PMOS transistor.   An input terminal on one side of an operational amplifier is connected to the drain side of the second PMOS transistor, an output of the operational amplifier is connected to the common gate of the first and second PMOS transistors, and the other side of the operational amplifier The magnetic sensor according to claim 5, wherein the bias voltage adjusting unit is connected to an input terminal of the magnetic sensor.   A magnetoelectric conversion element having a pair of input terminals and a pair of output terminals, a first PMOS transistor for supplying a constant current to one terminal of the pair of input terminals, and a gate and a gate of the first PMOS transistor are common A second PMOS transistor connected to the drain side and maintained at a predetermined bias voltage; a reference resistor connected to the drain side of the second PMOS transistor for setting the constant current; and the pair of inputs A differential circuit comprising a clamp circuit that has an input connected to the other terminal of the terminal and sucks the constant current supplied from one side of the input terminal from the output; and a third PMOS transistor and a fourth PMOS transistor The output voltage extracted from at least one of the pair of output terminals of the magnetoelectric conversion element is the third and fourth. Input to at least one gate of the PMOS transistor, connect the drain side of at least one of the third and fourth PMOS transistors to the gate of the NMOS transistor, and connect the drain side of the NMOS transistor to the clamp circuit A magnetic sensor connected to the output unit and sucking the constant current from the output unit of the clamp circuit.   An input terminal on one side of an operational amplifier is connected to the drain side of the second PMOS transistor, and an output of the operational amplifier is connected to the commonly connected gates of the first and second PMOS transistors. The magnetic sensor according to claim 7, wherein a bias voltage adjusting unit that adjusts a bias voltage of the constant current circuit is connected to the other input terminal.   The magnetic sensor according to claim 7, wherein the bias voltage adjustment unit is a digital-analog converter that converts a digital signal into an analog signal.   The magnetic sensor according to claim 6, wherein the first, second, third, and fourth PMOS transistors are formed in the same semiconductor integrated circuit.   7. The reference resistor for setting the magnitude of the constant current is provided outside the semiconductor integrated circuit in which the first, second, third and fourth PMOS transistors are formed. Magnetic sensor.